Low dropout voltage regulator and operating method thereof

The multi-stage configuration switching control circuit accelerates the reference voltage setting, solves the problem of long stabilization time of traditional low-dropout voltage regulators, and realizes fast, stable and efficient low-dropout voltage regulator operation, which is suitable for electronic devices.

CN119987471BActive Publication Date: 2025-09-30REALTEK SEMICON CORP
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Patent Information

Application Number
CN202311502001.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-11-10
Publication Date
2025-09-30
Estimated Expiration
2043-11-10

AI Technical Summary

Technical Problem

Conventional low-dropout (LDO) regulators take too long to reach a stable state after being enabled, and cannot meet the demands of high-speed operation.

Method used

A multi-stage configuration switching control circuit is adopted to accelerate the initial setting of the reference voltage through multi-stage configuration operations, including first, second and third configuration operations, and use a dedicated current path to quickly reach the predetermined voltage range.

Benefits of technology

The low-dropout voltage regulator is able to reach a stable state in a very short time, thereby improving the overall efficiency of the electronic device, meeting the requirements of high-speed operation, and solving the problem of long stabilization time of traditional voltage regulators without introducing side effects.

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Abstract

The present invention provides a low dropout (LDO) regulator and an operating method thereof. The LDO regulator may include a reference voltage generating circuit, an operational amplifier, a transistor, and a multi-stage configuration switching control circuit. The operating method may include: performing a first configuration operation to enable a first dedicated current path corresponding to the first stage, thereby allowing a target reference voltage used in the LDO voltage regulation mode to reach a first predetermined range after performing the first configuration operation; performing a second configuration operation to enable a second dedicated current path corresponding to the second stage, thereby allowing the target reference voltage to reach a second predetermined range after performing the second configuration operation; and performing a third configuration operation to allow the target reference voltage to be used as a reference voltage input to the operational amplifier in the LDO voltage regulation mode after performing the third configuration operation.
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Description

Technical field

[0001] The present invention relates to circuit design, and in particular to a low-dropout (LDO) voltage regulator and an operating method thereof. [Background Technology]

[0002] According to related art, a voltage regulator, such as a conventional low-dropout (LDO) regulator (also referred to as an LDO regulator / regulator), may be installed in an electronic device to generate a stable voltage based on a source voltage. For example, the source voltage may be noisy, and certain circuits within the electronic device may utilize the stable voltage to avoid being affected by the noise. When these circuits are not needed, the electronic device can temporarily shut down the conventional LDO regulator to save power. When these circuits are needed, the electronic device can turn the conventional LDO regulator back on. Conventional LDO regulators can take a considerable amount of time to reach a stable state. Several proposals have been made in the related art to attempt to address this issue, but none appear to have truly resolved the issue. For example, the average time it takes for a conventional LDO regulator to reach a stable state can exceed 10 microseconds (μs), and the electronic device may need to wait even longer, such as 20 milliseconds (ms), to avoid errors caused by any variation in the time it takes to reach a stable state. This may be too long for high-speed operation. Therefore, a novel method and related architecture are needed to solve this problem without introducing any side effects or in a manner that is less likely to introduce side effects. [Summary of the invention]

[0003] One of the objectives of the present invention is to provide a low dropout voltage regulator and an operating method thereof to solve the above-mentioned problems and improve the overall efficiency.

[0004] At least one embodiment of the present invention provides a low-dropout (LDO) voltage regulator. The LDO voltage regulator may include a reference voltage generating circuit, an operational amplifier coupled to the reference voltage generating circuit, a transistor coupled to the operational amplifier, and a multi-stage configuration switching control circuit coupled to the reference voltage generating circuit, the operational amplifier, and the transistor. The reference voltage generating circuit may be configured to generate at least one reference voltage; the operational amplifier may be configured to control an output voltage of the LDO voltage regulator via negative feedback in a LDO voltage regulation mode of the LDO voltage regulator; the transistor may be configured to generate the output voltage of the LDO voltage regulator under the control of the operational amplifier in the LDO voltage regulation mode for further use; and the multi-stage configuration switching control circuit may be configured to perform multi-stage configuration switching control to perform multiple configuration operations on the circuit architecture of the LDO voltage regulator. For example, the multi-stage configuration switching control circuit performs a first configuration operation on the circuit architecture of the low-dropout regulator to enable a first dedicated current path corresponding to a first stage, so as to allow a target reference voltage used in the low-dropout regulation mode to reach a first predetermined range after performing the first configuration operation; the multi-stage configuration switching control circuit performs a second configuration operation on the circuit architecture of the low-dropout regulator to enable a second dedicated current path corresponding to a second stage, so as to allow the target reference voltage to reach a second predetermined range after performing the second configuration operation; and the multi-stage configuration switching control circuit performs a third configuration operation on the circuit architecture of the low-dropout regulator to allow the target reference voltage to be used as the reference voltage input to the operational amplifier in the low-dropout regulation mode after performing the third configuration operation.

[0005] At least one embodiment of the present invention provides an operating method applicable to the aforementioned low-dropout (LDO) regulator. The operating method may include: utilizing a multi-stage configuration switching control circuit to perform a first configuration operation on the circuit architecture of the LDO regulator to enable a first dedicated current path corresponding to the first stage, thereby allowing a target reference voltage used in the LDO regulation mode to reach a first predetermined range after the first configuration operation; utilizing the multi-stage configuration switching control circuit to perform a second configuration operation on the circuit architecture of the LDO regulator to enable a second dedicated current path corresponding to the second stage, thereby allowing the target reference voltage to reach a second predetermined range after the second configuration operation; and utilizing the multi-stage configuration switching control circuit to perform a third configuration operation on the circuit architecture of the LDO regulator to allow the target reference voltage to be used as a reference voltage input to the operational amplifier in the LDO regulation mode after the third configuration operation.

[0006] The low-dropout (LDO) voltage regulator and its operating method of the present invention can perform preliminary reference voltage setting through multi-stage control. Specifically, the initial reference voltage setting is accelerated so that the target reference voltage quickly reaches a predetermined voltage level. Furthermore, the low-dropout (LDO) voltage regulator and its operating method of the present invention can solve problems in the related art without introducing any side effects, or in a manner that is unlikely to introduce side effects.

Brief Description of the Drawings

[0007] Figure 1 FIG. 1 is a schematic diagram of a low dropout voltage regulator according to an embodiment of the present invention.

[0008] Figure 2 FIG. 4 is a schematic diagram of a low dropout voltage regulator according to another embodiment of the present invention.

[0009] Figure 3A According to one embodiment of the present invention, Figure 1 The circuit architecture shown is configured in a first phase.

[0010] Figure 3B According to one embodiment of the present invention, Figure 2 The circuit architecture shown is configured in this first phase.

[0011] Figure 4A According to one embodiment of the present invention, Figure 1 The circuit architecture shown is configured in a second phase.

[0012] Figure 4B According to one embodiment of the present invention, Figure 2 The circuit architecture shown is configured in this second phase.

[0013] Figure 5A According to one embodiment of the present invention, Figure 1 The circuit architecture shown is configured in a third phase.

[0014] Figure 5B According to one embodiment of the present invention, Figure 2 The circuit architecture shown is configured in this third phase.

[0015] Figure 6 A timing diagram of related signals is depicted according to an embodiment of the present invention.

[0016] Figure 7 According to one embodiment of the present invention, a working process of an operating method of a low dropout voltage regulator is described. [Specific implementation method]

[0017] Various embodiments of the present invention provide a low-dropout (LDO) voltage regulator (LDO) capable of performing a preliminary reference voltage setting through multi-stage control. This allows the LDO to reach a stable state immediately after being turned on, allowing an electronic device employing the LDO to immediately use the LDO, thereby improving overall efficiency. For example, an output voltage of the LDO can quickly reach a predetermined voltage level, allowing at least one internal circuit (e.g., one or more internal circuits) of the electronic device to operate based on the output voltage having reached the predetermined voltage level. When the at least one internal circuit is not needed, the electronic device can temporarily shut down the LDO to conserve power. When the at least one internal circuit is needed, the electronic device can re-enable the LDO. Similarly, after being re-enabled, the LDO can reach a stable state immediately, allowing the electronic device (or the at least one internal circuit therein) to immediately use the LDO, thereby improving overall efficiency.

[0018] Figure 1 The figure is a schematic diagram of a low-dropout (LDO) voltage regulator 100A according to an embodiment of the present invention, wherein the LDO voltage regulator 100A can be used as an example of the above-mentioned LDO voltage regulator of the present invention. The LDO voltage regulator 100A can include a reference voltage generating circuit 101, an operational amplifier (OPA) 104 (labeled "OPA" for simplicity), a transistor 106, a multi-stage configuration switching control circuit 110, an automatic fast-set (AF) control circuit 120 (labeled "AF control circuit" for simplicity), a current control circuit 130, a plurality of resistors {R1, R2}, a plurality of capacitors {C1, C2, C3}, a plurality of switch circuits {SW1, SW2, SW3, SW4}, and a power line PWR for providing a power supply voltage VDD. These components can be coupled to each other as shown in FIG. Figure 1 As shown, the reference voltage generating circuit 101 may include a reference voltage generator 102 and a reference voltage converter 103, the transistor 106 may be implemented by a metal oxide semiconductor field effect transistor (MOSFET), such as an N-type MOSFET MN1, and among the multiple input terminals of the operational amplifier 104, a first input terminal and a second input terminal for receiving input voltages VIP and VIN, respectively, may represent a positive input terminal and a negative input terminal, respectively (respectively marked "+" and "-" in the triangle "LDO OP" representing the operational amplifier for simplicity), but the present invention is not limited thereto. According to some embodiments, Figure 1The circuit architecture shown may be varied.

[0019] Figure 2 FIG. 1 is a schematic diagram of a low-dropout (LDO) voltage regulator 100B according to another embodiment of the present invention, wherein the LDO voltage regulator 100B can be used as an example of the above-mentioned LDO voltage regulator of the present invention. The LDO voltage regulator 100B can include a reference voltage generating circuit 101, an operational amplifier 104 (labeled "OPA" for simplicity), a transistor 106, a multi-stage configuration switching control circuit 110, an automatic fast setting control circuit 120 (labeled "AF control circuit" for simplicity), a current control circuit 130, resistors {R1, R2}, capacitors {C1, C2, C3}, switch circuits {SW1, SW2, SW3, SW4}, and a power line PWR. These components can be coupled to each other as shown in FIG. Figure 2 As shown, the transistor 106 can be implemented by the MOSFET, such as a P-type MOSFET MP1, and among the multiple input terminals of the operational amplifier 104, the first input terminal and the second input terminal for receiving the input voltages VIP and VIN respectively can represent the negative input terminal and the positive input terminal respectively (respectively marked "-" and "+" in the triangle "LDO OP" representing the operational amplifier for simplicity), but the present invention is not limited thereto. According to some embodiments, Figure 2 The circuit architecture shown may be varied.

[0020] like Figure 1 and Figure 2 As shown in any of the figures, the low-dropout (LDO) regulator of the present invention (e.g., the LDO regulator 100A or 100B) can utilize a reference voltage generating circuit 101 to generate at least one reference voltage, utilize an operational amplifier 104 to control the output voltage LDO_OUT of the LDO regulator through negative feedback in a low-dropout (LDO) regulation mode of the LDO regulator, and utilize a transistor 106 to generate the output voltage LDO_OUT of the LDO regulator under the control of the operational amplifier 104 in the LDO regulation mode for further use. In particular, the low-dropout (LDO) regulator of the present invention (e.g., the LDO regulator 100A or 100B) can utilize a multi-stage configuration switching control circuit 110 to perform multi-stage configuration switching control to adjust the circuit architecture of the LDO regulator (e.g., Figure 1 or Figure 2 For example, the related operations for the multi-stage configuration switching control may include:

[0021] (1) The multi-stage configuration switching control circuit 110 may perform a first configuration operation on the circuit architecture of the low-dropout (LDO) regulator to enable a first dedicated current path corresponding to a phase 1 (e.g., a current path starting from the power line PWR, passing through the current control circuit 130 and the switch circuit SW3, and reaching the upper terminal of the capacitor C1), so as to allow a target reference voltage VREF used in the LDO regulation mode to reach a first predetermined range after performing the first configuration operation;

[0022] (2) the multi-stage configuration switching control circuit 110 may perform a second configuration operation on the circuit architecture of the low dropout regulator to enable a second dedicated current path corresponding to a phase 2 (e.g., a current path starting from the reference voltage converter 103, passing through the switch circuit SW1, and reaching the upper terminal of the capacitor C1), so as to allow the target reference voltage VREF to reach a second predetermined range after performing the second configuration operation; and

[0023] (3) The multi-stage configuration switching control circuit 110 can perform a third configuration operation on the circuit architecture of the low-dropout (LDO) regulator to allow the target reference voltage VREF to be used as the reference voltage VREF input to the operational amplifier 104 in the LDO regulation mode after performing the third configuration operation;

[0024] However, the present invention is not limited thereto. According to some embodiments, the operations related to the multi-stage configuration switching control may be varied.

[0025] Furthermore, reaching the first predetermined range may include exceeding a voltage level VB, and reaching the second predetermined range may include approaching a voltage level VA, wherein the voltage level VB is less than the voltage level VA, and in particular, slightly less than the voltage level VA. For example, the at least one reference voltage may include a reference voltage VR1 equal to the voltage level VA and a reference voltage VR2 equal to the voltage level VB. The reference voltage generator 102 may generate the reference voltage VR1, and the reference voltage converter 103 may convert the reference voltage VR1 to generate the reference voltage VR2, and control the difference (VR1-VR2) between the reference voltage VR1 and the reference voltage VR2 to be equal to a predetermined difference (VA-VB), that is, the difference (VA-VB) between the voltage level VA and the voltage level VB, so that the multi-stage configuration switching control circuit 110 can accelerate the setting of the target reference voltage VREF.

[0026] In addition, the multi-stage configuration switching control circuit 110 can generate a plurality of control signals {VREF_SHORT, VAUTO_FASTSET, VAUTO_FASTSET_B} to control the switch circuits {SW1, SW2, SW3, SW4} to perform any one of the plurality of configuration operations (e.g., the first configuration operation, the second configuration operation, and the third configuration operation) on the circuit architecture of the low dropout regulator, wherein the control signal VAUTO_FASTSET_B can represent an inverse signal of the control signal VAUTO_FASTSET. Figure 1 and Figure 2 As shown in any of the figures, among the multiple input terminals of the operational amplifier 104, the first input terminal for receiving the input voltage VIP can be coupled to the output terminal of the reference voltage generator 102 through the resistor R1, and after performing the second configuration operation or the third configuration operation, the second input terminal for receiving the input voltage VIN can be coupled to a first terminal of the transistor 106 through a negative feedback path (on which the switch circuit SW4 is provided), for example, the lower terminal among the multiple terminals of the transistor 106 for outputting the output voltage LDO_OUT of the low dropout regulator. Figure 1 Taking the circuit structure shown as an example, the second input terminal for receiving the input voltage VIN can be coupled to the source terminal of the N-type MOSFET MN1 through the negative feedback path. Figure 2 Taking the circuit structure shown as an example, the second input terminal for receiving the input voltage VIN can be coupled to the drain terminal of the P-type MOSFET MP1 through the negative feedback path.

[0027] In the circuit architecture of the low dropout regulator (for example: Figure 1 or Figure 2In the circuit architecture shown in FIG. 1 , the reference voltage generator 102 may be implemented by a bandgap reference voltage generating circuit, for example. The reference voltage converter 103 may be implemented by a voltage divider resistor or a diode-connected transistor, such as a diode-connected MOSFET (e.g., a MOSFET with its gate and drain terminals connected to each other). The multi-stage configuration switching control circuit 110 and the automatic fast setting control circuit 120 may be implemented by a logic circuit, for example. The current control circuit 130 may be implemented by various transistors, such as MOSFETs (e.g., N-type MOSFETs and / or P-type MOSFETs), resistors with fixed resistance values, variable resistors, and the switch circuits {SW1, SW2, SW3, SW4} may be implemented by various transistors, such as MOSFETs (e.g., N-type MOSFETs and / or P-type MOSFETs), for example. However, the present invention is not limited thereto.

[0028] Figure 3A According to one embodiment of the present invention, Figure 1 The circuit architecture shown is configured in Phase 1. Figure 1 Under the control of the multi-stage configuration switching control circuit 110 (or the control signals {VREF_SHORT, VAUTO_FASTSET, VAUTO_FASTSET_B} generated and outputted therefrom), the switch circuits {SW1, SW2, SW3, SW4} can operate as follows: Figure 3A As shown, the multi-stage configuration switching control circuit 110 allows the circuit architecture of the low dropout regulator 100A to perform the first configuration operation. For example, the multi-stage configuration switching control circuit 110 can turn on the switch circuits SW2 and SW3 and turn off the switch circuits SW1 and SW4.

[0029] Figure 3B According to one embodiment of the present invention, Figure 2 The circuit architecture shown is configured in Phase 1. Figure 2 Under the control of the multi-stage configuration switching control circuit 110 (or the control signals {VREF_SHORT, VAUTO_FASTSET, VAUTO_FASTSET_B} generated and outputted therefrom), the switch circuits {SW1, SW2, SW3, SW4} can operate as follows: Figure 3B As shown, the multi-stage configuration switching control circuit 110 allows the circuit architecture of the low dropout voltage regulator 100B to perform the first configuration operation. For example, the multi-stage configuration switching control circuit 110 can turn on the switch circuits SW2 and SW3 and turn off the switch circuits SW1 and SW4.

[0030] like Figure 3Aand Figure 3B As shown in any of the figures in , performing the first configuration operation may include:

[0031] (1) activating the first dedicated current path corresponding to Phase 1 (e.g., a current path starting from the power line PWR, passing through the current control circuit 130 and the switch circuit SW3, and reaching the upper terminal of the capacitor C1) to perform a first preliminary setting operation on the target reference voltage VREF according to the power supply voltage VDD, so as to accelerate the target reference voltage VREF to reach the first predetermined range;

[0032] (2) coupling the plurality of input terminals of the operational amplifier 104 (e.g., the first input terminal and the second input terminal for receiving the input voltages VIP and VIN, respectively) to the target reference voltage VREF and the reference voltage VR2, respectively, so that the operational amplifier 104 functions as a comparator for comparing the target reference voltage VREF with the reference voltage VR2; and

[0033] (3) disconnecting the negative feedback path between the second input terminal of the operational amplifier 104 (e.g., the second input terminal for receiving the input voltage VIN) and the first terminal of the transistor 106 (e.g., the lower terminal for outputting the output voltage LDO_OUT of the low-dropout regulator) to disable the negative feedback path used in the low-dropout regulation mode;

[0034] In the low-dropout (LDO) regulation mode, the first terminal of transistor 106 is used to output the output voltage LDO_OUT of the LDO regulator, but the present invention is not limited thereto. Furthermore, the automatic fast-set control circuit 120 can be coupled to an output terminal of the operational amplifier 104 (e.g., the output terminal for generating the output voltage VOP) and can receive a comparison result between the target reference voltage VREF and the reference voltage VR2 from the operational amplifier 104 to generate a control signal AF based on the comparison result. The current control circuit 130 can be coupled to the automatic fast-set control circuit 120 and can control the current I in the first dedicated current path based on the control signal AF to accelerate the target reference voltage VREF to reach the first predetermined range.

[0035] Figure 4A According to one embodiment of the present invention, Figure 1 The circuit architecture shown is configured in Phase 2. Figure 1 Under the control of the multi-stage configuration switching control circuit 110 (or the control signals {VREF_SHORT, VAUTO_FASTSET, VAUTO_FASTSET_B} generated and outputted therefrom), the switch circuits {SW1, SW2, SW3, SW4} can operate as follows: Figure 4A As shown, the multi-stage configuration switching control circuit 110 allows the circuit architecture of the low dropout regulator 100A to perform the second configuration operation. For example, the multi-stage configuration switching control circuit 110 can turn on the switch circuits SW1 and SW4 and turn off the switch circuits SW2 and SW3.

[0036] Figure 4B According to one embodiment of the present invention, Figure 2 The circuit architecture shown is configured in Phase 2. Figure 2 Under the control of the multi-stage configuration switching control circuit 110 (or the control signals {VREF_SHORT, VAUTO_FASTSET, VAUTO_FASTSET_B} generated and outputted therefrom), the switch circuits {SW1, SW2, SW3, SW4} can operate as follows: Figure 4B As shown, the multi-stage configuration switching control circuit 110 allows the circuit architecture of the low dropout regulator 100B to perform the second configuration operation. For example, the multi-stage configuration switching control circuit 110 can turn on the switch circuits SW1 and SW4 and turn off the switch circuits SW2 and SW3.

[0037] like Figure 4A and Figure 4B As shown in any of the figures in , performing the second configuration operation may include:

[0038] (1) stopping coupling the second input terminal of the operational amplifier 104 (e.g., the second input terminal for receiving the input voltage VIN) to the reference voltage VR2, and coupling the second input terminal of the operational amplifier 104 to the first terminal of the transistor 106 (e.g., the lower terminal for outputting the output voltage LDO_OUT of the low dropout regulator), so as to enable the negative feedback path used in the low dropout regulation mode;

[0039] (2) disabling the first dedicated current path corresponding to Phase 1 (e.g., a current path starting from the power line PWR, passing through the current control circuit 130 and the switch circuit SW3, and reaching the upper terminal of the capacitor C1), wherein the first dedicated current path may be coupled between the power line PWR and the first input terminal of the operational amplifier 104 (e.g., the first input terminal for receiving the input voltage VIP) in Phase 1, and may no longer be coupled between the power line PWR and the first input terminal of the operational amplifier 104 in Phase 2; and

[0040] (3) enabling the second dedicated current path corresponding to Phase 2 (e.g., a current path starting from the reference voltage converter 103, passing through the switch circuit SW1, and reaching the upper terminal of the capacitor C1) to couple the first input terminal of the operational amplifier 104 (e.g., the first input terminal for receiving the input voltage VIP) to the reference voltage VR2, thereby forcing the target reference voltage VREF to be equal to the reference voltage VR2, so as to reduce any deviation of the target reference voltage VREF generated in Phase 1 from the second predetermined range and accelerate the target reference voltage VREF to reach the second predetermined range;

[0041] However, the present invention is not limited thereto. Furthermore, the time during which the second dedicated current path corresponding to Phase 2 is enabled may include at least a portion (e.g., a portion or the entirety) of Phase 2. For example, the time during which the second dedicated current path corresponding to Phase 2 is enabled may include a portion of Phase 2, specifically, until a predetermined time length (e.g., the maximum response time of the switch circuit SW1) is reached. For another example, the time during which the second dedicated current path corresponding to Phase 2 is enabled may include the entirety of Phase 2.

[0042] Figure 5A According to one embodiment of the present invention, Figure 1 The circuit architecture shown is configured in Phase 3. Figure 1 Under the control of the multi-stage configuration switching control circuit 110 (or the control signals {VREF_SHORT, VAUTO_FASTSET, VAUTO_FASTSET_B} generated and outputted therefrom), the switch circuits {SW1, SW2, SW3, SW4} can operate as follows: Figure 5A As shown, the multi-stage configuration switching control circuit 110 allows the LDO regulator 100A to perform the third configuration operation. For example, the multi-stage configuration switching control circuit 110 can turn on the switch circuit SW4 and turn off the switch circuits SW1, SW2, and SW3.

[0043] Figure 5B According to one embodiment of the present invention, Figure 2 The circuit architecture shown is configured in Phase 3. Figure 2 Under the control of the multi-stage configuration switching control circuit 110 (or the control signals {VREF_SHORT, VAUTO_FASTSET, VAUTO_FASTSET_B} generated and outputted therefrom), the switch circuits {SW1, SW2, SW3, SW4} can operate as follows: Figure 5BAs shown, the multi-stage configuration switching control circuit 110 allows the circuit architecture of the low dropout regulator 100B to perform the third configuration operation. For example, the multi-stage configuration switching control circuit 110 can turn on the switch circuit SW4 and turn off the switch circuits SW1, SW2 and SW3.

[0044] like Figure 5A and Figure 5B As shown in any of the figures in , performing the third configuration operation may include:

[0045] (1) disabling the second dedicated current path corresponding to Phase 2 (e.g., the current path starting from the reference voltage converter 103, passing through the switch circuit SW1, and reaching the upper terminal of the capacitor C1), wherein the second dedicated current path is no longer used to couple the first input terminal of the operational amplifier 104 (e.g., the first input terminal for receiving the input voltage VIP) to the reference voltage VR2 in Phase 3;

[0046] After performing the second configuration operation, the multi-stage configuration switching control circuit 110 may immediately perform the third configuration operation, so that the third configuration operation is immediately after the second configuration operation, but the present invention is not limited thereto.

[0047] Figure 6 According to one embodiment of the present invention, a timing diagram illustrating related signals such as the power control signal POW_LDO, the system control signal FASTSET, the reference voltages VR1 and VR2, the target reference voltage VREF, the output voltage VOP of the operational amplifier 104, the control signals VAUTO_FASTSET and VREF_SHORT, and the output voltage LDO_OUT of the low dropout regulator is shown, wherein the voltage levels VA and VB and the phases Phase1, Phase2, and Phase3 as well as the sub-phases Phase3a and Phase3b of Phase3 can be depicted. Figure 6For ease of understanding, the present invention is not limited thereto. According to certain embodiments, the related signals, voltage levels VA and VB, phases Phase 1, Phase 2, and Phase 3, and / or sub-phases Phase 3a and Phase 3b may vary. Furthermore, an upper-level circuit within the electronic device (e.g., at least one microcontroller or processor) may generate a power control signal POW_LDO to control the power supply of the low-dropout (LDO) regulator of the present invention (e.g., LDO regulator 100A or 100B) to enable the LDO regulator to provide the power voltage VDD via the power line PWR at the start of phase Phase 1, and may also generate a system control signal FASTSET to control the at least one internal circuit to utilize the LDO regulator during sub-phase Phase 3b. In some embodiments, after the start time of Phase 2, the multi-phase configuration switching control circuit 110 may control the control signal VREF_SHORT to perform a corresponding state transition according to the system control signal FASTSET (or its state transition), which means that Phase 2 may be extended so that Phase 3 is equal to sub-phase Phase 3b and the length of sub-phase Phase 3a is zero, but the present invention is not limited thereto. Figure 6 As shown, the multi-stage configuration switching control circuit 110 can control the time difference between the two state transition time points of the control signal VREF_SHORT (or the respective time points of its rising edge and falling edge) to be very small. For example, this time difference can be controlled to be equal to a predetermined delay time (e.g., 0.3 μs) via a delay circuit.

[0048] For example, the duration of Phase 1 may be less than 3 μs, which is shorter than the time it takes for a conventional low-dropout (LDO) regulator to reach a stable state (e.g., greater than 10 μs). After performing the first configuration operation, the multi-stage configuration switching control circuit 110 may utilize the first dedicated current path to perform the first preliminary setting operation for the target reference voltage VREF based on the power supply voltage VDD. Specifically, during Phase 1, the capacitor C1 is charged with a current I (e.g., a large current significantly greater than the maximum output current of the reference voltage generator 102 and significantly greater than the maximum output current of the reference voltage converter 103) in the first dedicated current path to accelerate the target reference voltage VREF to reach the first predetermined range (e.g., exceeding the voltage level VB). Furthermore, after performing the second configuration operation, the multi-stage configuration switching control circuit 110 may utilize the second dedicated current path to forcibly set the target reference voltage VREF to be equal to the reference voltage VR2. Specifically, in Phase 2, the switching circuit SW1 is turned on to short-circuit VREF so that VREF = VR2, thereby reducing any deviation of the target reference voltage VREF generated in Phase 1 from the second predetermined range and accelerating the target reference voltage VREF to reach the second predetermined range (e.g., approaching the voltage level VA). Furthermore, after performing the second configuration operation, the multi-stage configuration switching control circuit 110 may immediately perform the third configuration operation. Specifically, in Phase 3, the switching circuit SW1 is turned off to remove the short-circuit, allowing current from the reference voltage generator 102 through the resistor R1 to charge the capacitor C1, thereby controlling the target reference voltage VREF to reach the second predetermined range (e.g., approaching the voltage level VA) earlier.

[0049] The low-dropout (LDO) regulator of the present invention (e.g., the LDO regulator 100A or 100B) can be ready for use in a very short time after being turned on, so its efficiency is better than that of a conventional LDO regulator. For a conventional LDO regulator, the time difference between the state transition time of the system control signal FASTSET (e.g., the time of its falling edge) and the state transition time of the power control signal POW_LDO (e.g., the time of its rising edge) may need to be set to at least 20ms to ensure that the output voltage of the conventional LDO regulator becomes stable. For the LDO regulator of the present invention, this time difference can be significantly shortened. Figure 6Taking the timing diagram shown as an example, the duration of Phase 1 can be less than 3 μs, the duration of Phase 2 can be significantly less than 3 μs, and the total duration of Phase 2 and sub-phase Phase 3a can be approximately 4.5 μs. This means that the low-dropout (LDO) regulator of the present invention can be ready for use in 7.5 μs (e.g., (3 + 4.5) μs = 7.5 μs) or less. Because the short circuit achieved by turning on switch circuit SW1 in Phase 2, such that VREF = VR2, controls the target reference voltage VREF to be very close to voltage level VA, the target reference voltage VREF can quickly reach voltage level VA after the short circuit is removed. Therefore, the time difference between the state transition time of system control signal FASTSET (e.g., the time of its falling edge) and the state transition time of power control signal POW_LDO (e.g., the time of its rising edge), can be controlled to within 7.5 μs or even shorter, but the present invention is not limited to this. When a more conservative control is adopted, this time difference can be arbitrarily set to be larger, for example, set to 5ms, which is still less than the 20ms required by the traditional low-dropout regulator.

[0050] Furthermore, to save area and reduce power consumption, the power consumption of the reference voltage generator within a conventional low-dropout (LDO) regulator can be quite limited. Furthermore, the associated resistor R / capacitor C values ​​for more stringent product specifications are typically larger and require longer settling times, which can render conventional LDO regulators unable to meet high-speed operation requirements. However, the LDO regulator of the present invention can implement multi-stage switching control to easily meet high-speed operation requirements for the same stringent product specifications. For example, when the maximum output current of the reference voltage generating circuit 101 (or the reference voltage generator 102 or reference voltage converter 103 therein) can be quite limited, the resistance R1 of the resistor R1 and / or the capacitance C1 of the capacitor C1 can be increased, and the settling time of the target reference voltage VREF can be correspondingly increased. The LDO regulator can utilize a predetermined differential (VA - VB) that is designed to be very small, so that the target reference voltage VREF immediately reaches the voltage level VA after rapidly exceeding the voltage level VB and then immediately returning to the voltage level VB.

[0051] Figure 7 According to one embodiment of the present invention, a workflow of a method for operating a low dropout (LDO) regulator (eg, the LDO regulator 100A or 100B) is described.

[0052] In step S11, the LDO regulator may utilize the multi-stage configuration switching control circuit 110 to perform the first configuration operation on the circuit architecture of the LDO regulator to enable the first dedicated current path corresponding to a first stage (e.g., stage Phase 1) to allow the target reference voltage VREF used in the LDO regulation mode to reach the first predetermined range after performing the first configuration operation.

[0053] In step S12, the LDO regulator may utilize the multi-stage configuration switching control circuit 110 to perform the second configuration operation on the circuit architecture of the LDO regulator to enable the second dedicated current path corresponding to a second stage (e.g., stage Phase 2) to allow the target reference voltage VREF to reach the second predetermined range after performing the second configuration operation.

[0054] In step S13, the LDO regulator may utilize the multi-stage configuration switching control circuit 110 to perform the third configuration operation on the circuit architecture of the LDO regulator, so as to allow the target reference voltage VREF to be used as the reference voltage VREF input to the operational amplifier 104 in the LDO regulation mode after performing the third configuration operation.

[0055] The low dropout voltage regulator can be based on Figure 7 The overall efficiency of the electronic device can be significantly improved by operating the illustrated workflow. For better understanding, it is assumed that in one embodiment, the low-dropout (LDO) regulator can be configured to temporarily skip steps S11 and / or S12, but the present invention is not limited thereto. For example, if steps S11 and S12 are skipped and the configuration shown in FIG5A / 5B is directly executed, charging capacitor C1 using only the current from reference voltage generator 102 through resistor R1 requires a significant amount of time (e.g., a time corresponding to the time constant (R1*C1)) for the target reference voltage VREF to reach voltage level VA. This is because capacitor C1 can be very large (e.g., to filter out noise). For another example, if step S11 is skipped and the configuration shown in FIG4A / 4B is directly executed, followed by the configuration shown in FIG5A / 5B, the problem of a long charging time still exists due to the limited maximum output current of reference voltage generating circuit 101 (or reference voltage generator 102 or reference voltage converter 103 therein). For another example, when step S12 is skipped and the configuration shown in FIG. 3A / 3B is first performed and then the configuration shown in FIG. 5A / 5B is performed, when the first dedicated current path corresponding to Phase 1 is disabled, there may be a significant configuration switching response time, which means that the target reference voltage VREF may continue to increase and significantly exceed the voltage level VA, so additional time is required for the target reference voltage VREF to reach the voltage level VA. Figure 7As shown, when the configuration shown in FIG. 3A / 3B, the configuration shown in FIG. 4A / 4B, and the configuration shown in FIG. 5A / 5B are successively performed, the low-dropout voltage regulator can immediately reach a stable state without any problems. For the sake of simplicity, similar contents in this embodiment are not repeated here.

[0056] For better understanding, this method can be used Figure 7 The workflow shown in FIG. 1 is used to illustrate the present invention, but the present invention is not limited thereto. According to some embodiments, one or more steps may be performed in Figure 7 The multi-stage configuration switching control circuit 110 may control other control signals, such as the control signals VREF_SHORT, VAUTO_FASTSET, and VAUTO_FASTSET_B, to correspondingly transition at the start of Phase 2 based on the transition of the control signal AF, thereby initiating the second configuration operation to set VREF = VR2. Furthermore, the automatic fast setting control circuit 120 may utilize the control signal AF to control the current control circuit 130, specifically, to stop outputting the current I when VREF > VR2 is detected. For example, if overheating does not occur, the current control circuit 130 can be implemented using a single transistor (e.g., a MOSFET) or multiple transistors (e.g., multiple MOSFETs) coupled between the power line PWR and the switch circuit SW3 to function as a switch for the current I and selectively output the current I based on the control signal AF. The switch circuit SW3 can be used to prevent any influence of the current control circuit 130 in steps S12 and S13. Furthermore, the operational amplifier 104 can operate based on a biasing source BIAS (e.g., a current source or a voltage source). For the sake of simplicity, similar details in these embodiments are not repeated here.

[0057] The above description is only a preferred embodiment of the present invention. Any equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

[0058] [Description of Reference Numerals]

[0059] 100A, 100B: Low Dropout (LDO) Regulators

[0060] 101: Reference voltage generating circuit

[0061] 102: Reference voltage generator

[0062] 103: Reference Voltage Converter

[0063] 104: Operational Amplifier (OPA)

[0064] 106: Transistor

[0065] 110: Multi-stage configuration switching control circuit

[0066] 120: Automatic quick setting (AF) control circuit

[0067] 130: Current control circuit

[0068] BIAS: Bias source

[0069] C1~C3: capacitors

[0070] MN1: N-type metal oxide semiconductor field effect transistor (MOSFET) MP1: P-type metal oxide semiconductor field effect transistor (MOSFET) PWR: power line

[0071] R1, R2: resistors

[0072] SW1~SW4: switch circuit

[0073] FASTSET: system control signal

[0074] I: current

[0075] POW_LDO: power control signal

[0076] VA, VB: voltage level

[0077] VDD: power supply voltage

[0078] VIP, VIN: Input voltage

[0079] VOP,LDO_OUT: output voltage

[0080] VR1, VR2: reference voltage

[0081] VREF: target reference voltage

[0082] VREF_SHORT,VAUTO_FASTSET,VAUTO_FASTSET_B,AF: control signal

[0083] Phase 1~Phase 3:

[0084] Phase3a, Phase3b: Sub-phases

[0085] S11~S14: Steps

Claims

1. A low dropout voltage regulator comprising: a reference voltage generating circuit for generating at least one reference voltage; an operational amplifier coupled to the reference voltage generating circuit, for controlling an output voltage of the low-dropout regulator through negative feedback in a low-dropout regulation mode of the low-dropout regulator; a transistor coupled to the operational amplifier, for generating the output voltage of the low-dropout regulator under the control of the operational amplifier in the low-dropout regulation mode for further use; and a multi-stage configuration switching control circuit coupled to the reference voltage generating circuit, the operational amplifier, and the transistor for performing multi-stage configuration switching control to perform multiple configuration operations on the circuit architecture of the low dropout voltage regulator; in: The multi-stage configuration switching control circuit performs a first configuration operation on the circuit structure of the low dropout (LDO) regulator to enable a first dedicated current path corresponding to a first stage, so as to allow a target reference voltage used in the LDO regulation mode to reach a first predetermined range after performing the first configuration operation; The multi-stage configuration switching control circuit performs a second configuration operation on the circuit architecture of the low dropout regulator to enable a second dedicated current path corresponding to a second stage, so as to allow the target reference voltage to reach a second predetermined range after performing the second configuration operation; as well as The multi-stage configuration switching control circuit performs a third configuration operation on the circuit architecture of the low dropout regulator to allow the target reference voltage to be used as the reference voltage input to the operational amplifier in the low dropout regulation mode after performing the third configuration operation.

2. The low dropout (LDO) regulator of claim 1, wherein reaching the first predetermined range includes exceeding a second voltage level, and reaching the second predetermined range includes approaching a first voltage level, wherein the second voltage level is lower than the first voltage level. 3 . The low dropout (LDO) regulator as claimed in claim 2 , wherein the at least one reference voltage comprises a first reference voltage equal to the first voltage level and a second reference voltage equal to the second voltage level.

4. The low dropout voltage regulator of claim 1 , wherein performing the first configuration operation comprises: The first dedicated current path corresponding to the first stage is enabled to perform a first preliminary setting operation on the target reference voltage according to a power supply voltage, so as to accelerate the target reference voltage to reach the first predetermined range.

5. The low dropout voltage regulator of claim 4 , wherein reaching the first predetermined range includes exceeding a second voltage level, the at least one reference voltage includes a second reference voltage equal to the second voltage level; and performing the first configuration operation further comprises: coupling a plurality of input terminals of the operational amplifier to the target reference voltage and the second reference voltage respectively, so that the operational amplifier acts as a comparator for comparing the target reference voltage and the second reference voltage; The low dropout voltage regulator further comprises: an automatic fast setting control circuit coupled to an output terminal of the operational amplifier, configured to receive a comparison result between the target reference voltage and the second reference voltage from the operational amplifier, and generate a control signal according to the comparison result; and A current control circuit is coupled to the automatic fast setting control circuit and is used for controlling the current on the first dedicated current path according to the control signal to accelerate the target reference voltage to reach the first predetermined range.

6. The low dropout voltage regulator of claim 1 , wherein reaching the first predetermined range includes exceeding a second voltage level, the at least one reference voltage includes a second reference voltage equal to the second voltage level; and performing the first configuration operation includes: A first input terminal and a second input terminal of the operational amplifier are coupled to the target reference voltage and the second reference voltage respectively, so that the operational amplifier acts as a comparator for comparing the target reference voltage and the second reference voltage.

7. The low dropout voltage regulator of claim 6 , wherein performing the first configuration operation further comprises: A negative feedback path connected between the second input terminal of the operational amplifier and a first terminal of the transistor is disconnected to disable the negative feedback path used in the low-dropout (LDO) regulation mode, wherein in the low-dropout (LDO) regulation mode, the first terminal of the transistor is used to output the output voltage of the LDO regulator.

8. The low dropout voltage regulator of claim 6 , wherein performing the second configuration operation comprises: decoupling the second input terminal of the operational amplifier from the second reference voltage and coupling the second input terminal of the operational amplifier to a first terminal of the transistor to enable a negative feedback path for use in the low-dropout (LDO) regulation mode, wherein in the low-dropout (LDO) regulation mode, the first terminal of the transistor is used to output the output voltage of the LDO regulator; deactivating the first dedicated current path corresponding to the first phase, wherein the first dedicated current path is coupled between a power line and the first input terminal of the operational amplifier in the first phase and is no longer coupled between the power line and the first input terminal of the operational amplifier in the second phase; and The second dedicated current path corresponding to the second stage is enabled to couple the first input terminal of the operational amplifier to the second reference voltage to forcibly set the target reference voltage equal to the second reference voltage, so as to reduce any deviation of the target reference voltage generated in the first stage relative to the second predetermined range and accelerate the target reference voltage to reach the second predetermined range.

9. The low dropout voltage regulator of claim 8, wherein performing the third configuration operation comprises: The second dedicated current path corresponding to the second stage is disabled, wherein the second dedicated current path is no longer used to couple the first input terminal of the operational amplifier to the second reference voltage in a third stage.

10. An operating method, applicable to the low dropout voltage regulator according to claim 1, comprising: performing the first configuration operation on the circuit architecture of the low dropout (LDO) regulator using the multi-stage configuration switching control circuit to enable the first dedicated current path corresponding to the first stage, so as to allow the target reference voltage used in the LDO regulation mode to reach the first predetermined range after performing the first configuration operation; performing the second configuration operation on the circuit architecture of the low dropout regulator using the multi-stage configuration switching control circuit to enable the second dedicated current path corresponding to the second stage, so as to allow the target reference voltage to reach the second predetermined range after performing the second configuration operation; as well as The multi-stage configuration switching control circuit is used to perform the third configuration operation on the circuit architecture of the low dropout regulator to allow the target reference voltage to be used as the reference voltage input to the operational amplifier in the low dropout regulation mode after the third configuration operation.

Citation Information

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