Python-based chip memory optimization generation method, system, equipment and medium

Abstract

The invention provides a Python-based chip memory optimization generation method and system. The method comprises the following steps: acquiring chip memory demand information; extracting configuration parameters of the memory from the demand information, and generating a memory specification; information used for score comparison is extracted from the memory specification, score comparison is carried out, and finally adopted memory configuration is obtained; generating and processing all files required to be used by the rear end; generating a memory package file and checking the package file; and generating a file list. According to the method, memory generation is evaluated from multiple dimensions, indexes such as speed, power consumption, area and realizability are uniformly scored, the memory is generated in a mode most suitable for engineering implementation, traditional manual comparison work is simplified into a script traversal mode, and the efficiency is improved. Various files of all memories, memory packaging files, db files and milkway files required by the whole project can be generated in a short time, and the working efficiency and accuracy are greatly improved.

Description

Technical Field

[0001] The present invention relates to the field of chip design technology, and in particular to a Python-based chip memory optimization generation method, system, device and medium. Background Art

[0002] In some chip design scenarios, such as mobile phone chips, baseband chips, SSD controllers, etc., various types of memories are needed, such as read-only memory (ROM), cache (CACHE), register file (Register File), single-port single-storage SRAM, single-port multi-storage SRAM, high-speed SRAM, high-density SRAM, ultra-high-density SRAM, dual-port SRAM, etc. The number of memories needed is large, such as hundreds or even thousands of pieces, and the speed of memories is diverse, such as CACHE / TCM speed can reach GHz, system SRAM speed is hundreds of MHz, and low-power SRAM speed is a few MHz. How to select the right memory to match the application scenario requirements of different modules, and to select the best from the best to reduce area and power consumption to improve the competitiveness of the entire chip, is a great challenge for back-end implementers.

[0003] The traditional working method is that the back-end staff usually generates blocks of memory through the GUI interface based on the needs of the front-end staff and from a functional perspective, and then manually compares the differences and selects the appropriate memory to use. However, this takes a long time for the back-end staff and is prone to missing multiple possibilities or making wrong selections.

[0004] Therefore, it is necessary to provide a new method to solve the above technical problems. Summary of the invention

[0005] In order to achieve the above-mentioned purpose and other advantages of the present invention, the first purpose of the present invention is to provide a chip memory optimization generation method based on Python, comprising the following steps:

[0006] Obtain chip memory requirement information;

[0007] Extracting configuration parameters of the memory from the demand information and generating a memory specification sheet;

[0008] Extracting information for scoring comparison from the memory specification and performing scoring comparison to obtain a final memory configuration;

[0009] Generate all the files needed by the backend and process them;

[0010] generating a memory wrapper file and checking the wrapper file;

[0011] Generate a file list.

[0012] Furthermore, the demand information includes memory type, depth information, width information, split information, check information, speed information, and write mask information.

[0013] Furthermore, the demand information is configured as a demand table.

[0014] Furthermore, the step of extracting the configuration parameters of the memory from the requirement information and generating a memory specification sheet includes:

[0015] Convert the requirement table file into csv text format to facilitate Python scripting language processing;

[0016] Extract storage information from csv text;

[0017] According to the memory information, a memory compiler tool is called to traverse different types of SVT, LVT, and ULVT to generate all memory specifications that meet the type, depth, width, and write mask requirements;

[0018] Generates a memory list.

[0019] Furthermore, the steps of extracting information for scoring comparison from the memory specification and performing scoring comparison to obtain the memory configuration finally adopted include:

[0020] extracting timing information of the memory;

[0021] Extracting power consumption information of the memory;

[0022] extracting area information of the memory;

[0023] Score and compare the information in the memory according to a preset priority;

[0024] Delete all the memories that do not match the requirements list;

[0025] Sort by score and get compiler name and corresponding memory configuration.

[0026] Further, the timing information includes minimum pulse width, minimum period, clk-q delay;

[0027] The power consumption information includes static power consumption and dynamic power consumption.

[0028] Furthermore, the preset priorities are configured such that the comparison priorities are, from high to low, timing, power consumption, and area.

[0029] Furthermore, the step of deleting all the storages that do not meet the requirements in the requirement table includes:

[0030] Delete the memory that does not meet the minimum pulse requirement;

[0031] Delete the memory that does not meet the minimum cycle requirement;

[0032] Delete the memory whose transmission control descriptor does not meet the requirements;

[0033] Delete the memory that does not meet the required aspect ratio.

[0034] Furthermore, the steps of generating all files needed by the backend and processing them include:

[0035] Call the memory compiler tool to generate all the files needed for the backend, including Verilog model, timing lib, datasheet, LEF, and GDSII;

[0036] Call the library compiler tool to complete the conversion from lib to db;

[0037] Call the script to complete the conversion from LEF to milkyway.

[0038] Furthermore, the step of generating a memory envelope file includes:

[0039] Generate the first encapsulation file of the memory, complete the encapsulation of the memory, normalize the module port name, and use FPGA macro to distinguish FPGA branch and ASIC branch code to realize the input and output control of the memory;

[0040] Generate a second encapsulation file of the memory, complete the encapsulation of the first encapsulation file of the memory, and realize the splitting of the memory, including width splitting, depth splitting, and mixed splitting;

[0041] Generate a third package file of the memory, complete the package of the second package file of the memory, and realize the connection of the control pin of the memory;

[0042] Generate a fourth package file of the memory, complete the package of the third package file of the memory, and realize the verification function.

[0043] Furthermore, the step of generating a file list includes:

[0044] Generate a list of files for simulation;

[0045] Generates a list of files for synthesis.

[0046] The second object of the present invention is to provide a chip memory optimization generation system based on Python, which applies the above method and includes a demand information acquisition module, a configuration parameter extraction module, an information scoring comparison module, a file generation module, a file processing module, an encapsulation file generation module, an encapsulation file inspection module, and a file list generation module; wherein,

[0047] The demand information acquisition module is used to acquire chip memory demand information;

[0048] The configuration parameter extraction module is used to extract the configuration parameters of the memory from the requirement information and generate a memory specification sheet;

[0049] The information scoring comparison module is used to extract information for scoring comparison from the memory specification and perform scoring comparison to obtain the memory configuration finally adopted;

[0050] The file generation module is used to generate all the files needed by the backend;

[0051] The file processing module is used to process the files generated by the file generation module;

[0052] The encapsulation file generating module is used to generate a memory encapsulation file;

[0053] The envelope file checking module is used to check the envelope file;

[0054] The file list generating module is used to generate a file list.

[0055] A third object of the present invention is to provide a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above method when executing the computer program.

[0056] A fourth object of the present invention is to provide a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps of the above method when executed by a processor.

[0057] Compared with the prior art, the present invention has the following beneficial effects:

[0058] The present invention provides a chip memory optimization generation method, system, device and medium based on Python, which evaluates memory generation from multiple dimensions, uniformly scores indicators such as speed, power consumption, area, and feasibility, selects the most suitable method for engineering implementation to generate memory, and simplifies the traditional tedious manual comparison work into a script traversal method, and can generate all kinds of memory files (such as VERILOG, DFT model, LEF, GDS, LIB, DATASHEET, etc.), storage package files (such as normalized interfaces, with ECC logic, without ECC logic, with Parity logic, without Parity logic, etc.), db files, and milkyway files required for the entire project in a very short time; compared with the manual confirmation of memory results, the time can be shortened by weeks, which greatly improves work efficiency, and manual comparison is prone to errors, while the method provided by the present invention is a machine-based digital comparison, which can avoid manual errors.

[0059] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and implement it according to the contents of the specification, the following is a detailed description of the preferred embodiments of the present invention in conjunction with the accompanying drawings. The specific implementation of the present invention is given in detail by the following embodiments and their accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0061] Figure 1 Generate a method flow chart for Python-based chip memory optimization;

[0062] Figure 2 Extracting a flow chart for configuration parameters of the memory;

[0063] Figure 3 Compare flow charts for scoring information;

[0064] Figure 4 Delete the flow chart for the memory;

[0065] Figure 5 Generate and process flow charts for documents;

[0066] Figure 6 Generate a flow chart for the envelope file;

[0067] Figure 7 Generate a flow chart for a file list;

[0068] Figure 8Generate system schematics for Python-based chip memory optimization;

[0069] Fig. 9 It is a schematic diagram of computer equipment;

[0070] Fig.10 A schematic diagram of a computer-readable storage medium. DETAILED DESCRIPTION

[0071] The present invention is further described below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. It should be noted that, under the premise of no conflict, the embodiments or technical features described below can be arbitrarily combined to form a new embodiment.

[0072] Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in the field without making any creative work shall fall within the scope of protection of the present invention.

[0073] The figure numbers in this application are only used to distinguish the various steps in the scheme, and are not used to limit the execution order of the various steps. The specific execution order is subject to the description in the specification.

[0074] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0075] The present invention provides a Python-based chip memory optimization generation method and system, which is applied to the middle and back-end of chip design. After the chip design engineers propose the required memory specifications, the middle and back-end engineers can use the present invention to quickly find the optimal solution for memory configuration, thereby improving the feasibility of chip design and product competitiveness (power consumption, speed, area, etc.), and ultimately improving the competitiveness of the product.

[0076] Example 1

[0077] A chip memory optimization generation method based on Python, such as Figure 1 As shown, the following steps are included:

[0078] S1. Obtain chip memory requirement information;

[0079] In one implementation, demand collection is first performed. Further, the demand information includes memory type (such as CACHE, SP, TP, BP, DP, ROM, etc.), depth information, width information, split information (such as width split, depth split, mixed split), check information (parity check, ECC check), speed information, and write mask information.

[0080] Furthermore, the demand information is configured as a demand table. For example, the demand information is configured as an Excel table, and the specific content includes the above demand information.

[0081] S2. Extracting memory configuration parameters from the demand information to generate a memory specification sheet; for example, extracting memory configuration parameters from the above Excel table to generate a memory datasheet.

[0082] In one embodiment, if Figure 2 As shown, the step of extracting the configuration parameters of the memory from the requirement information and generating a memory specification sheet includes:

[0083] S21, converting the demand table file into a csv text format, for example, converting an xlsx file into a csv text format, so as to facilitate Python scripting language processing;

[0084] S22, extracting storage information from the csv text;

[0085] S23, according to the memory information, calling the memory compiler tool to traverse different types of SVT, LVT, and ULVT to generate all memory specifications that meet the type, depth, width, and write mask;

[0086] In this embodiment, the memory compiler tool uses the memory compiler tool provided by the foundry, and calls the memory compiler tool provided by the foundry according to the memory information to generate all memory datasheets that meet the type, depth, bit width, and write mask (including traversing different types of SVT, LVT, and ULVT).

[0087] S24. Generate a memory list.

[0088] S3, extracting information for scoring comparison from the memory specification and performing scoring comparison to obtain the memory configuration finally adopted;

[0089] In one embodiment, if Figure 3 As shown, the steps of extracting information for scoring comparison from the memory specification and performing scoring comparison to obtain the memory configuration finally adopted include:

[0090] S31, extracting timing information of the memory; wherein the timing information includes minimum pulse width, minimum cycle, clk-q delay;

[0091] S32. Extract power consumption information of the memory; wherein the power consumption information includes static power consumption and dynamic power consumption.

[0092] S33, extracting the area information of the memory;

[0093] S34. Score and compare the information of the memory according to preset priorities; wherein the preset priorities are configured such that the comparison priorities are timing, power consumption, and area in descending order.

[0094] S35, deleting all the storages that do not meet the requirements in the demand table;

[0095] In one embodiment, if Figure 4 As shown, the step of deleting all the memories that do not meet the requirements in the requirement table includes:

[0096] S351, deleting the memory whose minimum pulse does not meet the requirement;

[0097] S352, deleting the memory whose minimum period does not meet the requirement;

[0098] S353, deleting the storage device whose transmission control descriptor (tcd) does not meet the requirements;

[0099] S354, deleting the memory whose aspect ratio does not meet the requirement, for example, the aspect ratio is required to be between 0.15 and 8.

[0100] S36. Sort by scores to obtain a compiler name (ie, compiler name) and a corresponding memory configuration.

[0101] S4, generate all the files needed by the backend and process them;

[0102] In one embodiment, if Figure 5 As shown, the steps of generating all the files needed by the backend and processing them include:

[0103] S41, calling the memory compiler tool to generate all files needed for the back end, including Verilog model, timing lib, datasheet, LEF, GDSII;

[0104] In this embodiment, the memory compiler tool adopts the memory compiler tool provided by the foundry, and calls the memory compiler tool to generate all files required by the backend, including Verilog model, timing lib, datasheet, LEF, GDSII, etc.

[0105] S42, calling the library compiler tool to complete the conversion from lib to db;

[0106] In this embodiment, the library compiler tool adopts the flibrary compiler tool, and the library compiler tool is called to complete the conversion from lib to db.

[0107] S43. Call the script to complete the conversion from LEF to milkyway.

[0108] S5, generating a memory wrapper file and checking the wrapper file;

[0109] In one embodiment, if Figure 6 As shown, the step of generating a memory encapsulation file includes:

[0110] S51. Generate the first wrapper file (wrapper1) of the memory, complete the wrapping of the memory, normalize the module port names, and use FPGA macros to distinguish between FPGA branches and ASIC branch codes to implement memory input and output control; specifically, implement the control of I0O0 (neither the memory input nor the output beats), I1O0 (the memory input beats once, but the output does not beat), I0O1 (the memory input does not beat, but the output beats once), and I1O1 (both the memory input and the output beats once).

[0111] S52, generating a second wrapper file (wrapper2) of the memory, completing the wrapping of the first wrapper file (wrapper1) of the memory, and implementing the splitting of the memory, including width splitting, depth splitting, and mixed splitting;

[0112] S53, generating a third wrapper file (wrapper3) of the memory, completing the wrapping of the second wrapper file (wrapper2) of the memory, and realizing the connection of the control pins (timing adjustment pins, low power consumption pins, etc.) of the memory;

[0113] S54, generating a fourth wrapper file (wrapper4) of the memory, completing the wrapping of the third wrapper file (wrapper3) of the memory, and implementing verification functions such as ECC and Parity.

[0114] S6. Generate a file list.

[0115] In one embodiment, if Figure 7 As shown, the step of generating a file list includes:

[0116] S61, generating a file list for simulation;

[0117] S62: Generate a file list for integration.

[0118] This embodiment is written in Python scripting language. Each step can be run separately by entering the Python script name of each module in the Linux terminal; or all steps can be run by executing the Python script of top.

[0119] This embodiment provides a Python-based chip memory optimization generation method, which is based on Python scripts and the memory compiler provided by the IPvendor or foundry. Through a comprehensive scoring mechanism of multiple dimensions (speed, power consumption, area), it quickly traverses the feasibility of all memory compilers to generate the required memory, and generates all types of memory required for the project.

[0120] Example 2

[0121] Based on the same concept, this embodiment also provides a Python-based chip memory optimization generation system, which applies a Python-based chip memory optimization generation method provided in Example 1. For a detailed description of the Python-based chip memory optimization generation method provided in Example 1, please refer to the corresponding description of Example 1, which will not be repeated here.

[0122] It is understandable that the Python-based chip memory optimization generation system provided in this embodiment includes hardware structures and / or software modules corresponding to the execution of each function in order to realize the above functions. In combination with the units and algorithm steps of each example disclosed in this embodiment, this embodiment can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the technical solution of this embodiment.

[0123] A chip memory optimization generation system based on Python7, such as Figure 8As shown, it includes a demand information acquisition module 700, a configuration parameter extraction module 710, an information score comparison module 720, a file generation module 730, a file processing module 740, an encapsulated file generation module 750, an encapsulated file inspection module 760, and a file list generation module 770; wherein,

[0124] The demand information acquisition module is used to acquire chip memory demand information;

[0125] The configuration parameter extraction module is used to extract the configuration parameters of the memory from the requirement information and generate a memory specification sheet;

[0126] The information scoring comparison module is used to extract information for scoring comparison from the memory specification and perform scoring comparison to obtain the memory configuration finally adopted;

[0127] The file generation module is used to generate all the files needed by the backend;

[0128] The file processing module is used to process the files generated by the file generation module;

[0129] The encapsulation file generating module is used to generate a memory encapsulation file;

[0130] The envelope file checking module is used to check the envelope file;

[0131] The file list generating module is used to generate a file list.

[0132] Based on the technical solution of the above embodiment, optionally, the demand information includes memory type, depth information, width information, split information, verification information, speed information, and write mask information.

[0133] Based on the technical solution of the above embodiment, optionally, the demand information is configured as a demand table.

[0134] Based on the technical solution of the above embodiment, optionally, the step of extracting the configuration parameters of the memory from the requirement information and generating the memory specification sheet includes:

[0135] Convert the requirement table file into csv text format to facilitate Python scripting language processing;

[0136] Extract storage information from csv text;

[0137] According to the memory information, a memory compiler tool is called to traverse different types of SVT, LVT, and ULVT to generate all memory specifications that meet the type, depth, width, and write mask requirements;

[0138] Generates a memory list.

[0139] Based on the technical solution of the above embodiment, optionally, the step of extracting information for scoring comparison from the memory specification and performing scoring comparison to obtain the memory configuration finally adopted includes:

[0140] extracting timing information of the memory;

[0141] Extracting power consumption information of the memory;

[0142] extracting area information of the memory;

[0143] Score and compare the information in the memory according to a preset priority;

[0144] Delete all the memories that do not match the requirements list;

[0145] Sort by score and get compiler name and corresponding memory configuration.

[0146] Based on the technical solution of the above embodiment, optionally, the timing information includes minimum pulse width, minimum period, clk-q delay;

[0147] The power consumption information includes static power consumption and dynamic power consumption.

[0148] Based on the technical solution of the above embodiment, optionally, the preset priorities are configured to be compared in the order of timing, power consumption, and area from high to low.

[0149] Based on the technical solution of the above embodiment, optionally, the step of deleting all the memory that does not meet the requirements of the requirement table includes:

[0150] Delete the memory that does not meet the minimum pulse requirement;

[0151] Delete the memory that does not meet the minimum cycle requirement;

[0152] Delete the memory whose transmission control descriptor does not meet the requirements;

[0153] Delete the memory that does not meet the required aspect ratio.

[0154] Based on the technical solution of the above embodiment, optionally, the step of generating all files required by the backend and processing them includes:

[0155] Call the memory compiler tool to generate all the files needed for the backend, including Verilog model, timing lib, datasheet, LEF, and GDSII;

[0156] Call the library compiler tool to complete the conversion from lib to db;

[0157] Call the script to complete the conversion from LEF to milkyway.

[0158] Based on the technical solution of the above embodiment, optionally, the step of generating a memory encapsulation file includes:

[0159] Generate the first encapsulation file of the memory, complete the encapsulation of the memory, normalize the module port name, and use FPGA macro to distinguish FPGA branch and ASIC branch code to realize the input and output control of the memory;

[0160] Generate a second encapsulation file of the memory, complete the encapsulation of the first encapsulation file of the memory, and realize the splitting of the memory, including width splitting, depth splitting, and mixed splitting;

[0161] Generate a third package file of the memory, complete the package of the second package file of the memory, and realize the connection of the control pin of the memory;

[0162] Generate a fourth package file of the memory, complete the package of the third package file of the memory, and realize the verification function.

[0163] Based on the technical solution of the above embodiment, optionally, the step of generating a file list includes:

[0164] Generate a list of files for simulation;

[0165] Generates a list of files for synthesis.

[0166] This embodiment provides a Python-based chip memory optimization generation system, which is based on Python scripts and the memory compiler provided by the IPvendor or foundry. Through a comprehensive scoring mechanism of multiple dimensions (speed, power consumption, area), it quickly traverses the feasibility of all memory compilers to generate the required memory, and generates all types of memory required for the project.

[0167] Example 3

[0168] A computer device 800, such as Fig. 9 As shown, it includes a memory 810, a processor 820, and a computer program 830 stored in the memory and executable on the processor. When the processor executes the computer program, the steps of a chip memory optimization generation method based on Python are implemented. For a detailed description of the method, reference can be made to the corresponding description in the above method embodiment, which will not be repeated here.

[0169] Example 4

[0170] A computer readable storage medium such as Fig.10 As shown, a computer program is stored thereon, and when the computer program is executed by the processor, the steps of a chip memory optimization generation method based on Python are implemented. For a detailed description of the method, reference can be made to the corresponding description in the above method embodiment, and no further description is given here.

[0171] The number of devices and processing scales described here are used to simplify the description of the present invention. Applications, modifications and variations of the present invention will be obvious to those skilled in the art.

[0172] Although the embodiments of the present invention have been disclosed as above, they are not limited to the applications listed in the specification and implementation modes. They can be fully applied to various fields suitable for the present invention. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the present invention is not limited to the specific details and the illustrations shown and described herein.

[0173] The apparatus, computer device, non-volatile computer storage medium and method provided in the embodiments of this specification correspond to each other, and therefore, the apparatus, computer device and non-volatile computer storage medium also have similar beneficial technical effects as the corresponding method. Since the beneficial technical effects of the method have been described in detail above, the beneficial technical effects of the corresponding apparatus, computer device and non-volatile computer storage medium will not be repeated here.

[0174] Those skilled in the art also know that, in addition to implementing the controller in a purely computer-readable program code, the controller can be made to implement the same function in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, such a controller can be considered as a hardware component, and the devices for implementing various functions included therein can also be considered as structures within the hardware component. Or even, the devices for implementing various functions can be considered as both software units for implementing the method and structures within the hardware component.

[0175] The systems, devices or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. For the convenience of description, the above devices are described separately by functions in various units. Of course, when implementing one or more embodiments of this specification, the functions of each unit can be implemented in the same or more software and / or hardware.

[0176] Those skilled in the art will appreciate that the embodiments of this specification may be provided as methods, systems, or computer program products. Therefore, the embodiments of this specification may be in the form of complete hardware embodiments, complete software embodiments, or embodiments in combination with software and hardware. Moreover, the embodiments of this specification may be in the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0177] This specification is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of this specification. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0178] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0179] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0180] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0181] The specification may be described in the general context of computer-executable instructions executed by a computer, such as program units. Generally, program units include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communications network. In a distributed computing environment, program units may be located in local and remote computer storage media, including storage devices.

[0182] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0183] The above description is only an embodiment of this specification and is not intended to limit one or more embodiments of this specification. For those skilled in the art, one or more embodiments of this specification may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of one or more embodiments of this specification shall be included in the scope of the claims of one or more embodiments of this specification.

Claims

1. A chip memory optimization generation method based on Python, characterized in that: The following steps are involved: Obtain chip memory requirement information; Extracting configuration parameters of the memory from the demand information and generating a memory specification sheet; Extracting information for scoring comparison from the memory specification and performing scoring comparison to obtain a final memory configuration; Generate all the files needed by the backend and process them; generating a memory wrapper file and checking the wrapper file; Generate a file list.

2. The chip memory optimization generation method based on Python as claimed in claim 1, characterized in that: The demand information includes memory type, depth information, width information, split information, check information, speed information, and write mask information.

3. The chip memory optimization generation method based on Python as claimed in claim 2, characterized in that: The requirement information is configured as a requirement table.

4. A chip memory optimization generation method based on Python as claimed in claim 3, characterized in that: The step of extracting the configuration parameters of the memory from the requirement information and generating a memory specification sheet comprises: Convert the requirement table file into csv text format to facilitate Python scripting language processing; Extract storage information from csv text; According to the memory information, a memory compiler tool is called to traverse different types of SVT, LVT, and ULVT to generate all memory specifications that meet the type, depth, width, and write mask requirements; Generates a memory list.

5. A chip memory optimization generation method based on Python as claimed in claim 4, characterized in that: The step of extracting information for scoring comparison from the memory specification and performing scoring comparison to obtain the memory configuration finally adopted comprises: extracting timing information of the memory; Extracting power consumption information of the memory; Extracting area information of the memory; Score and compare the information in the memory according to a preset priority; Delete all the memories that do not match the requirements list; Sort by score and get compiler name and corresponding memory configuration.

6. The chip memory optimization generation method based on Python as claimed in claim 5, characterized in that: The timing information includes minimum pulse width, minimum period, and clk-q delay; The power consumption information includes static power consumption and dynamic power consumption.

7. The chip memory optimization generation method based on Python as claimed in claim 5, characterized in that: The preset priorities are configured such that the comparison priorities are, from high to low, timing, power consumption, and area.

8. A chip memory optimization generation method based on Python as claimed in claim 6, characterized in that: The step of deleting all the storages that do not meet the requirements in the requirement table includes: Delete the memory that does not meet the minimum pulse requirement; Delete the memory that does not meet the minimum cycle requirement; Delete the memory whose transmission control descriptor does not meet the requirements; Delete the memory that does not meet the required aspect ratio.

9. A chip memory optimization generation method based on Python as claimed in claim 4, characterized in that: The steps of generating all the files needed by the backend and processing them include: Call the memory compiler tool to generate all the files needed for the backend, including Verilog model, timing lib, datasheet, LEF, and GDSII; Call the library compiler tool to complete the conversion from lib to db; Call the script to complete the conversion from LEF to milkyway.

10. A chip memory optimization generation method based on Python as claimed in claim 9, characterized in that: The step of generating a memory envelope file comprises: Generate the first encapsulation file of the memory, complete the encapsulation of the memory, normalize the module port name, and use FPGA macro to distinguish FPGA branch and ASIC branch code to realize the input and output control of the memory; Generate a second encapsulation file of the memory, complete the encapsulation of the first encapsulation file of the memory, and realize the splitting of the memory, including width splitting, depth splitting, and mixed splitting; Generate a third package file of the memory, complete the package of the second package file of the memory, and realize the connection of the control pin of the memory; Generate a fourth package file of the memory, complete the package of the third package file of the memory, and realize the verification function.

11. The chip memory optimization generation method based on Python according to claim 1, characterized in that: The step of generating a file list comprises: Generate a list of files for simulation; Generates a list of files for synthesis.

12. A chip memory optimization generation system based on Python, applying the method according to any one of claims 1 to 11, characterized in that: It includes a demand information acquisition module, a configuration parameter extraction module, an information scoring comparison module, a file generation module, a file processing module, an encapsulated file generation module, an encapsulated file inspection module, and a file list generation module; wherein, The demand information acquisition module is used to acquire chip memory demand information; The configuration parameter extraction module is used to extract the configuration parameters of the memory from the requirement information and generate a memory specification sheet; The information scoring comparison module is used to extract information for scoring comparison from the memory specification and perform scoring comparison to obtain the memory configuration finally adopted; The file generation module is used to generate all the files needed by the backend; The file processing module is used to process the files generated by the file generation module; The encapsulation file generating module is used to generate a memory encapsulation file; The envelope file checking module is used to check the envelope file; The file list generating module is used to generate a file list.

13. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 11 are implemented.

14. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 11 are implemented.

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