A host starting method, device, equipment and medium

Abstract

The application discloses a host starting method and device, equipment and medium, and relates to the technical field of baseboard management controller communication, which comprises the following steps: a host writes target image file data into a target storage queue through a universal serial bus controller; whether a data channel of an enhanced serial peripheral interface controller is readable is determined according to the state of a state register of the enhanced serial peripheral interface controller, if yes, a read command is sent to the enhanced serial peripheral interface controller, so that the enhanced serial peripheral interface controller reads target length of target image file data from the target storage queue based on the read command; a data acquisition command is sent to the enhanced serial peripheral interface controller, so that the enhanced serial peripheral interface controller sends the target length of target image file data to the host based on the data acquisition command; and target image file data is received, so that starting is completed based on the target image file data. The host starting based on the universal serial bus is realized.

Description

Technical Field

[0001] This invention relates to the field of baseboard management controller communication technology, and in particular to a host startup method, apparatus, device and medium. Background Technology

[0002] With the increasing importance of server management, major server manufacturers have enhanced the manageability of their servers on their respective hardware platforms and continuously strengthened their functionality. Server reliability, ease of use management, and additional service functions are becoming core competitive advantages that major server manufacturers urgently need. The Intelligent Platform Management Interface (IPMI) specification has effectively solved the problem of reliable server management. IPMI defines the communication protocol between hardware devices on the server motherboard (hardware devices supporting the IPMI protocol firmware) and the communication protocol interface between the system management software (SMS) and the hardware devices on the server motherboard. At the core of IPMI is a dedicated chip / controller called the Baseboard Management Controller (BMC). The system management software manages each managed device by communicating with the BMC. The physical interface between the BMC and the system management software uses the eSPI (Enhanced Serial Peripheral Interface) communication protocol. The eSPI bus was introduced to replace the LPC (Low Pin Count) bus. While its electrical characteristics are similar to the SPI (Serial Peripheral Interface) bus, there are some differences. The eSPI bus supports a master-slave communication mode and logically has four data channels: Peripheral, Virtual Wire, OOB (out-of-band), and Flash. The eSPI Flash Channel (Run-time Flash Access Channel) was designed to solve the problem of SPI Flash sharing between the master (e.g., Chipset) and slave. This design aims to reduce system costs by allowing the Chipset and eSPI slave to share SPI Flash in real time, thus reducing the number of SPI Flash chips required in the system. In some technologies, the master accesses the BMC-side flash for booting via the ESP bus's flash channel; however, this technology requires physical flash memory, lacks flexibility, hinders convenient debugging, and requires complex initial flash configuration.

[0003] It is evident that figuring out how to easily and conveniently start the host is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide a host boot method, apparatus, device, and medium that enables host booting without the need for a physical flash memory, thus facilitating debugging and eliminating the need for flash memory configuration. This achieves a simple and convenient host boot process.

[0005] In a first aspect, the present invention provides a host boot method, applied to a host, comprising:

[0006] The target image file data is written to the target storage queue via the universal serial bus controller; the target image file data is the image file data required when the host starts up.

[0007] The status register of the enhanced serial peripheral interface controller determines whether the data channel of the enhanced serial peripheral interface controller is readable. If so, a read command is sent to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue based on the read command.

[0008] Send a data acquisition command to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can send the target image file data of the target length to the host based on the data acquisition command;

[0009] Receive the target image file data so that the boot process can be completed based on the target image file data.

[0010] Optionally, writing the target image file data to the target storage queue via a universal serial data bus controller includes:

[0011] The number of available slots in the target storage queue is detected by a general-purpose serial data bus controller;

[0012] If the number of available slots is non-zero, the target image file data is written to the target storage queue based on the data stream method.

[0013] Optionally, after determining whether the data channel of the Enhanced Serial Peripheral Interface (ESI) controller is readable based on the state of the ESI controller's status register, the method further includes:

[0014] If the data channel is unreadable, read commands sent to the enhanced serial peripheral interface controller are blocked.

[0015] Optionally, the read command includes the starting address and the read length; the target storage queue includes a write pointer and a read pointer; wherein, the initial values ​​of the write pointer and the read pointer are both 0; the general serial data bus controller increments the write pointer by the target value each time it writes data to the target image file; the enhanced serial peripheral interface controller increments the read pointer by the corresponding read length each time it reads data from the target image file.

[0016] Accordingly, after sending a read command to the enhanced serial peripheral interface controller, the process also includes:

[0017] The enhanced serial peripheral interface controller determines whether the target storage queue is readable based on the target size relationship; the target size relationship is the relationship between the read length contained in the read command and the length of the data stored in the target storage queue; wherein, the length of the data stored in the target storage queue is the data length determined based on the difference between the write pointer and the read pointer;

[0018] If the data length is greater than or equal to the read length, the target storage queue is determined to be readable, so that the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue based on the read command;

[0019] If the data length is less than the read length, the target storage queue is determined to be unreadable. The enhanced serial peripheral interface controller waits for the new target image file data to be written until the data length is greater than or equal to the read length, and then jumps back to the step of determining that the target storage queue is readable.

[0020] Optionally, the process of waiting for new target image file data to be written via the enhanced serial peripheral interface controller also includes:

[0021] By setting the readable state of the status register to unreadable by the enhanced serial peripheral interface controller, the host is prevented from sending data acquisition commands to the enhanced serial peripheral interface controller.

[0022] Optionally, a data acquisition command is sent to the enhanced serial peripheral interface controller, including:

[0023] If the target storage queue is readable, it is determined that the data channel of the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue;

[0024] After receiving the target signal sent by the enhanced serial peripheral interface bus, a data acquisition command is sent to the enhanced serial peripheral interface controller.

[0025] Optional host boot methods also include:

[0026] If the target storage queue is readable, the data return flag of the status register of the enhanced serial peripheral interface controller is set to the first value so that the enhanced serial peripheral interface bus can send the target signal to the host according to the first value;

[0027] If the target storage queue is unreadable, the data return flag in the status register of the enhanced serial peripheral interface controller is set to the second value, so that the enhanced serial peripheral interface controller blocks the host from sending a data acquisition command based on the second value.

[0028] In a second aspect, the present invention provides a host boot device, applied to a host, comprising:

[0029] The data writing module is used to write the target image file data to the target storage queue through the universal serial data bus controller; the target image file data is the image file data required when the host starts up.

[0030] The read command sending module is used to determine whether the data channel of the enhanced serial peripheral interface controller is readable based on the status register of the enhanced serial peripheral interface controller. If so, it sends a read command to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue based on the read command.

[0031] The data acquisition command sending module is used to send data acquisition commands to the enhanced serial peripheral interface controller, so that the enhanced serial peripheral interface controller can send the target image file data of the target length to the host based on the data acquisition command;

[0032] The data receiving module is used to receive target image file data so that the boot process can be completed based on the target image file data.

[0033] Thirdly, the present invention provides an electronic device, comprising:

[0034] Memory, used to store computer programs;

[0035] A processor is used to execute computer programs to implement the aforementioned host boot method.

[0036] Fourthly, the present invention provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the aforementioned host boot method.

[0037] In this invention, the host writes the target image file data into the target storage queue through a Universal Serial Bus (USB) controller; the target image file data is the image file data required by the host during startup; the status register of the Enhanced Serial Peripheral Interface (ESI) controller determines whether the data channel of the ESI is readable; if so, a read command is sent to the ESI, so that the ESI reads the target image file data of the target length from the target storage queue based on the read command; a data acquisition command is sent to the ESI, so that the ESI sends the target image file data of the target length to the host based on the data acquisition command; the target image file data is received to complete the startup based on the target image file data.

[0038] Beneficial effects: This invention writes the image file data into the target storage queue through a Universal Serial Bus (USB) controller. Then, it determines whether the data channel is readable based on the status register of the Enhanced Serial Peripheral Interface (ESI) controller. If readable, the ESI controller reads the image file data. Finally, by sending a data acquisition command to the ESI controller, the host obtains the image file data and completes the boot process. This enables the host to boot via the USB USB on the board management controller side, facilitating convenient and flexible debugging and booting without requiring complex initial flash configuration. Attached Figure Description

[0039] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 A flowchart of a host boot method provided in an embodiment of the present invention;

[0041] Figure 2 This is a schematic diagram illustrating a specific host boot method provided in an embodiment of the present invention;

[0042] Figure 3 This is a schematic diagram of a host startup device structure provided in an embodiment of the present invention;

[0043] Figure 4 This is a structural diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0044] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0045] In some technologies, the host boots by accessing the BMC-side flash via the ESP bus flash channel. However, this technology requires a physical flash memory, lacks flexibility, hinders convenient debugging, and necessitates complex initial flash configuration. To address these technical problems, this invention provides a host booting method, apparatus, device, and medium that enables host booting without a physical flash memory, thus facilitating debugging and eliminating the need for flash configuration. This achieves a simple and convenient host booting process.

[0046] See Figure 1 As shown, this embodiment of the invention provides a host boot method, applied to a host, including:

[0047] Step S11: Write the target image file data to the target storage queue through the Universal Serial Bus controller; the target image file data is the image file data required when the host starts up.

[0048] In this embodiment of the invention, because the UART (Universal Asynchronous Receiver / Transmitter) has no address, a storage queue must be used as an intermediate buffer for operation. Specifically, this invention uses a circular queue as an intermediate buffer. Therefore, before the host starts up, the target image file data is written to the target storage queue through the Universal Serial Bus controller. During this process, the UART controller continuously checks the number of empty slots in the circular queue. As long as the number of empty slots is not zero, the external image file is received into the circular queue in a data stream manner. Specifically, UART is a type of Universal Serial Bus. This invention uses the Universal Serial Bus controller to check the number of empty slots in the target storage queue; if the number of empty slots is non-zero, the target image file data is written to the target storage queue in a data stream manner. It should also be noted that because the eSPI controller's read speed is much greater than the UART's speed, the circular queue will not become full. This invention employs a flow control mechanism to ensure that no data is received when the circular queue is full. The target image file data here is the image file data required when the host starts up.

[0049] Step S12: Determine whether the data channel of the enhanced serial peripheral interface controller is readable based on the status register of the enhanced serial peripheral interface controller. If so, send a read command to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue based on the read command.

[0050] In this embodiment of the invention, according to the eSPI protocol, the first step of the flash channel read operation is as follows: The host obtains the slave's status to determine whether the flash channel is readable. This is achieved by determining whether the data channel of the Enhanced Serial Peripheral Interface (ESI) controller is readable based on the status register of the ESI controller. The read-allowed state of the ESI controller's status register is enabled by default. If the ESI controller's data channel is readable, the host sends a read command to the ESI controller. In one specific embodiment, if the ESI controller's flash channel is readable, the host issues a `put_flash_np` command, which includes the starting address to be read and the length to be read. However, if the ESI controller's data channel is not readable, the read command sent to the ESI controller is blocked. In other words, the host's read behavior is blocked by controlling the eSPI controller's status register. Specifically, once the host's `PUT_FLASH_NP` read command is received, the readable status bit of the status register is changed to unreadable, blocking the host's read command request. In this way, the Enhanced Serial Peripheral Interface (ESPI) controller can read target image file data of the target length from the target storage queue based on read commands. Furthermore, the starting address and length to be read can be obtained through the data content of the PUT_FLASH_NP command, thus enabling precise reading of the target image file data of the target length. It should be noted that, typically, ESPI reads 64 bytes at a time. The circular queue buffer size is 1KB.

[0051] Furthermore, the target storage queue in this invention can be a circular storage queue, and the circular storage queue has two pointers initially set to 0: a write pointer, which is incremented by 1 each time the UART controller writes data, and a read pointer, which is incremented by the read length each time the eSPI controller reads data. In other words, the Universal Serial Bus controller increments the write pointer by the target value each time it writes data to the target image file; the Enhanced Serial Peripheral Interface controller increments the read pointer by the corresponding read length each time it reads data from the target image file. Therefore, after sending a read command to the Enhanced Serial Peripheral Interface (ESI) controller, the host determines whether the target storage queue is readable based on the target size relationship. The target size relationship is the relationship between the read length contained in the read command and the data length stored in the target storage queue. The data length stored in the target storage queue is determined based on the difference between the write pointer and the read pointer. If the data length is greater than or equal to the read length, the target storage queue is determined to be readable, so that the ESI controller can read the target image file data of the target length from the target storage queue based on the read command. If the data length is less than the read length, the target storage queue is determined to be unreadable, and the host waits for the new target image file data to be written through the ESI controller until the data length is greater than or equal to the read length, and then jumps back to the step of determining that the target storage queue is readable. Furthermore, if the target storage queue is readable, the data return flag of the status register of the enhanced serial peripheral interface controller is set to the first value, so that the enhanced serial peripheral interface bus can send the target signal to the host according to the first value; if the target storage queue is not readable, the data return flag of the status register of the enhanced serial peripheral interface controller is set to the second value, so that the enhanced serial peripheral interface controller can block the host from sending the data acquisition command according to the second value.

[0052] In other words, when the Enhanced Serial Peripheral Interface (eSPI) controller receives a read command, if the number of items in the circular queue is greater than or equal to the read length, it indicates that there is sufficient data, and the eSPI controller's data channel can read the target image file data of the target length from the target storage queue. Since the data return flag in the eSPI controller's status register defaults to 0, meaning no data is returned, the eSPI controller sets the data return flag in its status register to 1 when the data channel can read the target image file data of the target length from the target storage queue. At this point, the eSPI bus will notify the host via an alarm signal, and the host will then read the eSPI controller's status to determine the condition for data return.

[0053] It is known that the eSPI bus notifies the host via an alarm signal. The host then reads the eSPI controller's status to determine if the Enhanced Serial Peripheral Interface (ESI) controller's data channel has retrieved the target image file data of the target length from the target memory queue. Alternatively, after the ESI controller's data channel has retrieved the target image file data of the target length from the target memory queue, the host can send an alarm signal to the host via the eSPI bus. This alarm signal includes notification that data is present in the ESI controller's data channel. In this way, the host can directly send a data acquisition command to the ESI controller without further reading of the eSPI controller's status, thereby obtaining the target image file data from the ESI controller and initiating the boot process. This reduces the number of interactions between the host and the eSPI controller, further simplifying the host boot process.

[0054] In this embodiment of the invention, while waiting for the new target image file data to be written by the enhanced serial peripheral interface controller, the enhanced serial peripheral interface controller sets the readable state of the status register to unreadable, thereby blocking the host from sending a data acquisition command to the enhanced serial peripheral interface controller.

[0055] Step S13: Send a data acquisition command to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can send the target image file data of the target length to the host based on the data acquisition command.

[0056] In this embodiment of the invention, if the target storage queue is readable, it is determined that the data channel of the Enhanced Serial Peripheral Interface (eSPI) controller can read the target image file data of the target length from the target storage queue. After receiving the target signal sent by the eSPI bus, the host can send a data acquisition command to the eSPI controller. In a specific embodiment, the host issues a GET_FLASH_PC command to acquire the read data. Furthermore, the eSPI controller's status register will only release the readable status bit after receiving the GET_FLASH_PC command from the host. In this way, the eSPI controller sends the target image file data of the target length to the host based on the data acquisition command, meaning the host can obtain the target image file data of the target length from the eSPI controller. In this manner, the host will continue reading data until all image files have been read.

[0057] Step S14: Receive the target image file data so that the boot process can be completed based on the target image file data.

[0058] In this embodiment of the invention, after the host receives all the target image file data sent by the enhanced serial peripheral interface controller, it can complete the boot process based on the target image file data. This enables booting by reading the UART from the BMC side via the flash channel.

[0059] Beneficial effects: This invention writes the image file data into the target storage queue through a Universal Serial Bus (USB) controller. Then, it determines whether the data channel is readable based on the status register of the Enhanced Serial Peripheral Interface (ESI) controller. If readable, the ESI controller reads the image file data. Finally, by sending a data acquisition command to the ESI controller, the host obtains the image file data and completes the boot process. This enables the host to boot via the USB USB on the board management controller side, facilitating convenient and flexible debugging and booting without requiring complex initial flash configuration.

[0060] In this embodiment of the invention, during host startup, the flash channel read operation is performed according to the eSPI protocol. First, the host obtains the slave's status to determine if the flash channel is readable. If not, the channel is blocked; if readable, a `put_flash_np` command is issued, including the starting address and length to be read. Second, the host obtains the slave's status again to determine if there is data in the flash channel. If not, it waits; if so, it issues a `GET_FLASH_PC` command to retrieve the flash data. The following section will describe in detail the second step of obtaining the slave's status again to determine if there is data in the flash channel, waiting if not, and issuing the `GET_FLASH_PC` command to retrieve the flash data.

[0061] The master determines whether the flash channel is readable based on the slave's status. If it is not readable, the channel is blocked. If it is readable, the master issues a put_flash_np command, which includes the starting address and length to be read. After issuing the put_flash_np command, it only indicates to the eSPI controller that it can read the target image file data of the target length from the target storage queue based on the read command. However, it is still necessary to further determine whether the target storage queue is readable, that is, whether the eSPI controller data channel can read the target image file data of the target length from the target storage queue. In this process, when the Enhanced Serial Peripheral Interface (ESI) controller receives a read command, the host determines whether the target storage queue is readable based on the target size relationship. The target size relationship is the relationship between the read length contained in the read command and the data length stored in the target storage queue. The data length stored in the target storage queue is determined based on the difference between the write pointer and the read pointer. If the data length is greater than or equal to the read length, the target storage queue is determined to be readable, so that the ESI controller can read the target image file data of the target length from the target storage queue based on the read command. If the data length is less than the read length, the target storage queue is determined to be unreadable, and the host waits for the new target image file data to be written through the ESI controller until the data length is greater than or equal to the read length, and then jumps back to the step of determining that the target storage queue is readable. Furthermore, if the target storage queue is readable, the data return flag of the status register of the enhanced serial peripheral interface controller is set to the first value, so that the enhanced serial peripheral interface bus can send the target signal to the host according to the first value; if the target storage queue is not readable, the data return flag of the status register of the enhanced serial peripheral interface controller is set to the second value, so that the enhanced serial peripheral interface controller can block the host from sending the data acquisition command according to the second value.

[0062] In other words, when the Enhanced Serial Peripheral Interface (eSPI) controller receives a read command, if the number of elements in the circular queue is greater than or equal to the read length, it indicates that there is sufficient data, and the eSPI controller's data channel can read the target image file data of the target length from the target storage queue. Since the data return flag in the eSPI controller's status register defaults to 0, meaning no data is returned, the eSPI controller sets the data return flag in its status register to 1 when the data channel can read the target image file data of the target length from the target storage queue. At this point, if... Figure 2As shown, the eSPI bus notifies the host via an alarm signal. The host then reads the eSPI controller's status to confirm the presence of data in the enhanced serial peripheral interface controller's data channel. The host then issues a GET_FLASH_PC command to retrieve the read data. However, if the number of elements in the circular queue is less than the read length (meaning there is no data in the enhanced serial peripheral interface controller's data channel), the system waits for sufficient data to be stored in the circular queue to satisfy the eSPI controller's read request. Simultaneously, the host's issuance of the GET_FLASH_PC command is blocked to prevent the host from issuing the command but failing to retrieve the data. Finally, once the host obtains the flash data present in the enhanced serial peripheral interface controller's data channel, it can begin booting.

[0063] Beneficial effects: This invention enables the host to boot through the universal serial data bus on the board management controller side, which allows for convenient and flexible debugging and booting, and does not require complex initial flash configuration.

[0064] See Figure 3 As shown, an embodiment of the present invention provides a host boot device, applied to a host, comprising:

[0065] The data writing module 11 is used to write the target image file data to the target storage queue through the universal serial data bus controller; the target image file data is the image file data required when the host starts up;

[0066] The read command sending module 12 is used to determine whether the data channel of the enhanced serial peripheral interface controller is readable based on the status register of the enhanced serial peripheral interface controller. If so, it sends a read command to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue based on the read command.

[0067] The data acquisition command sending module 13 is used to send a data acquisition command to the enhanced serial peripheral interface controller, so that the enhanced serial peripheral interface controller can send the target image file data of the target length to the host based on the data acquisition command;

[0068] The data receiving module 14 is used to receive target image file data so that the startup can be completed based on the target image file data.

[0069] Since the embodiments of the device part correspond to the embodiments described above, please refer to the embodiments described in the method part for the embodiments of the device part, and will not be repeated here.

[0070] Beneficial effects: This invention writes the image file data into the target storage queue through a Universal Serial Bus (USB) controller. Then, it determines whether the data channel is readable based on the status register of the Enhanced Serial Peripheral Interface (ESI) controller. If readable, the ESI controller reads the image file data. Finally, by sending a data acquisition command to the ESI controller, the host obtains the image file data and completes the boot process. This enables the host to boot via the USB USB on the board management controller side, facilitating convenient and flexible debugging and booting without requiring complex initial flash configuration.

[0071] Furthermore, embodiments of this application also disclose an electronic device, Figure 4 This is a structural diagram of an electronic device according to an exemplary embodiment. The content of the diagram should not be construed as limiting the scope of this application. Specifically, the electronic device may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the host boot method disclosed in any of the foregoing embodiments. Furthermore, the electronic device in this embodiment may specifically be an electronic computer.

[0072] In this embodiment, the power supply 23 is used to provide operating voltage for various hardware devices on the electronic device; the communication interface 24 can create a data transmission channel between the electronic device and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0073] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored thereon can include operating system 221, computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0074] The operating system 221 is used to manage and control the various hardware devices on the electronic device and the computer program 222, which may be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program capable of performing the host boot method executed by the electronic device as disclosed in any of the foregoing embodiments, the computer program 222 may further include a computer program capable of performing other specific tasks.

[0075] Furthermore, this application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned disclosed host boot method. Specific steps of this method can be found in the corresponding content disclosed in the foregoing embodiments, and will not be repeated here.

[0076] Furthermore, the present invention also discloses a computer program product, including a computer program / instructions; wherein, when the computer program / instructions are executed by a processor, they implement the aforementioned disclosed chip power consumption control method. Specific steps of this method can be found in the corresponding content disclosed in the foregoing embodiments, and will not be repeated here.

[0077] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0078] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0079] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0080] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0081] The technical solutions provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A host boot method, characterized in that, Applied to the host, including: The target image file data is written to the target storage queue via a universal serial bus controller; the target image file data is the image file data required when the host starts up. The status of the status register of the enhanced serial peripheral interface controller determines whether the data channel of the enhanced serial peripheral interface controller is readable. If so, a read command is sent to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue based on the read command. A data acquisition command is sent to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can send the target image file data of the target length to the host based on the data acquisition command; Receive the target image file data so as to complete the startup based on the target image file data.

2. The host boot method according to claim 1, characterized in that, The step of writing the target image file data into the target storage queue via the universal serial bus controller includes: The number of available slots in the target storage queue is detected by a general-purpose serial data bus controller; If the number of available slots is non-zero, the target image file data is written to the target storage queue based on a data stream.

3. The host boot method according to claim 1, characterized in that, After determining whether the data channel of the enhanced serial peripheral interface controller is readable based on the state of the status register of the enhanced serial peripheral interface controller, the method further includes: If the data channel is unreadable, the read command sent to the enhanced serial peripheral interface controller is blocked.

4. The host boot method according to any one of claims 1 to 3, characterized in that, The read command includes the starting address and the read length; the target storage queue includes a write pointer and a read pointer; wherein, the initial values ​​of the write pointer and the read pointer are both 0; the universal serial data bus controller increments the write pointer by the target value each time it writes data to the target image file; the enhanced serial peripheral interface controller increments the read pointer by the corresponding read length each time it reads data from the target image file. Accordingly, after sending the read command to the enhanced serial peripheral interface controller, the method further includes: The enhanced serial peripheral interface controller determines whether the target storage queue is readable based on the target size relationship; the target size relationship is the relationship between the read length contained in the read command and the data length stored in the target storage queue; wherein, the data length stored in the target storage queue is the data length determined based on the difference between the write pointer and the read pointer; If the data length is greater than or equal to the read length, the target storage queue is determined to be readable, so that the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue based on the read command; If the data length is less than the read length, the target storage queue is determined to be unreadable, and the enhanced serial peripheral interface controller waits for the new target image file data to be written until the data length is greater than or equal to the read length, and then jumps back to the step of determining that the target storage queue is readable.

5. The host boot method according to claim 4, characterized in that, The process of waiting for new target image file data to be written through the enhanced serial peripheral interface controller also includes: The enhanced serial peripheral interface controller sets the readable state of the status register to unreadable, thereby blocking the host from sending data acquisition commands to the enhanced serial peripheral interface controller.

6. The host boot method according to claim 4, characterized in that, Sending the data acquisition command to the enhanced serial peripheral interface controller includes: If the target storage queue is readable, it is determined that the data channel of the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue; After receiving the target signal sent by the enhanced serial peripheral interface bus, a data acquisition command is sent to the enhanced serial peripheral interface controller.

7. The host boot method according to claim 6, characterized in that, Also includes: If the target storage queue is readable, the data return flag of the status register of the enhanced serial peripheral interface controller is set to a first value, so that the enhanced serial peripheral interface bus sends a target signal to the host according to the first value; If the target storage queue is unreadable, the data return flag of the status register of the enhanced serial peripheral interface controller is set to a second value, so that the enhanced serial peripheral interface controller blocks the host from sending a data acquisition command based on the second value.

8. A host startup device, characterized in that, Applied to the host, including: The data writing module is used to write target image file data to the target storage queue through a universal serial data bus controller; the target image file data is the image file data required when the host starts up. The read command sending module is used to determine whether the data channel of the enhanced serial peripheral interface controller is readable based on the status register of the enhanced serial peripheral interface controller. If so, it sends a read command to the enhanced serial peripheral interface controller so that the enhanced serial peripheral interface controller can read the target image file data of the target length from the target storage queue based on the read command. The data acquisition command sending module is used to send a data acquisition command to the enhanced serial peripheral interface controller, so that the enhanced serial peripheral interface controller can send the target image file data of the target length to the host based on the data acquisition command; The data receiving module is used to receive the target image file data so as to complete the startup based on the target image file data.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the host boot method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the host boot method as described in any one of claims 1 to 7.

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