Task scheduling method and device, electronic equipment and storage medium
By analyzing the task interrupt information to obtain the number of register usage, optimizing the task scheduling parameters, and only protecting and recovering used registers, solving the problem of waste of register protection in embedded operating systems and improving system efficiency.
Patent Information
- Application Number
- CN202311510230.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-13
- Publication Date
- 2025-05-13
AI Technical Summary
When saving and restoring the task site, existing embedded real-time operating systems need to save all registers, including unused registers, resulting in wasted time and stack.
By responding to task interrupt information, obtain the usage information of each register, determine that the register with the usage number of times not zero is the target register, and retain the relevant task scheduling parameters to optimize the task scheduling process.
It effectively avoids protection and recovery of unused registers, saves time and stack resources, and improves the efficiency of computer computing power utilization.
Smart Images
Figure CN119987954A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of data processing technology, and in particular to a task scheduling method and device, an electronic device, and a storage medium. Background Art
[0002] The on-site save means that when the operating system performs task scheduling, the context information of the process or thread currently executing the task is saved. The context information includes but is not limited to the program counter, registers, stack pointer and other information, so that the execution status of the task can be restored when the task is rescheduled. This ensures that the current task can continue to execute from the appropriate position after being suspended, avoiding data loss and execution errors.
[0003] Current embedded real-time operating systems usually save all existing registers. For example, on the ARM chip architecture, an embedded real-time operating system will push all general registers and floating-point registers onto the stack when saving the scene. However, some registers may never be used in a task. Therefore, performing scene protection and scene recovery on these unused registers will waste time and stack space. Summary of the invention
[0004] The present disclosure provides a task scheduling method, device, electronic device and storage medium, which are mainly intended to solve the problem of wasting time and stack when scheduling tasks on unused registers.
[0005] According to a first aspect of the present disclosure, a method for task scheduling is provided, comprising:
[0006] In response to the task interruption information, obtaining the usage count information of each register; wherein the usage count information is the usage count of each register in the current task process;
[0007] According to the usage count information of each register, determining a register whose usage count is not zero as a target register;
[0008] Retaining the task scheduling parameters related to each of the target registers in the task scheduling parameters to obtain the target task scheduling parameters; wherein the target task scheduling parameters are used to guide the task scheduling of the target register;
[0009] Task scheduling is performed according to the target task scheduling parameters.
[0010] Optionally, in response to the task interruption information, obtaining the usage count information of each register includes:
[0011] In response to the task interruption information, obtaining a target code file including a correspondence between the name of each register and the usage information;
[0012] The usage count information of each register is extracted from the target code file.
[0013] Optionally, adjusting the task scheduling parameters according to the target register to obtain the target task scheduling parameters further includes:
[0014] Optionally, performing task scheduling according to the target task scheduling parameters includes:
[0015] In the case where the task scheduling is field protection, a target register is determined from each register according to the target task scheduling parameter, and each target register is protected.
[0016] Optionally, performing task scheduling according to the target task scheduling parameters further includes:
[0017] In the case where the task scheduling is on-site recovery, a target register is determined from each register according to the target task scheduling parameter, and each of the target registers is restored.
[0018] According to a second aspect of the present disclosure, a task scheduling device is provided, comprising:
[0019] An acquisition unit, configured to acquire usage count information of each register in response to task interruption information; wherein the usage count information is the usage count of each register in the current task process;
[0020] a determining unit, configured to determine, based on the usage count information of each register, a register whose usage count is not zero as a target register;
[0021] An adjustment unit, used for retaining the task scheduling parameters related to each of the target registers in the task scheduling parameters, and obtaining the target task scheduling parameters; wherein the target task scheduling parameters are used to guide the task scheduling of the target registers;
[0022] The task scheduling unit is used to perform task scheduling according to the target task scheduling parameters.
[0023] Optionally, the acquisition unit is further used for:
[0024] In response to the task interruption information, obtaining a target code file including a correspondence between the name of each register and the usage information;
[0025] The usage count information of each register is extracted from the target code file.
[0026] Optionally, the task scheduling unit is further used for:
[0027] In the case where the task scheduling is field protection, a target register is determined from each register according to the target task scheduling parameter, and each target register is protected.
[0028] Optionally, the task scheduling unit is further used for:
[0029] In the case where the task scheduling is on-site recovery, a target register is determined from each register according to the target task scheduling parameter, and each of the target registers is restored.
[0030] According to a third aspect of the present disclosure, there is provided an electronic device, including:
[0031] at least one processor; and
[0032] a memory communicatively connected to the at least one processor; wherein,
[0033] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method described in the first aspect.
[0034] According to a fourth aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to execute the method described in the first aspect.
[0035] According to a fifth aspect of the present disclosure, a computer program product is provided, comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements the method as described in the first aspect above.
[0036] The method, device, electronic device and storage medium for task scheduling provided by the present disclosure include the following main technical solutions: first, in response to task interrupt information, obtaining the usage count information of each register; wherein the usage count information is the usage count of each register in the current task process; second, according to the usage count information of each register, determining the register whose usage count is not zero as the target register; retaining the task scheduling parameters related to each target register in the task scheduling parameters to obtain the target task scheduling parameters; wherein the target task scheduling parameters are used to guide the task scheduling of the target register; finally, executing task scheduling according to the target task scheduling parameters. Compared with the related art, the embodiment of the present application analyzes the usage information of each register to determine whether each register is used in this task scheduling, and then optimizes the task scheduling parameters of the operating system, and only performs task scheduling on the used registers, thereby avoiding the waste of time and stack and saving computer computing power.
[0037] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present disclosure.
[0039] Figure 1 A flowchart of a task scheduling method provided by an embodiment of the present disclosure;
[0040] Figure 2 A schematic diagram of the number of times a register is used provided by an embodiment of the present disclosure;
[0041] Figure 3 A flowchart of another task scheduling method provided by an embodiment of the present disclosure;
[0042] Figure 4 A schematic diagram of the structure of a task scheduling device provided in an embodiment of the present disclosure;
[0043] Figure 5 A schematic block diagram of an exemplary electronic device provided for an embodiment of the present disclosure. DETAILED DESCRIPTION
[0044] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.
[0045] The following describes the task scheduling method, device, electronic device, and storage medium of the embodiments of the present disclosure with reference to the accompanying drawings.
[0046] Context saving means that when the operating system performs task scheduling, the context information (such as program counter, registers, stack pointer, etc.) of the process or thread currently executing the task is saved so that its execution state can be restored when the task is rescheduled. This ensures that the task can continue to execute from the appropriate location after suspending execution, avoiding data loss and execution errors. Current embedded real-time operating systems usually save all existing registers. For example, FreeRTOS on the ARM architecture will save all general registers (rx) and floating-point registers (dx) on the stack when saving the context. In fact, some registers have never been used in some tasks and do not need to be protected. Protecting registers that are not actually used in heavily used operations such as context saving and context recovery will result in a waste of time and stack.
[0047] Figure 1 A flowchart of a task scheduling method provided in an embodiment of the present disclosure.
[0048] like Figure 1 As shown, the method comprises the following steps:
[0049] Step 101, in response to task interruption information, obtaining usage count information of each register; wherein the usage count information is the usage count of each register in the current task process.
[0050] In one possible implementation of the embodiment of the present application, when a certain interrupt source requires the central processing unit (CPU) to perform interrupt service for it, task interrupt information is output, so that the interrupt request trigger of the interrupt control system is set, and the CPU is requested to interrupt. The system requires that the interrupt request signal is maintained until the CPU responds to the interrupt. Both the main program and the interrupt service subroutine use resources such as the CPU's internal registers. In order to prevent the interrupt handler from destroying the contents of the registers in the main program, the contents of each register at the breakpoint should be pushed into the stack for protection.
[0051] After receiving the task interruption information, the embodiment of the present application obtains the usage information of each register according to the preset project, and the usage information includes the name of each register and the corresponding usage information; the preset project is used to obtain the usage information of the register. In an implementable method of the embodiment of the present application, the usage information file of each register obtained by the preset project is an elf file.
[0052] Step 102: According to the usage count information of each register, determine a register whose usage count is not zero as a target register.
[0053] See also Figure 2 , Figure 2A schematic diagram of the usage information of a register provided in an embodiment of the present application; Figure 2 As shown, Figure 2 It includes the name of each register and the usage information of the register. In a task process, such as a calculation process, it is necessary to obtain the target to be calculated and store it in the register, and then obtain the calculation formula and store it in the register. After the calculation is completed, the calculation result is stored in the register and then output. In this process, some registers may have never been used, that is, the usage information of some registers is 0, and the relevant information of the ongoing task process is not stored in these registers. Therefore, when performing on-site protection, there is no need to protect these registers. Figure 2 The registers having the usage information shown are determined as target registers to be subjected to context saving and / or context restoration.
[0054] Step 103, retaining the task scheduling parameters related to each of the target registers in the task scheduling parameters to obtain target task scheduling parameters; wherein the target task scheduling parameters are used to guide the task scheduling of the target registers.
[0055] In one implementable method of an embodiment of the present application, in the prior art, when task scheduling is performed according to task scheduling parameters, all registers will be saved. Some of the registers contain data that is not related to the current task process, thus causing a waste of time (the time to execute push and pop instructions) and space (the stack used to save registers); after adjusting the task scheduling parameters of the task scheduling module in the operating system according to the target register, when performing task scheduling, only the target register is scheduled, thereby optimizing the task scheduling process.
[0056] Step 104: Execute task scheduling according to the target task scheduling parameters.
[0057] In the embodiments of the present application and in the implementable methods, task scheduling includes scene protection and scene recovery; the main program (i.e., the current task process) and the subroutine (i.e., the interrupt source) are usually compiled separately, so the registers they use often conflict. If the content of a register of the main program before calling the subroutine is still useful after returning from the subroutine, and the subroutine happens to use the same register, this destroys the original content of the register, thereby causing a program running error, which is not allowed; to avoid the occurrence of such errors, after entering the subroutine, the register content required by the subroutine should be saved in the stack, this process is called scene protection; before exiting the subroutine, the register content is restored to its original state, this process is called scene recovery. It should be noted that the target task scheduling parameters can be used for scene protection and scene recovery, and are not limited to a certain type of task scheduling.
[0058] When performing task scheduling, it is necessary to follow the principle of field protection and determine the target register that needs to be operated from various registers of the computer. The target register refers to the register that needs to be accessed and modified during the task scheduling process. In order to ensure the correct execution of task scheduling and protect the integrity of field data, it is necessary to protect each target register according to the target task scheduling parameters. The purpose of this is to prevent task scheduling from interfering with the data in other registers, thereby ensuring the security and integrity of field data.
[0059] In computer systems, registers are a very important component, which are used to store temporary data and status information. When scheduling tasks, it is necessary to select the target register to be operated from various registers and protect it according to the task scheduling parameters. This can ensure the correct execution of task scheduling, and also protect the integrity of field data to prevent data from being accidentally modified or lost. Task scheduling is a very complex process that needs to follow strict rules and principles to ensure the stability and security of the computer system.
[0060] The method for task scheduling provided by the present disclosure includes the following main technical solutions: first, in response to task interrupt information, obtaining the usage count information of each register; wherein the usage count information is the usage count of each register in the current task process; second, according to the usage count information of each register, determining the register whose usage count is not zero as the target register; retaining the task scheduling parameters related to each target register in the task scheduling parameters to obtain the target task scheduling parameters; wherein the target task scheduling parameters are used to guide the task scheduling of the target register; finally, executing task scheduling according to the target task scheduling parameters. Compared with the related art, the embodiment of the present application analyzes the usage information of each register to determine whether each register is used in this task scheduling, and then optimizes the task scheduling parameters of the operating system, and only performs task scheduling on the used registers, thereby avoiding the waste of time and stack and saving computer computing power.
[0061] In one possible implementation method of the embodiment of the present application, the application scenario of the present application may be in a vehicle. When the vehicle is running, various signals to be processed will be generated in the vehicle system, such as signals generated by the vehicle safety system and signals generated by the vehicle entertainment screen. However, in a multi-tasking system, the central processing unit (CPU) can only execute one task at a time. Therefore, in actual applications, it is necessary to give priority to task processes related to driving safety, that is, through interrupt information, suspend the currently executing task process, execute the task corresponding to the interrupt information, and continue to execute the current task process after the task corresponding to the interrupt information is completed.
[0062] In an implementable manner of an embodiment of the present application, when executing step 103, the task scheduling parameters are adjusted according to the target register to obtain the target task scheduling parameters, the following steps are included: retaining the task scheduling parameters related to each of the target registers in the task scheduling parameters to obtain the adjusted task scheduling parameters; in an implementable manner of an embodiment of the present application, when optimizing the task scheduling parameters, there are two implementation methods, the first one: optimizing the task scheduling parameters according to the determined target registers, retaining the task scheduling parameters related to each target register; the second one: optimizing the task scheduling parameters in the operating system according to each register whose usage information is 0, and deleting the parameter part corresponding to each register whose usage information is 0; specifically, the embodiment of the present application does not limit the optimization method.
[0063] In one possible implementation of the embodiment of the present application, when executing step 101 to obtain the usage information of each register in response to the task interruption information, the file format of the obtained register usage information is in elx format, which is a binary format. Therefore, the file format of the obtained usage information file needs to be adjusted; please refer to Figure 3 , Figure 3 A flowchart of another task scheduling method provided by an embodiment of the present disclosure.
[0064] Step 201 , in response to task interruption information, obtaining a target code file including a correspondence between the name of each register and usage information.
[0065] In one implementable method of an embodiment of the present application, the preset file is a target code file, such as a file in the executable and linkable format (elf) format; the elf file includes the correspondence between the name of each register and the usage information, and may also include other data information. Specifically, the embodiment of the present application does not limit this.
[0066] Step 202: extract usage count information of each register from the target code file.
[0067] Following the description of step 201, the target information is in elf format (i.e., binary format), and the register names and corresponding register usage information cannot be directly read. Therefore, after obtaining the target information, the target information needs to be decompiled; decompilation is to convert the executable (ready to run) program code (also called target code) into a form of high-level programming language to make it more readable; please continue to refer to Figure 2 , the target information after decompilation is as follows Figure 2As shown; in one implementable method of the embodiment of the present application, when performing decompilation, a decompilation tool can be used, such as using the objdump tool to decompile the elf file into an assembly file in assembly language (Assembly Language, asm) format; it should be noted that this narrative method is only an exemplary description, and is not a specific limitation on the specific decompilation tool and assembly file format. The embodiment of the present application does not limit the specific decompilation tool and assembly file format.
[0068] In one implementable method of an embodiment of the present application, task scheduling includes field protection and field recovery. When performing task scheduling, when the task scheduling is field protection, the target register is determined from each register according to the target task scheduling parameter, and each target register is protected.
[0069] In the process of task scheduling, each register plays an important role. They store key data and status information during task execution. When performing field protection, it is necessary to determine the target register from each register to ensure that the task scheduler can correctly access and modify the required data. At the same time, in order to protect the integrity of the field data, each target register needs to be protected to prevent the task scheduler from interfering with the data in other registers. Therefore, field protection is very important when performing task scheduling. It can ensure the correct execution of task scheduling and guarantee the integrity and security of field data.
[0070] In one implementable method of an embodiment of the present application, when operating information is used to schedule tasks, the data and calculation process used for task scheduling will be stored in registers, and after the calculation is completed, the task scheduling results will be saved in registers, and feedback will be provided based on the task scheduling results; in one implementable method of an embodiment of the present application, based on the task scheduling parameters, the registers involved in the task process are protected on-site, and the data in each register is saved to facilitate the continuation of unfinished tasks after the interruption ends.
[0071] In one possible implementation of the embodiment of the present application, when the task scheduling is on-site recovery, the target register is determined from each register according to the target task scheduling parameter, and each of the target registers is restored. After the task corresponding to the interrupt information is completed, the saved context information about the task is restored to its original state according to the target task scheduling parameter.
[0072] In the case of on-site recovery, task scheduling needs to determine the target register from each register according to the target task scheduling parameters. This process needs to select different registers according to different task requirements and restore them to the previously saved state. These registers may include CPU registers, memory registers, I / O registers, etc. Specifically, it is determined according to the usage of each register in different task processes, and the embodiments of the present application do not limit this.
[0073] After determining the target registers, the task scheduler needs to restore them. This process requires resetting the register values to their previous values based on the previously saved state information. This process needs to be very precise because any error may cause the system to crash or data loss.
[0074] In order to ensure the success of on-site recovery, the task scheduler needs to fully back up and prepare the system before executing the task. This includes backing up the system status, saving key data, clearing unnecessary data, etc. Only in this way can the success of on-site recovery be guaranteed and the risk of system failure and data loss be avoided.
[0075] In one possible implementation of the embodiment of the present application, the task scheduling method provided by the present application also includes the following advantages:
[0076] 1. By analyzing the target code, the usage of registers by each task is obtained, and then the core modules of the operating system are optimized to improve real-time performance and save resource usage.
[0077] 2. Improve system efficiency: Optimized task scheduling can better utilize system resources, avoid resource waste and conflicts, and thus improve system efficiency and performance.
[0078] 3. Reduce system latency: Optimized task scheduling can respond to task requests faster, reduce task waiting time, reduce system latency, and improve user experience.
[0079] 4. Improve system stability: Optimized task scheduling can better control the system load and resource allocation, avoid system overload and crash, and improve system stability and reliability.
[0080] 5. Reduce system energy consumption: Optimized task scheduling can better manage the use of system resources, avoid unnecessary waste of resources and energy consumption, and thus reduce system energy consumption and costs.
[0081] Corresponding to the above-mentioned task scheduling method, the present invention also provides a task scheduling device. Since the device embodiment of the present invention corresponds to the above-mentioned method embodiment, details not disclosed in the device embodiment can be referred to the above-mentioned method embodiment, and will not be repeated in the present invention.
[0082] Figure 4 A schematic diagram of a task scheduling device provided by an embodiment of the present disclosure is shown in FIG. Figure 4 As shown, including:
[0083] The acquisition unit 31 is used to acquire the usage information of each register in response to the task interruption information; wherein the usage information includes the usage times of each register;
[0084] A determination unit 32, configured to determine, based on the number of times each of the registers is used, a register whose number of times of use is not zero as a target register;
[0085] The adjusting unit 33 is used to retain the task scheduling parameters related to each of the target registers in the task scheduling parameters to obtain target task scheduling parameters; wherein the target task scheduling parameters are used to guide the task scheduling of the target registers;
[0086] The task scheduling unit 34 is used to perform task scheduling according to the target task scheduling parameters.
[0087] The task scheduling device provided by the present disclosure has a main technical solution including: first, in response to task interrupt information, obtaining the usage count information of each register; wherein the usage count information is the usage count of each register in the current task process; second, according to the usage count information of each register, determining the register whose usage count is not zero as the target register; retaining the task scheduling parameters related to each target register in the task scheduling parameters to obtain the target task scheduling parameters; wherein the target task scheduling parameters are used to guide the task scheduling of the target register; finally, executing task scheduling according to the target task scheduling parameters. Compared with the related art, the embodiment of the present application analyzes the usage information of each register to determine whether each register is used in this task scheduling, and then optimizes the task scheduling parameters of the operating system, and only performs task scheduling on the used registers, thereby avoiding the waste of time and stack and saving computer computing power.
[0088] Furthermore, in a possible implementation of this embodiment, the acquiring unit 31 is further configured to:
[0089] In response to the task interruption information, obtaining a target code file including a correspondence between the name of each register and the usage information;
[0090] The usage count information of each register is extracted from the target code file.
[0091] Furthermore, in a possible implementation of this embodiment, the task scheduling unit 34 is further configured to:
[0092] In the case where the task scheduling is field protection, a target register is determined from each register according to the target task scheduling parameter, and each target register is protected.
[0093] Furthermore, in a possible implementation of this embodiment, the task scheduling unit 34 is further configured to:
[0094] In the case where the task scheduling is on-site recovery, a target register is determined from each register according to the target task scheduling parameter, and each of the target registers is restored.
[0095] It should be noted that the above explanation of the method embodiment is also applicable to the device of this embodiment, and the principle is the same, which is not limited in this embodiment.
[0096] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium and a computer program product.
[0097] Figure 5 A schematic block diagram of an example electronic device 400 that can be used to implement an embodiment of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.
[0098] like Figure 5 As shown, the device 400 includes a computing unit 401, which can perform various appropriate actions and processes according to a computer program stored in a ROM (Read-Only Memory) 402 or a computer program loaded from a storage unit 408 to a RAM (Random Access Memory) 403. In the RAM 403, various programs and data required for the operation of the device 400 can also be stored. The computing unit 401, the ROM 402, and the RAM 403 are connected to each other via a bus 404. An I / O (Input / Output) interface 405 is also connected to the bus 404.
[0099] A number of components in the device 400 are connected to the I / O interface 405, including: an input unit 406, such as a keyboard, a mouse, etc.; an output unit 407, such as various types of displays, speakers, etc.; a storage unit 408, such as a disk, an optical disk, etc.; and a communication unit 409, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 409 allows the device 400 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0100] The computing unit 401 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a CPU (Central Processing Unit), a GPU (Graphic Processing Units), various dedicated AI (Artificial Intelligence) computing chips, various computing units running machine learning model algorithms, a DSP (Digital Signal Processor), and any appropriate processor, controller, microcontroller, etc. The computing unit 401 performs the various methods and processes described above, such as a method for task scheduling. For example, in some embodiments, the method for task scheduling may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 408. In some embodiments, part or all of the computer program may be loaded and / or installed on the device 400 via the ROM 402 and / or the communication unit 409. When the computer program is loaded into the RAM 403 and executed by the computing unit 401, one or more steps of the method described above may be performed. Alternatively, in other embodiments, the computing unit 401 may be configured to execute the aforementioned task scheduling method in any other appropriate manner (for example, by means of firmware).
[0101] Various embodiments of the systems and techniques described above herein may be implemented in digital electronic circuit systems, integrated circuit systems, FPGAs (Field Programmable Gate Arrays), ASICs (Application-Specific Integrated Circuits), ASSPs (Application Specific Standard Products), SOCs (System On Chips), CPLDs (Complex Programmable Logic Devices), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: being implemented in one or more computer programs that may be executed and / or interpreted on a programmable system including at least one programmable processor that may be a dedicated or general-purpose programmable processor that may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0102] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0103] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any suitable combination of the foregoing. More specific examples of machine-readable storage media may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a RAM, a ROM, an EPROM (Electrically Programmable Read-Only-Memory) or a flash memory, an optical fiber, a CD-ROM (Compact Dis sc Read-Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0104] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (Cathode-Ray Tube) or LCD (Liquid Crystal Display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball), through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0105] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: LAN (Local Area Network), WAN (Wide Area Network), the Internet, and blockchain networks.
[0106] A computer system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The relationship between the client and the server is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services ("Virtual Private Server", or "VPS" for short). The server may also be a server of a distributed system, or a server combined with a blockchain.
[0107] It should be noted that artificial intelligence is a discipline that studies how computers can simulate certain human thought processes and intelligent behaviors (such as learning, reasoning, thinking, planning, etc.), and includes both hardware-level and software-level technologies. Artificial intelligence hardware technologies generally include technologies such as sensors, dedicated artificial intelligence chips, cloud computing, distributed storage, and big data processing; artificial intelligence software technologies mainly include computer vision technology, speech recognition technology, natural language processing technology, as well as machine learning / deep learning, big data processing technology, knowledge graph technology, and other major directions.
[0108] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0109] The above specific implementations do not constitute a limitation on the protection scope of the present disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. A task scheduling method, characterized in that: include: In response to the task interruption information, obtaining the usage count information of each register; wherein the usage count information is the usage count of each register in the current task process; According to the usage count information of each register, determining a register whose usage count is not zero as a target register; Retaining the task scheduling parameters related to each of the target registers in the task scheduling parameters to obtain target task scheduling parameters; wherein the target task scheduling parameters are used to guide task scheduling of the target registers; Task scheduling is performed according to the target task scheduling parameters.
2. The method according to claim 1, characterized in that The obtaining of usage count information of each register in response to the task interruption information includes: In response to the task interruption information, obtaining a target code file including a correspondence between the name of each register and the usage information; The usage count information of each register is extracted from the target code file.
3. The method according to claim 2, characterized in that The performing task scheduling according to the target task scheduling parameters comprises: In the case where the task scheduling is field protection, a target register is determined from each register according to the target task scheduling parameter, and each target register is protected.
4. The method according to claim 2, characterized in that: The performing task scheduling according to the target task scheduling parameters also includes: In the case where the task scheduling is on-site recovery, a target register is determined from each register according to the target task scheduling parameter, and each of the target registers is restored.
5. A task scheduling device, characterized in that: include: An acquisition unit, configured to acquire usage count information of each register in response to task interruption information; wherein the usage count information is the usage count of each register in the current task process; a determining unit, configured to determine, based on the usage count information of each register, a register having a usage count that is not zero as a target register; An adjustment unit, used for retaining the task scheduling parameters related to each of the target registers in the task scheduling parameters, and obtaining target task scheduling parameters; wherein the target task scheduling parameters are used to guide the task scheduling of the target registers; The task scheduling unit is used to perform task scheduling according to the target task scheduling parameters.
6. The device according to claim 5, characterized in that The acquisition unit is also used for: In response to the task interruption information, obtaining a target code file including a correspondence between the name of each register and the usage information; The usage count information of each register is extracted from the target code file.
7. The device according to claim 6, characterized in that The task scheduling unit is also used for: In the case where the task scheduling is on-site recovery, a target register is determined from each register according to the target task scheduling parameter, and each of the target registers is restored.
8. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 4.
9. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to cause the computer to execute the method according to any one of claims 1-4.
10. A computer program product, characterized in that The invention comprises a computer program which, when executed by a processor, implements the method according to any one of claims 1 to 4.