Processing method, generating method and related device for instruction data

Abstract

The invention discloses a processing method, a generating method and a related device for instruction data, and relates to the technical field of password card communication. An upper computer and a lower computer establish a unified data protocol in advance, and the data protocol can comprise information used for indicating types represented by a plurality of fragment data in the instruction data; therefore, after the lower computer receives the first instruction data sent by the upper computer, the segment data corresponding to the first instruction data can be determined based on the data protocol; then, first verification can be performed on the fragment data corresponding to the first instruction data, the integrity of the fragment data of the first instruction data is determined, second verification is performed under the condition that the first verification is passed, so that the length integrity of the first instruction data is determined, and the length integrity of the first instruction data is determined under the condition that the second verification is passed. And processing the to-be-executed class fragment data continuously to obtain a processing result.

Description

Technical Field

[0001] The present invention belongs to the technical field of password card communication, and in particular to a processing method and a generating method for instruction data and a related device. Background Art

[0002] During the data transmission process, it may be necessary to call an interface for communication. For example, the upper computer can send instructions to the lower computer through the interface, and the lower computer executes the instructions and returns the execution results to the upper computer through the interface, so that the upper computer can understand the specific execution status of the lower computer for the instructions.

[0003] Generally speaking, the lower computer can execute more instructions, and the upper computer can send more types of instructions. Therefore, during the information exchange between the upper and lower computers, the lower computer may need to traverse its own functions to find a function that can solve the instructions sent by the upper computer, execute the instructions, and return the execution results. Summary of the invention

[0004] The purpose of the present invention is to provide a processing method, a generating method and related devices for instruction data. Through a predefined data protocol, the transmitted instruction data needs to comply with the provisions of the protocol. In this way, the lower computer can execute the verification scheme according to the predefined data protocol to save the computing resources required in the verification process, and can efficiently determine the functions required to execute the instruction.

[0005] In a first aspect, an embodiment of the present application provides a method for processing instruction data, which is applied to a lower computer that executes instruction data, wherein the lower computer and the upper computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: a frame header, a frame tail, a check type, a call identification type, a length type, and a to-be-executed type;

[0006] And, the method comprises:

[0007] In response to receiving the first instruction data sent by the host computer, determining the segment data corresponding to the first instruction data based on the data protocol;

[0008] Based on the fragment data corresponding to the first instruction data, performing a first check on the first instruction data;

[0009] If the first check passes, a second check is performed on the first instruction data; and if the second check passes, the to-be-executed class fragment data is processed to obtain a processing result.

[0010] Optionally, the determining of the fragment data corresponding to the first instruction data based on the data protocol includes:

[0011] Based on the position corresponding to each type of data and the predefined field length of each type of data, the fragment data corresponding to the first instruction data is determined.

[0012] Optionally, the performing a first check on the first instruction data based on the segment data corresponding to the first instruction data includes:

[0013] Performing a first check on the first instruction data according to a first number of the fragment data corresponding to the first instruction data;

[0014] And, the second verification of the first instruction data includes:

[0015] Based on the data length indicated by the length-class fragment data, a second check is performed on the first instruction data.

[0016] Optionally, the processing of the to-be-executed class fragment data includes:

[0017] Determine the target function to be called according to the function indicated by the above-mentioned call identification class fragment data;

[0018] The target function is called to process the fragment data of the class to be executed.

[0019] Optionally, the processing of the above-mentioned to-be-executed class fragment data is divided into multiple stages, and the multiple stages at least include:

[0020] Find the target function indicated by the call identification class fragment data, call the target function, and use the target function to process the to-be-executed class fragment data;

[0021] And, the above method further includes:

[0022] In response to detecting an execution error situation for the first instruction information, generating fault-type segment data; wherein different execution error situations correspond to different fault-type segment data;

[0023] The above execution error situations include at least the following:

[0024] The first check fails, the second check fails, an error occurs in searching for the target function indicated by the call identification class fragment data, an error occurs in calling the target function, and an error occurs in processing the to-be-executed class fragment data using the target function;

[0025] Generate feedback information based on the fault-type fragment data, and send the feedback information to the host computer.

[0026] In a second aspect, an embodiment of the present application provides a host computer for generating instruction data, wherein the host computer and the slave computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: a frame header, a frame tail, a check type, a call identification type, a length type, and a to-be-executed type;

[0027] And, the method comprises:

[0028] In response to receiving the to-be-executed segment data, based on the data protocol, segment data corresponding to a plurality of types indicated by the data protocol are generated, and relative positions of the segment data are determined;

[0029] Based on the generated segment data and the relative positions of the segment data, instruction data is generated.

[0030] In a third aspect, another embodiment of the present application provides a processing device for instruction data, which is applied to a lower computer that executes instruction data, wherein the lower computer and the upper computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: a frame header, a frame tail, a check type, a call identification type, a length type, and a to-be-executed type;

[0031] And, the above device comprises:

[0032] A determination unit, configured to determine, in response to receiving the first instruction data sent by the host computer, the fragment data corresponding to the first instruction data based on the data protocol;

[0033] A verification unit, configured to perform a first verification on the first instruction data based on the segment data corresponding to the first instruction data;

[0034] The sending unit is used to perform a second check on the first instruction data if the first check passes; and to process the to-be-executed class fragment data to obtain a processing result if the second check passes.

[0035] In a fourth aspect, another embodiment of the present application provides a device for generating instruction data, which is applied to a host computer for generating instruction data, wherein the host computer and the slave computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: a frame header, a frame tail, a check type, a call identification type, a length type, and a to-be-executed type;

[0036] And, the above device comprises:

[0037] a receiving unit, configured to generate, in response to receiving the to-be-executed segment data, segment data corresponding to a plurality of types indicated by the data protocol based on the data protocol, and determine the relative positions of the segment data;

[0038] The generating unit is used to generate instruction data based on the generated fragment data and the relative positions of each fragment data.

[0039] In the fifth aspect, another embodiment of the present application provides a storage medium, in which a computer program is stored, wherein the computer program is configured to execute the processing method for instruction data shown in the first aspect, or the generation method for instruction data shown in the second aspect when running.

[0040] In the sixth aspect, another embodiment of the present application provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the processing method for instruction data shown in the first aspect, or the generation method for instruction data shown in the second aspect.

[0041] Compared with the prior art, the processing method, generation method and related device for instruction data provided by the present invention, because the upper computer and the lower computer pre-establish a unified data protocol, and the data protocol can include information for indicating the types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data can at least include: frame header, frame tail, check type, call identification type, length type, to-be-executed type; in this way, through the data protocol pre-established by the upper computer and the lower computer, the lower computer can determine the fragment data corresponding to the first instruction data based on the data protocol after receiving the first instruction data sent by the upper computer; then the first check can be performed on the fragment data corresponding to the first instruction data to determine the integrity of the fragment data of the first indication data, and the second check can be performed when the first check passes to determine the length integrity of the first indication data, and only when the second check passes will the processing of the to-be-executed fragment data continue to be performed to obtain the processing result. That is, before actually processing the to-be-executed fragment data, a relatively complete check will be performed on the first indication data, so that errors in the actual processing of the to-be-executed fragment data can be avoided to a certain extent; thereby helping to save resource consumption of the lower computer.

[0042] Furthermore, this phased verification processing method can also help to better distinguish the stage where the execution failure occurs, thereby helping the upper computer to more accurately know the specific stage where the execution failure occurs in the lower computer. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A flowchart of a method for processing instruction data provided by an embodiment of the present invention;

[0044] Figure 2 A schematic diagram of a data structure of index data provided by an embodiment of the present invention;

[0045] Figure 3 A schematic diagram of a data structure of feedback information provided by an embodiment of the present invention;

[0046] Figure 4 A schematic diagram of a portion of a data protocol provided in an embodiment of the present invention;

[0047] Figure 5 A schematic diagram of a portion of a data protocol provided in an embodiment of the present invention;

[0048] Figure 6 A schematic diagram of a data communication process provided by an embodiment of the present invention;

[0049] Figure 7 A flowchart of a method for generating instruction data provided by an embodiment of the present invention;

[0050] Figure 8 A connection diagram of a processing device for instruction data provided by an embodiment of the present invention;

[0051] Fig. 9 A connection diagram of a device for generating instruction data provided by an embodiment of the present invention;

[0052] Fig.10 A schematic diagram of the structure of a computer device provided in one embodiment of the present application is shown. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0054] During the data transmission process, for example, in the password card scenario, the password card can be understood as a hardware device that stores information related to the encryption algorithm, the password card can be understood as a lower computer, and the upper computer can be understood as a terminal (mobile terminal, PC, etc.) that matches the password card.

[0055] In the related art, the terminal can send instructions to the lower computer through the interface. However, in the encryption scenario of the related art, the algorithm used is relatively simple, so the setting for the transmission protocol may be relatively simple, or only the interface protocol specified by the interface may be used. For example, in the password card scenario, the GMT0018 standard is used.

[0056] The application scenario targeted by the present disclosure is a hybrid encryption scenario. In this scenario, there are many encryption algorithms stored in the password card, and there may also be post-quantum encryption algorithms. Therefore, the transmission protocol of the relevant technology may make it impossible for the lower computer to detect the instruction data efficiently and accurately, and to locate the encryption algorithm to be adopted in time, which may cause the interaction between the upper computer and the lower computer to be not smooth.

[0057] For example, some instructions may need to be resent. When the previous instruction is sent incorrectly and cannot be executed, the upper computer may regenerate the instruction and resend it. If the lower computer cannot efficiently determine the integrity of the instruction and whether the instruction is executable, the upper computer may not be able to resend the instruction efficiently when it needs to, which obviously makes the interaction between the upper computer and the lower computer may not be smooth.

[0058] In the present disclosure, a predefined data protocol is used so that the transmitted instruction data needs to comply with the provisions of the protocol. In this way, the lower computer can execute the verification scheme according to the predefined data protocol to save the computing resources required in the verification process and can efficiently determine the function required to execute the instruction.

[0059] See also Figure 1 , Figure 1 A flow chart of a method for processing instruction data provided in an embodiment of the present invention, the method for processing instruction data can be applied to a lower computer that executes instruction data, the lower computer and the upper computer pre-establish a unified data protocol, the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data include at least: frame header, frame tail, check class, call identification class, length class, and to-be-executed class.

[0060] It should be understood that one fragment data may represent one type, for example, one fragment data may indicate a frame header, another fragment data may indicate a frame tail, and so on.

[0061] As an example, the data protocol may also include a method for indicating the positional relationship of multiple fragment data. For example, the frame header fragment data may be located at the front end of the instruction data, while the frame tail fragment data may be located at the back end of the instruction data. The frame header may be followed by the check fragment data, and the check fragment data may be followed by the identification fragment data and the length fragment data. The length fragment data may be followed by the to-be-executed fragment data.

[0062] As an example, the frame header and frame tail can indicate the beginning and end of the data frame, the checksum type fragment data can be used to indicate the integrity of the checksum data (the integrity is mainly checked for the fragment data, that is, to determine whether multiple fragment data are included, to determine whether the number of fragment data is incorrect, etc.), the call identification type fragment data can be used to indicate the function required to process the to-be-executed type fragment data; and the length type data can be used to indicate the data length of the to-be-executed data, and the to-be-executed data can be understood as the data to be specifically processed by the lower computer, or it can be understood as the instruction-related data can be understood as the to-be-executed data.

[0063] like Figure 1 As shown, the method for processing instruction data may include the following steps:

[0064] Step 101, in response to receiving first instruction data sent by a host computer, determining the fragment data corresponding to the first instruction data based on a data protocol;

[0065] Step 102, performing a first check on the first instruction data based on the fragment data corresponding to the first instruction data;

[0066] Step 103, when the first check is passed, performing a second check on the to-be-executed fragment data; and, when the second check is passed, processing the to-be-executed fragment data to obtain a processing result.

[0067] As an example, since the data protocol includes information for indicating the types represented by multiple fragment data in the instruction data, the fragment data in the first instruction data can be determined based on the data protocol, and the number of fragment data in the first instruction data determined at this time can be multiple.

[0068] As an example, based on the fragment data corresponding to the first instruction data, a first check is performed on the first instruction data. The first check can be understood as a check on the number of fragment data. This check can be understood as checking the integrity of the fragment data in the first instruction data. For example, the data protocol indicates that there must be 5 fragment data included, but the number of fragment data corresponding to the actual first instruction data is 4, which can indicate that the structure of the first indication data is incomplete at this time, and the information that the structure of the first indication data is incomplete can be directly fed back to the host computer. For example, if no frame header or frame tail is detected, no length-type fragment data is detected, etc., it can be determined that the structure of the first indication data is incomplete.

[0069] As an example, the second check can be understood as a further check on the integrity of the first indication data, that is, the first indication data can be checked according to the length indicated by the length class segment data to determine whether the first indication data is complete.

[0070] That is, the first check can be understood as the integrity check of the fragment data for the first instruction data; the second check can be understood as the length integrity check for the first instruction data. Only after the first check and the second check are completed, the processing of the to-be-executed fragment data is performed. In this way, before the to-be-executed fragment data is processed, multiple checks are performed first, so that when there is a problem with the first instruction data, it can be discovered in time. In this way, the determination rate of whether the first instruction data can be processed normally can be improved.

[0071] It can be seen that in the present disclosure, since the upper computer and the lower computer have established a unified data protocol in advance, and the data protocol can include information for indicating the types represented by multiple fragment data in the instruction data, wherein the types represented by multiple fragment data can at least include: frame header, frame tail, check class, call identification class, length class, and to-be-executed class; in this way, through the data protocol pre-established by the upper computer and the lower computer, the lower computer can determine the fragment data corresponding to the first instruction data based on the data protocol after receiving the first instruction data sent by the upper computer; then the first check can be performed on the fragment data corresponding to the first instruction data to determine the integrity of the fragment data of the first indication data, and the second check can be performed when the first check passes to determine the length integrity of the first indication data, and only when the second check passes will the processing of the to-be-executed fragment data continue to be performed to obtain the processing result. That is, before actually processing the to-be-executed fragment data, a relatively complete check will be performed on the first indication data, so that errors in the actual processing of the to-be-executed fragment data can be avoided to a certain extent; thereby helping to save resource consumption of the lower computer.

[0072] Furthermore, this phased verification processing method can also help to better distinguish the stage where the execution failure occurs, thereby helping the upper computer to more accurately know the specific stage where the execution failure occurs in the lower computer.

[0073] In some embodiments, the “determining the fragment data corresponding to the first instruction data based on the data protocol” in the above step 101 may specifically include:

[0074] Based on the position corresponding to each type of data and the predefined field length of each type of data, the fragment data corresponding to the first instruction data is determined.

[0075] As an example, the frame header and the frame tail may be predefined characters, so that the frame header and the frame tail in the first instruction data can be determined very conveniently.

[0076] Since the frame header can be followed by length class fragment data, and the length class fragment data, check class fragment data and call identification class fragment data can all correspond to a fixed field length, and the to-be-executed class can be followed by the frame tail, and the length class fragment data, check class fragment data and call identification class fragment data can pre-define their positional relationship with each other, the length class fragment data, check class fragment data and call identification class fragment data can be determined, and then the to-be-executed class fragment data can be determined.

[0077] Of course, in a specific implementation, the positional relationship between the length segment data, the check segment data and the call identification segment data can be limited according to actual conditions.

[0078] In order to facilitate understanding of the indication data that complies with the data protocol in the present disclosure, it can be combined with Figure 2 To explain, Figure 2 It can be understood as a schematic diagram of the indication data in the data protocol of the present disclosure, which is composed of Figure 2 It can be seen that the indication data can be composed of multiple fragment data, and each fragment data has a corresponding order relationship. Therefore, the fragment data of the first indication data can be determined according to the corresponding position and field length of each type of data.

[0079] Depend on Figure 2 It can be seen that the indication data can also be understood as a protocol frame, and the protocol frame can mainly include a frame header, which can be two bytes and can be a fixed value (0xA55A)

[0080] Afterwards, the length-class fragment data may be fixed to 4 bytes, which may indicate the total length, which is the length of the entire data frame including the frame header and frame tail data.

[0081] CRC check (4 bytes) can be understood as checking the segment data. CRC check can be used to check the integrity of data. The calculation of CRC check includes handle, CMD, length (Len) and data part.

[0082] Handle (handle, can be 8 bytes), if you need to pass in a handle, you need to fill in the specific four-byte value of the handle, if there is no handle, just keep it as 0. The first four bytes are random numbers, the next four bytes can store the devicehandle (device handle) and sessionhandle (session handle) identifiers, and the last two bytes are used to identify the number of devices (devices).

[0083] CMD (Command Prompt) may be 2 bytes, used to transmit the CMD command, and may be used to distinguish functions. Therefore, CMD may be understood as a call identification segment data.

[0084] Len (4 bytes) can be understood as the length of the specific data to be transmitted. If it is 0, it means that the data is 0. Len here can indicate the total length of the data to be executed.

[0085] Data (Len bytes), filled with the actual data length.

[0086] The frame ends with a 2-byte tail (0x5AA5).

[0087] It can be seen that in the present disclosure, the check segment data can also be used to check the data integrity, and this check can be performed together with the first check and the second check. For example, after the first check and the second check, a CRC check can be performed before processing the data to be executed, so that the preliminary check when processing the data to be executed can be more complete.

[0088] In some embodiments, the step 102 of “performing a first check on the first instruction data based on the fragment data corresponding to the first instruction data” may specifically include:

[0089] A first check is performed on the first instruction data according to a first number of the fragment data corresponding to the first instruction data.

[0090] As an example, since the data protocol may predefine which fragment data should be included, the first check may be efficiently performed according to the number of fragment data.

[0091] In some embodiments, the “performing a second check on the to-be-executed fragment data” in step 103 may specifically include:

[0092] Based on the data length indicated by the length class segment data, a second check is performed on the first instruction data.

[0093] As an example, since the frame header and the frame tail can be determined efficiently, the second check can also be performed efficiently, that is, the second check of the first instruction data can also be completed efficiently.

[0094] In some implementations, a CRC check may also be performed, and the computing resources required for the CRC check are usually higher than those of the first check and the second check. Therefore, the CRC check is performed only after the first check and the second check are both passed. In this way, the check that consumes less computing resources can be performed first, and then the check that consumes more computing resources can be performed, thereby avoiding the invalid consumption of excessive computing resources during the check process (for example, the CRC check passes but the first check fails, and if the CRC check is performed first, it may cause excessive consumption of computing resources).

[0095] In some embodiments, the “processing the to-be-executed fragment data” in step 103 may specifically include:

[0096] Determine the target function to be called according to the function indicated by the call identification class fragment data;

[0097] Call the target function to process the fragment data of the class to be executed.

[0098] As an example, since the application scenario of the present disclosure is a password card scenario, and a large number of encryption algorithms are stored in the password card, the present disclosure can improve the efficiency of determining the target function for executing the to-be-executed class fragment data from the password card by setting the call identification class fragment data, thereby improving the efficiency of processing the to-be-executed class fragment data.

[0099] In some embodiments, the processing of the to-be-executed fragment data may be divided into multiple stages, and the multiple stages may at least include:

[0100] Find the target function indicated by the call identification class fragment data, call the target function, and use the target function to process the to-be-executed class fragment data;

[0101] And, the above method may further include:

[0102] In response to detecting an execution error situation for the first instruction information, generating fault-type fragment data;

[0103] Generate feedback information based on the fault-type fragment data, and send the feedback information to the above-mentioned host computer.

[0104] Here, different execution error situations correspond to different fault-class fragment data;

[0105] Here, execution error situations include at least the following:

[0106] The first check failed, the second check failed, an error occurred in searching for the target function indicated by the calling identification class fragment data, an error occurred in calling the above target function, and an error occurred in processing the to-be-executed class fragment data using the target function.

[0107] That is, when processing the first instruction data, the fault-type fragment data corresponding to different error situations in the processing process may be different, so that the upper computer can determine the specific reason for the execution failure of the first instruction data based on the fault-type fragment data in the feedback information of the lower computer, which helps the upper computer to update and repair the first instruction data in time when necessary.

[0108] As an example, in the data protocol agreed upon between the upper computer and the lower computer, the faults indicated by different fault-type fragment data can be agreed upon. For example, when the upper computer receives fault-type fragment data A, it can be known that the lower computer failed in the first verification at this time, so that the upper computer can know that the first indication data sent is incomplete. Correspondingly, when the upper computer receives fault-type fragment data B, it can indicate that the second verification failed, and when it receives fault-type fragment data C, it can indicate that the search target function failed.

[0109] As an example, feedback information may be generated using faulty segment data according to a protocol agreed upon between the upper computer and the lower computer. For example, a frame header, a frame footer, and checksum information may be added to the faulty segment data to generate feedback information.

[0110] In order to facilitate the understanding of the form of feedback information, you can combine Figure 3 To explain, Figure 3 is a possible data form of feedback information disclosed in the present invention, Figure 3 visible:

[0111] The feedback information may also include multiple pieces of data, for example, may include:

[0112] The frame header fragment data can be set to two bytes or a fixed value of 0xA55A.

[0113] The total length fragment data can be set to four bytes, and the total length fragment data can indicate the length of all data including the frame header and frame tail, so that the host computer can perform data verification.

[0114] The CRC checksum fragment data can also be four bytes, including the return value and Len (data length) and the cumulative sum of the data content.

[0115] The return value segment data (fault type segment data) may also be four bytes, and is used to receive a return value error code, which can be used to indicate an execution error situation for the first indication data.

[0116] Len is four bytes, which is the effective length of the data; data is four bytes, which is the content of the returned data; frame tail is two bytes (5AA5).

[0117] In order to facilitate understanding of the concept of the present disclosure, you can continue to combine Figure 4 and Figure 5 To explain, Figure 4 It can be understood as a partial protocol diagram in the data protocol. Figure 5 It can also be understood as a partial protocol diagram; Figure 4 It can be seen that how to design different management functions for the upper computer communication protocol, for example, you can use 0x80 to identify the device management function, use 0x40 key management function interface, among which RSA related can use 0x41, ECC related can use 0x42, and national encryption related can use 0x44. CMD has two bytes and one byte can be used to distinguish different functions.

[0118] By using different CMD identifiers for different types, you can quickly locate the problem and immediately find out which type of function transmission has a problem among many functions, which helps to quickly locate the problem.

[0119] For the lower computer, the return value in the lower computer is a fixed four-byte value. The standard gives a part of the return value, which is not detailed enough. You can add custom error codes according to your needs and status. The standard error code can be as follows Figure 5 What I see.

[0120] certainly, Figure 5 In the case where only part of the error code is displayed, in actual application, you can also add a custom error code at the end. After defining SDR_BY_BASE 0x02000000, add other identifiers as custom error codes, which can be used to refine the error identifiers. This will help the upper computer to more accurately know the execution errors of the lower computer.

[0121] Continue to combine Figure 6 Describe the process of this disclosure. Figure 6 It can be understood as a possible schematic diagram of the data communication process between the upper computer and the lower computer of the present disclosure, Figure 6Take the use of opening a device as an example for communication. First, the PC calls the SDF_Opendevice interface (a function used to open a cryptographic device and return a device handle) to start packet assembly. First, add the frame header A55A. Then add the total length of 26 bytes and convert it into sixteen bytes. At present, CRC verification can be disabled for speed increase. CRC can be enabled through the configuration file. HANDLE (a pointer to a data type used to identify system resources) does not need to be passed for opening a device. The default value is four bytes 0. Next, add the CMD command. For example, the command to open the device is 0x8001. Then add four bytes of length. The current byte length is 0. No data needs to be filled in. Just append a 5AA5 frame tail at the end.

[0122] After receiving the data, the password card of the lower computer starts to check the integrity of the data to prevent packet loss during the transmission process. After checking the integrity of the data, it starts to parse the CMD to confirm what function the data packet needs to perform. According to the sent CMD, it determines the task type to perform the task, and then reads the parameters sent by the upper computer, and then performs the task. When the task is completed, it starts to package. According to the packaging method of the lower computer, similar to that of the upper computer, the task result is encapsulated in the format of the return package and returned to the PC.

[0123] Please continue reading Figure 7 , Figure 7 A flow chart of a method for generating instruction data provided by an embodiment of the present invention is applied to a host computer for generating instruction data, wherein the host computer and the slave computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: a frame header, a frame tail, a check type, a call identification type, a length type, and a to-be-executed type;

[0124] And, if Figure 7 It can be seen that the method for generating instruction data may include the following steps:

[0125] Step 701, in response to receiving the to-be-executed segment data, based on the data protocol, generating segment data corresponding to a plurality of types indicated by the data protocol, and determining the relative positions of the segment data;

[0126] Step 702: Generate instruction data based on the generated segment data and the relative positions of the segment data.

[0127] It should be understood that the types represented by the multiple fragment data at least include: frame header, frame tail, check type, call identification type, length type, and pending execution type, so that the lower computer can better check the indicated data. Of course, the functions corresponding to each type have been described in detail in the above implementation method, and in order to explain the simplicity of the specification, they will not be repeated here.

[0128] The generated instruction data may include multiple fragment data, and the benefits of designing multiple fragment data are also described in the above implementation method. For the sake of brevity of the specification, they will not be repeated here.

[0129] See also Figure 8 , Figure 8 A schematic diagram of the structure of a processing device for instruction data provided by an embodiment of the present invention, wherein the processing device 800 for instruction data is applied to a lower computer that executes instruction data, wherein the lower computer and the upper computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating the types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: a frame header, a frame tail, a check type, a call identification type, a length type, and a to-be-executed type;

[0130] Furthermore, the above-mentioned device 800 may include:

[0131] A determination unit 801 is configured to determine, in response to receiving the first instruction data sent by the host computer, the fragment data corresponding to the first instruction data based on the data protocol;

[0132] A verification unit 802, configured to perform a first verification on the first instruction data based on the segment data corresponding to the first instruction data;

[0133] The sending unit 803 is used to perform a second check on the first instruction data if the first check passes; and to process the to-be-executed class fragment data to obtain a processing result if the second check passes.

[0134] In some embodiments, the determining unit 801 may also be used to:

[0135] Based on the position corresponding to each type of data and the predefined field length of each type of data, the fragment data corresponding to the first instruction data is determined.

[0136] In some embodiments, the verification unit 802 may also be used to:

[0137] Performing a first check on the first instruction data according to a first number of the fragment data corresponding to the first instruction data;

[0138] And, the second verification of the first instruction data includes:

[0139] Based on the data length indicated by the length-class fragment data, a second check is performed on the first instruction data.

[0140] In some embodiments, the sending unit 803 may also be used to:

[0141] Determine the target function to be called according to the function indicated by the above-mentioned call identification class fragment data;

[0142] The target function is called to process the fragment data of the class to be executed.

[0143] In some embodiments, the processing of the above-mentioned to-be-executed fragment data is divided into multiple stages, and the multiple stages at least include:

[0144] Find the target function indicated by the call identification class fragment data, call the target function, and use the target function to process the to-be-executed class fragment data;

[0145] Furthermore, the apparatus 800 may also be used to: generate fault-type segment data in response to detecting an execution error situation for the first instruction information; wherein different execution error situations correspond to different fault-type segment data;

[0146] The above execution error situations include at least the following:

[0147] The first check fails, the second check fails, an error occurs in searching for the target function indicated by the call identification class fragment data, an error occurs in calling the target function, and an error occurs in processing the to-be-executed class fragment data using the target function;

[0148] Generate feedback information based on the above fault-related fragment data, and send the above feedback information to the above host computer:

[0149] See also Fig. 9 , Fig. 9 A schematic diagram of a structure of a device for generating instruction data provided by an embodiment of the present invention, wherein the device 900 for generating instruction data is applied to a host computer for generating instruction data, wherein the host computer and the slave computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: a frame header, a frame tail, a check type, a call identification type, a length type, and a to-be-executed type;

[0150] Furthermore, the above-mentioned device 900 may include:

[0151] The receiving unit 901 is configured to generate, in response to receiving the to-be-executed segment data, segment data corresponding to a plurality of types indicated by the data protocol based on the data protocol, and determine the relative positions of the segment data.

[0152] The generating unit 902 is used to generate instruction data based on the generated segment data and the relative positions of the segment data.

[0153] Fig.10 A schematic diagram of the structure of a computer device provided in one embodiment of the present application is shown, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the functions of a computer system for implementing the method for generating an amplitude preparation circuit in any of the above-mentioned embodiments are realized.

[0154] An embodiment of the present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a computer, the computer executes the functions of the computer system of the method for processing instruction data or the method for generating instruction data in any of the above embodiments.

[0155] The embodiments of the present application also provide a computer program product including instructions, which, when executed by a computer, enables the computer to execute the functions of the computer system of the method for processing instruction data or the method for generating instruction data in any of the above embodiments.

[0156] It should be understood that the specific examples in this application are only intended to help those skilled in the art to better understand the embodiments of the present application, rather than to limit the scope of the present invention.

[0157] It can be understood that in the various implementations of the present application, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the implementation methods of the present application.

[0158] It can be understood that the various embodiments described in this application can be implemented individually or in combination, and the embodiments of this application are not limited to this.

[0159] Unless otherwise stated, all technical and scientific terms used in the embodiments of the present application have the same meaning as those generally understood by those skilled in the art of the technical field of the present application. The terms used in the present application are only for the purpose of describing specific embodiments and are not intended to limit the scope of the present application. The term "and / or" used in the present application includes any and all combinations of one or more related listed items. The singular forms of "a kind of", "above" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0160] It can be understood that the processor of the embodiment of the present application can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method implementation can be completed by the hardware integrated logic circuit or software instructions in the processor. The above processor can be a general processor, a digital signal processor (DigitalSignal Processor, DSP), an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiment of the present application can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as a hardware decoding processor to perform, or the hardware and software modules in the decoding processor are combined and executed. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0161] It is understood that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (programmable ROM, PROM), an erasable programmable read-only memory (erasable PROM, EPROM), an electrically erasable programmable read-only memory (EEPROM) or a flash memory. The volatile memory may be a random access memory (RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0162] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0163] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method implementation methods and will not be repeated here.

[0164] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device implementation described above is only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0165] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0166] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0167] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of each implementation method of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc., various media that can store program codes.

[0168] The above are only specific embodiments of the present application, but the protection scope of the present invention is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for processing instruction data, characterized in that: A lower computer used for executing instruction data, wherein the lower computer and the upper computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: frame header, frame tail, check type, call identification type, length type, and to-be-executed type; And, the method comprises: In response to receiving the first instruction data sent by the host computer, determining the fragment data corresponding to the first instruction data based on the data protocol; Performing a first check on the first instruction data based on the fragment data corresponding to the first instruction data; If the first check passes, a second check is performed on the first instruction data; and if the second check passes, the to-be-executed class fragment data is processed to obtain a processing result.

2. The method according to claim 1, characterized in that The determining, based on the data protocol, the fragment data corresponding to the first instruction data includes: Based on the position corresponding to each type of data and the predefined field length of each type of data, the fragment data corresponding to the first instruction data is determined.

3. The method according to claim 1, characterized in that The performing a first check on the first instruction data based on the fragment data corresponding to the first instruction data includes: performing a first check on the first instruction data according to a first number of fragment data corresponding to the first instruction data; And, performing a second check on the first instruction data includes: Based on the data length indicated by the length class fragment data, a second check is performed on the first instruction data.

4. The method according to claim 1, characterized in that: The processing of the to-be-executed class fragment data includes: Determine the target function to be called according to the function indicated by the call identification class fragment data; The target function is called to process the to-be-executed class fragment data.

5. The method according to claim 1, characterized in that Processing the to-be-executed class fragment data is divided into multiple stages, and the multiple stages at least include: Finding the target function indicated by the calling identification class fragment data, calling the target function, and using the target function to process the to-be-executed class fragment data; And, the method further comprises: In response to detecting an execution error situation for the first instruction information, generating fault-type segment data; wherein different execution error situations correspond to different fault-type segment data; The execution error situations include at least the following: The first check fails, the second check fails, an error occurs in searching for the target function indicated by the calling identification class fragment data, an error occurs in calling the target function, and an error occurs in processing the to-be-executed class fragment data using the target function; Generate feedback information based on the fault-type fragment data, and send the feedback information to the host computer.

6. A method for generating instruction data, characterized in that: A host computer used to generate instruction data, wherein the host computer and the slave computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: frame header, frame tail, check type, call identification type, length type, and pending execution type; And, the method comprises: In response to receiving the to-be-executed segment data, based on the data protocol, generating segment data corresponding to a plurality of types indicated by the data protocol, and determining the relative positions of the segment data; Based on the generated segment data and the relative positions of the segment data, instruction data is generated.

7. A processing device for instruction data, characterized in that: A lower computer used for executing instruction data, wherein the lower computer and the upper computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: frame header, frame tail, check type, call identification type, length type, and to-be-executed type; And, the device comprises: a determining unit, configured to determine, in response to receiving the first instruction data sent by the host computer, the fragment data corresponding to the first instruction data based on the data protocol; a verification unit, configured to perform a first verification on the first instruction data based on the fragment data corresponding to the first instruction data; The sending unit is used to perform a second check on the first instruction data if the first check passes; and to process the to-be-executed class fragment data to obtain a processing result if the second check passes.

8. A device for generating instruction data, characterized in that: A host computer used to generate instruction data, wherein the host computer and the slave computer pre-establish a unified data protocol, wherein the data protocol includes information for indicating types represented by multiple fragment data in the instruction data, wherein the types represented by the multiple fragment data at least include: frame header, frame tail, check type, call identification type, length type, and pending execution type; And, the device comprises: a receiving unit, configured to generate, in response to receiving the to-be-executed segment data, segment data corresponding to a plurality of types indicated by the data protocol based on the data protocol, and determine the relative positions of the segment data; The generating unit is used to generate instruction data based on the generated fragment data and the relative positions of each fragment data.

9. A storage medium, characterized in that: The storage medium stores a computer program, wherein the computer program is configured to execute the method according to any one of claims 1 to 5, or the method according to any one of claim 6 when running.

10. An electronic device comprising a memory and a processor, characterized in that: A computer program is stored in the memory, and the processor is configured to run the computer program to execute the method according to any one of claims 1 to 5, or the method according to any one of claim 6.

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