Automatic Type-C interface detection method and device, electronic equipment and storage medium

Abstract

The invention provides an automatic Type-C interface detection method and device, electronic equipment and a storage medium, and the method comprises the steps: inserting a preset detection connector with detection pins of two surfaces into a Type-C interface to be detected, and respectively detecting the interface pins of the two surfaces of the Type-C interface to be detected, so that in the detection process, a plug does not need to be positively inserted or reversely inserted, and the detection efficiency is improved. In addition, the sequence data obtained through detection of all the Type-C interfaces to be detected are uploaded and stored to the upper computer, the upper computer carries out batch detection on all the sequence data in a unified mode, and therefore the detection efficiency is further improved.

Description

Technical Field

[0001] The present invention relates to the technical field of Type-C interface detection, and in particular to an automated Type-C interface detection method, device, electronic device and storage medium. Background Art

[0002] USB Type-C is a USB (Universal Serial Bus) interface appearance standard. Since the Type-C interface has symmetrical pins on both sides, the Type-C interface can be inserted forward or backward, which greatly improves the convenience of use.

[0003] Although the Type-C interface has no front and back sides and can be inserted forward or reverse, in order to ensure that it can be inserted forward or reverse, the pins on both sides of the Type-C interface need to remain in normal operation to achieve forward and reverse insertion. Otherwise, if the pins on one side are faulty, the Type-C interface will only be able to accept insertion in one direction.

[0004] To this end, it is necessary to test the Type-C interfaces on various boards such as motherboards and other electronic devices before leaving the factory. The traditional method is to manually insert each Type-C connector forward to test whether the pins on the front are working properly, then unplug it and insert it reversely to test whether the pins on the back are working properly. Each Type-C interface needs to be inserted twice, resulting in low detection efficiency. Summary of the invention

[0005] Based on this, it is necessary to provide an automated Type-C interface detection method, device, electronic device and storage medium to address the above technical problems.

[0006] An automated Type-C interface detection method, comprising:

[0007] Insert a preset detection connector into the Type-C interface to be tested, wherein the preset detection connector has a first-side detection pin and a second-side detection pin, the first-side detection pin is connected to the first-side interface pin of the Type-C interface to be tested in a one-to-one correspondence, and the second-side detection pin is connected to the second-side interface pin of the Type-C interface to be tested in a one-to-one correspondence;

[0008] Connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals;

[0009] Obtaining a first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data using the first sequence value to obtain first sequence data;

[0010] Connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin to the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals;

[0011] Obtaining a second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, and encoding the second detection data using the second sequence value to obtain second sequence data;

[0012] storing each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested in a host computer;

[0013] Using the host computer to detect whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to preset comparison data;

[0014] When the first sequence data or the second sequence data does not conform to the preset comparison data, it is determined to be abnormal data, and the abnormal Type-C interface to be tested is determined according to the first sequence value and the second sequence value.

[0015] In one embodiment, the step of obtaining the first sequence value includes:

[0016] Scan the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested;

[0017] Generate the first sequence value according to the sequence number corresponding to each pin sorted in the first preset polling order and the detection sequence number of the Type-C interface to be tested;

[0018] The step of obtaining the second sequence value comprises:

[0019] Scan the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested;

[0020] The second sequence value is generated according to the serial numbers corresponding to the pins sorted in the second preset polling order and the detection serial number of the Type-C interface to be tested.

[0021] In one embodiment, the step of using the host computer to detect whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to preset comparison data includes:

[0022] Utilizing the host computer to parse each of the first sequence data and each of the second sequence data, to obtain a detection sequence number, first detection data, and second detection data of each of the Type-C interfaces to be tested;

[0023] Respectively comparing the first detection data and the second detection data with preset comparison data;

[0024] When the first sequence data or the second sequence data does not conform to the preset comparison data, it is determined to be abnormal data, and the step of determining the abnormal Type-C interface to be tested according to the first sequence value and the second sequence value includes:

[0025] When at least one of the first detection data and the second detection data does not conform to the preset comparison data, it is determined to be abnormal data, the detection serial number of the Type-C interface to be tested is determined, and the detection serial number of the Type-C interface to be tested is output.

[0026] In one embodiment, the first side detection pin includes a first CC pin, and the second side detection pin includes a second CC pin;

[0027] The step of connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals comprises:

[0028] Conducting the connection between the grounding resistor on the first CC pin and the ground, and conducting the connection between the first-side detection pin and the detection circuit, disconnecting the connection between the grounding resistor on the second CC pin and the ground, and disconnecting the connection between the second-side detection pin and the detection circuit, judging whether each pin of the first-side interface pin generates a signal, if yes, collecting the signal of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals, if no, scanning the identification code of the Type-C interface to be tested to obtain the detection sequence number of the Type-C interface to be tested, generating first fault sequence data based on the detection sequence number of the Type-C interface to be tested, and storing the first fault sequence data in a host computer;

[0029] The step of connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals comprises:

[0030] Conducting the connection between the grounding resistor on the second CC pin and the ground, and conducting the connection between the second-side detection pin and the detection circuit, disconnecting the connection between the grounding resistor on the first CC pin and the ground, and disconnecting the connection between the first-side detection pin and the detection circuit, judging whether each pin of the second-side interface pin generates a signal, if so, collecting the signal of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals, if not, scanning the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested, generating second fault sequence data based on the detection serial number of the Type-C interface to be tested, and storing the second fault sequence data in the host computer.

[0031] In one embodiment, the step of connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals comprises:

[0032] Conducting the connection between the grounding resistor on the first CC pin and the ground, and conducting the connection between the first surface detection pin and the detection circuit, disconnecting the grounding resistor on the second CC pin and the ground, and disconnecting the second surface detection pin and the detection circuit, collecting signals of each pin of the first surface interface pin except the first high-speed differential transmission pin according to a first preset polling order to obtain a plurality of first sub-signals, conducting the connection between the second surface detection pin and the detection circuit, collecting signals of the first high-speed differential transmission pin of the first surface interface pin and the first high-speed differential reception pin of the second surface interface pin according to a first preset polling order to obtain a plurality of second sub-signals, and merging the first sub-signal and the second sub-signal to obtain the first signal;

[0033] The step of connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals comprises:

[0034] Conducting the connection between the grounding resistor on the second CC pin and the ground, and conducting the connection between the second-side detection pin and the detection circuit, disconnecting the grounding resistor on the first CC pin and the ground, and disconnecting the first-side detection pin and the detection circuit, collecting signals of each pin of the second-side interface pin except the second high-speed differential transmitting pin according to a second preset polling order to obtain a plurality of third sub-signals, conducting the connection between the first-side detection pin and the detection circuit, collecting signals of the second high-speed differential transmitting pin of the second-side interface pin and the second high-speed differential receiving pin of the first-side interface pin according to a second preset polling order to obtain a plurality of fourth sub-signals, and merging the third sub-signal and the fourth sub-signal to obtain the second signal.

[0035] In one embodiment, the step of obtaining the first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data using the first sequence value to obtain the first sequence data includes:

[0036] Obtain a first sequence value, wherein the first sequence value records the detection sequence number of each Type-C interface to be tested and the sequence number corresponding to each pin sorted according to the first preset polling order;

[0037] Performing analog-to-digital conversion on the first signal according to a preset rule to obtain the first detection data;

[0038] Encoding the first detection data using the first sequence value to obtain first sequence data;

[0039] The step of obtaining the second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, and encoding the second detection data using the second sequence value to obtain the second sequence data includes:

[0040] Obtain a second sequence value, wherein the second sequence value records the detection sequence number of each Type-C interface to be tested and the sequence number corresponding to each pin sorted according to the second preset polling order;

[0041] Performing analog-to-digital conversion on the second signal according to a preset rule to obtain the second detection data;

[0042] The second detection data is encoded using the second sequence value to obtain second sequence data.

[0043] In one embodiment, the step of encoding the first detection data using the first sequence value to obtain the first sequence data includes:

[0044] Assign the first detection data of each pin of the first-side interface pin to the Nth pin signal value in the first sequence value one by one according to the sequence number N corresponding to the pin recorded in the first sequence value, and merge the pin signal values ​​having the same detection sequence number of the Type-C interface to be tested to obtain the first sequence data, wherein the first sequence value has M pin signal values, M is equal to the number of pins of the first-side interface pin, and N is a positive integer greater than or equal to 1 and less than or equal to the number of pins of the first-side interface pin;

[0045] The step of encoding the second detection data by using the second sequence value to obtain the second sequence data comprises:

[0046] The second detection data of each pin of the second-side interface pin is assigned one by one to the Nth pin signal value in the second sequence value according to the sequence number N corresponding to the pin recorded in the second sequence value, and the pin signal values ​​having the same detection sequence number of the Type-C interface to be tested are merged to obtain the second sequence data, wherein the second sequence value has M pin signal values, M is equal to the number of pins of the second-side interface pins, and N is a positive integer greater than or equal to 1, and less than or equal to the number of pins of the second-side interface pins.

[0047] An automated Type-C interface detection device is used for inserting a preset detection connector into a Type-C interface to be tested, wherein the preset detection connector has a first-side detection pin and a second-side detection pin, the first-side detection pin is connected to the first-side interface pin of the Type-C interface to be tested in a one-to-one correspondence, and the second-side detection pin is connected to the second-side interface pin of the Type-C interface to be tested in a one-to-one correspondence; the device comprises:

[0048] A first acquisition module is used to connect the first surface detection pin to the detection circuit, disconnect the second surface detection pin from the detection circuit, and acquire signals of each pin of the first surface interface pin in a first preset polling order to obtain a plurality of first signals;

[0049] A first sequence data acquisition module, used to acquire a first sequence value, convert the first signal into first detection data in a preset format according to a preset rule, and encode the first detection data using the first sequence value to obtain first sequence data;

[0050] A second acquisition module is used to connect the second-side detection pin to the detection circuit, disconnect the first-side detection pin from the detection circuit, and collect signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals;

[0051] A second sequence data acquisition module, used to acquire a second sequence value, convert the second signal into second detection data in a preset format according to a preset rule, and encode the second detection data using the second sequence value to obtain second sequence data;

[0052] A storage module, used for storing each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested in a host computer;

[0053] A detection and comparison module, used for detecting, by using the host computer, whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to preset comparison data;

[0054] The abnormal output module is used to determine that the first sequence data or the second sequence data does not conform to the preset comparison data as abnormal data, and determine the abnormal Type-C interface to be tested according to the first sequence value and the second sequence value.

[0055] An electronic device comprises a memory and a processor, wherein the memory stores a computer program, and wherein when the processor executes the computer program, the steps of the automated Type-C interface detection method described in any of the above embodiments are implemented.

[0056] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the automated Type-C interface detection method described in any of the above embodiments.

[0057] The above-mentioned automated Type-C interface detection method, device, electronic device and storage medium utilize a preset detection connector with detection pins on two sides to be inserted into the Type-C interface to be tested, and the interface pins on the two sides of the Type-C interface to be tested are detected separately, so that during the detection process, there is no need to insert the plug forward or backward, which effectively improves the detection efficiency. In addition, by uploading and storing the sequence data obtained from the detection of each Type-C interface to be tested to a host computer, the host computer uniformly performs batch detection on each sequence data, thereby further improving the detection efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] Figure 1 A schematic diagram of a flow chart of an automated Type-C interface detection method in one embodiment;

[0059] Figure 2 is a diagram of the internal structure of an electronic device in one embodiment;

[0060] Figure 3 Schematic diagram of pins of a Type-C interface to be tested in one embodiment;

[0061] Figure 4 A schematic diagram of pins of a preset detection connector in an embodiment;

[0062] Figure 5 A schematic diagram of batch connection test lines for detecting a board in an embodiment. DETAILED DESCRIPTION

[0063] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0064] Embodiment 1

[0065] In this embodiment, Figure 1 As shown, an automated Type-C interface detection method is provided, which includes:

[0066] Step 110, using a preset detection connector to insert the Type-C interface to be tested, wherein the preset detection connector has a first-side detection pin and a second-side detection pin, the first-side detection pin is connected to the first-side interface pin of the Type-C interface to be tested in a one-to-one correspondence, and the second-side detection pin is connected to the second-side interface pin of the Type-C interface to be tested in a one-to-one correspondence.

[0067] In this embodiment, the preset detection connector is a Type-C male plug, the Type-C interface to be tested is a Type-C interface on the board to be tested, and the Type-C interface to be tested is a female interface. Figure 3 As shown in the figure, the interface pins on the first side of the Type-C interface to be tested are pins A1 to A12, including GND, TX1+, TX1-, VUBS, CC1, D+, D-, SBU1, VBUS, RX2-, RX2+, and GND. The interface pins on the second side are pins B1 to B12, including GND, TX2+, TX2-, VUBS, CC2, D+, D-, SBU2, VBUS, RX1-, RX1+, and GND. Figure 4As shown, the detection pins on the first side of the preset detection connector are A1 to A12 pins, including GND, TX1+, TX1-, VUBS, CC1, D+, D-, SBU1, VBUS, RX2-, RX2+, and GND, and the detection pins on the second side are B1 to B12 pins, including GND, TX2+, TX2-, VUBS, CC2, D+, D-, SBU2, VBUS, RX1-, RX1+, and GND. When the preset detection connector is inserted into the Type-C interface to be tested, the detection pins on the first side are connected to the interface pins on the first side in a one-to-one correspondence, and the detection pins on the second side are connected to the interface pins on the second side in a one-to-one correspondence.

[0068] Step 120, connecting the first surface detection pin to the detection circuit, disconnecting the second surface detection pin from the detection circuit, collecting signals of each pin of the first surface interface pin in a first preset polling order, and obtaining a plurality of first signals.

[0069] In this embodiment, the signal of the first-side interface pin is first collected. Specifically, the detection circuit is used to establish communication with the board to be tested. The detection circuit establishes communication with the board to be tested by connecting the first-side detection pin with the first-side interface pin. At this time, the connection between the second-side detection pin and the detection circuit is disconnected to avoid detection errors caused by the signal of the second-side detection pin. The first preset polling order is the order of collecting signals of each pin of the first-side interface pin, for example, one by one from A1 to A12, for example, detecting the voltage of the GND pin to obtain the GND pin voltage signal, detecting the voltage of the VBUS pin to obtain the VBUS pin voltage signal, establishing a data channel, sending a data request to the TX1+ pin and TX1- pin of the first-side detection pin to the TX1+ pin and TX1- pin of the first-side interface pin, and receiving the RX1- pin and RX1+ pin of the second-side detection pin from the RX1+ pin of the second-side interface pin. -pin and RX1+pin data feedback, if there is data communication between TX1+pin, TX1-pin, RX1-pin and RX1+pin, the corresponding signal is collected as 1, otherwise it is 0; through the D+pin and D-pin of the first-side detection pin and the D+pin and D-pin of the first-side interface pin, detect whether there is data in the communication between the D+pin and D-pin of the first-side interface pin, if there is data, the corresponding signal is collected as 1, otherwise it is 0; detect whether there is data communication between SBU1, if there is data, the corresponding signal is collected as 1, otherwise it is 0.

[0070] Step 130 , obtaining a first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data using the first sequence value to obtain first sequence data.

[0071] In this step, since the signals collected from each pin of the first-side interface pin include voltage signals and digital signals, wherein the voltage signal is an analog signal, it is necessary to convert the first signal of each pin into the first detection data in digital format, and use the first signal to binarize the signal after analog-to-digital conversion according to a preset rule. For example, when the voltage signal is within the preset voltage range, the binarized signal data is 1, and when the voltage signal is not within the preset voltage range, the binarized data is 0. It is worth mentioning that for the GND pin signal or the VBUS pin signal, the preset voltage range is different. Through the data conversion of the signal, the data can be made simple, which is conducive to transmission, storage and comparative detection, and improves efficiency.

[0072] In this embodiment, the first sequence value records the order of collecting each pin, and the first detection data is encoded using the first sequence value, so that the first detection data corresponding to each pin carries a detection identification mark (for example, a detection sequence number), so that the signal of each pin can be accurately identified. In this way, even if the signal data of each pin is disrupted, or some pins cannot be collected and identified, it still does not affect the detection of other pins, and the user can accurately determine the pin with a fault.

[0073] Step 140, connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals;

[0074] In this embodiment, after completing the signal collection of the first-side interface pins of the Type-C interface to be tested, the signal collection of the second-side interface pins is performed.

[0075] By connecting the second-side detection pin and the second-side interface pin, the detection circuit establishes communication with the board to be tested. At this time, the connection between the first-side detection pin and the detection circuit is disconnected to avoid detection errors caused by the signal of the first-side detection pin. The second preset polling order is the order of collecting signals from each pin of the second-side interface pin, for example, detecting one by one from B1 to B12, for example, detecting the voltage of the GND pin to obtain the GND pin voltage signal, detecting the voltage of the VBUS pin to obtain the VBUS pin voltage signal, establishing a data channel, sending a data request to the TX2+ pin and TX2- pin of the second-side detection pin to the TX2+ pin and TX2- pin of the second-side interface pin, and receiving the RX2+ pin from the first-side interface pin through the RX2- pin and RX2+ pin of the first-side detection pin. -pin and RX2+ pin data feedback, if there is data communication between TX2+ pin, TX2- pin, RX2- pin and RX2+ pin, the corresponding signal is collected as 1, otherwise it is 0; through the D+ pin and D- pin of the second-side detection pin and the D+ pin and D- pin of the second-side interface pin, detect whether there is data in the communication between the D+ pin and D- pin of the first-side interface pin, if there is, the corresponding signal is collected as 1, otherwise it is 0; detect whether there is data communication between SBU2, if there is, the corresponding signal is collected as 1, otherwise it is 0.

[0076] Step 150, obtaining a second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, encoding the second detection data using the second sequence value, and obtaining second sequence data.

[0077] In this embodiment, the processing principle of the second signal is the same as that of the first signal. Specifically, the second signal of each pin is converted into the second detection data in digital format, and the second signal is used to perform binarization processing on the analog-to-digital converted signal according to a preset rule. For example, when the voltage signal is within the preset voltage range, the binarized signal data is 1, and when the voltage signal is not within the preset voltage range, the binarized data is 0. Through the data conversion of the signal, the data can be simplified, which is conducive to transmission, storage and comparative detection, and improves efficiency.

[0078] Similarly, in this embodiment, the second sequence value records the order of collecting each pin, and the second detection data is encoded using the second sequence value, so that the second detection data corresponding to each pin carries a detection identification mark (for example, a detection sequence number), so that the signal of each pin can be accurately identified. In this way, even if the signal data of each pin is disrupted, or some pins cannot be collected and identified, it still does not affect the detection of other pins, and the user can accurately determine the pin with a fault.

[0079] Step 160: store each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested in a host computer.

[0080] In this embodiment, the host computer is used to process the data of each Type-C interface to be tested, and the detection connector is preset on the detection board. The detection board is integrated with a detection circuit. Compared with the detection board, the host computer has stronger processing power and storage capacity, and compared with the host computer, the detection board has the characteristics of flexible installation and suitability for different computers, and can be quickly deployed. The detection board only needs to perform simple processing on the signal, that is, send it to the host computer for storage. There is no need to store too much data on the detection board, and there is no need to perform complex data processing and calculation, which can effectively improve efficiency.

[0081] In some embodiments, Figure 5 As shown, the detection board is connected to multiple preset detection connectors through data cables, the preset detection connectors are connected to the ends of the data cables, and each preset detection connector is inserted into a Type-C interface to be tested. In this way, one detection board can collect data from multiple Type-C interfaces to be tested on multiple boards to be tested at the same time.

[0082] In this embodiment, the detection board sends the collected first sequence data and second sequence data of each Type-C interface to be tested to the host computer for storage, and the host computer performs subsequent comparison detection.

[0083] Step 170: Use the host computer to detect whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to preset comparison data.

[0084] In this embodiment, the preset comparison data is the data corresponding to each pin of the Type-C interface when it is qualified and fault-free. Therefore, the preset comparison data can also be called reference data. In this embodiment, the host computer has strong computing and processing capabilities, and can quickly compare the first sequence data and the second sequence data of each Type-C interface to be tested with the preset comparison data.

[0085] Step 180: When the first sequence data or the second sequence data does not conform to the preset comparison data, it is determined to be abnormal data, and the abnormal Type-C interface to be tested is determined according to the first sequence value and the second sequence value.

[0086] In this embodiment, when the first sequence data is consistent with the preset comparison data, it indicates that the first side interface pin of the Type-C interface to be tested is normal, and when the second sequence data is consistent with the preset comparison data, it indicates that the second side interface pin of the Type-C interface to be tested is normal. If the first sequence data and the second sequence data are consistent with the preset comparison data at the same time, it indicates that the Type-C interface to be tested is normal. When at least one of the first sequence data and the second sequence data of the Type-C interface to be tested does not conform to the preset comparison data, the inconsistent data is determined to be abnormal data, and because the first sequence data and the second sequence data carry the first sequence value and the second sequence value respectively, the detection sequence number of the Type-C interface to be tested can be determined accordingly, thereby determining the Type-C interface to be tested that is abnormal or faulty.

[0087] In the above embodiment, a preset detection connector with detection pins on two sides is inserted into the Type-C interface to be tested, and the interface pins on the two sides of the Type-C interface to be tested are respectively detected, so that during the detection process, there is no need to insert the plug forward or backward, which effectively improves the detection efficiency. In addition, by uploading and storing the sequence data obtained from the detection of each Type-C interface to be tested to the host computer, the host computer uniformly performs batch detection on each sequence data, thereby further improving the detection efficiency.

[0088] In one embodiment, the step of obtaining the first sequence value includes:

[0089] Scan the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested;

[0090] Generate the first sequence value according to the sequence number corresponding to each pin sorted in the first preset polling order and the detection sequence number of the Type-C interface to be tested;

[0091] The step of obtaining the second sequence value comprises:

[0092] Scan the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested;

[0093] The second sequence value is generated according to the serial numbers corresponding to the pins sorted in the second preset polling order and the detection serial number of the Type-C interface to be tested.

[0094] In some embodiments, each board has a unique identification mark, which can be an identification code, such as a barcode or a QR code, representing a number. If the board has a Type-C interface, the identification code of the Type-C interface to be tested is the barcode or QR code on the board. In some embodiments, the identification code can also be a serial number on the board where the Type-C interface is located, such as a digital serial number, which can be obtained by scanning and identifying the digital serial number with a camera. In some embodiments, if the board has multiple Type-C interfaces, a corresponding identification code is set for each Type-C interface.

[0095] In this embodiment, the detection serial number of each Type-C interface to be tested is obtained by scanning with a camera, and the detection serial number is used to mark the Type-C interface as a unique identification representation of the Type-C interface to be tested during the detection process, and can also be used as an identifier of the order of its detection. In this embodiment, the detection serial number of the Type-C interface to be tested obtained by scanning is used as the input of the second sequence value, and the first sequence value and the second sequence value are generated in combination with the acquisition order of the signals of each pin. In this way, the collected sequence data can be determined to which Type-C interface to be tested belongs through the first sequence value and the second sequence value. In this way, the Type-C interface to be tested of multiple boards to be tested is collected at the same time by using the detection board, and after uploading to the host computer, the host computer can determine the Type-C interface to be tested with a fault from each board to be tested according to the detection serial number of the Type-C interface to be tested recorded in the sequence value after comparison detection.

[0096] In addition, since the first sequence value and the second sequence value also record the serial numbers corresponding to each pin sorted according to the first preset polling order and the second preset polling order respectively, in this way, when the upper computer compares the first sequence data and the second sequence data of each Type-C interface to be tested with the preset comparison data, it can also compare the data of each pin one by one according to the first preset polling order and the second preset polling order, so as to accurately identify and locate the fault of a certain pin.

[0097] In addition, in some embodiments, the USB (Universal Serial Bus) 3.0 and USB2.0 functions of the Type-C interface to be tested can be tested as required. Specifically, the Type-C interface includes the functional pins of USB3.0 and USB2.0. For example, USB3.0 involves TX1+, TX1-, RX1+, RX1-, TX2+, TX2-, RX2+, RX2-, and USB2.0 involves D+ and D-. Therefore, the first preset polling order can be set according to the detection requirements, and the signals of the corresponding pins can be collected based on the first preset polling order. The preset comparison data can also select data that matches the functional pins of USB3.0 and USB2.0 according to the test requirements.

[0098] In one embodiment, step 170 includes: using the host computer to detect whether the data corresponding to each pin in the first sequence data and each data of the preset comparison data are consistent according to the first preset polling order; using the host computer to detect whether the data corresponding to each pin in the second sequence data and each data of the preset comparison data are consistent according to the second preset polling order; step 180 includes: when there is at least one pin corresponding to the data in the first sequence data that does not conform to one of the data in the preset comparison data, and / or when there is at least one pin corresponding to the data in the second sequence data that does not conform to one of the data in the preset comparison data, it is determined to be abnormal data, and the abnormal Type-C interface to be tested is determined according to the detection sequence number of the Type-C interface to be tested. In this embodiment, during the comparison detection process of the host computer, the first sequence data and the second sequence data are detected according to the first preset polling order and the second preset polling order, respectively, so that the fault of a certain pin can be accurately identified and located.

[0099] In one embodiment, the step of using the host computer to detect whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to preset comparison data includes:

[0100] Utilizing the host computer to parse each of the first sequence data and each of the second sequence data, to obtain a detection sequence number, first detection data, and second detection data of each of the Type-C interfaces to be tested;

[0101] Respectively comparing the first detection data and the second detection data with preset comparison data;

[0102] When the first sequence data or the second sequence data does not conform to the preset comparison data, it is determined to be abnormal data, and the step of determining the abnormal Type-C interface to be tested according to the first sequence value and the second sequence value includes:

[0103] When at least one of the first detection data and the second detection data does not conform to the preset comparison data, it is determined to be abnormal data, the detection serial number of the Type-C interface to be tested is determined, and the detection serial number of the Type-C interface to be tested is output.

[0104] Among them, in this embodiment, the step of comparing the first detection data and the second detection data with the preset comparison data respectively includes: comparing the data corresponding to each pin in the first detection data with the data of the preset comparison data in sequence according to a first preset polling order; comparing the data corresponding to each pin in the second detection data with the data of the preset comparison data in sequence according to a second preset polling order.

[0105] In this embodiment, when the host computer compares the data collected from each Type-C interface to be tested, it first parses the first sequence data and the second sequence data with the sequence value. The parsing process is the inverse process of encoding, and therefore, it can also be called a decoding process. After parsing, the detection sequence number, the first detection data, and the second detection data of the Type-C interface to be tested are obtained. It is worth mentioning that since the first preset polling order and the second preset polling order are pre-set and are the same for each Type-C interface to be tested, there is no need to decode them to reduce the amount of calculation. The first preset polling order and the second preset polling order are only needed in the encoding process, and the purpose is to arrange the signals of each pin in an orderly manner. The first preset polling order and the second preset polling order are pre-stored in the host computer, so there is no need to parse the first sequence data and the second sequence data to obtain the first preset polling order and the second preset polling order.

[0106] In addition, in this embodiment, after detecting that the Type-C interface to be tested is abnormal, the detection serial number of the Type-C interface to be tested is determined, and the detection serial number of the Type-C interface to be tested is output, so that the test personnel can know which Type-C interface to be tested of which board to be tested is abnormal, and quickly and accurately locate the abnormal Type-C interface. In this way, batch detection can be performed on multiple Type-C interfaces to be tested, and batch data can be collected and compared without collecting, testing and comparing one by one, and the abnormal Type-C interface to be tested can be accurately determined in the case of batch detection, thereby more effectively improving the detection efficiency.

[0107] In one embodiment, the first side detection pin includes a first CC pin, and the second side detection pin includes a second CC pin;

[0108] The step of connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals comprises:

[0109] Conducting the connection between the grounding resistor on the first CC pin and the ground, and conducting the connection between the first-side detection pin and the detection circuit, disconnecting the connection between the grounding resistor on the second CC pin and the ground, and disconnecting the connection between the second-side detection pin and the detection circuit, judging whether each pin of the first-side interface pin generates a signal, if yes, collecting the signal of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals, if no, scanning the identification code of the Type-C interface to be tested to obtain the detection sequence number of the Type-C interface to be tested, generating first fault sequence data based on the detection sequence number of the Type-C interface to be tested, and storing the first fault sequence data in a host computer;

[0110] The step of connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals comprises:

[0111] Conducting the connection between the grounding resistor on the second CC pin and the ground, and conducting the connection between the second-side detection pin and the detection circuit, disconnecting the connection between the grounding resistor on the first CC pin and the ground, and disconnecting the connection between the first-side detection pin and the detection circuit, judging whether each pin of the second-side interface pin generates a signal, if so, collecting the signal of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals, if not, scanning the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested, generating second fault sequence data based on the detection serial number of the Type-C interface to be tested, and storing the second fault sequence data in the host computer.

[0112] In this embodiment, the CC (Configuration channel) pin is used to identify the insertion direction of the preset detection connector, such as Figure 4As shown, the first CC pin of the preset detection connector is CC1, and the second CC pin of the preset detection connector is CC2. Specifically, the first CC pin of the preset detection connector is connected to the ground through a grounding resistor, and the second CC pin is connected to the ground through another grounding resistor, and an electronic switch tube is arranged between the grounding resistor and the ground, which is used to control the conduction and disconnection between the grounding resistor and the ground. In addition, electronic switch tubes are arranged between the detection circuit and the first-side detection pin of the preset detection connector, and between the detection circuit and the second-side detection pin of the preset detection connector, respectively, which are used to control the conduction and disconnection between the detection circuit and the first-side detection pin of the preset detection connector, and control the conduction and disconnection between the detection circuit and the second-side detection pin of the preset detection connector. For example, the electronic switch tube is a triode. In this embodiment, a control module is arranged on the detection board, and the control module is connected to the control end of each electronic switch tube, which is used to control the conduction and disconnection of each electronic switch tube.

[0113] In this embodiment, CC pins are respectively provided on both sides of the preset detection connector. Therefore, whether it is inserted forward or reverse, it can be connected to the CC pins on both sides of the Type-C interface to be tested. In order to separately collect the signal of each side of the Type-C interface to be tested, it is necessary to control the opening of the multiplexing switch of the Type-C interface to be tested to realize the collection of the signal of each side of the Type-C interface to be tested separately.

[0114] Specifically, the Type-C interface to be tested has a controller chip, a CC detection control chip and a multiplexing switch circuit. The CC detection control chip is connected to the CC1 and CC2 pins of the Type-C interface to be tested. The multiplexing switch circuit is respectively connected to the TX1+, TX1-, RX1-, RX1+, TX2+, TX2-, RX2-, and RX2+ of the Type-C interface to be tested, and the multiplexing switch circuit is also connected to the controller chip. When the CC1 pin of the Type-C interface to be tested detects a connection with the CC pin of the male connector, the multiplexing switch circuit is triggered to open the channels of TX1+, TX1-, RX1+, and RX1-, and close the channels of TX1+, TX1-, RX1+, and RX1-. The channels of TX2+, TX2-, RX2+, and RX2- make TX1+, TX1-, RX1+, and RX1- connected to SSTX+, SSTX-, SSRX+, and SSRX- of the controller chip respectively; when the CC2 pin of the Type-C interface to be tested detects that it is connected to the CC pin of the male connector, the multiplexing switch circuit is triggered to open the channels of TX2+, TX2-, RX2+, and RX2-, and close the channels of TX1+, TX1-, RX1+, and RX1-, so that TX1+, TX1-, RX1+, and RX1- are connected to SSTX+, SSTX-, SSRX+, and SSRX- of the controller chip respectively.

[0115] In this embodiment, the connection between the grounding resistor corresponding to the first CC pin and the ground is first turned on, so that the first CC pin is connected to the pull-down resistor, so that the voltage of the CC1 pin connected to the first CC pin changes, and the CC detection control chip of the Type-C interface to be tested can detect the access of the first CC pin through the CC1 pin, and because the connection between the grounding resistor corresponding to the second CC pin and the ground is disconnected, the second CC pin is not connected to the pull-down resistor, and the voltage of the CC2 pin does not change. The CC detection control chip of the Type-C interface to be tested triggers the multiplexing switch circuit to open the channels of TX1+, TX1-, RX1+, and RX1-. In this way, each pin of the first interface pin except RX2+ and RX2- and RX1+ and RX1- of the second interface pin are signaled. Acquisition; Subsequently, the connection between the grounding resistor corresponding to the second CC pin and the ground is turned on, so that the second CC pin is connected to the pull-down resistor, so that the voltage of the CC2 pin connected to the second CC pin changes, and the CC detection control chip of the Type-C interface to be tested can detect the access of the second CC pin through the CC2 pin, and because the connection between the grounding resistor corresponding to the first CC pin and the ground is disconnected, the first CC pin is not connected to the pull-down resistor, and the voltage of the CC1 pin will not change. The CC detection control chip of the Type-C interface to be tested triggers the multiplexing switch circuit to open the channels of TX2+, TX2-, RX2+, and RX2-, so that the signals of each pin of the second side interface pin except RX1+ and RX1- and the RX2+ and RX2- of the first side interface pin are collected. Through the above process, the signal collection of the pins on the two sides of the Type-C interface to be tested can be realized without the user having to plug and unplug the connector, and without the need to plug forward and backward, which can effectively improve the detection efficiency.

[0116] To avoid reverse insertion, in some cases, the pins on both sides are turned on at the same time for detection, but this will result in the inability to separately detect the functions of the two CC pins of the Type-C interface to be tested, and the failure or abnormality of the CC pin cannot be accurately identified. In this embodiment, the pins on both sides of the Type-C interface to be tested are detected separately by turning on the pins on one side and disconnecting the pins on the other side. The function of the CC pin of the Type-C interface to be tested can be detected separately, so as to detect whether the CC detection control chip and the multiplexing switch circuit of the Type-C interface to be tested are working normally, and whether the channel can be opened and closed normally.

[0117] In addition, in this embodiment, when the signals of each pin of the Type-C interface to be tested are collected according to the preset polling, if there is data transmission or voltage signal on each pin, it indicates that there is no fault in the connection of each pin of the Type-C interface to be tested, and then the signal of each pin can be collected. If there is at least one pin without signal, it indicates that there is an unstable pin connection or fault in the Type-C interface to be tested, and then the detection sequence number of the Type-C interface to be tested is scanned, and the first fault sequence data is generated, and the first fault sequence data is stored in the host computer. It is worth mentioning that in the traditional thinking, when a pin has no signal, the signal collected by the pin is set to 0, and the first (second) detection data and the first (second) sequence data are still generated. On the one hand, computing resources are undoubtedly wasted because the absence of a signal is different from an abnormal signal. For example, the collected voltage is out of range and needs to be further judged in the host computer, while no signal does not require further judgment. Therefore, generating the first (second) detection data and the first (second) sequence data when there is no signal not only consumes the processing resources of the board, but also consumes the resources of the host computer; on the other hand, it causes the host computer to be unable to quickly determine that there is no signal, and it needs to be analyzed (decoded) to determine that the signal is abnormal. In this embodiment, when there is no signal on a pin on a certain side, fault sequence data is directly generated and the second fault sequence data is stored in the host computer, which can omit the process of generating the first (second) detection data and the first (second) sequence data. The host computer does not need to do too much analysis and can directly confirm that the Type-C interface to be tested is abnormal. Moreover, since the fault sequence data carries the detection serial number of the Type-C interface to be tested, the host computer can quickly locate the Type-C interface to be tested that has no signal and is abnormal.

[0118] In one embodiment, the step of connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals comprises:

[0119] Conducting the connection between the grounding resistor on the first CC pin and the ground, and conducting the connection between the first surface detection pin and the detection circuit, disconnecting the grounding resistor on the second CC pin and the ground, and disconnecting the second surface detection pin and the detection circuit, collecting signals of each pin of the first surface interface pin except the first high-speed differential transmission pin according to a first preset polling order to obtain a plurality of first sub-signals, conducting the connection between the second surface detection pin and the detection circuit, collecting signals of the first high-speed differential transmission pin of the first surface interface pin and the first high-speed differential reception pin of the second surface interface pin according to a first preset polling order to obtain a plurality of second sub-signals, and merging the first sub-signal and the second sub-signal to obtain the first signal;

[0120] The step of connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals comprises:

[0121] Conducting the connection between the grounding resistor on the second CC pin and the ground, and conducting the connection between the second-side detection pin and the detection circuit, disconnecting the grounding resistor on the first CC pin and the ground, and disconnecting the first-side detection pin and the detection circuit, collecting signals of each pin of the second-side interface pin except the second high-speed differential transmitting pin according to a second preset polling order to obtain a plurality of third sub-signals, conducting the connection between the first-side detection pin and the detection circuit, collecting signals of the second high-speed differential transmitting pin of the second-side interface pin and the second high-speed differential receiving pin of the first-side interface pin according to a second preset polling order to obtain a plurality of fourth sub-signals, and merging the third sub-signal and the fourth sub-signal to obtain the second signal.

[0122] In this embodiment, the high-speed differential transmission pins refer to TX1+, TX1-, RX1+, RX1-, TX2+, TX2-, RX2+, and RX2-.

[0123] First, the grounding resistor on the first CC pin is grounded, so that the voltage of the CC1 pin connected to the first CC pin changes, and the CC detection control chip of the Type-C interface to be tested triggers the multiplexing switch circuit to open the channels of TX1+, TX1-, RX1+, and RX1-. However, since the connection between the second-side detection pin and the detection circuit is disconnected at this time, the signals of RX1+ and RX1- at the second-side interface pins cannot be collected. Therefore, according to the first preset polling order, the signals of the other pins of the first-side interface pin except TX1+ and TX1- are collected to obtain the first sub-signal, and the signals of RX2+ and RX2- of the first-side interface pins are set to 0 or then replaced or kept null. Subsequently, the connection between the first-side detection pin and the detection circuit is kept on, and the grounding resistor on the second CC pin is kept on. The detection pin on the second side is disconnected from the ground, and the connection between the detection pin on the second side and the detection circuit is turned on, so that the detection circuit can be connected to the RX1+ and RX1- of the second-side interface pins through the second-side detection pin. At this time, the detection circuit can simultaneously connect the first-side interface pins and the second-side interface pins of the Type-C interface to be tested, but because the channels of TX2+, TX2-, RX2+, and RX2- are still closed at this time, the detection circuit can send and receive test data through TX1+, TX1- of the first-side interface pins and RX1+, RX1- of the second-side interface pins of the Type-C interface to be tested, thereby realizing the complete operation of the function of the Type-C interface to be tested, thereby collecting the signals of TX1+, TX1- of the first-side interface pins and RX1+, RX1- of the second-side interface pins as the second sub-signal. It is worth mentioning that since the order of pins to be collected and the order of pins not to be collected can be pre-set in the first preset polling order, and the order of collecting the pins twice before and after the connection between the second-side detection pin and the detection circuit can be set or the pin signals can be ignored, therefore, according to the first preset polling order, all signals of the first-side interface pins and the signals of the high-speed differential transmitting pins of the second-side interface pins in the same group as the high-speed differential transmitting pins of the first-side interface pins can be completely collected.

[0124] The process of collecting the second signal is the same as the above process and will not be described in detail in this embodiment.

[0125] In one embodiment, the connection between the grounding resistor on the first CC pin and the ground is turned on, and the connection between the first surface detection pin and the detection circuit is turned on, the connection between the grounding resistor on the second CC pin and the ground is turned off, and the connection between the second surface detection pin and the detection circuit is turned off, and the signals of each pin of the first surface interface pin except the first high-speed differential sending pin are collected in a first preset polling order to obtain a plurality of first sub-signals, the connection between the second surface detection pin and the detection circuit is turned on, and the signal of the first high-speed differential sending pin of the first surface interface pin and the signal of the first high-speed differential receiving pin of the second surface interface pin are collected in a first preset polling order to obtain a plurality of second sub-signals, and the first sub-signal and the second sub-signal are merged to obtain the first signal, wherein the time interval for polling the signals of each pin in the first preset polling order is a first time interval t1, the duration of connecting the second surface detection pin to the detection circuit is t2, and when the connection duration reaches t2, the connection between the second surface detection pin and the detection circuit is disconnected, wherein t2=2t1. In this embodiment, the signal collection time interval between two adjacent pins is t1, and the connection time between the second-side detection pin and the detection circuit reaches twice t1. In this way, the signals of TX1+, TX1-, RX1+, and RX1- can be collected and the collection efficiency can be effectively improved.

[0126] The grounding resistor on the second CC pin is connected to the ground, and the second-side detection pin is connected to the detection circuit, the grounding resistor on the first CC pin is disconnected from the ground, and the first-side detection pin is disconnected from the detection circuit, and the signals of each pin of the second-side interface pin except the second high-speed differential sending pin are collected according to a second preset polling order to obtain a plurality of third sub-signals, the first-side detection pin is connected to the detection circuit, and the signal of the second high-speed differential sending pin of the second-side interface pin and the signal of the second high-speed differential receiving pin of the first-side interface pin are collected according to a second preset polling order to obtain a plurality of fourth sub-signals, and the third sub-signal and the fourth sub-signal are combined to obtain the second signal, wherein the time interval for polling the signals of each pin in the second preset polling order is the first time interval t1, the duration of connecting the first-side detection pin to the detection circuit is t2, and when the conduction duration reaches t2, the connection between the first-side detection pin and the detection circuit is disconnected, wherein t2=2t1. In this embodiment, the signal collection time interval between two adjacent pins is t1, and the connection time between the first-side detection pin and the detection circuit reaches twice t1. In this way, the signals of TX1+, TX1-, RX1+, and RX1- can be collected and the collection efficiency can be effectively improved.

[0127] In one embodiment, the step of obtaining the first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data using the first sequence value to obtain the first sequence data includes:

[0128] Obtain a first sequence value, wherein the first sequence value records the detection sequence number of each Type-C interface to be tested and the sequence number corresponding to each pin sorted according to the first preset polling order;

[0129] Performing analog-to-digital conversion on the first signal according to a preset rule to obtain the first detection data;

[0130] Encoding the first detection data using the first sequence value to obtain first sequence data;

[0131] The step of obtaining the second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, and encoding the second detection data using the second sequence value to obtain the second sequence data includes:

[0132] Obtain a second sequence value, wherein the second sequence value records the detection sequence number of each Type-C interface to be tested and the sequence number corresponding to each pin sorted according to the second preset polling order;

[0133] Performing analog-to-digital conversion on the second signal according to a preset rule to obtain the second detection data;

[0134] The second detection data is encoded using the second sequence value to obtain second sequence data.

[0135] In the present embodiment, since the collected first signal includes an analog signal and a digital signal, it is necessary to convert the first signal into an analog signal and convert it into a digital signal, thereby obtaining digital signal data of each pin, namely, the first detection data and the second detection data. It is worth mentioning that the first detection data and the second detection data are data without serial numbers and without order. In the present embodiment, the first sequence value and the second sequence value respectively record the detection serial number of the Type-C interface to be tested and the detection serial number corresponding to each pin. The first sequence value and the second sequence value can be used to sort or number the data of each pin of the first detection data and the second detection data, thereby obtaining the first sequence data and the second sequence data containing the pin order, respectively.

[0136] In one embodiment, the step of encoding the first detection data using the first sequence value to obtain the first sequence data includes: assigning the first detection data of each pin of the first surface interface pin to the Nth pin signal value in the first sequence value one by one according to the sequence number N corresponding to the pin recorded in the first sequence value, and merging the pin signal values ​​having the same detection sequence number of the Type-C interface to be tested to obtain the first sequence data, wherein the first sequence value has M pin signal values, M is equal to the number of pins of the first surface interface pin, and N is a positive integer greater than or equal to 1, and less than or equal to the number of pins of the first surface interface pin;

[0137] The step of encoding the second detection data using the second sequence value to obtain the second sequence data includes: assigning the second detection data of each pin of the second surface interface pin to the Nth pin signal value in the second sequence value one by one according to the sequence number N corresponding to the pin recorded in the second sequence value, and merging the pin signal values ​​having the same detection sequence number of the Type-C interface to be tested to obtain the second sequence data, wherein the second sequence value has M pin signal values, M is equal to the number of pins of the second surface interface pins, and N is a positive integer greater than or equal to 1, and less than or equal to the number of pins of the second surface interface pins.

[0138] In this embodiment, each of the first sequence value and the second sequence value respectively includes a sequence header of a first preset number of bits, a front and back identification number of one bit, a pin signal value of M bits, and a pin sequence number of a second preset number of bits. For example, the first preset number of bits is six bits, the six-bit sequence header is the detection sequence number of the Type-C interface to be tested, which is used to indicate the Type-C interface to be tested, and the front and back identification numbers are used to distinguish the first side interface pin and the second side interface pin of the Type-C interface to be tested. For example, 0 is the first side interface pin, and 1 is the second side interface pin; the second preset number of bits is four bits, which is used to indicate the sequence number of the pin, and M is twelve. , in the initial state of each first sequence value, the pin signal value of the M bit is empty, corresponding to the 12 pin signals of the first side interface pins are empty before acquisition. In this way, in the initial state, the first sequence value is AFE0010□□□□□□□□□□□□□0001, where AFE001 is the detection number of the Type-C interface to be tested, 0 is the first side interface pin, □ is the empty pin signal value, and 0001 is the corresponding pin detection number in the first preset polling order. For example, if the pin signal is "1", "1" is assigned to the 0001th pin signal value to obtain AFE001. 0□□□□□□□□□□□□10001; for example, the first sequence value is AFE001 0□□□□□□□□□□□□0010, and the pin signal is "0", then "0" is assigned to the 0010th pin signal, and AFE0010□□□□□□□□□□0□0010 is obtained; and so on. For example: when the connection between the second-side detection pin and the detection circuit is disconnected, the signals of each pin of the first-side interface pin except the first high-speed differential transmission pin are collected according to the first preset polling order, and the collected signal data are merged. Since the signal data has been assigned to the pin signal value of the corresponding position, the four-digit pin number can be deleted during the merging process to obtain AFE0010 1□□1111111□□0, wherein the four digits TX1+, TX1- of the empty value are RX2-, RX2+. Subsequently, the connection between the second-side detection pin and the detection circuit is turned on, so that the detection circuit can be connected to the RX1+, RX1- of the second-side interface pin through the second-side detection pin, and the signals of TX1+, TX1- of the first-side interface pin and RX1+, RX1- of the second-side interface pin are collected, and they are assigned values ​​respectively to obtain AFE0010. 1111111111□□0 and AFE0011□11□□□□□□□□0, in this way, the first signal value can be obtained. Subsequently, in the signal detection process of the interface pin on the second side, the above-mentioned null value signal is supplemented to obtain complete first sequence data and second sequence data.

[0139] Through the above process, the on-off of the first-side detection pin and the detection circuit and the connection of the second-side detection pin and the detection circuit can be effectively coordinated to efficiently collect the signals of each pin, and since the position of the M-bit pin signal value indicates the actual position of the pin, there is no need to record the position of each signal through an additional serial number value, so that the first sequence data and the second sequence data can be recorded completely with less data volume. And the detection and comparison efficiency of the subsequent host computer is improved.

[0140] In one embodiment, the step of comparing the first detection data and the second detection data with preset comparison data respectively includes:

[0141] A bitwise AND operation is performed on the sequence header, the front and back side identification number of the first detection data, and the sequence header comparison value of the preset comparison data, and a bitwise XENO operation is performed on the M-bit pin signal value of the first detection data and the reference signal value of the preset comparison data; a bitwise AND operation is performed on the sequence header, the front and back side identification number of the second detection data, and the sequence header comparison value of the preset comparison data, and a bitwise XENO operation is performed on the M-bit pin signal value of the second detection data and the reference signal value of the preset comparison data; wherein, the sequence header comparison value of the preset comparison data is Q-bit 1, and Q is the first preset number of bits plus one.

[0142] In this embodiment, since the sequence header comparison values ​​of the preset comparison data are all 1, when performing bitwise AND, the calculation result can retain the detection sequence number and front and back identification number of the Type-C interface to be tested, thereby recording the comparison detection results of each Type-C interface to be tested, and the results can be located for each Type-C interface to be tested. The reference signal value is the pin signal value when the normal Type-C interface is working, and the M-bit pin signal value is bitwise ANDed with the reference signal value of the preset comparison data, so that the comparison result of the pin that meets the requirements is 1, and the comparison result of the pin that does not meet the requirements is 0. Not only can the abnormal Type-C interface to be tested be identified, but also the position of the abnormal pin can be determined. Thereby, accurate and efficient detection of the pin signal is achieved.

[0143] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0144] Embodiment 2

[0145] In this embodiment, an automated Type-C interface detection device is provided, which is applied to inserting a preset detection connector into a Type-C interface to be tested, wherein the preset detection connector has a first-side detection pin and a second-side detection pin, the first-side detection pin is connected to the first-side interface pin of the Type-C interface to be tested in a one-to-one correspondence, and the second-side detection pin is connected to the second-side interface pin of the Type-C interface to be tested in a one-to-one correspondence; the device includes:

[0146] A first acquisition module is used to connect the first surface detection pin to the detection circuit, disconnect the second surface detection pin from the detection circuit, and acquire signals of each pin of the first surface interface pin in a first preset polling order to obtain a plurality of first signals;

[0147] A first sequence data acquisition module, used to acquire a first sequence value, convert the first signal into first detection data in a preset format according to a preset rule, and encode the first detection data using the first sequence value to obtain first sequence data;

[0148] A second acquisition module is used to connect the second-side detection pin to the detection circuit, disconnect the first-side detection pin from the detection circuit, and collect signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals;

[0149] A second sequence data acquisition module, used to acquire a second sequence value, convert the second signal into second detection data in a preset format according to a preset rule, and encode the second detection data using the second sequence value to obtain second sequence data;

[0150] A storage module, used for storing each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested in a host computer;

[0151] A detection and comparison module, used for detecting, by using the host computer, whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to preset comparison data;

[0152] The abnormal output module is used to determine that the first sequence data or the second sequence data does not conform to the preset comparison data as abnormal data, and determine the abnormal Type-C interface to be tested according to the first sequence value and the second sequence value.

[0153] For the specific definition of the automated Type-C interface detection device, please refer to the definition of the automated Type-C interface detection method above, which will not be repeated here. Each unit in the above-mentioned automated Type-C interface detection device can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned units can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above-mentioned units.

[0154] Embodiment 3

[0155] In this embodiment, an electronic device is provided, which can be used as a host computer or as an electronic computer including a detection board. Figure 2 As shown. The electronic device includes a processor, a memory, a network interface, a display screen and an input device connected by a system bus. Among them, the processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program, and the non-volatile storage medium is deployed with a database, which is used to detect data. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The network interface of the electronic device is used to communicate with other electronic devices that deploy application software. When the computer program is executed by the processor, an automated Type-C interface detection method is implemented. The display screen of the electronic device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the electronic device can be a touch layer covered on the display screen, or a button, trackball or touchpad set on the housing of the electronic device, or an external keyboard, touchpad or mouse, etc.

[0156] Those skilled in the art will understand that Figure 2 The structure shown in the figure is merely a block diagram of a partial structure related to the scheme of the present application, and does not constitute a limitation on the electronic device to which the scheme of the present application is applied. The specific electronic device may include more or fewer components than shown in the figure, or combine certain components, or have a different arrangement of components.

[0157] In one embodiment, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the automatic Type-C interface detection method described in any of the above embodiments are implemented.

[0158] Embodiment 4

[0159] In this embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the automatic Type-C interface detection method described in any of the above embodiments are implemented.

[0160] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0161] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0162] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. An automated Type-C interface detection method, characterized in that: include: Insert a preset detection connector into the Type-C interface to be tested, wherein the preset detection connector has a first-side detection pin and a second-side detection pin, the first-side detection pin is connected to the first-side interface pin of the Type-C interface to be tested in a one-to-one correspondence, and the second-side detection pin is connected to the second-side interface pin of the Type-C interface to be tested in a one-to-one correspondence; Connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals; Obtaining a first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data using the first sequence value to obtain first sequence data; Connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin to the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals; Obtaining a second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, and encoding the second detection data using the second sequence value to obtain second sequence data; storing each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested in a host computer; Using the host computer to detect whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to preset comparison data; When the first sequence data or the second sequence data does not conform to the preset comparison data, it is determined to be abnormal data, and the abnormal Type-C interface to be tested is determined according to the first sequence value and the second sequence value.

2. The method according to claim 1, characterized in that The step of obtaining the first sequence value comprises: Scan the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested; Generate the first sequence value according to the sequence number corresponding to each pin sorted in the first preset polling order and the detection sequence number of the Type-C interface to be tested; The step of obtaining the second sequence value comprises: Scan the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested; The second sequence value is generated according to the serial numbers corresponding to the pins sorted in the second preset polling order and the detection serial number of the Type-C interface to be tested.

3. The method according to claim 1, characterized in that The step of using the host computer to detect whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to the preset comparison data comprises: Utilizing the host computer to parse each of the first sequence data and each of the second sequence data, to obtain a detection sequence number, first detection data, and second detection data of each of the Type-C interfaces to be tested; Respectively comparing the first detection data and the second detection data with preset comparison data; When the first sequence data or the second sequence data does not conform to the preset comparison data, it is determined to be abnormal data, and the step of determining the abnormal Type-C interface to be tested according to the first sequence value and the second sequence value includes: When at least one of the first detection data and the second detection data does not conform to the preset comparison data, it is determined to be abnormal data, the detection serial number of the Type-C interface to be tested is determined, and the detection serial number of the Type-C interface to be tested is output.

4. The method according to claim 1, characterized in that: The first side detection pin includes a first CC pin, and the second side detection pin includes a second CC pin; The step of connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals comprises: Conducting the connection between the grounding resistor on the first CC pin and the ground, and conducting the connection between the first-side detection pin and the detection circuit, disconnecting the connection between the grounding resistor on the second CC pin and the ground, and disconnecting the connection between the second-side detection pin and the detection circuit, judging whether each pin of the first-side interface pin generates a signal, if yes, collecting the signal of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals, if no, scanning the identification code of the Type-C interface to be tested to obtain the detection sequence number of the Type-C interface to be tested, generating first fault sequence data based on the detection sequence number of the Type-C interface to be tested, and storing the first fault sequence data in a host computer; The step of connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals comprises: Conducting the connection between the grounding resistor on the second CC pin and the ground, and conducting the connection between the second-side detection pin and the detection circuit, disconnecting the connection between the grounding resistor on the first CC pin and the ground, and disconnecting the connection between the first-side detection pin and the detection circuit, judging whether each pin of the second-side interface pin generates a signal, if so, collecting the signal of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals, if not, scanning the identification code of the Type-C interface to be tested to obtain the detection serial number of the Type-C interface to be tested, generating second fault sequence data based on the detection serial number of the Type-C interface to be tested, and storing the second fault sequence data in the host computer.

5. The method according to claim 4, characterized in that The step of connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals of each pin of the first-side interface pin in a first preset polling order to obtain a plurality of first signals comprises: Conducting the connection between the grounding resistor on the first CC pin and the ground, and conducting the connection between the first surface detection pin and the detection circuit, disconnecting the grounding resistor on the second CC pin and the ground, and disconnecting the second surface detection pin and the detection circuit, collecting signals of each pin of the first surface interface pin except the first high-speed differential transmission pin according to a first preset polling order to obtain a plurality of first sub-signals, conducting the connection between the second surface detection pin and the detection circuit, collecting signals of the first high-speed differential transmission pin of the first surface interface pin and the first high-speed differential reception pin of the second surface interface pin according to a first preset polling order to obtain a plurality of second sub-signals, and merging the first sub-signal and the second sub-signal to obtain the first signal; The step of connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals comprises: Conducting the connection between the grounding resistor on the second CC pin and the ground, and conducting the connection between the second-side detection pin and the detection circuit, disconnecting the grounding resistor on the first CC pin and the ground, and disconnecting the first-side detection pin and the detection circuit, collecting signals of each pin of the second-side interface pin except the second high-speed differential transmitting pin according to a second preset polling order to obtain a plurality of third sub-signals, conducting the connection between the first-side detection pin and the detection circuit, collecting signals of the second high-speed differential transmitting pin of the second-side interface pin and the second high-speed differential receiving pin of the first-side interface pin according to a second preset polling order to obtain a plurality of fourth sub-signals, and merging the third sub-signal and the fourth sub-signal to obtain the second signal.

6. The method according to any one of claims 1 to 5, characterized in that: The step of obtaining the first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data using the first sequence value to obtain the first sequence data includes: Obtain a first sequence value, wherein the first sequence value records the detection sequence number of each Type-C interface to be tested and the sequence number corresponding to each pin sorted according to the first preset polling order; Performing analog-to-digital conversion on the first signal according to a preset rule to obtain the first detection data; Encoding the first detection data using the first sequence value to obtain first sequence data; The step of obtaining the second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, and encoding the second detection data using the second sequence value to obtain the second sequence data includes: Obtain a second sequence value, wherein the second sequence value records the detection sequence number of each Type-C interface to be tested and the sequence number corresponding to each pin sorted according to the second preset polling order; Performing analog-to-digital conversion on the second signal according to a preset rule to obtain the second detection data; The second detection data is encoded using the second sequence value to obtain second sequence data.

7. The method according to claim 6, characterized in that The step of encoding the first detection data by using the first sequence value to obtain the first sequence data comprises: Assign the first detection data of each pin of the first-side interface pin to the Nth pin signal value in the first sequence value one by one according to the sequence number N corresponding to the pin recorded in the first sequence value, and merge the pin signal values ​​having the same detection sequence number of the Type-C interface to be tested to obtain the first sequence data, wherein the first sequence value has M pin signal values, M is equal to the number of pins of the first-side interface pin, and N is a positive integer greater than or equal to 1 and less than or equal to the number of pins of the first-side interface pin; The step of encoding the second detection data by using the second sequence value to obtain the second sequence data comprises: The second detection data of each pin of the second-side interface pin is assigned one by one to the Nth pin signal value in the second sequence value according to the sequence number N corresponding to the pin recorded in the second sequence value, and the pin signal values ​​having the same detection sequence number of the Type-C interface to be tested are merged to obtain the second sequence data, wherein the second sequence value has M pin signal values, M is equal to the number of pins of the second-side interface pins, and N is a positive integer greater than or equal to 1, and less than or equal to the number of pins of the second-side interface pins.

8. An automated Type-C interface detection device, characterized in that: The device is applied to insert a preset detection connector into a Type-C interface to be tested, wherein the preset detection connector has a first-side detection pin and a second-side detection pin, the first-side detection pin is connected to the first-side interface pin of the Type-C interface to be tested in a one-to-one correspondence, and the second-side detection pin is connected to the second-side interface pin of the Type-C interface to be tested in a one-to-one correspondence; the device comprises: A first acquisition module is used to connect the first surface detection pin to the detection circuit, disconnect the second surface detection pin from the detection circuit, and acquire signals of each pin of the first surface interface pin in a first preset polling order to obtain a plurality of first signals; A first sequence data acquisition module, used to acquire a first sequence value, convert the first signal into first detection data in a preset format according to a preset rule, and encode the first detection data using the first sequence value to obtain first sequence data; A second acquisition module is used to connect the second-side detection pin to the detection circuit, disconnect the first-side detection pin from the detection circuit, and collect signals of each pin of the second-side interface pin in a second preset polling order to obtain a plurality of second signals; A second sequence data acquisition module, used to acquire a second sequence value, convert the second signal into second detection data in a preset format according to a preset rule, and encode the second detection data using the second sequence value to obtain second sequence data; A storage module, used for storing each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested in a host computer; A detection and comparison module, used for detecting, by using the host computer, whether each of the first sequence data and each of the second sequence data of each of the Type-C interfaces to be tested conforms to preset comparison data; The abnormal output module is used to determine that the first sequence data or the second sequence data does not conform to the preset comparison data as abnormal data, and determine the abnormal Type-C interface to be tested according to the first sequence value and the second sequence value.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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