SAM card device driving method, SAM card device and storage medium

Abstract

The invention discloses an SAM card device driving method, an SAM card device and a storage medium. The method comprises the steps that a CPU selects an SAM card channel needing to be operated through an analog switch switching module; according to the Baud rate set by the SAM card, the reading time of each bit of data is determined, and a timing value is set in an internal timing register through a CPU; the CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip; the reading time is configured to be a plurality of sampling times, the CPU carries out multiple times of sampling on each bit of data at a plurality of sampling time points, and the value of each bit of data is determined according to a sampling result; and performing parity check on the characters through a table look-up method, and verifying the accuracy of the characters. Accurate operation on the SAM card can be achieved under the Linux operating system, accurate time delay is achieved, timing accuracy is guaranteed, the communication rate can be adjusted, applicability is wide, and the method is compatible with SAM cards of most manufacturers.

Description

Technical Field

[0001] The present invention relates to the field of SAM card programming, and in particular to a driving method of a SAM card device, a SAM card device and a storage medium. Background Art

[0002] SAM card is a SAM card with special properties. It is used to store keys and encryption algorithms. It can complete mutual authentication, password verification, encryption and decryption operations in transactions. It is generally used as an identity mark to complete various deduction transactions. Its appearance is similar to a mobile phone SIM card. It is mainly used in various toll collection systems, such as bus toll collection machines, subway entry and exit gates, shopping mall POS machines, and basically involves all toll collection terminals.

[0003] If multiple banks are involved, multiple SAM cards may be required. Currently, most POS machines are equipped with four SAM card slots, and some have up to eight, depending on the application scenario. In the early MCU microcontroller design, SAM cards communicated based on serial ports. For example, MCU_UARTRX and MCU_UARTTX ports were connected together, and SAM cards were read and written by setting the send and receive switch. Figure 1 As shown. The advantage is that the read and write control is simple, and the sending and receiving of data can be completed by controlling the serial port. The disadvantage is that the baud rate cannot be adjusted after it is set, and the compatibility is poor. Many manufacturers' SAMs cannot communicate or have a high communication error rate, and cannot completely handle communication problems according to the ISO7816 protocol. Some are designed in the hardware environment of the microcontroller, simulated through the IO port, and take data points as the values ​​of data input and output. Because there are not enough sampling points, the accuracy of the collected values ​​is poor. Another method is that the CPU itself integrates the hardware interface and software control register of SMARTCARD, but generally there is only one interface. This type of CPU has the Zhixinwei RK3568 chip, etc. This method is to design the hardware circuit of reading and writing SAM cards and the card control and read and write data registers into the CPU. The software can directly operate the registers to complete the control of the card and read and write data. However, since there are few CPU chips with this interface, it is not a necessary interface for the chip, and the control method of each chip is different, so the versatility is very poor. In addition, the limited information provided by the manufacturer brings great difficulties to program design. It is difficult to adapt to the application of SAM cards from many manufacturers. The compatibility is not strong, and the baud rate adjustment is also limited, making it difficult to promote and use.

[0004] With the application of embedded systems, Linux driver design and Android application interface development, it is particularly important to develop a SAM card software driver with high fault tolerance and operating system, as well as a stable and practical multi-channel SAM card design. Summary of the invention

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a driving method for a SAM card device, which can realize accurate operation of the SAM card under the Linux operating system, realize accurate delay, ensure timing accuracy, and adjust the communication rate, has wide applicability, and is compatible with SAM cards of most manufacturers.

[0006] The present invention also provides a SAM card device applied to the driving method of the above SAM card device; The present invention also provides a computer-readable storage medium applied to the driving method of the above-mentioned SAM card device.

[0007] According to a driving method of a SAM card device in an embodiment of the first aspect of the present invention, the SAM card device is used to read and write SAM cards, the SAM card device is provided with a CPU, a read-write control chip, an analog switch switching module and a plurality of SAM card channels, the SAM card channels are used to connect SAM cards, the CPU is electrically connected to the read-write control chip through analog IO, and the read-write control chip is electrically connected to the plurality of SAM card channels through the analog switch switching module; the method comprises: The CPU selects the SAM card channel to be operated through the analog switch switching module; According to the baud rate set by the SAM card, the reading time of each bit of data is determined, and the timing value is set in the internal timing register by the CPU; The CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip; wherein the reading time is configured as a plurality of sampling times, and the CPU samples each bit of data multiple times at the plurality of sampling time points, and determines the value of each bit of data according to the sampling results; The characters are parity checked by table lookup to verify the accuracy of the characters.

[0008] According to some embodiments of the present invention, the analog switch switching module includes a plurality of independent low on-resistance analog switches, and the low on-resistance analog switches correspond one-to-one to the SAM card channels.

[0009] According to some embodiments of the present invention, determining the reading time of each bit of data according to the baud rate set by the SAM card, and setting the timing value in the internal timing register by the CPU includes: Taking the reciprocal of the baud rate, obtaining the reading time of each bit of data; Divide the reading time of each bit of data by the time counting unit of the timing register to obtain the timing value; The timing value is set in the timing register by the CPU.

[0010] According to some embodiments of the present invention, the CPU obtains each bit of data of the character sent by the SAM card according to the read time through the read-write control chip, including: The read time is configured as 8 sampling times, and the CPU samples each bit of data 8 times at the 8 sampling times through the read-write control chip to obtain 8 sampling bit levels; the second sampling bit level to the sixth sampling bit level of each bit of data are averaged to obtain a sampling result; The value of each bit of data is determined according to the sampling result.

[0011] According to some embodiments of the present invention, the baud rate can be set to any value.

[0012] According to some embodiments of the present invention, after the CPU selects the SAM card channel to be operated through the analog switch switching module, the method further includes: Save the current interrupt status of the CPU; Disable local interrupts for the CPU.

[0013] According to some embodiments of the present invention, before the CPU obtains each bit of data of the character sent by the SAM card according to the read time through the read-write control chip, the step of sending an operation command to the SAM card is further included, which specifically includes: According to the operation command, determining a number of byte data to be sent; According to each of the byte data, the value of each corresponding bit is set through the analog IO; The CPU sends the value of each bit corresponding to the byte data to the SAM card through the read-write control chip and the corresponding SAM card channel; When the value of the response bit of the simulated IO is 1, the sending of the current byte data ends, and the sending of the next byte data starts, until the sending of all byte data of the operation command is completed.

[0014] The SAM card device according to the embodiment of the second aspect of the present invention is used to implement the driving method of the SAM card device as described in any of the above embodiments, and the SAM card device includes: a CPU, a read-write control chip, an analog switch switching module, and several SAM card channels. The CPU is electrically connected to the read-write control chip, the read-write control chip is electrically connected to the analog switch switching module, and the analog switch switching module is electrically connected to the SAM card channel.

[0015] According to some embodiments of the present invention, the CPU comprises: one or more processors; Memory; One or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and when the programs are executed by the processors, the steps of the driving method of the SAM card device as described in any of the above embodiments are implemented.

[0016] According to the computer-readable storage medium of the third aspect of the present invention, a computer program is stored thereon, and when the computer program is executed by a processor, the steps of the driving method of the SAM card device as described in any one of the above embodiments are implemented.

[0017] The driving method of the SAM card device according to the embodiment of the present invention has at least the following technical effects: the present invention prevents mutual interference between SAM cards by setting an analog switch switching module and an independent SAM card channel; the present invention adopts a table lookup method to replace the parity bit calculation of the byte, thereby saving the time for processing data and ensuring the timing requirements of the SAM card during operation; when reading the data of the SAM card, the present invention configures the reading time as multiple sampling times and performs multiple samplings, and determines the value of each bit of data according to the sampling results, thereby improving the sampling accuracy; the present invention uses the CPU to directly set the timing value in the internal timing register, thereby improving the time resolution and accuracy, and ensuring the precision and accuracy of the timing; the present invention allows each SAM card to set independent operation control parameters and communication baud rate of any value and retain them separately in the system, combined with a higher resolution timer, so that the baud rate can be accurately set and adjusted.

[0018] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The present invention will be further described below with reference to the accompanying drawings and embodiments, wherein: Figure 1 It is a design example diagram of the driving circuit of the existing SAM card device; Figure 2 A flowchart of a driving method for a SAM card device according to an embodiment of the present invention; Figure 3 A complete operation flow chart of the driving method of the SAM card device according to an embodiment of the present invention; Figure 4 A data byte transmission diagram of a driving method for a SAM card device according to an embodiment of the present invention; Figure 5 An ETU bit sampling diagram of a driving method of a SAM card device according to an embodiment of the present invention; Figure 6 A complete delay cycle of the timer of the driving method of the SAM card device of the embodiment of the present invention; Figure 7 A flowchart of a driving method for a SAM card device according to an embodiment of the present invention for sending a byte to a SAM card; Figure 8 A flowchart of receiving a byte from a SAM card in a driving method of a SAM card device according to an embodiment of the present invention; Fig. 9 4 is a circuit diagram of a SAM card device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0020] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0021] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0022] In the description of the present invention, "several" means more than one, "many" means more than two, "greater than", "less than", "exceed", etc. are understood to exclude the number itself, and "above", "below", "within", etc. are understood to include the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0023] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0024] In the description of the present invention, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0025] The following is combined with Figure 2-9 , describe in detail the driving method of the SAM card device and the SAM card device of the embodiment of the present invention.

[0026] Reference Figure 2 The present invention proposes a driving method for a SAM card device, wherein the SAM card device is used for reading and writing SAM cards, the SAM card device is provided with a CPU, a read-write control chip, an analog switch switching module and a plurality of SAM card channels, the SAM card channels are used for connecting the SAM cards, the CPU is electrically connected to the read-write control chip through analog IO, and the read-write control chip is electrically connected to the plurality of SAM card channels through the analog switch switching module; the method comprises the following steps: S100: The CPU selects the SAM card channel to be operated through the analog switch switching module; S200: Determine the reading time of each bit of data according to the baud rate set by the SAM card, and set the timing value in the internal timing register through the CPU; S300: The CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip; wherein the reading time is configured as multiple sampling times, the CPU samples each bit of data multiple times at multiple sampling time points, and determines the value of each bit of data according to the sampling results; S400: Performing parity check on the characters by table lookup method to verify the accuracy of the characters.

[0027] Specifically, in this embodiment, the present invention sets an analog switch switching module and an independent SAM card channel to prevent mutual interference between SAM cards; the present invention adopts a table lookup method to replace the parity bit calculation of the byte, thereby saving time for processing data and ensuring the timing requirements of the SAM card during operation; when reading the data of the SAM card, the present invention configures the reading time as multiple sampling times and performs multiple samplings, and determines the value of each bit of data according to the sampling results, thereby improving the sampling accuracy; the present invention uses the CPU to directly set the timing value in the internal timing register, thereby improving the time resolution and accuracy, and ensuring the precision and accuracy of the timing; the present invention allows each SAM card to set independent operation control parameters and a communication baud rate of any value and retain them separately in the system, combined with a higher resolution timer, so that the baud rate can be accurately set and adjusted.

[0028] The method steps of this embodiment are as follows: Fig. 9 The circuit shown is the basis, which is stored in the main control chip MCU (i.e., CPU), and the method is implemented by manipulating the terminals, internal storage space, and timer of the MCU.

[0029] The program of the method of this embodiment is designed in combination with the characteristics of the Linux device driver to ensure accurate timing under Linux and correct simulation of IO reading data.

[0030] For step S100, the CPU selects the SAM card channel to be operated through the analog switch switching module, referring to Fig. 9 U75 and U76 constitute the analog switch switching module, both of which use CD4066. CD4066 is a four-way analog switch, mainly used for multiplexing of analog or digital signals. The on-resistance of CD4066 is very small, only tens of ohms. Each package of CD4066 has 4 independent low on-resistance analog switches. Each low on-resistance analog switch has three terminals: input A, output B, and control C. The input and output terminals are interchangeable, so that the SAM card channel to be operated can be selected through an independent low on-resistance analog switch.

[0031] The read-write control chip U70 uses LTC4555, which is a standard SMARTCARD interface control chip. It is a hardware interface circuit for reading and writing SAM cards. The use of this chip can eliminate the cumbersome card reading control circuit, conforms to the ISO / IEC 7816 international standard, and the setting and control are relatively simple. It is compatible with both 1.8V and 3.3V card operations.

[0032] In addition, in some other embodiments, discrete components may be used to implement the functions of the LTC4555 chip.

[0033] Analog IO means Fig. 9Pin 15 of the read / write control chip U70 is the I / O data pin. Through software control of the IO port, the I / O data transmission between the CPU and the SAM card is simulated to complete the reading and writing of data on the SAM card.

[0034] For step S200, according to the baud rate set by the SAM card, determine the reading time of each bit of data, and set the timing value in the internal timing register by the CPU. The method of the present invention allows the flexible setting of the baud rate. The baud rates of the SAM card reading and writing are currently common at 9600bps and 38400bps. Taking the 38400bps baud rate commonly used in the public transportation fee collection system as an example, 1s / 38400≈0.00002604s, that is, the time occupied by one bit of communication ETU=26.04us, and the time counting unit of the timer is 0.04us, that is, 26.04us / 0.04us=651, which is the timing value that the timer needs to write. When the counter starts working, when it increases from 0 to this value, or when it decreases from this value to 0, the delay is just 26.04us, so it can be seen that this baud rate can be easily set and modified.

[0035] For step S300, the CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip; wherein the reading time is configured as multiple sampling times, and the CPU samples each bit of data multiple times at multiple sampling time points, and determines the value of each bit of data according to the sampling results. When using analog IO for data transmission between the CPU and the read-write control chip, the byte transmission of the Smart Card adopts asynchronous half-duplex mode. When transmitting a byte, in addition to the 8-bit data, the following two bits are added: Start bit: used for character frame synchronization; Check digit: used for check detection.

[0036] Before the byte is transmitted, the I / O is set to a high level. The SAM card read / write control chip and the CPU transmit bytes asynchronously, with a unified byte transmission format. One byte is sent by 10 consecutive ETUs, during which 1 start bit, 8 data bits and 1 parity bit are transmitted. Its data frame transmission format: 10 bits, such as Figure 4 As shown in the figure, when collecting a character, 10 S-0-1-2-3-4-5-6-7-P point values ​​need to be sampled. In order to improve the sampling accuracy, each ETU time is divided into 8 equal parts, that is, a total of 80 points are collected as data sampling values.

[0037] The specific sampling of 1 ETU is as follows Figure 5As shown. For each bit of sampling, 8 points P[0] to P[7] are used as calculation points. 5 points P[1] to P[5] are used as calculation points. More than three points are considered high level, and less than two points are considered low level. p is used to store the calculation result and round it up, that is: P(bit level) = (p[1]+p[2]+p[3]+p[4]+p[5]) / 5; The level of each bit sampled in this way is more accurate, eliminating the signal interference of the level on the IO port. P[0], P[6], and P[7] are not included, mainly to eliminate the influence of the boundary level.

[0038] When writing data bits to the SAM card, just keep the IO level to the bit time of each bit reaching the baud rate, which is the ETU time in the figure.

[0039] For step S400, the character is parity checked by table lookup to verify the accuracy of the character. The data parity check bit is performed by table lookup, that is, the parity check bit is obtained directly by table reading instead of calculation according to the data to be sent. Because the parity bit of a byte from 0x00 to 0xff is fixed, the following table can be formed and directly read to obtain it, saving the time for further calculation, and also saving the time occupied by program execution, and ensuring the timing accuracy of the read and write IO port.

[0040] The byte value parity bit table is as follows, which saves time by looking up the table instead of calculating.

[0041] static u8rcc_data_parity[] = { 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, }.

[0042] In addition, in Linux, mdelay(), udelay() and ndelay() are functions provided by the system for delayed execution. Since Linux itself is not a real-time operating system, and partly due to the scheduling implementation mechanism of the Linux system, the delays of these functions are not very precise. They can be used in situations where low precision is required, but for situations where the reading and writing precision of SAM cards is required to be controlled to a resolution of 0.04us, the precision cannot meet the requirements.

[0043] The present invention uses a method of directly operating the timing register to achieve timing, and directly operates the timing register to ensure accurate timing. Figure 6 As shown, Figure 6 A complete delay cycle timing method is shown. Figure 6 All the operations in the steps are implemented by directly operating the control register of the timer, that is, accessing the specific register through virtual memory address mapping.

[0044] The present invention also adopts an error retransmission mechanism in data transmission, specifically as follows Figure 7 As shown, the CPU sends an operation command to the SAM card through simulated IO, including: Prepare the byte data to be sent, which includes the start bit, byte bit and check bit; Determine the number of times the current byte data is sent; If the number of times sent is greater than three, the sending will be terminated and an error message will be returned; If the number of transmissions is less than or equal to three, the value of each bit of the byte data is set by simulating IO and delaying an ETU time, waiting for all bits of the byte data to be sent; Determine whether the response bit of the current analog IO port is 1; If the response bit is not 1, return to step: determine the number of times the current byte data is sent; If the response bit is 1, the transmission ends and the correct information is returned.

[0045] Data transmission adopts an error retransmission mechanism and is set to retransmit three times to ensure the accuracy and integrity of data transmission.

[0046] Figure 3 Shows a complete SAM card general command operation, from Figure 3 It can be seen that before operating the simulated IO and starting the timer, the Linux interrupt must be turned off to prevent interference with the timing accuracy. After the command is completed, the Linux interrupt is restored to ensure the normal operation of the Linux system.

[0047] The method of the present invention allows flexible setting of the baud rate. The baud rates commonly used for SAM card reading and writing are 9600bps and 38400bps. Taking the 38400bps baud rate commonly used in the bus fare collection system as an example, 1s / 38400≈0.00002604s, that is, the time occupied by one bit of communication ETU=26.04us, and the time counting unit of the timer is 0.04us, that is, 26.04us / 0.04us=651, which is the timing value that the timer needs to write. When the counter starts working, when it increases from 0 to this value, or decreases from this value to 0, the delay is exactly 26.04us, which shows that this baud rate can be easily set and modified.

[0048] At the same time, we can see that since the count value of each bit is 651, it is easy to be divided into 8 equal parts. According to the above method of calculating the sampling results, the IO port status can be read more accurately. The calculation method of the baud rate of 9600bps is the same as above.

[0049] Many early designs of POS machines and on-board toll machines were based on single-chip microcomputers, and SAM card communication was implemented through simple serial communication interfaces. They were not designed in full compliance with the ISO / IEC 7816 standard, baud rate adjustment was basically impossible, the functions were simple, and they were not compatible with SAM cards from different manufacturers.

[0050] When the system calls udelay() and ndelay() under Linux are affected by the system, they are not very accurate. The design of the present invention can achieve very accurate delay through direct access of the timer, thereby ensuring the timing accuracy of the operation of the SAM card. As long as the CPU has a timer, the method of the present invention can be used, and the communication rate can be adjusted, which is compatible with SAM cards of most manufacturers.

[0051] This design can realize accurate operation of SAM card under Linux operating system. Because Android is built on the basis of Linux device driver, through NDK, JNI calling driver or integration into Android internal API method can be used to develop various POS products based on Android platform with powerful charging functions.

[0052] The present invention adopts the IO simulation method, breaks through the limitation of the main control chip, and can select a CPU without integrated SMARTCARD hardware interface and software controller for design, especially for POS machines and vehicle-mounted toll machines.

[0053] The internal timer of the chip is used as the reference time for card reading to perform timing control, which improves the accuracy of the baud rate when communicating with SAM. The design is based on the smartcard communication standard ISO / IEC 7816. Due to the differences in SAM cards from different manufacturers, some timings sometimes need to be fine-tuned. The design of the present invention can perform timing fine-tuning processing, so that the toll collection machine can adapt to SAM cards from different manufacturers.

[0054] Many existing SAM card designs, especially single-chip designs, only collect one point of data as the received data bit, which is prone to errors. This design uses each bit as 8 collection points, takes the first five, and only three high levels are considered as high levels, which enhances the fault tolerance of the collection and makes the equipment run stably and reliably.

[0055] This design is for the solution using Linux system. The microcontroller design can also refer to some processing methods of this design to improve the accuracy of SAM card operation, and it can be compatible with SAM cards launched by various manufacturers and has good compatibility.

[0056] This driver can also be used as a toll collection device in the Android system. As long as the relevant Android driver interface is added and integrated into the Android general API, real-time simulation debugging can be performed to shorten the development cycle.

[0057] Reference Fig. 9 Furthermore, in some embodiments of the present invention, the analog switch switching module includes a plurality of independent low on-resistance analog switches, and the low on-resistance analog switches correspond one to one to the SAM card channels.

[0058] Specifically, in this embodiment, the SAM card channel to be operated is selected through a low on-resistance independent analog switch, each channel has an independent control switch and channel, and the crosstalk between the switches is very small, preventing mutual interference between SAM cards.

[0059] Further, in some embodiments of the present invention, step S200: determining the reading time of each bit of data according to the baud rate set by the SAM card, and setting the timing value in the internal timing register by the CPU, includes: 2.1 Take the reciprocal of the baud rate to get the reading time of each bit of data; 2.2 Divide the reading time of each bit of data by the time counting unit of the timing register to obtain the timing value; 2.3 Set the timing value in the timing register through the CPU.

[0060] Specifically, in this embodiment, the method of the present invention also allows flexible setting of the baud rate. The common baud rates for SAM card reading and writing are 9600bps and 38400bps. Taking the 38400bps baud rate commonly used in the bus fare collection system as an example, 1s / 38400≈0.00002604s, that is, the time occupied by one bit of communication ETU=26.04us, and the time counting unit of the timer is 0.04us, that is, 26.04us / 0.04us=651, which is the timing value that the timer needs to write. When the counter starts working, when it increases from 0 to this value, or decreases from this value to 0, the delay is exactly 26.04us, which shows that this baud rate can be easily set and modified.

[0061] At the same time, we can see that since the count value of each bit is 651, it is easy to be divided into 8 equal parts. According to the above method of calculating the sampling results, the IO port status can be read more accurately. The calculation method of the baud rate of 9600bps is the same as above.

[0062] Reference Figure 4 and Figure 5, further, in some embodiments of the present invention, step S300: the CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip, including: 3.1 The read time is configured as 8 sampling times. The CPU samples each bit of data 8 times at 8 sampling times through the read-write control chip to obtain 8 sampling bit levels. The second sampling bit level to the sixth sampling bit level of each bit of data are averaged to obtain the sampling result. 3.2 Determine the value of each bit of data based on the sampling results.

[0063] Specifically, in this embodiment, when using analog IO for data transmission, the byte transmission of the Smart Card adopts asynchronous half-duplex mode. When transmitting a byte, in addition to 8 bits of data, the following two bits are added: Start bit: used for character frame synchronization; Check digit: used for check detection.

[0064] Before the byte is transmitted, the I / O is set to a high level. The SAM card read / write control chip and the CPU transmit bytes asynchronously, with a unified byte transmission format. One byte is sent by 10 consecutive ETUs, during which 1 start bit, 8 data bits and 1 parity bit are transmitted. Its data frame transmission format: 10 bits, such as Figure 4 As shown in the figure, when collecting a character, 10 S-0-1-2-3-4-5-6-7-P point values ​​need to be sampled. In order to improve the sampling accuracy, each ETU time is divided into 8 equal parts, that is, a total of 80 points are collected as data sampling values.

[0065] The specific sampling of 1 ETU is as follows Figure 5 As shown. For each bit of sampling, 8 points P[0] to P[7] are used as calculation points. 5 points P[1] to P[5] are used as calculation points. More than three points are considered high level, and less than two points are considered low level. p is used to store the calculation result and round it up, that is: P(bit level) = (p[1]+p[2]+p[3]+p[4]+p[5]) / 5; The level of each bit (i.e. the value of each bit of data) is more accurate in this way, eliminating the signal interference of the level on the IO port. P[0], P[6], and P[7] are not included, mainly to eliminate the influence of the boundary level.

[0066] When writing data bits to the SAM card, just keep the IO level to the bit time of each bit reaching the baud rate, which is the ETU time in the figure.

[0067] When reading data, the sampling accuracy is improved by increasing the number of sampling points for each bit and taking the average value as the sampling value of this bit through a combination of software and hardware.

[0068] Reference Figure 4 ,Further, in some embodiments of the present invention, the baud rate can be set to any value.

[0069] Specifically, in this embodiment, the method of the present invention also allows flexible setting of the baud rate. The common baud rates for SAM card reading and writing are 9600bps and 38400bps. Taking the 38400bps baud rate commonly used in the bus fare collection system as an example, 1s / 38400≈0.00002604s, that is, the time occupied by one bit of communication ETU=26.04us, and the time counting unit of the timer is 0.04us, that is, 26.04us / 0.04us=651, which is the timing value that the timer needs to write. When the counter starts working, when it increases from 0 to this value, or decreases from this value to 0, the delay is exactly 26.04us, which shows that this baud rate can be easily set and modified.

[0070] Reference Figure 3 Further, in some embodiments of the present invention, after step S100: the CPU selects the SAM card channel to be operated through the analog switch switching module, it also includes: Save the current interrupt status of the CPU; Disable CPU local interrupts.

[0071] Specifically, in the present embodiment, this step is mainly used to exclude the CPU interrupt from affecting the timing. By saving the CPU interrupt status and turning off the CPU local interrupt before the timing operation, it is possible to prevent the CPU interrupt from affecting the timing, protect the critical section code, prevent interrupt interference, and ensure that the code execution is not affected by interrupts, thereby ensuring the stability and reliability of the system. When the timer is working, the minimum counting unit is 0.04us, that is, when the timer counts cumulatively, one counting time unit is 0.04us. If the counter receives an interrupt from the Linux system, it will execute the interrupt program first, and when it returns, there will be a delay, resulting in inaccurate time. Therefore, when precise timing is required, the local_irq_save function needs to be executed first: local_irq_save(iflags); The main function is to save the current CPU interrupt status and turn off local interrupts to ensure that there is no interference from interrupts during the execution of a certain section of code.

[0072] ‌Therefore, in Linux kernel programming, the local_irq_save function is very important because it can protect the critical section code, prevent interrupt interference, and ensure the stability and reliability of the system.

[0073] When a SAM card read / write command cycle is completed, the local_irq_restore function can be used to restore the previously saved CPSR register value to restore the interrupt status.

[0074] local_irq_restore(iflags); This can ensure the accuracy of the timer timing, the correct timing of the IO simulation when reading and writing the SAM card, and the accuracy of the read and write data.

[0075] Reference Figure 3 and Figure 7 Further, in some embodiments of the present invention, step S300: before the CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip, it also includes the step of sending an operation command to the SAM card, specifically including: According to the operation command, determine a number of byte data to be sent; According to each byte of data, the corresponding value of each bit is set by simulating IO; The CPU sends the value of each bit corresponding to the byte data to the SAM card through the read-write control chip and the corresponding SAM card channel; When the value of the response bit of the analog IO is 1, the sending of the current byte data ends and the sending of the next byte data begins until the sending of all byte data of the operation command is completed.

[0076] Specifically, in this embodiment, Figure 7 As shown, the CPU sends an operation command to the SAM card through simulated IO, including: Prepare the byte data to be sent, which includes the start bit, byte bit and check bit; Determine the number of times the current byte data is sent; If the number of times sent is greater than three, the sending will be terminated and an error message will be returned; If the number of transmissions is less than or equal to three, the value of each bit of the byte data is set by simulating IO and delaying an ETU time, waiting for all bits of the byte data to be sent; Determine whether the response bit of the current analog IO port is 1; If the response bit is not 1, return to step: determine the number of times the current byte data is sent; If the response bit is 1, the transmission ends and the correct information is returned, and the transmission of the next byte of data begins until the transmission of all bytes of the operation command is completed.

[0077] Data transmission adopts an error retransmission mechanism and is set to retransmit three times to ensure the accuracy and integrity of data transmission.

[0078] Reference Figure 3 , showing a complete communication operation process of the CPU for the SAM card, including: selecting the SAM card channel that needs to communicate; saving the CPU's interrupt status and turning off the CPU's local interrupt; setting the SAM card initialization timer parameters; allowing the CPU to send operation commands to the SAM card through simulated IO; allowing the CPU to receive the return data from the SAM card through simulated IO; and restoring the CPU's local interrupt.

[0079] Reference Figure 8 , showing a complete process of the CPU receiving the return data from the SAM card through simulated IO. By adopting the method of repeating the reception according to the current reception times, it is ensured that the data can be received completely. If it exceeds three times, it is determined that the received data is wrong. Let the CPU receive the return data from the SAM card through simulated IO, including: Set the analog IO to input state; Determine the number of times the current CPU receives the returned data; If the number of receptions is greater than three, the reception ends and an error message is returned; If the number of receptions is less than or equal to three, it is determined whether the level of the analog IO becomes low within the specified time; If the analog IO level does not become low within the specified time, it is determined that the SAM card has not sent data and the reception ends; If the analog IO level becomes low within the specified time, the value of each bit of the returned data is received through the analog IO, and all bits of the returned data are read within one ETU time; Calculate the byte value of the return data received by the CPU and perform parity check by table lookup method; If the parity check result is correct, the reception ends.

[0080] If the parity check result is wrong, the analog IO is set to: output low level for 1.5 ETU time, and then return to high level; Notify SAM card receiving error; Return step: determine the number of times the current CPU receives the return data.

[0081] After completing the above operations, the CPU local interrupt is finally restored, including: Execute the local interrupt recovery function, which is used to restore the CPSR register value saved in the local interrupt save function.

[0082] Enable CPU local interrupts.

[0083] Specifically, when a SAM card read and write command cycle is completed, the local_irq_restore function can be used to restore the previously saved CPSR register value to restore the interrupt status: local_irq_restore(iflags); This can ensure the accuracy of the timer timing, the correct timing of the IO simulation when reading and writing the SAM card, and the accuracy of the read and write data.

[0084] Reference Fig. 9 The present invention also proposes a SAM card device, which is used to implement a driving method of a SAM card device as in any one of the above embodiments. The SAM card device includes: a CPU, a read-write control chip, an analog switch switching module, and a plurality of SAM card channels. The CPU is electrically connected to the read-write control chip, the read-write control chip is electrically connected to the analog switch switching module, and the analog switch switching module is electrically connected to the SAM card channel.

[0085] Specifically, in this embodiment, refer to Fig. 9 U75 and U76 constitute analog switch switching modules, both of which use CD4066. CD4066 is a quad bidirectional analog switch, mainly used for multiplexing of analog or digital signals. The on-resistance of CD4066 is very small, only tens of ohms. Each package of CD4066 has 4 independent low on-resistance analog switches, each of which has three terminals: input A, output B, and control C, and the input and output terminals are interchangeable.

[0086] The read-write control chip U70 uses LTC4555, which is a standard SMARTCARD interface control chip. It is a hardware interface circuit for reading and writing SAM cards. The use of this chip can eliminate the cumbersome card reading control circuit, conforms to the ISO / IEC 7816 international standard, and the setting and control are relatively simple. It is compatible with both 1.8V and 3.3V card operations.

[0087] In addition, in some other embodiments, discrete components may be used to implement the functions of the LTC4555 chip.

[0088] Analog IO means Fig. 9 Pin 15 of the read / write control chip U70 is the I / O data pin. Through software control of the IO port, the I / O data transmission between the CPU and the SAM card is simulated to complete the reading and writing of data on the SAM card.

[0089] Fig. 9 In the example, when the control terminal C is high, switches A and B are turned on; when the control terminal is low, the switches are turned off. When the analog switch is turned on, the on resistance is tens of ohms; when the analog switch is turned off, it presents a very high impedance and can be regarded as an open circuit. The analog switch can transmit digital signals and analog signals, and the upper limit frequency of the analog signal that can be transmitted is 40MHz. The crosstalk between the switches is very small, with a typical value of -50dB.

[0090] Further, in some embodiments of the present invention, the CPU includes: one or more processors; Memory; One or more programs, wherein the one or more programs are stored in a memory and configured to be executed by one or more processors, and when the programs are executed by the processors, the steps of the driving method of the SAM card device as in any one of the above embodiments are implemented.

[0091] The present invention also proposes a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the driving method of the SAM card device as described in any one of the above embodiments are implemented.

[0092] It will be appreciated by those skilled in the art that all or part of the steps to implement the above-mentioned embodiments can be accomplished by hardware, or by a program to instruct the relevant hardware to accomplish, and the program can be stored in a computer-readable storage medium. In the context of the present invention, the computer-readable medium can be considered to be tangible and non-temporary. Non-limiting examples of non-temporary tangible computer-readable media include non-volatile memory circuits (e.g., flash memory circuits, erasable programmable read-only memory circuits, or mask read-only memory circuits), volatile memory circuits (e.g., static random access memory circuits or dynamic random access memory circuits), magnetic storage media (e.g., analog or digital tapes or hard disk drives), and optical storage media (e.g., CDs, DVDs, or Blu-ray discs), etc. The program code for implementing the method of the present invention can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

[0093] In addition, although each operation is described in a specific order, this should be understood as requiring such operation to be performed in the specific order shown or in a sequential order, or requiring that all illustrated operations should be performed to obtain desired results. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details are included in the above discussion, these should not be interpreted as limiting the scope of the present invention. Some features described in the context of a separate embodiment can also be implemented in a single implementation in combination. On the contrary, the various features described in the context of a single implementation can also be implemented in multiple implementations individually or in any suitable sub-combination mode.

[0094] The embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments. Various changes can be made within the knowledge of ordinary technicians in the relevant technical field without departing from the purpose of the present invention. In addition, the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

Claims

1. A driving method for a SAM card device, characterized in that: The SAM card device is used to read and write SAM cards. The SAM card device is provided with a CPU, a read-write control chip, an analog switch switching module and a plurality of SAM card channels. The SAM card channels are used to connect SAM cards. The CPU is electrically connected to the read-write control chip through analog IO, and the read-write control chip is electrically connected to the plurality of SAM card channels through the analog switch switching module. The method comprises: The CPU selects the SAM card channel to be operated through the analog switch switching module; According to the baud rate set by the SAM card, the reading time of each bit of data is determined, and the timing value is set in the internal timing register by the CPU; The CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip; wherein the reading time is configured as a plurality of sampling times, and the CPU samples each bit of data multiple times at the plurality of sampling times, and determines the value of each bit of data according to the sampling results; The characters are parity checked by table lookup to verify the accuracy of the characters.

2. The driving method of the SAM card device according to claim 1, characterized in that: The analog switch switching module includes a plurality of independent low on-resistance analog switches, and the low on-resistance analog switches correspond to the SAM card channels one by one.

3. The driving method of the SAM card device according to claim 1, characterized in that: The baud rate set by the SAM card is used to determine the reading time of each bit of data, and the CPU sets the timing value in the internal timing register, including: Taking the reciprocal of the baud rate, obtaining the reading time of each bit of data; Divide the reading time of each bit of data by the time counting unit of the timing register to obtain the timing value; The timing value is set in the timing register by the CPU.

4. The driving method of the SAM card device according to claim 1, characterized in that: The CPU obtains each bit of data of the character sent by the SAM card according to the reading time through the read-write control chip, including: The read time is configured as 8 sampling times, and the CPU samples each bit of data 8 times at the 8 sampling times through the read-write control chip to obtain 8 sampling bit levels; the second sampling bit level to the sixth sampling bit level of each bit of data are averaged to obtain a sampling result; The value of each bit of data is determined according to the sampling result.

5. The driving method of the SAM card device according to claim 1, characterized in that: The baud rate can be set to any value.

6. The driving method of the SAM card device according to claim 1, characterized in that: After the CPU selects the SAM card channel to be operated through the analog switch switching module, the method further includes: Save the current interrupt status of the CPU; Disable local interrupts for the CPU.

7. The driving method of the SAM card device according to claim 1, characterized in that: Before the CPU obtains each bit of data of the character sent by the SAM card according to the read time through the read-write control chip, the step of sending an operation command to the SAM card is further included, which specifically includes: According to the operation command, determining a number of byte data to be sent; According to each of the byte data, the value of each corresponding bit is set through the analog IO; The CPU sends the value of each bit corresponding to the byte data to the SAM card through the read-write control chip and the corresponding SAM card channel; When the value of the response bit of the simulated IO is 1, the sending of the current byte data ends, and the sending of the next byte data starts, until the sending of all byte data of the operation command is completed.

8. A SAM card device, characterized in that: Used to implement the driving method of the SAM card device as described in any one of claims 1-7, the SAM card device includes: a CPU, a read-write control chip, an analog switch switching module, and several SAM card channels, the CPU is electrically connected to the read-write control chip, the read-write control chip is electrically connected to the analog switch switching module, and the analog switch switching module is electrically connected to the SAM card channel.

9. The SAM card device according to claim 8, characterized in that: The CPU comprises: one or more processors; Memory; One or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and when the programs are executed by the processors, the steps of the driving method of the SAM card device as described in any one of claims 1-7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the driving method of the SAM card device as described in any one of claims 1 to 7 are implemented.

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