Signal adjustment method, circuit, device, equipment, medium and vehicle
By cutting off and redistributing the input signal during the circuit verification process, the problem of frequent changes in module input signals is solved, and a more efficient verification process is achieved.
Patent Information
- Application Number
- CN202311490045.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-09
- Publication Date
- 2025-05-13
AI Technical Summary
During the circuit verification process, frequent changes to the module input signal requires frequent execution of forced commands and release commands, which are cumbersome.
By determining the target module to be verified and the first module providing the input signal to the module, the input signal of the first module is cut off, and the input signal for verification is provided to the target module through the setting interface, flexible adjustment of the input signal is achieved.
There is no need to frequently overwrite and release forced commands, which simplifies the operation process and improves verification efficiency.
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Figure CN119989997A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of circuit technology, and in particular to a signal adjustment method, circuit, device, equipment, medium and vehicle. Background Art
[0002] During the design process of a circuit, it is usually necessary to verify the various modules included in the circuit through verification technology to determine whether there are faults in each module.
[0003] When verifying each module of the circuit, it can be achieved by changing the input signal of the module to be verified. At present, it is mainly achieved by overwriting local signals through forced commands. For example, a circuit includes module 1 and module 2, and the output end of module 1 is connected to the input end of module 2, that is, module 1 provides input signals for module 2. When module 2 needs to be verified, the output signal of module 1 can be overwritten by forced commands, that is, the input signal of module 2 can be changed by forced commands to achieve the purpose of verifying module 2. After the verification is completed, the forced command needs to be released, that is, module 1 continues to provide input signals for module 2.
[0004] When the input signal of module 2 needs to be frequently changed, it is necessary to frequently execute and release the forced command, which is a cumbersome process. Summary of the invention
[0005] Embodiments of the present application provide a signal adjustment method, circuit, device, equipment, medium and vehicle, which can simplify operations when verifying various modules of the circuit.
[0006] In a first aspect, an embodiment of the present application provides a signal adjustment method, including:
[0007] Determine a target module to be verified and a first module that provides an input signal to the target module;
[0008] Cutting off the input signal provided by the first module to the target module;
[0009] The driver sets the interface and provides an input signal for verification to the target module through the setting interface.
[0010] In a second aspect, an embodiment of the present application provides a circuit, which is applied to the signal adjustment method of the first aspect, and the circuit includes at least two internal modules;
[0011] A first interface is provided in the target module to be verified in the internal module, and the first interface is connected to the verification platform;
[0012] A first switch is provided between a first module in the internal module that provides an input signal to the target module and the target module, and the first switch is connected to the first module, the target module and the verification platform respectively.
[0013] In a third aspect, an embodiment of the present application provides a signal adjustment device, including:
[0014] A determination module, used for determining a target module to be verified and a first module providing an input signal to the target module;
[0015] A truncation module, used for truncation of the input signal provided by the first module to the target module;
[0016] The driver module is used to drive the setting interface and provide an input signal for verification to the target module through the setting interface.
[0017] In a fourth aspect, an embodiment of the present application provides an electronic device, comprising: a processor and a memory storing computer program instructions; when the processor executes the computer program instructions, the method described in the first aspect is implemented.
[0018] In a fifth aspect, an embodiment of the present application provides a storage medium on which a program or instruction is stored. When the program or instruction is executed by a processor, the method described in the first aspect is implemented.
[0019] In a sixth aspect, an embodiment of the present application provides a vehicle, the vehicle comprising a signal adjustment device as described in the third aspect; or, an electronic device as described in the fourth aspect; or, a storage medium as described in the fifth aspect.
[0020] The embodiment of the present application achieves flexible adjustment of the input signal by determining a target module to be verified and a first module that provides an input signal to the target module; intercepting the input signal provided by the first module to the target module; driving a setting interface and providing the target module with an input signal for verification through the setting interface, thereby eliminating the need for frequent overwriting and releasing of mandatory commands between the first module and the target module, thereby simplifying the operation. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 A flow chart of a signal adjustment method provided in an embodiment of the present application;
[0022] Figure 2 A schematic diagram of a connection between a verification platform and a first circuit provided in an embodiment of the present application;
[0023] Figure 3 A schematic diagram of a first switch provided in an embodiment of the present application;
[0024] Figure 4 A schematic diagram of a connection between a first interface and a target module provided in an embodiment of the present application;
[0025] Figure 5 A schematic diagram of the connection between an interface of a verification platform and a first interface provided in an embodiment of the present application;
[0026] Figure 6 A structural diagram of a signal adjustment device provided in an embodiment of the present application;
[0027] Figure 7 A structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0028] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the scheme of the present application will be further described below. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.
[0029] In the following description, many specific details are set forth to facilitate a full understanding of the present application, but the present application may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only part of the embodiments of the present application, rather than all of the embodiments.
[0030] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprises" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0031] The signal adjustment method, circuit, device, equipment, medium and vehicle provided in the embodiments of the present application are described below through specific embodiments. The signal adjustment method can be applied to a verification platform, through which the input signal of the target module to be verified can be flexibly adjusted.
[0032] Figure 1 A flow chart of a signal adjustment method provided in an embodiment of the present application is as follows: Figure 1 As shown, the signal adjustment method may include the following steps:
[0033] S110 , determining a target module to be verified and a first module that provides an input signal to the target module.
[0034] S120: Cut off the input signal provided by the first module to the target module.
[0035] S130 , driving the setting interface and providing an input signal for verification to the target module through the setting interface.
[0036] The embodiment of the present application achieves flexible adjustment of the input signal by determining a target module to be verified and a first module that provides an input signal to the target module; intercepting the input signal provided by the first module to the target module; driving a setting interface and providing the target module with an input signal for verification through the setting interface, thereby eliminating the need for frequent overwriting and releasing of mandatory commands between the first module and the target module, thereby simplifying the operation.
[0037] The above steps are described in detail below:
[0038] In S110, the target module and the first module may be modules in a first circuit to be verified, the first circuit may be connected to a verification platform, and the first circuit may include at least two internal modules. Exemplarily, the first circuit may be a register transfer level (RTL) circuit. The connection relationship between the internal modules may be set according to the specific application.
[0039] The target module is a module to be verified inside the first circuit, and the first module is a module in the first circuit used for providing an input signal to the target module to be verified.
[0040] Exemplarily, the target module and the first module may be determined in the following manner:
[0041] receiving verification instructions;
[0042] In response to the verification instruction, determining a target module to be verified;
[0043] A module connected to an input terminal of the target module is determined as a first module.
[0044] The verification instruction may be generated based on the user's operation, for example, based on the user's operation on the display screen of the verification platform, or based on the user's gesture operation or voice operation. The relationship between the verification instruction and the corresponding operation may be preset.
[0045] Based on the verification instruction, the verification platform can determine a module to be verified from the first circuit as a target module.
[0046] Exemplarily, the verification platform may also randomly select a module from the internal modules of the first circuit as the target module. Of course, other forms may also be used to determine the target module, which is not limited in the embodiments of the present application.
[0047] Exemplarily, a module connected to the input end of the target module can be determined from the internal modules of the first circuit, and the module can be determined as the first module. In actual application, there can be one or more first modules, that is, there can be one or more internal modules that provide input signals to the target module, that is, there can be one or more internal modules connected to the input end of the target module.
[0048] For example, reference Figure 2 , for example, the first circuit includes five internal modules, namely internal module 1, internal module 2, internal module 3, internal module 4 and internal module 5. The arrow direction indicates the signal flow direction.
[0049] Assume that based on the user's operation, internal module 3 is determined as the target module, according to Figure 2 From the signal flow direction in, it can be determined that the first module is internal module 1.
[0050] In S120, by cutting off the input signal provided by the first module to the target module, the verification platform can be used to provide the input signal to the target module. Through the verification platform, the input signal can be flexibly adjusted, thereby eliminating the need to frequently overwrite and release forced commands between the first module and the target module, thereby simplifying the operation.
[0051] Exemplarily, a first switch may be provided between the first module and the target module, and the input signal provided by the first module to the target module may be cut off by controlling the first switch.
[0052] Specifically, refer to Figure 3 , the first switch 310 is connected to the first module, the target module and the verification platform respectively. The verification platform can cut off the input signal provided by the first module to the target module by controlling the first switch 310 to be disconnected. Exemplarily, the first switch 310 can be a unidirectional conductive element, such as a diode, etc. When the verification platform outputs a high level to the first switch 310, the first switch 310 is turned on, and when the verification platform outputs a low level to the first switch 310, the first switch 310 is turned off.
[0053] Of course, the first switch 310 may also be in other forms, such as a macro switch, that is, a software switch, and the purpose of cutting off the input signal provided by the first module is achieved by defining the macro switch.
[0054] In S130, illustratively, the setting interface can be set in the first circuit, so that the verification platform provides the target module with an input signal for verification. Exemplarily, when it is necessary to use the verification platform to provide a module with an input signal for verification, the interface can be set in the module. For example, in an embodiment of the present application, if the verification platform is required to provide the target module with an input signal for verification, the interface can be set in the target module, so that the input signal can be flexibly adjusted by the verification platform.
[0055] For example, reference Figure 2 , taking the target module as the internal module 3 and the first module as the internal module 1 as an example, the first interface 200 can be set in the internal module 3. Exemplarily, the signal to be driven and monitored can be defined in the first interface 200. The first interface 200 is the setting interface in the above embodiment.
[0056] Compared with the traditional solution that needs to wait until the verification work of each internal module before the target module is completed, the embodiment of the present application can realize the absent verification of the first circuit, that is, if the verification work of the first module is not completed, the first module can be skipped, and the verification platform provides the target module with an input signal for verification through the first interface, which can improve the verification efficiency.
[0057] The signal direction of the first interface is opposite to the signal direction of the target module. Figure 4 , the output signal of the target module corresponds to the input signal of the first interface, that is, the output end of the target module is connected to the input end of the first interface, and the input signal of the target module corresponds to the output signal of the first interface, that is, the input end of the target module is connected to the output end of the first interface. Figure 3 In order to conveniently describe the connection relationship between the first interface and the target module, the first interface is described independently from the target module.
[0058] Due to the existence of the first interface, the input end of the target module may have multiple drives, that is, there may be multiple input signals. For example, the input signal provided by the first module and the input signal provided by the verification platform through the first interface may exist at the same time. In order to avoid this situation, part of the signal of the target module can be cut off to keep it in a high-impedance state.
[0059] Exemplarily, when the first switch is disconnected, the verification platform can drive the first interface to provide an input signal to the target module through the first interface. Moreover, the input signal of the target module can be flexibly changed through the verification platform. Compared with the traditional solution of changing the verification signal of the target module through a forced command, the embodiment of the present application only needs to change the driving signal of the verification platform, and there is no need to frequently overwrite and release the forced command, which simplifies the operation and improves the verification efficiency.
[0060] In some embodiments, after S130, the signal adjustment method may further include the following steps:
[0061] Intercepting the input signal for verification provided to the target module through the setting interface;
[0062] The first module is controlled to provide an input signal to the target module.
[0063] Exemplarily, the first circuit may further include a second switch, the second switch being connected to the verification platform and the first interface respectively. The verification platform may control whether to provide an input signal to the target module by controlling the on and off of the second switch.
[0064] For example, when the second switch is closed, the verification platform can provide an input signal to the target module through the first interface, and when the second switch is opened, the verification platform stops providing the input signal to the target module. By controlling the conduction and disconnection of the second switch, it is possible to flexibly control whether the verification platform provides an input signal to the target module.
[0065] In some embodiments, the first switch can be controlled to be closed, and the second switch can be controlled to be open, thereby controlling the first module to provide an input signal to the target module, thereby improving the flexibility of the verification method.
[0066] In some embodiments, the above S130 may include the following steps:
[0067] A driving signal is sent to drive the setting interface through the driving signal, and an input signal for verification is provided to the target module through the setting interface.
[0068] In some embodiments, Figure 2 As shown, the verification platform 201 may include a first stimulus generator 2010 and a third interface 2011 , and the third interface 2011 is connected to the first stimulus generator 2010 and the first interface 200 , respectively.
[0069] The first stimulus generator 2010 is used to provide a stimulus signal as an input signal of the target module. Exemplarily, the verification platform 201 can control the first stimulus generator 2010 to generate the input signal required by the target verification module, and transmit it to the target module through the third interface 2011 and the first interface 200 in turn, and verify whether the target module has a fault under the action of the input signal.
[0070] Exemplarily, the verification platform may send a driving signal to the first stimulus generator 2010, so that the first stimulus generator 2010 drives the third interface 2011 according to the driving signal, and provides an input signal to the target module through the first interface 200. Exemplarily, the verification platform 201 may provide the input signal to the target module through the output end of the first interface 200.
[0071] In some embodiments, after S130, the signal adjustment method may further include the following steps:
[0072] The output signal of the target module is read through the setting interface, and the output signal corresponds to the input signal;
[0073] Compare the output signal with the reference signal to obtain the verification result of the target module.
[0074] Because the input end of the first interface is connected to the output end of the target module, the verification platform can read the output signal of the target module through the input end of the first interface, and the output signal corresponds to the input signal provided by the verification platform to the target module.
[0075] The reference signal is a reference output signal corresponding to the input signal. After the verification platform reads the output signal of the target module, it can compare the output signal with the reference signal to determine whether the target module has a fault. The reference signal can be a value or an interval range. For example, when the output signal is not within the interval range, it is considered that the target module has a fault.
[0076] The embodiment of the present application can read the output signal of the target module through the first interface and verify the target module based on the output signal, thereby achieving the purpose of verifying a single module in the first circuit and improving the flexibility of the verification method.
[0077] For example, reference Figure 5 The verification platform may also include an interface, which may be connected to the input terminal B_in and the input terminal C_in and the output terminal D_out and the output terminal E_out of the first interface respectively. On the one hand, the verification platform may be used to drive the output terminal of the first interface, and then drive the target module through the output terminal of the first interface. On the other hand, the input terminal of the first interface may be read as needed to read the output signal of the target module and verify the target module.
[0078] The embodiment of the present application sets an interface in the internal module, connects the interface of the verification platform with the interface set in the internal module, and connects the stimulus generator in the verification platform with the interface of the verification platform. In this way, the signal of the internal module to be verified can be flexibly adjusted by driving the interface of the verification platform, without frequently overwriting and releasing the mandatory command, thereby simplifying the operation and improving the verification efficiency. In addition, the embodiment of the present application connects the interface of the verification platform with the interface set in the internal module, so that the absence verification of the first circuit can be realized, that is, the next internal module can be verified when the previous internal module is not verified, thereby realizing the replacement of the local circuit.
[0079] Based on the same inventive concept, an embodiment of the present application further provides a circuit, which includes at least two internal modules;
[0080] A first interface is provided in the target module to be verified in the internal module, and the first interface is connected to the verification platform;
[0081] A first switch is provided between a first module in the internal module that provides an input signal to the target module and the target module, and the first switch is connected to the first module, the target module and the verification platform respectively.
[0082] The circuit here is the first circuit in the above embodiment, and the first interface is the setting interface in the above embodiment. When it is necessary to verify the target module of the circuit, the first interface can be set in the target module, and the first interface is connected to the target module and the verification platform of the above embodiment respectively, and a first switch is set between the target module and the first module. By controlling the first switch, the verification platform can flexibly provide a verification signal to the target module, without frequently overwriting and releasing the mandatory command between the first module and the target module, thereby simplifying the operation.
[0083] In some embodiments, the circuit may further include a first switch and a second switch;
[0084] The first switch is connected with the target module, the first module and the verification platform;
[0085] The second switch is connected to the verification platform and the first interface respectively.
[0086] In some embodiments, the circuit may further include a first unit, at least two internal modules are disposed on the first unit, and the first unit is connected to the at least two internal modules via a second interface.
[0087] like Figure 2 As shown, the verification platform 201 is also connected to the first unit 210 of the first circuit. The first unit 210 is provided with various internal modules of the first circuit. The first unit 210 is connected to at least one internal module via the second interface 220 .
[0088] The second interface 220 is used to connect the first unit 210 to at least one internal module of the first circuit, for example Figure 2 In the embodiment, the second interface 220 is connected to the internal module 1, the internal module 2 and the internal module 5 respectively. The first unit 210 can be, for example, a printed circuit board, that is, Figure 2 The first unit 210 and the internal modules 1 - 5 may be part of a printed circuit board.
[0089] Compared with the traditional solution that can only verify the first unit 210 as a whole, the embodiment of the present application can verify some modules on the first unit 210. For example, the internal module 3 can be verified using the verification platform 201. This improves the flexibility of verification and can also more quickly identify faulty modules.
[0090] Other detailed features can be found in the above embodiments, and will not be repeated here for the sake of brevity.
[0091] Based on the same inventive concept, the present application embodiment also provides a signal adjustment device. Figure 6 The signal adjustment device provided in the embodiment of the present application is described in detail.
[0092] Figure 6 A structural diagram of a signal adjustment device provided in an embodiment of the present application, such as Figure 6 As shown, the signal adjustment device may include:
[0093] A determination module 610, configured to determine a target module to be verified and a first module that provides an input signal to the target module;
[0094] A truncation module 620, used to truncate the input signal provided by the first module to the target module;
[0095] The driving module 630 is used to drive the setting interface and provide an input signal for verification to the target module through the setting interface.
[0096] The embodiment of the present application achieves flexible adjustment of the input signal by determining a target module to be verified and a first module that provides an input signal to the target module; intercepting the input signal provided by the first module to the target module; driving a setting interface and providing the target module with an input signal for verification through the setting interface, thereby eliminating the need for frequent overwriting and releasing of mandatory commands between the first module and the target module, thereby simplifying the operation.
[0097] In some embodiments, the truncation module 620 is further configured to truncate the input signal for verification provided to the target module through the setting interface after the driving module 630 drives the setting interface and provides the target module with the input signal for verification through the setting interface;
[0098] The signal adjustment device may further include:
[0099] The control module is used to control the first module to provide an input signal to the target module.
[0100] In some embodiments, the driving module 630 is specifically configured to:
[0101] A driving signal is sent to drive the setting interface through the driving signal, and an input signal for verification is provided to the target module through the setting interface.
[0102] In some embodiments, the signal adjustment device may further include:
[0103] A reading module, configured to read an output signal of the target module through the setting interface after the driving module 630 drives the setting interface and provides an input signal for verification to the target module through the setting interface, wherein the output signal corresponds to the input signal;
[0104] The comparison module is used to compare the output signal with the reference signal to obtain the verification result of the target module.
[0105] In some embodiments, the signal adjustment device may further include:
[0106] A receiving module, used for receiving a verification instruction;
[0107] The determination module 610 is specifically configured to:
[0108] In response to the verification instruction, determining a target module to be verified;
[0109] A module connected to an input terminal of the target module is determined as a first module.
[0110] Figure 6 Each module in the device shown has the function of realizing Figure 1-Figure 5 The functions of each step in the process can achieve the corresponding technical effects, so for the sake of brevity, they will not be described in detail here.
[0111] Based on the same inventive concept, an embodiment of the present application further provides a signal adjustment system, including a verification platform and a first circuit;
[0112] A verification platform is used to determine a target module and a first module from N internal modules of a first circuit, wherein the target module is a module to be verified, a first interface is provided in the target module, the first interface is respectively connected to the target module and the verification platform, a first switch is provided between the target module and the first module, and N is an integer greater than or equal to 2; the first switch is controlled to be disconnected to cut off an input signal provided by the first module to the target module; and the first interface is driven to provide an input signal to the target module through the first interface.
[0113] For specific details, please refer to the above embodiments, which will not be repeated here for the sake of brevity.
[0114] Based on the same inventive concept, the present application embodiment also provides an electronic device. Figure 7 The electronic device provided in the embodiments of the present application is described in detail.
[0115] like Figure 7 As shown, the electronic device may include a processor 710 and a memory 720 for storing computer program instructions.
[0116] The processor 710 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.
[0117] The memory 720 may include a large capacity memory for data or instructions. For example, but not limitation, the memory 720 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In one example, the memory 720 may include a removable or non-removable (or fixed) medium, or the memory 720 is a non-volatile solid-state memory. In one example, the memory 720 may be a read-only memory (ROM). In one example, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM) or a flash memory or a combination of two or more of these.
[0118] The processor 710 reads and executes the computer program instructions stored in the memory 720 to implement Figure 1-Figure 5 The method in the embodiment shown in the figure is achieved Figure 1-Figure 5 The corresponding technical effects achieved by executing the method in the illustrated embodiment are not described in detail here for the sake of brevity.
[0119] In one example, the electronic device may further include a communication interface 730 and a bus 740. Figure 7 As shown, the processor 710, the memory 720, and the communication interface 730 are connected via a bus 740 and communicate with each other.
[0120] The communication interface 730 is mainly used to implement communication between various modules, devices and / or equipment in the embodiments of the present application.
[0121] Bus 740 includes hardware, software or both, and each component of electronic device is coupled to each other.For example, but not limitation, bus 740 may include accelerated graphics port (Accelerated Graphics Port, AGP) or other graphics bus, enhanced industry standard architecture (Extended Industry Standard Architecture, EISA) bus, front side bus (Front Side Bus, FSB), hypertransmission (Hyper Transport, HT) interconnection, industry standard architecture (IndustryStandard Architecture, ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 740 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the application considers any suitable bus or interconnection.
[0122] After the electronic device determines the target module to be verified and the first module that provides the input signal to the target module, the signal adjustment method in the embodiment of the present application can be executed, thereby realizing the combination Figure 1-Figure 5 The signal conditioning method described and Figure 6 A signal conditioning device is described.
[0123] Based on the same inventive concept, an embodiment of the present application further provides a storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the signal adjustment method described in the above embodiment is implemented.
[0124] Based on the same inventive concept, an embodiment of the present application further provides a vehicle, the vehicle comprising a signal adjustment device as described in the above embodiment; or, an electronic device as described in the above embodiment; or, a storage medium as described in the above embodiment.
[0125] It should be understood that the above specific embodiments of the present application are only used to illustrate or explain the principles of the present application, and do not constitute a limitation to the present application. Therefore, any modifications, equivalent substitutions, improvements, etc. made without departing from the spirit and scope of the present application should be included in the protection scope of the present application. In addition, the claims attached to the present application are intended to cover all changes and modifications that fall within the scope and boundaries of the attached claims, or the equivalent forms of such scope and boundaries.
[0126] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.
[0127] The above reference is according to the method of the embodiment of the present application, the flow chart of the device (system) and the computer program product and / or the block diagram described various aspects of the present application.It should be understood that each square box in the flow chart and / or the block diagram and the combination of each square box in the flow chart and / or the block diagram can be realized by computer program instructions.These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the realization of the function / action specified in one or more square boxes of the flow chart and / or the block diagram.Such a processor can be but is not limited to a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit.It can also be understood that each square box in the block diagram and / or the flow chart and the combination of the square boxes in the block diagram and / or the flow chart can also be realized by the dedicated hardware that performs the specified function or action, or can be realized by the combination of dedicated hardware and computer instructions.
[0128] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.
Claims
1. A signal adjustment method, characterized in that: include: Determine a target module to be verified and a first module that provides an input signal to the target module; Cutting off the input signal provided by the first module to the target module; A setting interface is driven and an input signal for verification is provided to the target module through the setting interface.
2. The method according to claim 1, characterized in that After the driving setting interface and providing the target module with an input signal for verification through the setting interface, the method further includes: intercepting an input signal for verification provided to the target module through the setting interface; The first module is controlled to provide an input signal to the target module.
3. The method according to claim 1, characterized in that The driving setting interface and providing the target module with an input signal for verification through the setting interface include: A driving signal is sent to drive the setting interface through the driving signal, and an input signal for verification is provided to the target module through the setting interface.
4. The method according to claim 1, characterized in that: After the driving setting interface and providing the target module with an input signal for verification through the setting interface, the method further includes: Reading an output signal of the target module through the setting interface, the output signal corresponding to the input signal; The output signal is compared with a reference signal to obtain a verification result of the target module.
5. The method according to any one of claims 1 to 4, characterized in that: The first module for determining a target module to be verified and providing an input signal to the target module includes: receiving verification instructions; In response to the verification instruction, determining a target module to be verified; A module connected to an input terminal of the target module is determined as a first module.
6. A circuit, characterized in that: Applied to the signal adjustment method according to any one of claims 1 to 5, the circuit comprises at least two internal modules; A first interface is provided in the target module to be verified in the internal module, and the first interface is connected to the verification platform; A first switch is provided between a first module in the internal module that provides an input signal to the target module and the target module, and the first switch is connected to the first module, the target module and the verification platform respectively.
7. The circuit according to claim 6, characterized in that The circuit also includes a first switch and a second switch; The first switch is connected to the target module, the first module and the verification platform; The second switch is connected to the verification platform and the first interface respectively.
8. The circuit according to claim 6, characterized in that The circuit further includes a first unit, the at least two internal modules are arranged on the first unit, and the first unit is connected to the at least two internal modules via a second interface.
9. A signal adjustment device, characterized in that: include: A determination module, used for determining a target module to be verified and a first module providing an input signal to the target module; A truncation module, used for truncation of the input signal provided by the first module to the target module; The driving module is used to drive the setting interface and provide an input signal for verification to the target module through the setting interface.
10. An electronic device, characterized in that: include: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the method according to any one of claims 1 to 5 is implemented.
11. A storage medium, characterized in that: The storage medium stores a program or an instruction, and when the program or the instruction is executed by the processor, the method according to any one of claims 1 to 5 is implemented.
12. A vehicle, characterized in that: The vehicle comprises the signal adjustment device as claimed in claim 9; or, the electronic device as claimed in claim 10; or, the storage medium as claimed in claim 11.