Square circuit, self-adjusting method of square circuit and control module

Abstract

The embodiment of the invention provides a self-adjustable squaring circuit, a self-adjusting method of the squaring circuit and a control module, and the squaring circuit comprises a squaring unit which outputs a first signal; the mirror image squaring unit outputs a second signal; the current adjusting module is used for receiving the target control signal and generating compensation current, the magnitude of the compensation current is related to the target control signal, and the output end of the current adjusting module is connected with the output end of the square unit or the mirror image square unit and used for compensating the difference between the first signal and the second signal; wherein the target control signal is generated by the control module based on the voltage difference acquired by the voltage acquisition module; the voltage acquisition module is used for acquiring the output end voltage of the squaring unit and the output end voltage of the mirror image squaring unit; the control module is used for obtaining the voltage difference between the output ends of the squaring unit and the mirror image squaring unit, and the voltage difference is used for obtaining a target control signal. According to the embodiment of the invention, circuit mismatch can be improved, and the dynamic range is expanded.

Description

Technical Field

[0001] The present disclosure relates to the field of communication technology, and in particular to a square circuit, a self-adjustment method of the square circuit, and a control module. Background Art

[0002] Detectors are usually used to measure the amplitude or power of a signal and are widely used in wireless systems. They can be simply divided into two categories: logarithmic amplifier detectors (or envelope detectors) and root mean square (RMS) detectors. For the root mean square detector, three operations need to be performed on the signal: root (Root), average (Mean), and square (Square). Among them, since the square unit has its own DC working current / voltage, this part of the current / voltage needs to be subtracted, so an additional mirror square unit is used to provide the same bias for accurate subtraction of the corresponding DC voltage / current. However, there may be a mismatch problem between the square unit and the mirror square unit, and the mismatch may change with temperature, resulting in the inability to accurately subtract the corresponding DC voltage / current, resulting in inaccurate output results. Summary of the invention

[0003] Embodiments of the present disclosure provide a square circuit, a self-adjustment method for the square circuit, and a control module.

[0004] In a first aspect, an embodiment of the present disclosure provides a self-adjustable square circuit, comprising: A squaring unit, used to square the received AC signal, the squaring unit receiving a bias voltage and the AC signal, and an output end of the squaring unit outputting a first signal; A mirror square unit, used for receiving the bias voltage, wherein the structure of the mirror square unit is consistent with the structure of the square unit, and the output end of the mirror square unit outputs a second signal; A current adjustment module is used to receive a target control signal and generate a compensation current, wherein the magnitude of the compensation current is related to the target control signal, and the output end of the current adjustment module is connected to the output end of the square unit or the mirror square unit, so as to compensate for the difference between the first signal and the second signal; wherein the target control signal is generated by the control module based on the voltage difference collected by the voltage acquisition module; the voltage acquisition module is used to collect the output terminal voltage of the square unit and the output terminal voltage of the mirror square unit; the control module is used to obtain the voltage difference between the output terminals of the square unit and the mirror square unit, and the voltage difference is used to obtain the target control signal.

[0005] In a second aspect, an embodiment of the present disclosure provides a self-adjustment method for a square circuit, which is applied to the square circuit in the first aspect, and the method includes: obtaining the voltage difference; A target control signal is determined according to the voltage difference and output to the current adjustment module.

[0006] In a third aspect, an embodiment of the present disclosure provides a control module, including a processor and a memory; The processor is used to execute instructions stored in the memory so that the control module performs the self-adjustment method in the second aspect.

[0007] The beneficial effects of the present disclosure are: If there is a process mismatch between the square unit and the mirror square unit, the first signal and the second signal output by the square unit and the mirror square unit are different, and the voltage acquisition module acquires the voltage difference between the output terminal voltage of the square unit and the output terminal voltage of the mirror square unit, and the magnitude of the voltage difference can reflect the difference between the first signal and the second signal. The control module can determine the target control signal for compensating the mismatch according to the voltage difference; the current adjustment module receives the target control signal and generates a compensation current, which can compensate for the difference between the first signal and the second signal, thereby eliminating (or at least partially eliminating) the inaccuracy caused by the mismatch between the square unit and the mirror square unit.

[0008] The square circuit also includes a storage module for storing the corresponding relationship between the voltage difference at the output of the square unit and the mirror square unit and the target control signal. In this way, when calibrating, it is only necessary to find the corresponding target control signal according to the voltage difference, without traversing different control signals, thus saving calibration time. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A schematic diagram of input and output of signal envelope detection provided by an embodiment of the present disclosure; Figure 2 A schematic diagram of the architecture of an RMS detector provided in an embodiment of the present disclosure; Figure 3 A schematic diagram of a circuit structure of a square circuit provided in an embodiment of the present disclosure; Figure 4 A schematic diagram of an equivalent circuit of a square circuit provided in an embodiment of the present disclosure; Figure 5 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 1 ; Figure 6 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 2 ; Figure 7 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 3 ; Figure 8 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 4 ; Fig. 9 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 5 ; Fig.10 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 6 ; Fig.11 The structure diagram of the current adjustment module provided in the embodiment of the present disclosure is as follows: Figure 1 ; Fig.12 The structure diagram of the current adjustment module provided in the embodiment of the present disclosure is as follows: Figure 2 ; Fig.13 The structure diagram of the current adjustment module provided in the embodiment of the present disclosure is as follows: Figure 3 ; Fig.14 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 7 ; Fig.15 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 8 ; Fig.16 Schematic diagram of the self-adjustment process provided by the embodiment of the present disclosure Figure 1 ; Fig.17 Schematic diagram of the self-adjustment process provided by the embodiment of the present disclosure Figure 2 ; Fig.18 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 9 ; Fig.19 Schematic diagram of the self-adjustment process provided by the embodiment of the present disclosure Figure 3 ; Fig. 20 A schematic diagram of the composition structure of a self-adjustable square circuit provided in an embodiment of the present disclosure Figure 10 ; Fig.21 Schematic diagram of the self-adjustment process provided by the embodiment of the present disclosure Figure 4 . DETAILED DESCRIPTION

[0010] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It is understood that the specific embodiments described herein are only used to explain the relevant disclosure, rather than to limit the disclosure. It should also be noted that, for the convenience of description, only the parts related to the relevant disclosure are shown in the drawings.

[0011] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure.

[0012] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0013] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present disclosure are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present disclosure described here can be implemented in an order other than that illustrated or described here.

[0014] Detectors can be divided into envelope detectors and RMS detectors. Figure 1 Figure 2 shows the detection results of the envelope detector and the RMS detector for the same RF signal. Figure 1 As shown in the figure, the RF signal is a high-frequency sine wave whose amplitude / phase changes with time. The envelope detector will detect the envelope output of the input signal, which is usually its logarithmic value, that is, the output result 1 in the figure; the RMS detector will detect the root mean square value (or power value) of the input signal, that is, the output result 2 in the figure, and its output voltage does not change with the shape of the signal or the peak-to-average ratio, where the peak-to-average ratio refers to the peak-to-average power ratio (PAPR). Figure 1 As shown, for the signal value of the RF input signal, the amplitude of the high-frequency sinusoidal wave oscillation is not fixed, and the ratio of the power corresponding to the peak value to the power corresponding to the average value is the peak-to-average ratio.

[0015] For the RMS detector, its implementation is usually to perform three Root-Mean-Square operations on the signal, that is, the output voltage or current is: Formula (1) Where Y is the output voltage or current, X is the input voltage or current, and s is the slope.

[0016] Since the absolute value of the input signal may be small, usually in dBm units, for formula (1), the absolute value of the output signal Y is also small. For example, when the power of the input signal changes from -40dBm to -20dBm and s=1, the voltage corresponding to the output signal Y only changes from 2.24mV to 22.4mV. The absolute value and dynamic range are extremely small, which is not conducive to post-stage detection. Therefore, the RMS detector usually processes the result Y into a logarithmic value before outputting it: Formula (2) Where Z is the actual output current or voltage of the converted detector, k is the logarithmic slope, b is the logarithmic intercept, k' is the logarithmic slope after the combined square root operation, and b' is the logarithmic intercept after the combined linear slope s. The logarithm in the formula can also be other bases as long as there is a logarithmic relationship.

[0017] When the latter stage adds the function of converting to logarithm, the Root operation in RMS can be directly removed from the logarithm and become part of the slope, without the need to use hardware to implement it. The slope s in the previous text will be added to the logarithmic intercept here to form a new logarithmic intercept, which will no longer affect the slope of the output signal Z. The following descriptions are all based on this.

[0018] Since the RMS detector performs an averaging operation on the input signal, no matter how high the frequency of the input signal is, after averaging over a certain time window, the output signal will be close to DC and will only change slowly with the change of the mean value of the input signal.

[0019] Common RMS detector architectures include Figure 2 As shown in (a) or (b), it includes a square unit, a mirror square unit, an operation module, an average capacitor, a logarithmic converter and a driver. The structure of the square unit and the mirror square unit is exactly the same. The square unit receives a bias voltage DC Bias (used to drive the square unit to work) and an RF input signal RF IN The mixed signal formed, the mirror square unit receives the bias voltage DC Bias or the bias voltage DC Bias + feedback voltage (Feedback, FD), and the feedback voltage Feedback can be generated by the operation module or the driver. The output signals of the square unit and the mirror square unit are subtracted through the operation module, and then the average operation is realized through the average capacitor, and then the logarithmic conversion is realized through the logarithmic converter, and finally the driver is driven to enhance, and finally the detection result signal OUT is output, which is equivalent to Figure 1 The logarithmic RMS value (or power value) is output in . The location of the average capacitor can be as follows Figure 2 As shown in (a) in the figure, it can be placed at the output end of the operation module, or it can be placed at the output end of the operation module. Figure 2 As shown in (b) in the figure, it is placed at the output end of the square unit.

[0020] That is to say, Figure 2 In the RMS detector shown, the averaging capacitor is used to average the signal. Since the square unit has its own direct current (DC) working current / voltage, this part of the current / voltage needs to be subtracted, so an additional square unit (i.e., mirror square unit) is used to provide the same bias for accurate subtraction of the corresponding DC voltage / current. Its input can also be a feedback voltage for square root operation. The average position can be adjusted as needed.

[0021] In an RMS detector, squaring and averaging operations are usually implemented together. Figure 3 This is an example of a method for implementing a square unit. The dashed box contains two identical square units. Square unit 1 includes bipolar junction transistors (BJT, or triode) Q11~Q14, which are used to receive RF input. Square unit 2 is a mirror square unit, including BJT Q15~Q18, which is used to receive a reference voltage (or the same bias voltage as the RF branch). Its main function is to subtract the DC output voltage of the square unit, and sometimes it can also realize the square root function.

[0022] The two square units need a certain static DC current to work properly. Ideally, when there is no RF input, if the bias voltage of the two square units is the same, their DC bias current will also be the same, that is, the output current I11 of square unit 1 and the output current I12 of square unit 2 are the same. The same voltage is generated on the same resistors R11 and R12 ( Figure 3 Node 1 and node 2 in the figure are subtracted to produce a zero output. When an RF signal is input, an additional square current will be generated in the branch where the current I11 is located, which will be averaged by capacitors C11 and C12, and an additional square average voltage will be generated based on the DC voltage on resistor R11. Since the DC currents are exactly the same and are completely subtracted, the differential voltage output by the two square units is the precise square voltage.

[0023] However, in actual circuit manufacturing, even if the bias and design dimensions of the two square units are exactly the same, due to the mismatch of BJT or load resistors R11 and R12, the DC currents of the two square units are not completely equal, and the DC voltages at the two differential ends cannot be accurately subtracted. If the remaining term is set to the mismatch voltage Vos, equation (2) can be written as the following equation (3): Formula (3) Vos will enter the logarithm, add to the square average term, and cannot be taken out of the logarithm. When the input power is small, its square average term is also small, and may even be smaller than Vos, then the useful signal The mismatch voltage Vos will be covered and cannot be detected. If the mismatch voltage / current is high, it will significantly affect the lower limit of the input dynamic range, resulting in a loss of dynamic range.

[0024] The mismatch voltage / current is also at DC, and the square unit mismatch current achieved by devices such as BJT / Heterojunction Bipolar Transistor (HBT) may vary with temperature.

[0025] Due to the principle limitation of the square unit, the dynamic range of its output signal is strongly correlated with the dynamic range of the input signal. If you need to detect an input signal in the range of 60dBm, the output voltage / current will also change by 120dB, that is, 1 million times. If the upper limit of the output dynamic range is set to 1V, its lower limit will reach 1μV. If the mismatch is not additionally processed, it may reach several mV, which is much larger than the lower limit of the output voltage. If you want to increase the lower limit voltage higher than the square unit mismatch during design, such as increasing it to 10mV, the upper limit will increase to 10000V accordingly, which is obviously impossible to achieve.

[0026] The mismatch voltage Vos or mismatch current Ios is located in DC, and the useful signal It is also at DC or very low frequency, so the mismatch voltage / current cannot be suppressed by traditional DC offset elimination circuit (DCOC) feedback, capacitor isolation and other methods, because these methods will also suppress the useful signal inhibition.

[0027] Currently, the following techniques exist to deal with the square cell mismatch problem: The front RF analog variable gain amplifier (VGA) feeds the output of the square unit back to the control end of the VGA, converts the logarithm through the VGA, and compresses the input power range of the square unit, thereby reducing the demand for the dynamic range of the square unit. This solution does not reduce the mismatch, but only adjusts the input range of the square unit to the linear range of the square unit. However, due to the need to use RF VGA, the power consumption is extremely high, and the overall linear range of the system will be limited by the RF VGA.

[0028] The chopper chops the mismatch voltage or current to high frequency through the switches before and after the square unit, and filters out the mismatch at high frequency when averaging in the later stage, thereby achieving automatic mismatch suppression. However, since the chopper usually uses a metal-oxide-semiconductor field-effect transistor (MOSFET, MOS) or BJT switch, the parasitic capacitance of the switch may cause input RF leakage and affect input matching on the one hand, and may cause the driving clock of the chopper switch to feed through to the RF path on the other hand, forming a background noise, which in turn limits the dynamic range of the square unit. In addition, the driving clock of the chopper also requires additional power consumption.

[0029] For ease of understanding, the square circuit is abstracted as Figure 4 ,like Figure 4 As shown, Figure 4 The input impedance of the device in the bold solid frame in (a) is equivalent to Figure 4 The resistor RL1 and the resistor RL2 + capacitor CM are shown in (b). The two square units have the same bias Bias, where the first end of the resistor RL1, the first end of the resistor RL2, and the first end of the capacitor CM are all connected to the power supply; the second end of the resistor RL1 and the second end of the capacitor CM are all connected to the output end of the square unit; the second end of the resistor RL2 is connected to the output end of the mirror square unit. The square unit inputs the RF signal RF IN , the mirror square unit inputs an optional feedback signal FB (for square root operation). Both have the same load, abstracted as resistors RL1 and RL2, and input RF signal RF IN The square unit also has a capacitive load CM for filtering, that is, taking the average value. Due to resistors RL1 and RL2, the current output of the two square units is converted into a voltage VOUT output. When there is no RF signal input, VOUT = 0 in the ideal case. However, due to manufacturing errors, VOUT may not be zero, that is, there is a mismatch.

[0030] Based on this, an embodiment of the present disclosure provides a self-adjustable squaring circuit, which collects the output voltage of the squaring unit and the output voltage of the mirror squaring unit through a voltage acquisition module. When there is a mismatch between the first signal and the second signal output by the squaring unit and the mirror squaring unit, it can be reflected by the voltage difference between the output terminals of the squaring unit and the mirror squaring unit; the control module can determine a target control signal for compensating for the mismatch based on the voltage difference; the current adjustment module receives the target control signal and generates a compensation current, thereby eliminating (or at least partially eliminating) the inaccuracy caused by the mismatch between the squaring unit and the mirror squaring unit, and effectively expanding the dynamic range of the squaring circuit.

[0031] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0032] In one embodiment of the present disclosure, Figure 5 (or Figure 6 or Figure 7 ), the self-adjustable squaring circuit 10 (hereinafter referred to as the squaring circuit 10) includes a squaring unit 101, a mirror squaring unit 102, a current adjustment module 103, a voltage acquisition module 104 and a control module 105 (or controller).

[0033] It should be noted that in the embodiment of the present disclosure, the voltage acquisition module 104 and / or the control module 105 can be a part of the square circuit 10, or can be an off-chip device independent of the square circuit 10, and there is no specific limitation on this. In the accompanying drawings, the voltage acquisition module 104 and the control module 105 are included in the square circuit 10 as an example.

[0034] The square unit 101 is used to square the received AC signal. The square unit 101 receives a bias voltage and an AC signal. The output end of the square unit 101 outputs a first signal. A mirror image square unit 102 is used to receive a bias voltage. The structure of the mirror image square unit 102 is consistent with that of the square unit 101. The output end of the mirror image square unit 102 outputs a second signal. The current adjustment module 103 is used to receive the target control signal and generate a compensation current, the magnitude of which is related to the target control signal. The output end of the current adjustment module 103 is connected to the output end of the square unit 101 or the mirror square unit 102, and is used to compensate for the difference between the first signal and the second signal; wherein the target control signal is generated by the control module 105 based on the voltage collected by the voltage collection module 104; The voltage acquisition module 104 is connected to the output terminals of the square unit 101 and the mirror square unit 102 respectively, and is used to acquire the output terminal voltage of the square unit 101 and the output terminal voltage of the mirror square unit 102; The control module 105 is connected to the output end of the voltage acquisition module 104 and is used to obtain the voltage difference between the output ends of the square unit 101 and the mirror square unit 102. The voltage difference is used to obtain a target control signal, and the target control signal is used to control the degree of current compensation for the output of the square unit 101 and / or the mirror square unit 102.

[0035] It should be noted that if Figure 5As shown, the signal at the output end of the square unit 101 is recorded as the first signal, and the signal at the output end of the mirror square unit 102 is recorded as the second signal. The square unit 101 and the mirror square unit 102 usually output current signals, which are converted into voltage signals through equivalent input impedance here, and the first signal minus the second signal is the output signal. In the description of the embodiments of the present disclosure, only the first signal and the second signal are used to represent the output end signals of the square unit 101 and the mirror square unit 102, and the voltage value and current value corresponding to the first signal and the second signal will be involved later. The voltage acquisition module 104 can collect the voltage values ​​corresponding to the first signal and the second signal, and the current adjustment module 103 performs current compensation on the output (i.e., the first signal and the second signal) of the square unit 101 and / or the mirror square unit 102 based on the control signal.

[0036] The mirror square unit 102 can also receive a feedback signal ( Figures 5 to 7 not shown).

[0037] It should also be noted that the square unit 101 and the mirror square unit 102 have exactly the same circuit structure (refer to the aforementioned Figure 3 , but not limited to the above Figure 3 In the structure shown in the figure, in the absence of RF input (i.e., no AC signal input), if there is no mismatch, the voltages corresponding to the first signal and the second signal have exactly the same voltage value (at this time, the voltage value of the output signal is 0). Due to the existence of the mismatch, there will be a voltage difference between the voltages corresponding to the first signal and the second signal (i.e., the voltage value of the output signal). The voltage difference represents the degree of the mismatch. Based on the voltage difference, the control signal can be determined, and then under the control of the control signal, a compensation current is generated to compensate for the mismatch.

[0038] It should also be noted that if Figure 5 As shown, the output end of the current adjustment module 103 is connected to the output end of the mirror square unit 102, that is, only the second signal is current compensated; or Figure 6 As shown, the output end of the current adjustment module 103 is connected to the output end of the square unit 101, that is, only the first signal is current compensated; or Figure 7 As shown, the current adjustment module 103 includes two output terminals, which are respectively connected to the output terminals of the square unit 101 and the mirror square unit 102, and the corresponding compensation current includes a first compensation current and a second compensation current, and current compensation is performed on the first signal and the second signal at the same time. Finally, when there is no AC signal input, the voltage values ​​corresponding to the first signal and the second signal are basically the same (a certain error range is allowed).

[0039] In the following, each component module and working process of the square circuit 10 is described in more detail in combination with the specific circuit structure.

[0040] In some embodiments, Figure 8 As shown, the current adjustment module 103 includes: The digital-to-analog converter 1031 is used to receive the control signal, perform digital-to-analog conversion on the control signal, and obtain a current control signal; wherein the control signal may be a digital signal, and the current control signal may be an analog signal, for example, the current control signal is a voltage analog signal; the control signal and the current control signal have a corresponding relationship, and when the control signal is different, the current control signal is different; The first current source I1 is used to receive a current control signal and generate a compensation current based on the current control signal, wherein the compensation current and the current control signal have a corresponding relationship, and when the current control signal is different, the compensation current is different.

[0041] It should be noted that the control signal is a target control signal or an initial control signal used when determining the target control signal. Figures 5 to 7 ) are referred to as control signals for explanation.

[0042] It should also be noted that in the embodiments of the present disclosure, the digital-to-analog converter is sometimes referred to as DAC (Digital to Analog Converter). Figure 8 As shown, taking the current compensation for the output of the mirror square unit 102 as an example, the output end of the first current source I1 is connected to the output end of the mirror square unit 102 to provide the compensation current to the output end of the mirror square unit 102, thereby realizing the current compensation for the second signal; or, if the output of the square unit 101 is current compensated, the output end of the first current source I1 is connected to the output end of the square unit 101 to provide the compensation current to the output end of the square unit 101, thereby realizing the current compensation for the first signal.

[0043] Further, such as Fig. 9 As shown, in some embodiments, the square circuit 10 may further include a third current source I3; the output end of the current adjustment module 103 is connected to the output end of the mirror square unit 102, and the output end of the third current source I3 is connected to the output end of the square unit 101; The third current source I3 is used to provide a fixed current to provide a fixed current to the output terminal of the square unit 101 .

[0044] It should be noted that, in other examples, the first current source I1 may be connected to the output end of the square unit 101 , and the third current source I3 may be connected to the output end of the mirror square unit 102 .

[0045] It should also be noted that the third current source I3 is an optional fixed current source, which provides a fixed current (that is, the current value is fixed) and is not controlled by the control signal output by the control module 105. The magnitude of the fixed current can be the magnitude of the current of the first current source I1 when the default control signal (that is, the control signal is an uncalibrated default value), that is, the fixed current of the third current source I3 provides a reference, so that the compensation current can be increased or decreased based on it, thereby realizing the "bidirectional" adjustment capability. For example, when there is no deviation between the currents output by the squaring unit 101 and the mirror squaring unit 102, the first current source I1 is in the default control signal, and the currents output by the first current source I1 and the third current source I3 are equal; when the current output by the squaring unit 101 is greater than the current output by the mirror squaring unit 102, the compensation current output by the first current source I1 can be increased through the control signal; when the current output by the squaring unit 101 is less than the current output by the mirror squaring unit 102, the compensation current output by the first current source I1 can be reduced through the control signal; therefore, compared with the compensation current under the default control signal, the control signal can control the increase or decrease of the compensation current to achieve bidirectional compensation.

[0046] In some embodiments, Fig.10 As shown, taking the square circuit 10 including two current adjustment modules 103 as an example, the two current adjustment modules 103 are respectively: a current adjustment module 103-1 connected to the output end of the square unit 101 and a current adjustment module 103-2 connected to the output end of the mirror square unit 102. Correspondingly, the control signal output by the control module 105 includes a first control signal and a second control signal. The current adjustment module 103-1 receives the first control signal, and based on the control of the first control signal, generates a first compensation current to perform current compensation on the output of the square unit 101, and the current adjustment module 103-2 receives the second control signal, and based on the control of the second control signal, generates a second compensation current to perform current compensation on the output of the mirror square unit 102.

[0047] Here, the current adjustment module 103-1 and the current adjustment module 103-2 may both include a digital-to-analog converter 1031 and a first current source I1. If there is a mismatch, the compensation currents generated by the two current sources are different in magnitude, that is, the compensation degrees of the two are different, thereby improving the mismatch.

[0048] It should also be noted that the compensation method is different when the first current source I1 is connected to a different position. For example, the mismatch of the circuit is: when there is no AC signal input, the voltage value corresponding to the first signal is greater than the voltage value corresponding to the second signal, and the voltage division of the resistor RL1 is less than the voltage division of the resistor RL2, that is, the current flowing through the resistor RL1 is less than the current flowing through the resistor RL2. Therefore, the compensation method can be: reduce Fig.10The magnitude of the second compensation current is increased to reduce the voltage division of the resistor RL2, thereby increasing the voltage value of the second signal; or increasing Fig.10 The magnitude of the first compensation current is adjusted to increase the voltage division of the resistor RL1, thereby reducing the voltage value of the first signal; the ultimate goal is to make the voltage value corresponding to the first signal consistent with the voltage value corresponding to the second signal, thereby achieving compensation.

[0049] In some embodiments, Fig.11 As shown, the first current source I1 includes an operational amplifier P1, a transistor Q1 and a resistor R1; wherein the non-inverting input terminal (+) of the operational amplifier P1 is connected to the output terminal of the digital-to-analog converter 1031 to receive a current control signal, the output terminal of the operational amplifier P1 is connected to the base of the transistor Q1, the emitter of the transistor Q1, the inverting input terminal (-) of the operational amplifier P1, and the first terminal of the resistor R1 are connected, the second terminal of the resistor R1 is grounded, and the collector of the transistor Q1 outputs a compensation current. Here, the transistor Q1 can be specifically a BJT or an NMOS tube, which is not specifically limited.

[0050] It should be noted that the control signal can be a multi-bit digital signal. Fig.11 The structure shown can convert the analog voltage (ie, the current control signal) output by the digital-to-analog converter 1031 into a compensation current, and the current value of the compensation current is the ratio of the voltage value of the current control signal to the resistance value of the resistor R1.

[0051] In some embodiments, Fig.12 As shown, the current adjustment module 103 includes: A voltage providing unit 1032 is used to provide a first voltage V1, and the voltage value of the first voltage V1 may be a fixed value; The resistance adjustment unit 1033 is connected to the first voltage V1 and receives a control signal, changes the resistance value based on the control signal, and outputs a compensation current, where the compensation current changes with the control signal.

[0052] It should be noted that if Fig.12As shown, the voltage providing unit 1032 may include an operational amplifier P2 and a transistor Q2, and the resistance adjusting unit 1033 includes a plurality of resistors connected in series, the plurality of resistors form a resistor string, and a switch transistor M1 is connected in parallel at both ends of the remaining resistors except the resistor R1, the plurality of switch transistors M1 are connected in series, the control signal is a multi-bit digital signal, and the control end of each switch transistor M1 receives a one-bit control signal. Among them, the transistor Q2 may be a BJT, and the switch transistor M1 may be a MOS tube. The positive input terminal (+) of the operational amplifier P2 receives a fixed voltage VB, and the fixed voltage VB does not change with temperature and power supply; the output terminal of the operational amplifier P2 is connected to the base of the transistor Q2; the emitter of the transistor Q2 is connected to the first end of the resistor string, and is connected to the inverting input terminal (-) of the operational amplifier P2, and the voltage at the connection node is the first voltage V1; the second end of the resistor string is grounded.

[0053] exist Fig.12 In the resistor R2 <1> ~R2 <4> The two ends of these four resistors are connected in parallel with the switching transistor M1 <1> ~M1 <4> For example, when the parallel switch transistor M1 is turned on, the corresponding resistor R2 is not connected to the resistor string for voltage division, so that the conduction of each switch transistor M1 is controlled based on the control signal, so as to change the resistance value of the resistor string, adjust the voltage division, and finally adjust the compensation current of the collector output end of the transistor Q2. It can be understood that compared with Fig.11 ,exist Fig.12 In this case, the D / A converter is combined with the circuit generating the compensation current, and there is no independent D / A converter. The compensation current = VB / (R1+resistance not short-circuited by the switch transistor). The BJT can also be replaced by an NMOS tube, and each switch transistor can be Fig.12 The shown one is an NMOS tube, but it can also be a CMOS transmission gate, etc., and the control signal is set accordingly.

[0054] For the third current source I3 (fixed current source), Fig.11 The digital-to-analog converter 1031 in the embodiment is removed, and a fixed control signal is directly inputted, and the value of the control signal is fixed, so that it outputs a fixed current; or Fig.12 By removing the switch transistor M1 in the circuit and directly designing a fixed resistor R1, a fixed current can be achieved.

[0055] It should also be noted that the resistance adjustment unit 1033 can also be multiple resistors connected in parallel, and a switching transistor is connected in series between some or all of the resistors and the first voltage V1 to achieve controllable resistance. Alternatively, the resistance adjustment unit can also be a voltage-controlled MOS, which controls the resistance based on voltage, and there is no specific limitation on this.

[0056] here, Fig.11 and Fig.12The circuits shown can all achieve current extraction, that is, the direction of the compensation current flows from the collector of the transistor Q1 / Q2 to the ground, and the collector of the transistor Q1 / Q2 is connected to the output end of the mirror square unit 102, so it is equivalent to current extraction. In the disclosed embodiment, the collector of the transistor Q1 / Q2 can also be connected to the input end of the PMOS current mirror, and the output end of the PMOS current mirror is connected to the output end of the mirror square unit 102. After the current mirror of the PMOS current mirror, the output current flows out of the PMOS current mirror, which is equivalent to current injection. For current injection, such as Fig.13 As shown, in some embodiments, the current adjustment module 103 includes: A second current source I2 receives a second voltage and generates a first current, wherein the second voltage may be a fixed voltage and the first current may be a fixed current; The current control circuit 1034 receives the first current and outputs a compensation current. The current control circuit 1034 adjusts the magnitude of the compensation current based on the control signal.

[0057] It should be noted that if Fig.13 As shown, the second current source I2 may include an operational amplifier P3 and a transistor Q3, and may also include a resistor R3; the current control circuit 1034 includes a current mirror structure and a plurality of transistors, the current mirror structure includes an input transistor M21 and an output transistor M22, the input transistor M21 receives the first current, and the output transistor M22 is used to proportionally replicate the first current to output a compensation current; a plurality of transistors M23~M2n, the control ends of the transistors M23~M2n are respectively connected to a switch, the control ends of the switches are used to receive control signals, the control signals can control the control ends of the transistors M23~M2n to connect to the power supply VDD or to the control end of the transistor M22, thereby realizing the conduction or disconnection of the transistors M23~M2n, so as to adjust the equivalent size of the output transistor M22 and adjust the size of the compensation current, and n is a positive integer greater than 2.

[0058] The non-inverting input terminal (+) of the operational amplifier P3 receives the second voltage, the output terminal of the operational amplifier P3 is connected to the base of the transistor Q3, and the emitter of the transistor Q3 is connected to the inverting input terminal (-) of the operational amplifier P3; the emitter of the transistor Q3 is grounded through the resistor R3; the collector of the transistor Q3 is connected to the first terminal (e.g., drain) and the control terminal (gate) of the transistor M21, and is connected to the control terminal of the transistor M22, and outputs the first current; the second terminals (e.g., sources) of the transistors M21~M2n are all connected to the power supply VDD; the first terminals of the transistors M22~M2n are all connected together for outputting the compensation current.

[0059] The control signal is a multi-bit signal, each bit corresponds to one of the transistors M23 to M2n, and is used to control the control end of the corresponding transistor to selectively connect to the power supply VDD or the control end of the transistor M21 ( Fig.13 The control signal is not shown in the figure). For example, when the control signal of the corresponding bit is a high-level logic 1, it is connected to the power supply VDD, and when the control signal of the corresponding bit is a low-level logic 0, it is connected to the control end of the transistor M21; or vice versa, which is not specifically limited. Among them, the transistors M21~M2n can all be PMOS tubes, whose control end is the gate, one of the first end and the second end is the source, and the other is the drain; the transistor Q3 can be a BJT.

[0060] In this way, the connection positions of the control terminals of the transistors M23 - M2n are controlled by the control signal, thereby controlling the magnitude of the output compensation current, thereby improving the mismatch of the square circuit 10 .

[0061] For the voltage acquisition module 104: In some embodiments, Fig.14 As shown, the voltage acquisition module 104 includes a first analog-to-digital converter 1041 and a switch unit SW; One end of the switch unit SW is connected to the first analog-to-digital converter 1041, and the other end is selectively connected to the output end of the square unit 101 or the output end of the mirror square unit 102; The first analog-to-digital converter 1041 is used to perform analog-to-digital conversion on the voltage at the output end of the square unit 101 or the mirror square unit 102 , and output the converted digital signal to the control module 105 .

[0062] It should be noted that if Fig.14 As shown, the voltage acquisition module 104 can acquire the voltage values ​​corresponding to the first signal and the second signal through an analog to digital converter (ADC), that is, the first analog to digital converter 1041, also recorded as ADC1. Specifically, the switch unit SW can be a single-pole double-throw switch, which includes three ports: A, B, and C. Among them, port A is connected to the output end of the square unit 101, port B is connected to the output end of the mirror square unit 102, and port C is connected to the input end of the first analog to digital converter 1041.

[0063] The control module 105 can also control the connection status of the switch unit SW. When there is no need to collect the voltage difference, port C is not connected to either port A or port B; when it is necessary to collect the voltage difference, the control module 105 controls port C to be connected to one of port A and port B respectively; for example, the control module 105 first controls port C to be connected to port A, so that the first analog-to-digital converter 1041 collects the analog voltage of the first signal, converts it into a digital signal and sends it to the control module 105, and then the control module 105 controls port C to be connected to port B, so that the first analog-to-digital converter 1041 collects the analog voltage of the second signal, converts it into a digital signal and sends it to the control module 105, and the control module 105 calculates the difference between the two received voltage values ​​to obtain the voltage difference.

[0064] In some embodiments, Fig.15 As shown, the voltage acquisition module 104 includes a second analog-to-digital converter 1042 and a third analog-to-digital converter 1043; The second analog-to-digital converter 1042 is connected to the output end of the square unit 101, performs analog-to-digital conversion on the voltage at the output end of the square unit 101, and outputs the analog-to-digital conversion to the control module 105; The third analog-to-digital converter 1043 is connected to the output end of the mirror square unit 102 , performs analog-to-digital conversion on the voltage at the output end of the mirror square unit 102 , and outputs the converted voltage to the control module 105 .

[0065] It should be noted that the embodiment of the present disclosure may not include a switch unit SW, but may use two analog-to-digital converters to respectively collect the voltage values ​​corresponding to the first signal and the second signal. Fig.15 As shown, the second analog-to-digital converter 1042 (also denoted as ADC2) collects the voltage value of the first signal and sends it to the control module 105, and the third analog-to-digital converter 1043 (also denoted as ADC3) collects the voltage value of the second signal and sends it to the control module 105. The control module 105 calculates the difference between the two received voltage values ​​to obtain the voltage difference.

[0066] In combination with the above-mentioned figures and related descriptions, it can be seen that in the embodiment provided by the present disclosure, the voltage acquisition module 104 is used to collect the voltage values ​​corresponding to the first signal and the second signal and send them to the control module 105. The control module 105 is used to output the control signal to the current adjustment module 103. The current adjustment module 103 performs current compensation on the first signal and / or the second signal based on the control signal to improve the mismatch. Each time the square circuit 10 is powered on, the control module 105 controls the circuit to perform a calibration operation to determine the specific value (or state) of the target control signal currently output.

[0067] In the embodiment of the present disclosure, when the current adjustment module 103 outputs the compensation current based on the target control signal, the difference between the first signal and the second signal is minimal, zero or substantially zero.

[0068] It should be noted that the difference between the first signal and the second signal here represents the difference between the corresponding current or voltage. As mentioned above, the ideal situation is that when there is no AC signal input, the first signal and the second signal are exactly the same and there is no difference. Here, when there is no AC signal input, the current adjustment module 103 outputs a compensation current based on the target control signal to compensate the first signal and / or the second signal, so that the difference between the first signal and the second signal is minimized (i.e., the lowest difference that can be achieved), zero (ideally, the difference is completely eliminated), or basically zero (in practice, it is difficult to completely eliminate the difference, and basically zero can be considered to meet a certain error range, for example, the voltage difference between the first signal and the second signal is less than a threshold, for example, less than 1%~5% of the swing of the AC signal, or the absolute value of the voltage difference between the first signal and the second signal is less than 1mV~10mV. This requirement is met and the voltage difference / current difference can be ignored).

[0069] In this solution, a self-adjustment method of the square circuit 10 is also provided, including: Acquire a voltage difference, wherein the voltage difference may be acquired by the voltage acquisition module 104; According to the voltage difference, a target control signal is determined and output to the current adjustment module 103 to compensate for the difference between the first signal and the second signal, thereby eliminating (or at least partially eliminating) the inaccuracy caused by the mismatch between the square unit 101 and the mirror square unit 102 .

[0070] The self-adjusting method can be executed by the control module 105, and the control module 105 can be implemented by software or hardware. In some embodiments, the control module 105 includes a processor and a memory; the processor is used to execute instructions stored in the memory so that the control module 105 executes the aforementioned self-adjusting method. It should be noted that the control module 105 can be a digital circuit, and can also be composed of a logic circuit, which is not specifically limited.

[0071] It should also be noted that the process of determining the target control signal based on the voltage difference can be called an operation of determining the target control signal or a self-adjustment operation (an operation of automatically adjusting the compensation current). Specifically, it can include the following two types: First self-regulating operation: When there is no AC signal input, an initial control signal is output to the current adjustment module 103; Obtaining the voltage difference; By traversing different initial control signals, determining the initial control signal corresponding to the minimum voltage difference as the target control signal; The target control signal is output to the current adjustment module 103 .

[0072] Second self-adjustment operation: The control module 105 performs a table lookup based on the voltage difference to obtain a target control signal. This includes: Get the voltage difference; The target control signal is determined by searching in the storage module 106 according to the voltage difference, and the corresponding target control signal is output to the current adjustment module 103 .

[0073] In the embodiment of the present disclosure, the first self-adjustment operation and the second self-adjustment operation can be performed by the control module 105. The embodiment of the present disclosure also provides a corresponding specific operation method (or self-adjustment method), which will be described below.

[0074] For the first self-regulation operation, the control module 105 is connected to the output end of the voltage acquisition module 104; the operation of determining the target control signal performed by the control module 105 includes: When there is no AC signal input, the control module 105 outputs an initial control signal to the current adjustment module 103, and the initial control signal is a preset control signal; the initial control signal is output to the current adjustment module 103; the current adjustment module 103 outputs a compensation current based on the initial control signal; the voltage acquisition module 104 acquires the output terminal voltage of the square unit 101 and the output terminal voltage of the mirror square unit 102; the control module 105 obtains the voltage difference between the output terminals of the square unit 101 and the mirror square unit 102; in this way, the voltage difference corresponding to the first signal and the second signal under the control of a certain initial control signal is obtained; The control module 105 traverses different initial control signals and obtains all voltage differences; that is, in the absence of an AC signal input, current compensation is performed once using each initial control signal to obtain the voltage difference corresponding to each initial control signal; The control module 105 compares all the voltage differences. The smaller the voltage difference, the closer the first signal output by the square unit 101 and the second signal output by the mirror square unit 102 are, and the better the process deviation can be compensated. The control module 105 determines the initial control signal corresponding to the smallest voltage difference as the target control signal; The control module 105 outputs the target control signal to the current adjustment module 103, and the current adjustment module 103 can generate a compensation current of appropriate size, and at this time, the compensation current can well compensate for the process deviation. When the subsequent AC signal is input, the current adjustment module 103 can continue to provide a compensation current of appropriate size.

[0075] It should be noted that the initial control signal is used to traverse the control signals that can be output by the control module 105 to find the most suitable control signal in the current state as the target control signal. Under the control of the target control signal, the compensation current output by the current adjustment module 103 can make the voltage difference between the first signal and the second signal as small as possible (approaching 0) when there is no AC signal input. Assuming that the control module 105 can output 100 different initial control signals (the control signal that has not yet been determined as the target control signal is recorded as the initial control signal), when there is no AC signal input, the 100 initial control signals are used to control the current adjustment module 103 respectively, and the compensation current is output to compensate the first signal and / or the second signal. The voltage acquisition module 104 collects the voltage values ​​corresponding to the compensated first signal and the second signal and sends them to the control module 105, so that the control module 105 will calculate 100 voltage differences (taking the absolute value), and determine the initial control signal corresponding to the smallest voltage difference as the target control signal.

[0076] For the specific implementation process of the first self-adjusting operation, Fig.14 The circuit shown is calibrated as an example. Fig.16 As shown, the first self-adjustment operation may specifically include: S601: The control module 105 controls the switch unit SW to connect the port C to the port A.

[0077] It should be noted that, before step S601, a step of resetting the initial control signal and outputting an initial control signal to the current adjustment module 103 may be included. The initial control signal is output to the current adjustment module 103 to be used for testing to obtain a target control signal.

[0078] It should be noted that the control signal may be a multi-bit signal. At the beginning of the test, the initial control signal needs to be reset, which is equivalent to initialization. The reset initial control signal may be a default initial value as a basis for comparison.

[0079] Alternatively, the reset initial control signal is the first initial control signal traversed. For example, assuming that the control module 105 can output 100 initial control signals, C1, C2, C3, ..., C100, during the test process, it is necessary to traverse these 100 initial control signals, and the initial control signal that minimizes the voltage difference between the output ends of the square unit 101 and the mirror square unit 102 when there is no AC signal input is determined as the target control signal. Any one of the 100 initial control signals can be determined as the reset initial control signal. For example, the traversal can be performed in the order of C1 to C100, and C1 can be first determined as the initial control signal reset in this step, or in other orders, without limitation.

[0080] S602: The control module 105 controls ADC1 to sample, reads the sampling result, and records it as VA.

[0081] S603: The control module 105 controls the switch unit SW to connect port C to port B.

[0082] S604: The control module 105 controls ADC1 to sample, reads the sampling result, and records it as VB.

[0083] S605: The control module 105 calculates the voltage difference |VA-VB|.

[0084] S606: The control module 105 determines whether the voltage difference is less than the optimal voltage difference.

[0085] The optimal voltage difference is the currently recorded minimum voltage difference; if the optimal voltage difference has not been recorded before, the voltage difference calculated in step S605 is used as the optimal voltage difference.

[0086] If the judgment result is yes, execute step S607; otherwise, execute step S608.

[0087] S607: The control module 105 records the current initial control signal and voltage difference as the target control signal and the optimal voltage difference respectively.

[0088] S608: The control module 105 outputs an initial control signal to the DAC in steps.

[0089] It should be noted that the step-by-step increase method is taken as an example here, but is not limited to this.

[0090] S609: The control module 105 determines whether the initial control signal exceeds the maximum value.

[0091] If the judgment result is yes, execute step S6010; otherwise, execute step S601.

[0092] S6010: The control module 105 latches the target control signal to the DAC.

[0093] After the DAC latches the target control signal, the current adjustment module 103 can continue to provide a compensation current of appropriate magnitude during the power-on duration to compensate for the mismatch between the square unit 101 and the mirror square unit 102 .

[0094] In short, the control module 105 searches for the target control signal (or the optimal compensation control code) when the voltage difference is closest to 0 by scanning the initial control signal (or the compensation circuit control code). The initial control signal scans and increases from 0. Under each initial control signal, the control module 105 first controls the switch unit SW (single-pole double-throw switch) and the digital-to-analog converter 1031 (ADC) to sample the voltages of port A and port B respectively, and calculate the absolute value of the voltage difference under the current initial control signal. If the current absolute value of the voltage difference is less than the optimal voltage difference, the current absolute value of the voltage difference is recorded as the optimal voltage difference, and the current initial control signal is recorded as the target control signal. Then, the initial control signal is changed, and the above process is re-executed until the initial control signal reaches the upper limit. The target control signal finally obtained is latched to the DAC, and this value will not change even if the process of the control module 105 ends until the power is turned off.

[0095] After the control module 105 is reset, it will return to the starting state and re-execute this process. In some embodiments, the control module 105 is reset when it is powered on. Fig.14 or Fig.15 As shown, the square circuit 10 may further include: The trigger module 108 is used to receive a reset signal and / or an external sampling signal, and when either the reset signal or the external sampling signal is in an enabled state, output a trigger signal and send it to the control module 105; the trigger signal is used to trigger the control module 105 to perform a first self-adjustment operation (i.e., an operation to determine a target control signal).

[0096] It should be noted that, in the embodiment of the present disclosure, the first self-adjustment operation may be triggered by a trigger signal. For example, the trigger signal may be a reset signal or an external sampling signal. Fig.14 or Fig.15 As shown, the reset signal can be provided by the power-on reset circuit 109 (Power on Reset, POR), that is, when powered on, the power-on reset circuit 109 will generate a pulse signal to reset the control module 105, triggering the control module 105 to perform a calibration; or, the user can provide an external sampling signal to actively initiate a calibration operation. This self-adjustment operation triggered by power-on or actively controlled by the user is usually the first self-adjustment operation. In this way, a calibration is performed after each power-on to ensure that the square circuit 10 can operate in the minimum mismatch state after each power-on. Fig.14 or Fig.15As shown, the trigger module 108 can be implemented by an OR gate 1081, and the OR gate 1081 is used to combine two high-level pulses. If other types of reset signals are used, the combinational logic here can also be modified as needed. This process can be implemented by hardware or by software. For software implementation, additional execution units and memories are required for executing and storing code. It can be understood that when the self-regulating process is executed, there should be no AC signal input.

[0097] For the specific implementation process of the first self-adjusting operation, Fig.15 The circuit shown is calibrated as an example. Fig.17 As shown, the first self-adjustment operation may specifically include: S701: The control module 105 controls ADC2 to sample, reads the sampling result, and records it as VA.

[0098] It should be noted that, before step S701 , a step of resetting the initial control signal and outputting an initial control signal to the current adjustment module 103 may be further included.

[0099] S702: The control module 105 controls ADC3 to sample, reads the sampling result, and records it as VB.

[0100] S703: The control module 105 calculates the voltage difference |VA-VB|.

[0101] S704: The control module 105 determines whether the voltage difference is less than the optimal voltage difference.

[0102] If the judgment result is yes, execute step S705; otherwise, execute step S706.

[0103] S705: The control module 105 records the current initial control signal and voltage difference as the target control signal and the optimal voltage difference respectively.

[0104] S706: The control module 105 outputs an initial control signal to the DAC in steps.

[0105] It should be noted that the step-by-step increase method is still used as an example here, but it is not limited to this.

[0106] S707: The control module 105 determines whether the initial control signal exceeds the maximum value.

[0107] If the judgment result is yes, execute step S708; otherwise, execute step S701.

[0108] S707: The control module 105 latches the target control signal to the DAC.

[0109] After the DAC latches the target control signal, the current adjustment module 103 can continue to provide a compensation current of appropriate magnitude during the power-on duration to compensate for the mismatch between the square unit 101 and the mirror square unit 102 .

[0110] Fig.17 The circuit corresponding to the described implementation ( Fig.15 )compared to Fig.16 The circuit corresponding to the described implementation ( Fig.14 ) only lacks a single-pole double-throw switch, and uses two ADCs to collect the voltage at port A and port B respectively. Fig.16 The control module 105 of the described implementation is simple to implement, but due to the addition of an ADC, the chip area and power consumption are increased, and the controller logic is simplified accordingly.

[0111] In some embodiments, when the chip temperature changes significantly after power-on, a calibration is triggered to prevent the mismatch from changing with temperature. Fig.18 As shown, in some embodiments, the square circuit 10 may further include a temperature sensor 107 for determining the current temperature; the trigger module 108 is also connected to the temperature sensor 107 for generating a trigger signal when the difference between the current temperature and the last detected temperature is greater than a preset temperature threshold.

[0112] It should be noted that if the self-adjustment operation is triggered only once when the power is turned on, then as the working time increases, the device will heat up seriously, causing the temperature to rise, and the ambient temperature outside the chip will also change, and the circuit mismatch may also change at different temperatures. Therefore, the embodiment of the present disclosure can also perform the first self-adjustment operation only when the temperature changes greatly, so as to ensure that effective current compensation can be performed in time even if the mismatch changes.

[0113] For example, Fig.18 As shown, the trigger module 108 may also include a trigger signal generating module 1082, which is connected to the temperature sensor 107 and the OR gate 1081 respectively. The temperature sensor 107 collects the current temperature in real time or periodically and sends it to the trigger signal generating module 1082. The trigger signal generating module 1082 compares the current temperature value with the previous temperature value. If the difference between the two (taking the absolute value) is greater than the preset temperature threshold, it means that the two temperatures are very different and need to be re-self-adjusted. Then, a trigger signal is output, and the trigger control module 105 performs a first self-adjustment operation to ensure that the target control signal meets the current temperature requirement. At the same time, the trigger signal generating module 1082 can also receive the signal output by the OR gate 1081, and perform a trigger operation when either the reset signal or the external sampling signal is enabled.

[0114] In some embodiments, the trigger module 108 is not limited to Fig.18 As shown in the structure, for example, the OR gate 1081 may include three input terminals, which respectively receive a reset signal, an external sampling signal, and a temperature reset signal sent by the trigger signal generating module 1082. The temperature reset signal is used to indicate that the difference between the current temperature and the last detected temperature is greater than a preset temperature threshold.

[0115] The aforementioned temperature triggering, reset signal triggering, and external sampling signal triggering self-adjusting operation mode may adopt only one, two, or all three of them, and there is no specific limitation on this.

[0116] In some embodiments, Fig.18 As shown, a first switch S1 may be connected between the input end of the square unit 101 and the input end of the AC signal, and a second switch S2 may be connected between the input end of the mirror square unit 102 and the feedback signal input end. During the first self-adjustment operation, the control module 105 generates an input control signal in a non-enabled state, disconnecting both the first switch S1 and the second switch S2. At this time, the AC signal (RF signal) will not be sent to the square unit 101, which can avoid affecting the calibration, and the feedback signal will not be sent to the mirror square unit 102; after the calibration is completed, the control module 105 outputs an input control signal in an enabled state, turns on the first switch S1 and the second switch S2 again, and performs square calculation on the AC signal (RF signal).

[0117] In some embodiments, Fig.18 As shown, the control module 105 is also used to generate and output a calibration status indication signal during the operation of determining the target control signal (self-adjustment operation), and the calibration status indication signal is used to indicate that the output of the square circuit 10 is invalid.

[0118] To Fig.18 The square circuit 10 shown in the figure is calibrated as an example. Fig.19 As shown, the working process also corresponds to the aforementioned first self-adjusting operation, including: S801: the control module 105 outputs a calibration status indication signal in a first state (eg, a high level).

[0119] The calibration state indication signal is used to indicate that the current state is calibration state. The calibration state indication signal can be sent to a host computer (eg, a baseband). The host computer knows that the current state is calibration state according to the first state of the calibration state indication signal.

[0120] S802 : the control module 105 controls the switches S1 and S2 at the AC signal and the feedback signal to be disconnected, and the AC signal and the feedback signal will not be input into the square unit 101 and the mirror square unit 102 .

[0121] It should be noted that, before step S803 , a step of resetting the initial control signal and outputting an initial control signal to the current adjustment module 103 may be further included.

[0122] S803: The control module 105 controls ADC2 to sample, reads the sampling result, and records it as VA.

[0123] S804: The control module 105 controls ADC3 to sample, reads the sampling result, and records it as VB.

[0124] S805: The control module 105 calculates the voltage difference |VA-VB|.

[0125] S806: The control module 105 determines whether the voltage difference is less than the optimal voltage difference.

[0126] If the judgment result is yes, execute step S807; otherwise, execute step S808.

[0127] S807: The control module 105 records the current initial control signal and voltage difference as the target control signal and the optimal voltage difference respectively.

[0128] S808: The control module 105 outputs an initial control signal to the DAC in steps.

[0129] It should be noted that the step-by-step increase method is still used as an example here, but it is not limited to this.

[0130] S809: The control module 105 determines whether the initial control signal exceeds the maximum value.

[0131] If the judgment result is yes, execute step S8010; otherwise, execute step S801.

[0132] S8010: The control module 105 latches the target control signal to the DAC. After the DAC latches the target control signal, during the power-on duration, the current adjustment module 103 can continue to provide a compensation current of appropriate magnitude to compensate for the mismatch between the square unit 101 and the mirror square unit 102 .

[0133] S8011 : the control module 105 controls the switches S1 and S2 at the AC signal and the feedback signal to be closed, and the AC signal and the feedback signal can be input into the square unit 101 and the mirror square unit 102 .

[0134] S8012: The control module 105 outputs a calibration status indication signal in a first state (eg, low level) to notify the host computer that the calibration is completed.

[0135] In short, since calibration requires no RF signal input, in order to avoid frequent interruptions to the normal work flow, Fig.18In the circuit described above, an additional temperature sensor 107 is added, and calibration is performed only when the temperature changes significantly. At the same time, a trigger signal generating module 1082 is also added. The trigger signal (or RST signal) of the control module 105 is generated by two situations: 1. External input, i.e. generated by the power-on reset circuit 109 when powered on, or generated externally manually. When the trigger signal generating module 1082 receives such a signal, it will immediately output a trigger signal to the control module 105 to perform a first self-adjustment operation process. That is, this triggering mode is that the power-on reset circuit 109 automatically generates a reset signal to trigger a self-adjustment when powered on, or an external sampling signal requires a self-adjustment to be performed. Under this condition, the trigger signal generating module 1082 will query the current temperature output by the temperature sensor 107 once and record it.

[0136] 2. Internal generation of the trigger signal generating module 1082: The trigger signal generating module 1082 will periodically check the current temperature output by the temperature sensor 107. When the current temperature is significantly different from the temperature recorded last time, that is, the temperature has changed significantly, the trigger signal generating module 1082 will generate a trigger signal to the control module 105 to make it perform self-adjustment again. At the same time, the trigger signal generating module 1082 will record the current temperature.

[0137] Thus, this method performs self-adjustment only once when a significant temperature change occurs, in addition to power-on and external triggering, with fewer interruptions to the normal working process.

[0138] At the same time, when the calibration process starts, the control module 105 turns off the switch of the RF input and the optional feedback loop inside the control chip, thereby ensuring that there is no RF signal input and avoiding the influence of RF signal on calibration. Fig.18 As shown, the control module 105 also provides a calibration status indication signal to the outside, indicating that the calibration process is currently in progress and the detector output is invalid.

[0139] Since the first self-adjustment operation needs to be performed without an AC signal input, the compensation effect can be accurately determined based on the voltage difference. Therefore, in some embodiments, the control module 105 is also used to disconnect the AC signal input of the square unit 101 during the execution of the first self-adjustment operation to ensure a state without an AC signal input. At the same time, in the case of a generated feedback signal input, the feedback signal input of the mirror square unit 102 is also disconnected.

[0140] It should be noted that during the first self-adjustment operation, the square circuit 10 has no AC signal input, so its output signal is invalid. In order to avoid erroneous interference with the operation of subsequent circuits, during the self-adjustment period, a calibration status indication signal is output to the outside to indicate that the output of the square circuit 10 is invalid. For example, if the subsequent stage is a recording module, the output voltage at this moment can be not recorded according to the calibration status indication signal.

[0141] In some embodiments, Fig. 20 As shown, the squaring circuit 10 may further include a storage module 106 for storing the corresponding relationship between the voltage difference and the target control signal. The voltage difference is the voltage difference between the output ends of the squaring unit 101 and the mirror squaring unit 102 when there is no AC signal input. Because the storage module 106 stores the corresponding relationship between the voltage difference and the target control signal, during calibration, it is only necessary to obtain the voltage difference and search for the corresponding target control signal according to the voltage difference (which can be understood as a table lookup). There is no need to traverse the initial control signal during calibration, which can save calibration time.

[0142] It should be noted that, when the square circuit 10 includes two current adjustment modules 103, correspondingly, the corresponding relationships stored in the storage module 106 include two: a corresponding relationship between the voltage difference and the first control signal, and a corresponding relationship between the voltage difference and the second control signal. The control signal output by the control module 105 based on the voltage difference includes a first control signal and a second control signal.

[0143] In other examples, the storage module 106 may also be independent of the square circuit 10, or integrated in the control module 105, which is not specifically limited. The storage module 106 may be implemented in a variety of ways, such as a one-time programmable memory EFUSE, an on-chip read-only memory (ROM), an off-chip ROM connected via a serial peripheral interface (SPI) or other protocols, a display look-up table (LUT), and the like.

[0144] The embodiment of the present disclosure also provides a second self-adjustment operation, which is based on the correspondence between the voltage difference and the target control signal stored in the storage module 106, without interrupting the normal operation of the square circuit 10 for a long time. Specifically, the control module 105 can be connected to the storage module 106, and the second self-adjustment operation performed by the control module 105 includes: The control module 105 obtains a voltage difference, which is a voltage difference between the output ends of the square unit 101 and the mirror square unit 102; for example, the control module 105 may obtain the voltage difference from the voltage acquisition module 104; The control module 105 searches the storage module 106 according to the voltage difference to determine the target control signal, and outputs the target control signal corresponding to the voltage difference to the current adjustment module 103. The target control signal is used to control the current adjustment module 103 to output a compensation current of appropriate size.

[0145] It should also be noted that the control signal stored in the storage module 106 is recorded as a target control signal, and each voltage difference value or range corresponds to a target control signal. For example, 100 different voltage differences and target control signals corresponding to each voltage difference are preset, and the 100 voltage differences and corresponding target control signals are stored in the storage module 106. Then, when performing the second self-adjustment operation, the input of the square unit 101 and the mirror square unit 102 is first cut off, and the calibration state indication signal can also be output to the outside; the current voltage difference is determined according to the voltage value collected by the voltage acquisition module 104, and then the current voltage difference is compared with the 100 voltage differences stored in the storage module 106 to determine which voltage difference the current voltage difference matches, that is, which voltage difference the current voltage difference is closest to (equal, or the difference between the two is less than a certain voltage difference error threshold), and then the target control signal corresponding to the matched voltage difference is output to the current adjustment module 103, and the current adjustment module 103 outputs the compensation current accordingly.

[0146] It should be noted that what needs to be collected here is the voltage difference in the absence of AC signal input, and the AC signal input also needs to be temporarily cut off. However, since the target control signal is searched in the storage module 106, compared with the method of traversing multiple initial control signals and then determining a target control signal (i.e., the first self-adjustment operation), the interference to the normal operation of the square circuit 10 is smaller.

[0147] In some embodiments, determining the correspondence between different voltage differences and target control signals may include: under different voltage differences, the control module 105 tests different initial control signals, and selects the initial control signal that minimizes the voltage difference as the target control signal corresponding to the voltage difference; The control module 105 traverses different voltage differences, obtains the corresponding relationship between all voltage differences and target control signals, and stores the corresponding relationship in the storage module 106 .

[0148] The control module 105 is further configured to execute an operation of obtaining a corresponding relationship when receiving an indication signal for obtaining a corresponding relationship.

[0149] Exemplarily, the target control signal corresponding to each voltage difference can be determined by a test operation, so the indication signal for obtaining the corresponding relationship can be a test state indication signal, and the operation for obtaining the corresponding relationship can be a test operation. When receiving the test state indication signal, the control module 105 performs the test operation.

[0150] The test operation is usually performed in advance, and at this time, the test operation can be triggered by the test status indication signal. In this case, after the test operation, the target control signal corresponding to the voltage difference will be stored in the storage module 106. When the voltage difference changes or periodically combined with the current voltage difference, the corresponding target control signal is searched in the storage module 106 (i.e., the second self-adjustment operation is performed) to determine the compensation current, and the self-adjustment operation can be triggered without a trigger signal, that is, the trigger module 108 can be omitted. Alternatively, it can also be combined with the trigger module 108 to perform calibration when the chip is powered on or manually triggered to avoid the mismatch changing after a certain working time limit, and the stored target control signal is not effective.

[0151] In some embodiments, the control module 105 is configured to perform a test operation (ie, an operation of obtaining a corresponding relationship), and the operation of obtaining a corresponding relationship includes: When there is no AC signal input, at each voltage difference: The control module 105 outputs an initial control signal, which is a preset control signal; the initial control signal is output to the current adjustment module 103, and the current adjustment module 103 outputs a compensation current based on the initial control signal; the voltage acquisition module 104 acquires the output terminal voltage of the square unit 101 and the output terminal voltage of the mirror square unit 102; the control module 105 obtains the voltage difference between the output terminals of the square unit 101 and the mirror square unit 102; thus, the corresponding voltage difference under the control of the initial control signal is obtained; The control module 105 traverses different initial control signals and obtains all voltage differences; The control module 105 determines the initial control signal corresponding to the minimum voltage difference as the target control signal corresponding to the voltage difference; The control module 105 stores the corresponding relationship between different voltage differences and target control signals in the storage module 106 .

[0152] It should be noted that the operation of obtaining the corresponding relationship is equivalent to performing a first self-adjustment operation for each voltage difference, and then saving the determined target control signal and the corresponding voltage difference. The specific execution process will not be repeated here.

[0153] In this way, the target control signal is a control signal with the best mismatch improvement effect under the corresponding voltage difference, which can reduce the voltage difference to the greatest extent. In addition, since the target control signal is pre-stored in the storage module 106, there is no need to interrupt the normal processing of the AC signal by the square circuit 10 for a long time, thereby avoiding affecting the circuit operation. In the embodiment of the present disclosure, the second self-adjustment operation can also be triggered by a trigger signal.

[0154] To Fig. 20 The circuit shown in the figure performs the test operation and the second self-adjustment operation as an example. Fig.21 As shown, the process includes: S401: The control module 105 determines whether it is in a testing state according to a test state indication signal.

[0155] If the judgment result is yes, steps S402 to S4013 (ie, the test operation) are executed; otherwise, steps S4014 to S4017 (ie, the second self-adjustment operation) are executed.

[0156] Before step S402 , the square circuit 10 may be placed at a first preset temperature so that there is a first initial voltage difference between the first signal and the second signal.

[0157] S402 : The control module 105 controls the second analog-to-digital converter 1042 (ADC2) to sample the voltage value of the first signal, and the reading result is recorded as VA1.

[0158] S403: the control module 105 controls the third analog-to-digital converter 1043 (ADC3) to sample the voltage value of the second signal, and the reading result is recorded as VB1.

[0159] S404: The control module 105 calculates the voltage difference |VA1-VB1| and records the voltage difference |VA1-VB1| as the initial voltage difference.

[0160] It should be noted that the voltage difference here is the absolute value of VA1 and VB1.

[0161] S405: The control module 105 resets the initial control signal and the optimal voltage difference.

[0162] It should be noted that the control signal can be a multi-bit signal. At the beginning of the test, the initial control signal and the optimal voltage difference need to be reset, which is equivalent to initialization. The reset initial control signal and the optimal voltage difference can both be default values. Alternatively, the reset initial control signal is the first initial control signal traversed.

[0163] Among them, the optimal voltage difference represents the minimum voltage difference between the output ends of the square unit 101 and the mirror square unit 102 when there is no AC signal input in the initial control signal that has been traversed. Before entering the test state and before starting to adjust based on the initial control signal, the reset optimal voltage difference can be a default value or a voltage difference detected before adjustment.

[0164] It should be noted that after resetting the initial control signal, the control module 105 will send the reset initial control signal to the current adjustment module 103, and the current adjustment module 103 performs current compensation based on the initial control signal.

[0165] S406: The control module 105 controls ADC2 to sample, and the reading result is recorded as VA2.

[0166] S407: The control module 105 controls ADC3 to sample, and the reading result is recorded as VB2.

[0167] S408: The control module 105 calculates the voltage difference |VA2-VB2|.

[0168] It should be noted that the voltage difference here is the absolute value of VA2 and VB2.

[0169] S409: The control module 105 determines whether the voltage difference |VA2-VB2| is less than the optimal voltage difference.

[0170] If the judgment result is yes, it means that the compensation effect of the current initial control signal is worse than the previously tested control signal, and then execute step S4010; otherwise, it means that the compensation effect of the current initial control signal is not as good as the previously tested control signal, and then execute step S4011.

[0171] S4010: The control module 105 records the current initial control signal and voltage difference as the target control signal and the optimal voltage difference respectively.

[0172] S4011: The control module 105 outputs an initial control signal step to the DAC.

[0173] It should be noted that if the initial control signals are output one by one in order from small to large, the next initial control signal is outputted in a step-increase manner according to the corresponding step value; if the initial control signals are output one by one in order from large to small, the next initial control signal is outputted in a step-decrease manner according to the corresponding step value; or, the initial control signals may be outputted in other pre-set orders or any order, and no specific limitation is made thereto. Here, taking the step-increase as an example, for example, the aforementioned 100 initial control signals C1 to C100 increase in sequence, and the difference between two adjacent initial control signals is the step value, then after traversing C1, the next traversal is C2.

[0174] S4012: The control module 105 determines whether the initial control signal exceeds the maximum value.

[0175] If the judgment result is yes, step S4013 is executed, indicating that the target control signal corresponding to the initial voltage difference is found; otherwise, the process returns to step S406.

[0176] For example, among the 100 initial control signals C1 to C100 that increase in sequence, the maximum value of the initial control signal is C100. If the initial control signal sent is C101, the maximum value is exceeded.

[0177] S4013 : The control module 105 writes the initial voltage difference and the target control signal into the storage module 106 .

[0178] Afterwards, the square circuit 10 can be placed at a second preset temperature so that there is a second initial voltage difference between the first signal and the second signal; then steps S402 to S4013 are performed to find the target control signal corresponding to the second initial voltage difference. Similarly, the square circuit 10 is placed at all preset temperatures, the target control signals corresponding to all initial voltage differences are found, and the corresponding relationship between the voltage difference and the target control signal is obtained.

[0179] S4014 : The control module 105 reads all voltage differences and target control signals in the storage module 106 .

[0180] S4015: The control module 105 obtains the current voltage difference.

[0181] It should be noted that, when obtaining the current voltage difference, it is necessary to cut off the AC signal input and obtain the voltage difference without the AC signal input.

[0182] S4016: The control module 105 calculates a target control signal corresponding to the current voltage difference.

[0183] S4017: The control module 105 latches and outputs the calculated target control signal to the DAC (digital-to-analog converter 1031), thereby obtaining a target control signal corresponding to the current voltage difference, and sending it to the current adjustment module 103 to control the current adjustment module 103 to output a compensation current to compensate for the mismatch between the square unit 101 and the mirror square unit 102.

[0184] In short, when the chip is tested before leaving the factory, the test state indication signal is pulled high to enter the test state. At this time, the external sampling signal is no longer a reset function, but it can still be a pulse. Through the cooperation of the test system host computer, an external sampling signal is sent to the chip for each voltage difference. When the chip receives the sampling signal, it will perform a self-adjustment operation process to determine the corresponding target control signal, and record both the voltage difference and the target control signal in the storage module 106.

[0185] The host computer can perform self-adjustment according to a certain voltage step. After the calibration is completed, when the chip is used normally, the test state indication signal is pulled low, the test state is exited, and the normal working state is entered. The control module 105 will read all the voltage differences and target control signals in the storage module 106. After that, the current voltage difference is obtained according to a certain frequency cycle, and the compensation circuit control code required for the current voltage difference is confirmed by interpolation and other methods according to the previous records, and the latch output is given to the DAC. Thereby achieving mismatch compensation under different voltage differences.

[0186] Fig.21 The corresponding implementation method moves the self-adjustment operation to the test process before the chip is shipped. An additional storage module 106 is added to record calibration data. During the calibration process, no radio frequency signal (i.e., AC signal) is input. This method does not need to interrupt the normal working process.

[0187] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure.

[0188] It should be noted that in the present disclosure, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0189] The serial numbers of the above-mentioned embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.

[0190] The methods disclosed in several method embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments.

[0191] The features disclosed in several product embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new product embodiments.

[0192] The features disclosed in several method or device embodiments provided in the present disclosure may be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0193] The above description is only a specific implementation mode of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure.

Claims

1. A self-adjustable square circuit, characterized in that: include: A squaring unit, used to square the received AC signal, the squaring unit receiving a bias voltage and the AC signal, and an output end of the squaring unit outputting a first signal; A mirror square unit, used for receiving the bias voltage, wherein the structure of the mirror square unit is consistent with the structure of the square unit, and the output end of the mirror square unit outputs a second signal; A current adjustment module is used to receive a target control signal and generate a compensation current, wherein the magnitude of the compensation current is related to the target control signal, and the output end of the current adjustment module is connected to the output end of the square unit or the mirror square unit, so as to compensate for the difference between the first signal and the second signal; wherein the target control signal is generated by the control module based on the voltage difference collected by the voltage acquisition module; the voltage acquisition module is used to collect the output terminal voltage of the square unit and the output terminal voltage of the mirror square unit; the control module is used to obtain the voltage difference between the output terminals of the square unit and the mirror square unit, and the voltage difference is used to obtain the target control signal.

2. The squaring circuit according to claim 1, characterized in that: The difference between the first signal and the second signal is minimal, zero or substantially zero.

3. The squaring circuit according to claim 1, characterized in that: The squaring circuit further comprises: The control module is connected to the output end of the voltage acquisition module; the control module is configured to perform an operation of determining the target control signal: When there is no AC signal input, outputting an initial control signal to the current adjustment module; obtaining the voltage difference; By traversing different initial control signals, determining the initial control signal corresponding to the minimum voltage difference as the target control signal; The target control signal is output to the current adjustment module.

4. The squaring circuit according to claim 1, characterized in that: The squaring circuit further comprises: A storage module, used for storing the corresponding relationship between the voltage difference and the target control signal; The control module is connected to the storage module; the control module is configured to perform an operation of determining the target control signal: obtaining the voltage difference; The target control signal is determined by searching in the storage module according to the voltage difference, and the corresponding target control signal is output to the current adjustment module.

5. The squaring circuit according to claim 4, characterized in that: The control module is configured to execute an operation of obtaining the corresponding relationship: When there is no AC signal input, at each voltage difference: Outputting an initial control signal to the current adjustment module; By traversing different initial control signals, the initial control signal corresponding to the minimum voltage difference is determined as the target control signal.

6. The squaring circuit according to claim 1, characterized in that: The squaring circuit further comprises: The voltage acquisition module is connected to the output ends of the square unit and the mirror square unit respectively.

7. The squaring circuit according to any one of claims 1 to 6, characterized in that: The squaring circuit further comprises: A trigger module is used to receive a reset signal and / or an external sampling signal, and when any one of the reset signal and the external sampling signal is in an enabled state, output a trigger signal and send it to the control module; the trigger signal is used to trigger the control module to perform an operation of determining the target control signal.

8. The squaring circuit according to claim 7, characterized in that: The square circuit also includes a temperature sensor; The temperature sensor is used to determine the current temperature; The trigger module is further configured to generate the trigger signal when the difference between the current temperature and the last detected temperature is greater than a temperature threshold.

9. The squaring circuit according to any one of claims 1 to 6, characterized in that: The squaring circuit further includes a first switch and a second switch, wherein the first switch is located between the input end of the squaring unit and the AC signal input end, and the second switch is located between the input end of the mirror squaring unit and the feedback signal input end; The control module is further configured to disconnect the first switch and the second switch during the operation of determining the target control signal.

10. The squaring circuit according to any one of claims 1 to 6, characterized in that: The control module is further configured to generate and output a calibration status indication signal during the operation of determining the target control signal, wherein the calibration status indication signal is configured to indicate that the output of the square circuit is invalid.

11. The squaring circuit according to claim 1, characterized in that: The current adjustment module comprises: A digital-to-analog converter, used for receiving the target control signal, performing digital-to-analog conversion on the target control signal, and obtaining a current control signal; The first current source is used to receive the current control signal and generate the compensation current based on the current control signal, wherein the output end of the first current source is connected to the output end of the square unit or the mirror square unit.

12. The squaring circuit according to claim 1, characterized in that: The current adjustment module comprises: A voltage providing unit, configured to provide a first voltage; The resistance adjustment unit is connected to the first voltage and receives the target control signal, changes the resistance value based on the target control signal, and outputs the compensation current.

13. The squaring circuit according to claim 1, characterized in that: The current adjustment module comprises: A second current source receives a second voltage and generates a first current; A current control circuit receives the first current and outputs the compensation current; the current control circuit adjusts the magnitude of the compensation current based on the target control signal.

14. The squaring circuit according to any one of claims 1-6, 8, 11-13, characterized in that: The squaring circuit further includes a third current source; an output end of the current adjustment module is connected to an output end of one of the squaring unit and the mirror squaring unit, and an output end of the third current source is connected to an output end of the other of the squaring unit and the mirror squaring unit; The third current source is used to provide a fixed current.

15. The squaring circuit according to any one of claims 3 to 5, characterized in that: The squaring circuit includes at least two current adjustment modules for generating at least two compensation currents; the control module obtains at least two target control signals based on the voltage difference; the output end of one of the current adjustment modules is connected to the output end of one of the squaring unit and the mirror squaring unit, and the output end of the other current adjustment module is connected to the output end of the other of the squaring unit and the mirror squaring unit.

16. The squaring circuit according to any one of claims 1-6, 8, 11-13, characterized in that: The voltage acquisition module includes a first analog-to-digital converter and a switch unit; One end of the switch unit is connected to the first analog-to-digital converter, and the other end is selectively connected to the output end of the square unit or the output end of the mirror square unit; The first analog-to-digital converter is used to perform analog-to-digital conversion on the voltage at the output end of the square unit or the mirror square unit, and output the converted digital signal to the control module.

17. The squaring circuit according to any one of claims 1-6, 8, 11-13, characterized in that: The voltage acquisition module includes a second analog-to-digital converter and a third analog-to-digital converter; The second analog-to-digital converter is connected to the output end of the square unit, performs analog-to-digital conversion on the voltage at the output end of the square unit, and outputs the converted voltage to the control module; The third analog-to-digital converter is connected to the output end of the mirror square unit, performs analog-to-digital conversion on the voltage at the output end of the mirror square unit, and outputs the converted voltage to the control module.

18. A self-adjusting method for a square circuit, characterized in that: Applied to the squaring circuit as claimed in claim 1, the method comprises: obtaining the voltage difference; A target control signal is determined according to the voltage difference and output to the current adjustment module.

19. The method according to claim 18, characterized in that Also includes: When there is no AC signal input, outputting an initial control signal to the current adjustment module; obtaining the voltage difference; By traversing different initial control signals, determining the initial control signal corresponding to the minimum voltage difference as the target control signal; The target control signal is output to the current adjustment module.

20. The method according to claim 18, characterized in that Also includes: obtaining the voltage difference; The target control signal is determined by searching in a storage module according to the voltage difference, and the corresponding target control signal is output to the current adjustment module. The storage module stores the corresponding relationship between the voltage difference and the target control signal.

21. The method according to claim 20, characterized in that Also includes: When there is no AC signal input, at each voltage difference: Outputting an initial control signal to the current adjustment module; By traversing different initial control signals, the initial control signal corresponding to the minimum voltage difference is determined as the target control signal.

22. A control module, characterized in that: including a processor and a memory; The processor is used to execute instructions stored in the memory so that the control module executes the self-adjusting method according to any one of claims 18 to 21.

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