Power supply selection circuit, display panel and display device

Abstract

The invention discloses a power supply selection circuit, a display panel and a display device. The power supply selection circuit comprises a voltage signal line, and the voltage signal line is used for transmitting a voltage signal to the first electrodes of the light-emitting sub-pixels and controlling the at least two groups of light-emitting sub-pixels to emit light group by group; wherein one group of light-emitting sub-pixels comprises at least one row of light-emitting sub-pixels. According to the embodiment of the invention, independent light-emitting control of each group of light-emitting sub-pixels can be realized, so that line-by-line lighting or group-by-group lighting of the light-emitting sub-pixel lines is realized.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular, relates to a power selection circuit, a display panel and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display devices.

[0003] However, the performance of current OLED display products needs to be improved. Summary of the invention

[0004] The embodiments of the present application provide a power selection circuit, a display panel and a display device, which can solve the technical problem in the prior art that different areas cannot be driven with different refresh frequencies when the screen is split.

[0005] In a first aspect, an embodiment of the present application provides a power selection circuit, comprising a voltage signal line, the voltage signal line being used to transmit a voltage signal to a first electrode of a light-emitting sub-pixel and control at least two groups of light-emitting sub-pixels to emit light group by group;

[0006] Wherein, a group of light-emitting sub-pixels includes at least one row of light-emitting sub-pixels.

[0007] In some embodiments, the voltage signal line discontinuously transmits a voltage signal that is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel and the light-on voltage of the light-emitting sub-pixel.

[0008] In some embodiments, the voltage signal line transmits a voltage signal that is less than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel, and a voltage signal that is greater than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel in a time-sharing manner.

[0009] In some embodiments, the power selection circuit further includes a first signal module, and the voltage signal line includes a first voltage signal line;

[0010] A first end of the first signal module is connected to a first voltage signal line, a second end of the first signal module is connected to a first electrode of a group of light-emitting sub-pixels, and a control end of the first signal module is connected to a first control signal line;

[0011] The voltage signal transmitted in the first voltage signal line is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel and the light-on voltage of the light-emitting sub-pixel.

[0012] In some embodiments, the power selection circuit further includes a second signal module, and the voltage signal line further includes a second voltage signal line;

[0013] A first end of the second signal module is connected to the second voltage signal line, a second end of the second signal module is connected to the second end of the first signal module, and a control end of the second signal module is connected to the second control signal line;

[0014] The voltage signal transmitted in the second voltage signal line is greater than the difference between the second electrode voltage of the light-emitting sub-pixel and the light-on voltage of the light-emitting sub-pixel.

[0015] In some embodiments, the first signal module includes a first transistor, a first electrode of the first transistor is connected to a first voltage signal line, a second electrode of the first transistor is connected to a first electrode of a group of light-emitting sub-pixels, and a gate of the first transistor is connected to a first control signal line;

[0016] The second signal module includes a second transistor, a first electrode of the second transistor is connected to the second voltage signal line, a second electrode of the second transistor is connected to the second electrode of the first transistor, and a gate of the second transistor is connected to the second control signal line.

[0017] In some embodiments, the type of the first transistor is opposite to the type of the second transistor, and the signal in the first control signal line is the same signal as the signal in the second control signal line.

[0018] In some embodiments, the type of the first transistor is the same as the type of the second transistor, and the signal in the first control signal line is an opposite signal to the signal in the second control signal line.

[0019] In some embodiments, the signal in the first control signal line and the signal in the second control signal line are both step-by-step shift signals.

[0020] In some embodiments, the duty cycle of the signal in the first control signal line and the duty cycle of the signal in the second control signal line can be adjusted.

[0021] In a second aspect, an embodiment of the present application provides a display panel, comprising the power selection circuit of the first aspect, and

[0022] A plurality of groups of light-emitting sub-pixels arranged in an array, each group of light-emitting sub-pixels comprising at least one row of light-emitting sub-pixels, first electrodes of light-emitting sub-pixels in the same group being electrically connected, and first electrodes of light-emitting sub-pixels in different groups being insulated from each other;

[0023] A power selection circuit is connected to the first electrodes of a group of light-emitting sub-pixels.

[0024] In some embodiments, first electrodes of light-emitting sub-pixels in adjacent rows in the same group are electrically connected via isolation columns.

[0025] In some embodiments, a partition groove is provided in the isolation column between light-emitting sub-pixels located in different groups and adjacent rows, and the partition groove is used to separate the isolation column into a first sub-isolation column and a second sub-isolation column, and the first sub-isolation column and the second sub-isolation column are insulated, and one row of light-emitting sub-pixels located in different groups and adjacent rows is electrically connected to the first sub-isolation column, and another row of light-emitting sub-pixels located in different groups and adjacent rows is electrically connected to the second sub-isolation column.

[0026] In some embodiments, the power selection circuit is connected to the isolation column.

[0027] In some embodiments, the spacer comprises a metal spacer;

[0028] In some embodiments, in the extension direction of a single group of vertical light-emitting sub-pixels, the cross-sectional shape of the conductive portion of the isolation column includes a T-shape or an inverted trapezoid.

[0029] In some embodiments, the display panel includes a display area and a non-display area, the light-emitting sub-pixels are located in the display area, and the power selection circuit is located in the non-display area.

[0030] In some embodiments, the non-display area is located on at least one side of the display area.

[0031] In some embodiments, the non-display area is located on two opposite sides of the display area, and the non-display area on each side includes a power selection circuit.

[0032] In some embodiments, the first electrodes of light-emitting sub-pixels in the same row are connected to a plurality of power selection circuits.

[0033] In some embodiments, the first electrodes of the same row of light-emitting sub-pixels are connected to two power selection circuits, and among the two power selection circuits connected to the first electrodes of the same row of light-emitting sub-pixels, one power selection circuit is located in a non-display area on one side of the display area, and the other power selection circuit is located in a non-display area on the opposite side of the display area.

[0034] In a third aspect, an embodiment of the present application provides a display device, comprising the display panel of the second aspect.

[0035] Compared with the prior art, the power selection circuit, display panel, and display device provided in the embodiments of the present application can transmit the voltage signal to the first electrode of the light-emitting sub-pixel by setting the voltage signal line, and can transmit the voltage signal to the light-emitting sub-pixels in the same group. By controlling the time intervals in which the light-emitting sub-pixels of different groups receive the voltage signal, the light-emitting sub-pixels of each group can be emitted group by group. When the voltage signal line is set in the display panel, the independent light-emitting control of each group of light-emitting sub-pixels can be realized through the voltage signal line, so that the light-emitting sub-pixel rows can be lit up row by row or group by group. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 It is a schematic diagram of the module structure of a power selection circuit provided in an embodiment of the present application;

[0038] Figure 2 is a schematic diagram of a module structure of a power selection circuit provided in another embodiment of the present application;

[0039] Figure 3 yes Figure 1 Signal timing diagram of the power selection circuit in the middle;

[0040] Figure 4 yes Figure 2 Signal timing diagram of the power selection circuit in the middle;

[0041] Figure 5 is a schematic diagram of the module structure of a power selection circuit provided in another embodiment of the present application;

[0042] Figure 6 is a schematic diagram of the circuit structure of a light-emitting sub-pixel provided in an embodiment of the present application;

[0043] Figure 7 This is a schematic diagram of a structure in which the first electrodes of two adjacent light-emitting sub-pixel rows are isolated from each other, provided by an embodiment of the present application;

[0044] Figure 8 is a schematic diagram of a partial layer structure of a light-emitting sub-pixel provided in an embodiment of the present application;

[0045] Fig. 9 is a circuit structure diagram of a power selection circuit provided in an embodiment of the present application;

[0046] Fig.10 yes Fig. 9 Signal timing diagram of the power selection circuit in the middle;

[0047] Fig.11 is a schematic diagram of a module structure of a power selection circuit provided in yet another embodiment of the present application;

[0048] Fig.12 is a circuit structure diagram of a power selection circuit provided in another embodiment of the present application;

[0049] Fig.13 yes Fig.12 Signal timing diagram of the power selection circuit in the middle;

[0050] Fig.14 is a circuit structure diagram of a power selection circuit provided in yet another embodiment of the present application;

[0051] Fig.15 yes Fig.14 Signal timing diagram of the power selection circuit in the middle;

[0052] Fig.16 is a schematic diagram of a circuit structure of a display panel provided in an embodiment of the present application;

[0053] Fig.17 yes Fig.16 Corresponding signal timing diagram;

[0054] Fig.18 is a schematic diagram of a circuit structure of a display panel provided in another embodiment of the present application;

[0055] Fig.19 yes Fig.15 Corresponding signal timing diagram;

[0056] Fig. 20 is a schematic diagram of a circuit structure of a display panel provided in yet another embodiment of the present application;

[0057] Fig.21 yes Fig. 20 Corresponding signal timing diagram;

[0058] Fig. 22 It is a signal timing diagram of a single light-emitting frame in the related art;

[0059] Fig.23 yes Fig. 22 A schematic diagram of the light-emitting state of each row of light-emitting sub-pixels in the embodiment;

[0060] Fig.24 This is a schematic diagram of the signal timing of a single light-emitting frame in an embodiment of the present application;

[0061] Fig.25 yes Fig.24A schematic diagram of the light-emitting state of each row of light-emitting sub-pixels in the embodiment;

[0062] Fig.26 is a schematic diagram of the signal timing of a single light-emitting frame in another embodiment of the present application;

[0063] Fig. 27 yes Fig.26 A schematic diagram of the light-emitting state of each row of light-emitting sub-pixels in the embodiment;

[0064] Fig.28 It is a schematic diagram of a simulation waveform provided by an embodiment of the present application;

[0065] Fig.29 It is a schematic diagram of the structure of a display device provided in one embodiment of the present application.

[0066] In the attached figure:

[0067] 1. Power selection module; 11. First signal module; 12. Second signal module; 20. Light-emitting sub-pixel; 21. Pixel driving circuit; L. Light-emitting element; ELVSS. First voltage signal line; EM. First control signal line; T1. First transistor; T2. Second transistor. DETAILED DESCRIPTION

[0068] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0069] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0070] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The embodiments will be described in detail below in conjunction with the accompanying drawings.

[0071] Organic Light Emitting Diode (OLED) and flat display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages of high image quality, power saving, thin body and wide application range, becoming the mainstream of display devices. However, the performance of current OLED display products needs to be improved.

[0072] With the continuous development of the field of display technology, the PPI (Pixels Per Inch, pixel density unit) requirements of UI and display devices are gradually increasing. In a display screen of the same size, if a higher PPI is to be achieved, the area of ​​a single light-emitting sub-pixel needs to be reduced. Since a single light-emitting sub-pixel is usually composed of a pixel driving circuit and a light-emitting element component, in order to reduce the area of ​​the light-emitting sub-pixel, it is usually necessary to reduce the number of transistors contained in the pixel driving circuit. That is, in display panel products with higher PPI, the number of transistors included in the pixel driving circuit will usually be lower than the number of transistors in the current more conventional pixel driving circuit.

[0073] However, the reduction in the number of transistors in the pixel driving circuit will be accompanied by the loss of corresponding functions. Among them, after the transistors in the conventional pixel driving circuit for realizing pixel row-by-row light emission are eliminated, each pixel row in the display panel will not be able to realize pixel row-by-row light emission.

[0074] In order to solve the above technical problems, the embodiments of the present application provide a power selection circuit, a display panel and a display device. The display panel provided by the embodiments of the present application is first introduced below.

[0075] Figure 1 The schematic diagram of the structure of a power selection circuit provided by an embodiment of the present application is shown. The power selection circuit includes a voltage signal line, and the voltage signal line can transmit a voltage signal to the first electrode of the light-emitting sub-pixel 20.

[0076] In the light-emitting sub-pixels 20 arranged in the display panel array, multiple light-emitting sub-pixels 20 can be divided into light-emitting sub-pixel groups. A group of light-emitting sub-pixels 20 includes at least one row of light-emitting sub-pixels 20. The voltage signal line can control at least two groups of light-emitting sub-pixels 20 to emit light group by group.

[0077] When the voltage signal line does not transmit a voltage signal to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 will be smaller than the turn-on voltage of the light-emitting sub-pixel 20, and the light-emitting sub-pixel 20 will not emit light.

[0078] For example, Figure 1 As shown, Signal Line is a voltage signal line, node n4 is the first electrode of the light-emitting sub-pixel 20, and node n3 is the second electrode of the light-emitting sub-pixel 20. When the voltage signal line transmits a voltage signal to the first electrode of the light-emitting sub-pixel 20, and the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the turn-on voltage of the light-emitting sub-pixel 20, that is, (Vn3-Vn4)>Von, the light-emitting sub-pixel 20 will emit light.

[0079] When the voltage signal line provides a voltage signal to the same group of light-emitting sub-pixels 20, multiple light-emitting sub-pixels 20 in the same group can emit light or turn off synchronously. The voltage signal line can stagger the light-emitting time of the light-emitting sub-pixels 20 in different groups by adjusting the time of transmitting the voltage signal to the light-emitting sub-pixels 20 in different groups, thereby realizing the light-emitting of each group of light-emitting sub-pixels 20 one by one.

[0080] It can be understood that a group of light-emitting sub-pixels 20 may include at least one row of light-emitting sub-pixels 20. When each group of light-emitting sub-pixels 20 includes a single row of light-emitting sub-pixels 20, each row of light-emitting sub-pixels 20 may emit light row by row; when each group of light-emitting sub-pixels 20 includes more than two rows of light-emitting sub-pixels 20, the light-emitting sub-pixels 20 may emit light row by row or row by row.

[0081] For the light-emitting sub-pixels 20 that have reduced the number of transistors in the pixel driving circuit 21 in pursuit of a higher PPI and cannot be lit up row by row or multiple rows by row, voltage signals can be provided separately for one or more rows of light-emitting sub-pixels 20 in the same group through the voltage signal line. When the light-emitting sub-pixels 20 are in the non-light-emitting stage, data writing, initialization, and other steps are performed on the light-emitting sub-pixels 20.

[0082] In this embodiment, by setting the voltage signal line, the transmission of the voltage signal can be realized for the first electrode of the light-emitting sub-pixel 20, so that the light-emitting sub-pixel 20 switches between the light-emitting stage and the non-light-emitting stage, and the light-emitting sub-pixel 20 is controlled. By controlling the light-emitting stages of different groups of light-emitting sub-pixels 20 to be staggered, each group of light-emitting sub-pixels 20 can be realized to emit light group by group. When the voltage signal line is set in the display panel, the independent light-emitting control of each group of light-emitting sub-pixels 20 can be realized through the voltage signal line, so that the light-emitting sub-pixel rows can be lit up row by row or group by group.

[0083] In some embodiments, the voltage signal line may intermittently transmit a voltage signal that is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20 .

[0084] When the voltage signal line transmits the voltage signal to the first electrode of the light-emitting sub-pixel 20, since the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the turn-on voltage of the light-emitting sub-pixel 20, the light-emitting sub-pixel 20 can emit light.

[0085] There is a parasitic capacitor between the first electrode and the second electrode of the light-emitting sub-pixel 20. When the voltage signal line stops transmitting the voltage signal to the first electrode of the light-emitting sub-pixel 20, due to the characteristic that the voltage across the parasitic capacitor cannot change suddenly, the potential of the first electrode corresponding to each light-emitting sub-pixel 20 is still the signal voltage of the voltage signal, but as the electrons stored in the parasitic capacitor continue to recombine with holes to emit light, the voltage difference across the parasitic capacitor will gradually decrease, thereby gradually reducing the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20. That is, when the voltage signal line stops transmitting the voltage signal to the first electrode of the light-emitting sub-pixel 20, the light-emitting sub-pixel 20 will gradually turn off.

[0086] The voltage signal line transmits the voltage signal intermittently, so that the light-emitting sub-pixel 20 can emit light when the voltage signal is normally transmitted, and can turn off the light-emitting sub-pixel 20 when the voltage signal transmission stops.

[0087] In some embodiments, the voltage signal line may transmit two voltage signals in a time-sharing manner, one voltage signal being smaller than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20, and the other voltage signal being larger than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20.

[0088] When the voltage signal transmitted by the voltage signal line is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the turn-on voltage of the light-emitting sub-pixel 20, and the light-emitting sub-pixel 20 is able to emit light.

[0089] When the signal amplitude of the voltage signal transmitted by the voltage signal line is greater than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 will be smaller than the turn-on voltage of the light-emitting sub-pixel 20. At this time, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 cannot drive the light-emitting sub-pixel 20 to emit light, and the light-emitting sub-pixel will be turned off.

[0090] like Figure 2As shown, Signal Line is a voltage signal line, node n4 is the first electrode of the light-emitting sub-pixel 20, node n3 is the second electrode of the light-emitting sub-pixel 20, and the two voltage signals transmitted in the voltage signal line in time-sharing manner can be ELVSS and ELVDD respectively. When the voltage signal line transmits ELVSS to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the turn-on voltage of the light-emitting sub-pixel 20, that is, (Vn3-Vn4)>Von, and the light-emitting sub-pixel 20 will emit light; when the voltage signal line transmits ELVDD to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is less than the turn-on voltage of the light-emitting sub-pixel 20, and the light-emitting sub-pixel 20 is extinguished.

[0091] Compared to the above implementation method in which the voltage signal line transmits the voltage signal intermittently, in this embodiment, the voltage signal line does not realize the extinguishing of the light-emitting sub-pixel 20 by stopping the transmission of the voltage signal, but by transmitting a voltage signal greater than the difference between the voltage of the second electrode of the light-emitting sub-pixel and the light-on voltage of the light-emitting sub-pixel. Under this voltage signal, the potential of the first electrode of the light-emitting sub-pixel 20 can be quickly pulled up, so that the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is more quickly reduced to below the light-on voltage. That is, the extinguishing speed of the light-emitting sub-pixel 20 is improved.

[0092] Please refer to Figure 3 , Figure 3 The signal timing diagram of the power selection circuit in the embodiment in which the voltage signal line intermittently transmits the voltage signal is shown. Taking the voltage signal transmitted by the voltage signal line as ELVSS as an example, in the P1 interval, the voltage signal line stops transmitting the voltage signal, at which time the potential of the N4 node, that is, the potential of the first electrode of the light-emitting sub-pixel 20, will gradually rise until the light-emitting sub-pixel 20 is extinguished. In the P1 interval, the scan signal Scan can provide a high-level pulse as an enable valid signal to implement the writing of data signals in the non-light-emitting stage in the enable valid interval.

[0093] In the P2 interval, the voltage signal line transmits a voltage signal, at which time the potential of the N4 node is pulled down to ELVSS, and the light-emitting sub-pixel 20 emits light.

[0094] Figure 4The signal timing diagram of the power selection circuit in an implementation method in which the voltage signal line can transmit two voltage signals in time-sharing is shown. Taking the two voltage signals ELVSS and ELVDD transmitted by the voltage signal line in time-sharing as an example, in the P1 interval, the voltage signal line transmits ELVDD, at which time the potential of the N4 node, that is, the potential of the first electrode of the light-emitting sub-pixel 20, will be quickly pulled up to ELVDD, so that the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is reduced to less than the light-on voltage, and the light-emitting sub-pixel 20 is extinguished. In the P1 interval, the scan signal Scan can provide a high-level pulse as an enable valid signal to implement the writing of data signals in the non-light-emitting stage in the enable valid interval.

[0095] In the P2 interval, the voltage signal line transmits ELVSS, at which time the potential of the N4 node is pulled down to ELVSS, and the light-emitting sub-pixel 20 emits light.

[0096] Please refer to Figure 5 In some embodiments, the power selection circuit may include a first signal module 11, and the voltage signal line may include a first voltage signal line ELVSS.

[0097] like Fig. 9 As shown, the first signal module 11 includes a first end, a second end and a control end. The first end of the first signal module 11 is connected to the first voltage signal line ELVSS, the second end of the first signal module 11 is connected to the first electrode corresponding to a group of light-emitting sub-pixels 20, and the control end of the first signal module 11 is connected to the first control signal line EM.

[0098] The voltage signal provided by the first voltage signal line ELVSS is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20. That is, the second electrode of the light-emitting sub-pixel 20 is an anode, and the first electrode is a cathode.

[0099] like Fig. 9 As shown, the potential of N4 is the potential of the first electrode corresponding to the light-emitting sub-pixel 20. The first signal module 11 can be connected to the first electrode corresponding to a group of light-emitting sub-pixels 20, which can be a row of light-emitting sub-pixels 20 or multiple consecutive rows of light-emitting sub-pixels 20.

[0100] Taking the display panel including n rows of light-emitting sub-pixels 20 as an example, when each first signal module 11 is connected to the first electrode corresponding to a row of light-emitting sub-pixels 20, the n rows of light-emitting sub-pixels 20 correspond to n first signal modules 11 respectively; and when each first signal module 11 is connected to the first electrode corresponding to x rows of light-emitting sub-pixels 20, and x is a positive integer greater than or equal to 2, since a single first signal module 11 corresponds to x rows of light-emitting sub-pixels 20, the n rows of light-emitting sub-pixels 20 correspond to (n / x) first signal modules 11.

[0101] The first electrode corresponding to the light-emitting sub-pixel 20 connected to one first signal module 11 is insulated from the first electrodes corresponding to the light-emitting sub-pixels 20 connected to other first signal modules 11 .

[0102] Exemplarily, when the first signal module 11 is connected to the first electrode corresponding to a group of light-emitting sub-pixels 20, the first electrode corresponding to the group of light-emitting sub-pixels 20 is insulated from the first electrode corresponding to the previous group of light-emitting sub-pixels 20, and the first electrode corresponding to the group of light-emitting sub-pixels 20 is insulated from the first electrode corresponding to the next group of light-emitting sub-pixels 20.

[0103] When the first signal module 11 is connected to the first electrodes corresponding to the x-row light-emitting sub-pixels 20, the first electrodes corresponding to the light-emitting sub-pixels 20 in each row of the x-row light-emitting sub-pixels 20 are electrically connected to each other, the first electrodes corresponding to the first row of light-emitting sub-pixels 20 in the x-row are isolated from the first electrodes corresponding to the previous row of light-emitting sub-pixels 20, and the first electrodes corresponding to the last row of light-emitting sub-pixels 20 in the x-row are isolated from the first electrodes corresponding to the next row of light-emitting sub-pixels 20.

[0104] Taking a group of light-emitting sub-pixels 20 including three consecutive rows of light-emitting sub-pixels 20 as an example, when a certain first signal module 11 is connected to the first electrodes corresponding to the light-emitting sub-pixels 20 in the 101st to 103rd rows, the first electrodes corresponding to the light-emitting sub-pixels 20 in the 101st to 103rd rows are electrically connected to each other, the first electrode corresponding to the light-emitting sub-pixels 20 in the 101st row is insulated and isolated from the first electrode corresponding to the light-emitting sub-pixels 20 in the 100th row, and the first electrode corresponding to the light-emitting sub-pixels 20 in the 103rd row is insulated and isolated from the first electrode corresponding to the light-emitting sub-pixels 20 in the 104th row.

[0105] When the first signal module 11 is turned on, the first voltage signal line ELVSS can be connected to the first electrode of the corresponding row or rows of light-emitting sub-pixels 20 through the first signal module 11. At this time, the first electrode of the row or rows of light-emitting sub-pixels 20 can receive the voltage signal provided by the first voltage signal line ELVSS. When the second electrode of the row or rows of light-emitting sub-pixels 20 can receive the second power supply signal provided by the second voltage signal line, and the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the light-on voltage of the light-emitting sub-pixel 20, that is, (Vn3-Vn4)>Von, the light-emitting sub-pixel 20 can emit light under the drive of the voltage signal and the second power supply signal.

[0106] As an optional implementation, Figure 6The light-emitting sub-pixel 20 may include a pixel driving circuit 21 and a light-emitting element L. The first electrode of the light-emitting sub-pixel 20 may be a cathode of the light-emitting element L, and the second electrode of the light-emitting sub-pixel 20 may be an anode of the light-emitting element L. The voltage signal received by the first electrode of the light-emitting sub-pixel 20 may be a negative power supply signal ELVSS, and the second electrode of the light-emitting sub-pixel 20 receives a driving current, the current magnitude of which may be controlled by a driving transistor in the pixel driving circuit 21.

[0107] The anode of the light emitting element L can receive a driving current through the pixel driving circuit 21, and the first electrode (e.g., cathode) of the light emitting element L can receive a negative power signal ELVSS through the first voltage signal line ELVSS. The pixel driving circuit 21 can be connected between the positive power signal ELVDD and the anode of the light emitting element L, and the driving transistor in the pixel driving circuit 21 can generate a driving current according to its gate-source voltage difference to drive the light emitting element L to emit light.

[0108] Understandably, Figure 6 In the figure, the pixel driving circuit 21 is only described as 2T1C as an example. In addition, the pixel driving circuit 21 can also be a circuit structure of 3T1C, 4T2C, 5T1C, 7T1C, 8T1C, etc., which is not limited here.

[0109] In the related art, the first electrode (e.g., cathode) of the light-emitting element L in the light-emitting sub-pixel 20 is entirely covered on the display panel. In an optional embodiment of the present application, an isolation structure is provided between the first electrodes (e.g., cathodes) of the light-emitting elements L, and the isolation structure can separate the first electrodes (e.g., cathodes) between adjacent light-emitting elements L for isolation and insulation; the first electrodes (e.g., cathodes) between adjacent light-emitting elements L can also be connected for electrical connection.

[0110] If the isolation structure between the first electrodes (e.g., cathodes) of two adjacent light-emitting sub-pixels 20 is a conductive material, the first electrodes (e.g., cathodes) of the two adjacent light-emitting sub-pixels 20 can be electrically connected through the isolation structure. When the first voltage signal line ELVSS is electrically connected to one of the first electrodes (e.g., cathodes), the same power signal can be provided to the two first electrodes (e.g., cathodes).

[0111] If the isolation structure between the first electrodes (for example, cathodes) corresponding to two adjacent light-emitting sub-pixels 20 can play an insulating role, the isolation structure can insulate and isolate the first electrodes (for example, cathodes) corresponding to the two adjacent light-emitting sub-pixels 20. When the first voltage signal line ELVSS is electrically connected to one of the first electrodes (for example, cathode), the other first electrode (for example, cathode) will not receive the power signal provided by the voltage signal line.

[0112] like Figure 7 As shown, taking the first electrodes (e.g., cathodes) corresponding to two adjacent rows of light-emitting sub-pixels 20 as an example, in this embodiment, each group of light-emitting sub-pixels 20 includes only one row of light-emitting sub-pixels 20, AP is the pixel opening area corresponding to each light-emitting sub-pixel 20, IS is the isolation structure of the light-emitting sub-pixel, and Area is the isolation area in the isolation structure between the two rows of light-emitting sub-pixels. It can be understood that the potentials of the first electrodes corresponding to the light-emitting sub-pixels 20 in the same row are consistent, and the first electrodes corresponding to the light-emitting sub-pixels 20 in different rows are insulated and isolated, so there may be differences in potential.

[0113] Figure 8 The schematic diagram of the layer structure in which two rows of light-emitting sub-pixels 20 located in two adjacent groups are isolated and insulated by isolation columns; the cathodes Cathode of the two light-emitting sub-pixels 20 are connected to the same isolation column IS, and the isolation column IS is provided with an isolation groove Area, and the positive projection of the isolation groove Area on the substrate is located between the positive projections of the two adjacent groups of light-emitting sub-pixels 20 on the substrate. The isolation groove Area can separate the isolation column IS into two sub-isolation columns IS1, and realize the insulation between the two sub-isolation columns IS1, so that the cathodes Cathode of the two light-emitting sub-pixels 20 are insulated from each other.

[0114] The method of isolating the first electrodes corresponding to the light-emitting sub-pixels 20 in each row from each other may be to isolate the first electrodes corresponding to the light-emitting sub-pixels 20 in each row through the above-mentioned isolation structure. For example, when the first signal module 11 is connected to the first electrodes corresponding to a row of light-emitting sub-pixels 20, the above-mentioned isolation structure may be provided to isolate the first electrodes of the light-emitting sub-pixels 20 in the row from the first electrodes of the light-emitting sub-pixels 20 in the adjacent row, and at the same time, the first electrodes corresponding to the light-emitting sub-pixels 20 in the row are electrically connected to each other.

[0115] Similarly, when the first signal module 11 is connected to the first electrodes corresponding to the multiple rows of light-emitting sub-pixels 20 , the first electrodes of the multiple rows of light-emitting sub-pixels 20 can be electrically connected to each other by providing the above-mentioned isolation structure.

[0116] When the first voltage signal line ELVSS is connected to the first electrodes corresponding to one or more rows of light-emitting sub-pixels 20 through the first signal module 11, the first voltage signal line ELVSS can provide the same voltage signal to all the light-emitting elements L in one or more rows of light-emitting sub-pixels 20, while the light-emitting elements L in the remaining rows of light-emitting sub-pixels 20 that are not connected to the first signal module 11 cannot receive the voltage signal through the first signal module 11.

[0117] It should be noted that in addition to the above-mentioned isolation structure, other methods may be used to achieve insulation isolation between rows of light-emitting sub-pixels 20. For example, the first electrode (such as the cathode) of the light-emitting element L in the light-emitting sub-pixel 20 may not cover the entire surface of the display panel, but the first electrodes of the light-emitting sub-pixels 20 in each row are arranged in sequence, and the first electrodes of the light-emitting sub-pixels 20 in adjacent rows are insulated from each other.

[0118] In the light-emitting element L of the light-emitting sub-pixel 20, there is a parasitic capacitor between the anode and cathode of the light-emitting element L. When the first signal module 11 is turned on, the light-emitting element L emits light under the driving current provided by the pixel driving circuit 21, and the parasitic capacitor can store a certain charge. When the first signal module 11 is turned off, due to the characteristic that the voltage across the parasitic capacitor cannot change suddenly, the potential of the first electrode corresponding to each light-emitting sub-pixel 20 is still the signal voltage of the voltage signal, but as the electrons stored in the parasitic capacitor continuously recombine with holes in the light-emitting element L to emit light, the voltage across the parasitic capacitor will gradually decrease, so that the potential of the first electrode of the light-emitting element L gradually approaches the potential of the second electrode, and the brightness of the light-emitting element L will also gradually decrease. When the potential difference between the second electrode and the first electrode of the light-emitting element L, that is, the voltage difference (Vn3-Vn4) between the N3 node and the N4 node is reduced to less than the light-on voltage Von of the light-emitting element L, the light-emitting element L will be extinguished. That is, after the first signal module 11 is disconnected, the potential of the first electrode corresponding to the light-emitting sub-pixel 20 connected to the first signal module 11 will gradually approach the potential of the second electrode, and the brightness of the light-emitting element L will gradually decrease until it is extinguished.

[0119] When the light-emitting element L of the light-emitting sub-pixel 20 is extinguished, it is equivalent to that the light-emitting sub-pixel 20 is in a non-light-emitting stage. At this time, data voltage writing and initialization steps can be performed on one or more rows of light-emitting sub-pixels 20 in the non-light-emitting stage, so that when the light-emitting sub-pixel 20 re-enters the light-emitting stage, it can display the target brightness corresponding to the data voltage.

[0120] In this embodiment, by setting the first signal module 11, one or more rows of light-emitting sub-pixels 20 can be connected to the first voltage signal line ELVSS through the first signal module 11. When the first signal module 11 is turned on, the first electrode of the light-emitting sub-pixel 20 can receive the voltage signal provided by the first voltage signal line ELVSS and is in the light-emitting stage; when the first signal module 11 is turned off, the first electrode of the light-emitting sub-pixel 20 cannot receive the voltage signal and is in the non-light-emitting stage. By controlling the on and off of the first signal module 11, the light-emitting sub-pixel 20 can be switched between the light-emitting stage and the non-light-emitting stage, thereby realizing independent light-emitting control of each group of light-emitting sub-pixels 20. When multiple first signal modules 11 are set in the display panel, each group of light-emitting sub-pixels 20 can be independently controlled by multiple first signal modules 11, thereby realizing the lighting of the light-emitting sub-pixels 20 group by group.

[0121] Please refer to Fig. 9 In some embodiments, the first signal module 11 may include a first transistor T1, a first electrode of the first transistor T1 is connected to a first voltage signal line ELVSS, a second electrode of the first transistor T1 is connected to a first electrode of a group of light-emitting sub-pixels 20, and a gate of the first transistor T1 is connected to a first control signal line EM.

[0122] The first control signal line EM can provide a light-emitting signal and a non-light-emitting signal. The first transistor T1 is turned on under the light-emitting signal and is turned off under the non-light-emitting signal.

[0123] Please refer to Fig.10 , the high level signal of the first control signal line EM is a non-luminous signal, and the low level signal is a luminous signal. When the first control signal line EM provides a high level signal, the first signal module 11 is disconnected, and the potential of the N4 node, that is, the potential of the first electrode, will gradually rise until the voltage difference between the second electrode and the first electrode of the luminous sub-pixel 20 is lower than the start-up voltage. During the time interval of the high level signal provided by the first control signal line EM, the scanning signal can provide a high level pulse as an enable valid signal, so that the data writing transistor in the pixel driving circuit 21 is turned on, and the data signal Vdata can be written into the luminous sub-pixel 20 at this time, realizing the data signal writing in the non-luminous stage.

[0124] Please refer to Fig.11 In some embodiments, the power selection circuit may further include a second signal module 12, and the voltage signal line may further include a second voltage signal line. Fig.11 The second voltage signal line is REF, but is not limited thereto.

[0125] The second signal module 12 includes a first end, a second end and a control end. The first end of the second signal module 12 is connected to the second voltage signal line, the second end of the second signal module 12 is connected to the second end of the first signal module 11, and the control end of the second signal module 12 is connected to the second control signal line. Fig.11 The second control signal line is Ex.

[0126] The voltage signal in the second voltage signal line is greater than the difference between the voltage of the second electrode of the light-emitting sub-pixel 20 and the light-on voltage of the light-emitting sub-pixel 20. That is, when the second voltage signal line provides a voltage signal to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is less than the light-on voltage of the light-emitting sub-pixel 20, and the light-emitting sub-pixel 20 does not emit light.

[0127] When the second signal module 12 is turned on, the first electrode corresponding to the light-emitting sub-pixel 20 can receive the voltage signal provided by the second voltage signal line through the second signal module 12, and the potential of the first electrode corresponding to the light-emitting sub-pixel 20 becomes the signal voltage of the second voltage signal line. At this time, the voltage difference between the second electrode and the first electrode corresponding to the light-emitting sub-pixel 20 should be lower than the light-on voltage of the light-emitting sub-pixel 20. That is, when the second signal module 12 is turned on, the second voltage signal line can adjust the potential of the first electrode corresponding to the light-emitting sub-pixel 20, so that the light-emitting element L in the light-emitting sub-pixel 20 is extinguished because the voltage difference between the two ends is lower than the light-on voltage.

[0128] Taking the first electrode as the cathode as an example, in order to make the voltage across the light-emitting element L lower than the start-up voltage, the voltage signal should raise the potential of the first electrode, that is, the signal voltage of the voltage signal should be higher than the signal voltage of the voltage signal. When the first signal module 11 is turned on, the voltage signal cannot raise the potential of the first electrode. Therefore, when the second signal module 12 is turned on, in order to effectively adjust the potential of the first electrode, the first signal module 11 is in a disconnected state.

[0129] Please refer to Fig.12 The first signal module 11 may include a first transistor T1, a first electrode of the first transistor T1 is connected to the first voltage signal line ELVSS, a second electrode of the first transistor T1 is connected to a first electrode of a group of light-emitting sub-pixels 20, and a gate of the first transistor T1 is connected to the first control signal line EM.

[0130] The second signal module 12 may include a second transistor T2, a first end of the second transistor T2 is connected to the initialization signal line, a first electrode of the second transistor T2 is connected to the second voltage signal line, a second electrode of the second transistor T2 is connected to the second electrode of the first transistor T1, and a gate of the second transistor T2 is connected to the second control signal line.

[0131] In some embodiments, the type of the first transistor T1 may be opposite to the type of the second transistor T2 , and the signal in the first control signal line EM and the signal in the second control signal line EM are the same signal.

[0132] It is understandable that under the same control signal, the conduction states of transistors of different types are opposite, that is, when one transistor is turned on, the other transistor is in the off state.

[0133] As an optional embodiment, one of the first transistor T1 and the second transistor T2 may be an N-type transistor, and the other may be a P-type transistor. When the first transistor T1 and the second transistor T2 are N-type and P-type, respectively, the two transistors can be in opposite states through the same control signal. That is, only one of the first transistor T1 and the second transistor T2 is in the on state. When the first transistor T1 is turned on, the light-emitting sub-pixel 20 is in the light-emitting stage, and when the second transistor T2 is turned on, the light-emitting sub-pixel 20 is in the non-light-emitting stage.

[0134] In some embodiments, the type of the first transistor T1 may be the same as the type of the second transistor T2 , and the signal in the first control signal line EM and the signal in the second control signal line EM are opposite signals.

[0135] The signal in the above-mentioned first control signal line EM and the signal in the second control signal line are opposite signals, which means that when the first control signal line EM provides a turn-on signal to drive the first transistor T1 to turn on, the second control signal line provides a turn-off signal to drive the second transistor T2 to turn off; when the second control signal line provides a turn-on signal to drive the second transistor T2 to turn on, the first control signal line EM provides a turn-off signal to drive the first transistor T1 to turn off.

[0136] In some embodiments, the signal in the first control signal line EM and the signal in the second control signal line are both step-by-step shift signals.

[0137] Taking the first control signal line EM as an example, when each first control signal line EM provides a step-by-step shifted effective signal to each first signal module 11, each first signal module 11 will disconnect the first electrode of the corresponding light-emitting sub-pixel from the first voltage signal line one by one.

[0138] Similarly, when each second control signal line provides a step-by-step shifted effective signal to each second signal module 12, each second signal module 12 will connect the first electrode of the corresponding light-emitting sub-pixel to the second voltage signal line one by one. For a certain group of light-emitting sub-pixels 20, when they are connected to the first voltage signal line, they are in the light-emitting stage, and the light-emitting sub-pixels 20 can emit light when receiving the driving current; when they are disconnected from the first voltage signal line and connected to the second voltage signal line, so that the voltage (Vn3-Vn4) between the second electrode and the first electrode of the light-emitting element L is reduced to a level lower than the start-up voltage Von of the light-emitting element L, they are in the non-light-emitting stage, and the light-emitting sub-pixels 20 do not emit light.

[0139] In some embodiments, the signal duty cycle of the first control signal line EM and the signal duty cycle of the second control signal line EM can be adjusted.

[0140] When the first control signal line EM provides a turn-on signal, the first transistor T1 is in a turn-on state, and the light-emitting sub-pixel 20 connected to the first transistor T1 can emit light. When the first control signal line EM provides a cut-off signal, the first transistor T1 is in a cut-off state, and the light-emitting sub-pixel 20 connected to the first transistor T1 does not emit light. By adjusting the duty cycle of the first control signal line EM, the actual light-emitting time of the light-emitting sub-pixel 20 in the light-emitting stage of a single light-emitting frame can also be adjusted, thereby adjusting the light-emitting brightness in a PWM driving manner.

[0141] Please refer to Fig.13 In some embodiments, the second voltage signal line may be an initialization signal line, and the second control signal line may be a row drive signal line.

[0142] Taking a single first signal module 11 in a single luminous frame as an example, the first control signal line EM can provide a non-luminous signal in a first time interval, and the first signal module 11 receives the non-luminous signal in the first time interval and is disconnected. At this time, the luminous sub-pixel 20 connected to the first signal module 11 is in a non-luminous stage.

[0143] The row drive signal line can provide an initialization control signal within the second time interval, and the second signal module 12 can receive the initialization control signal and turn on within the second time interval. When the second signal module 12 is turned on, the initialization signal provided by the initialization signal line can pull up the potential of the first electrode, so that the voltage across the light-emitting element L is reduced to below the start-up voltage more quickly, thereby realizing the rapid extinguishing of the light-emitting sub-pixel 20. At this time, in order to enable the potential of the first electrode to be raised, it is necessary to avoid the first voltage signal line ELVSS from being connected to the first electrode, that is, during the second time interval during which the second signal module 12 is turned on, the first signal module 11 should always remain in a disconnected state. Therefore, the first time interval during which the first control signal line EM provides a non-luminous signal can cover the second time interval during which the initialization control signal provided by the row drive signal line is turned on, so that when the second signal module 12 is turned on, the first signal module 11 is in a stable disconnected state.

[0144] Please refer to Fig.14 , the high level signal of the first control signal line EM is a non-luminous signal, and the low level signal is a luminous signal. When the first control signal line EM provides a high level signal, the first signal module 11 is disconnected. In the initialization control signal provided by the row drive signal line, the low level is a valid signal, and when the row drive signal line is a low level signal, the second signal module 12 is turned on. At this time, the potential of the N4 node, that is, the potential of the first electrode, will quickly rise to the initialization voltage Vref, so that the voltage difference between the second electrode and the first electrode of the luminous sub-pixel 20 is lower than the start-up voltage.

[0145] During the time period when the first signal module 11 is disconnected and the second signal module 12 is turned on, the scan signal Scan2 can provide a high-level pulse as an enable valid signal, so that the data writing transistor in the pixel driving circuit 21 is turned on. At this time, the data signal Vdata can be written into the light-emitting sub-pixel 20, thereby realizing the data signal writing in the non-light-emitting stage.

[0146] The first transistor T1 and the second transistor T2 can be configured as P-type transistors. In the related art, the transistors arranged in the display panel are usually TFTs (Thin Film Transistors), and the TFTs include N-type TFTs and P-type TFTs. The P-type TFTs are usually LTPS (Low Temperature Poly-Silicon) TFTs, etc., and the N-type TFTs are usually oxide transistors such as IGZO (Indium Gallium Zinc Oxide) TFTs. Since LTPS TFTs have the characteristics of small area and high mobility compared to IGZO TFTs, the use of P-type transistors connected between the first electrode and the signal line can improve the charging efficiency of the first electrode and reduce the overall area of ​​the power selection circuit.

[0147] In some embodiments, the second voltage signal line may be a positive power supply signal line.

[0148] The positive power supply signal line may provide a positive power supply signal ELVDD for the light-emitting sub-pixel 20. When the second signal module 12 is turned on, the first electrode corresponding to the light-emitting sub-pixel 20 is connected to the second voltage signal line, and the voltage difference between the second electrode and the first electrode corresponding to the light-emitting sub-pixel 20 is lower than the turn-on voltage. At this time, the light-emitting element L is in the off state.

[0149] Since the positive power supply signal line is a necessary power supply signal line for the light-emitting sub-pixel 20 to emit light, directly using the positive power supply signal line as the second voltage signal line can also make the potential difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 lower than the turn-on voltage, so that the light-emitting sub-pixel 20 is in the non-light-emitting stage. Compared with using a second voltage signal line that provides other voltage signals, directly reusing the second voltage signal line as the second voltage signal line can reduce the number of signal traces in the display panel and lower the wiring difficulty.

[0150] Please refer to Fig.15 , the high-level signal of the first control signal line EM is a non-light-emitting signal, and the low-level signal is a light-emitting signal. When the high-level signal provided by the first control signal line EM is present, the first signal module 11 is turned off and the second signal module 12 is turned on. At this time, the potential of the N4 node, that is, the potential of the first electrode, will quickly rise to the second power supply signal ELVDD, making the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 lower than the turn-on voltage.

[0151] During the time interval when the first signal module 11 is turned off and the second signal module 12 is turned on, the scan signal Scan can provide a high-level pulse as an enable valid signal, enabling the data writing transistor in the pixel driving circuit 21 to conduct. At this time, the data signal Vdata can be written into the light-emitting sub-pixel 20, realizing the writing of the data signal in the non-light-emitting stage.

[0152] An embodiment of the present application further provides a display panel. The display panel may include multiple groups of light-emitting sub-pixels 20 arranged in an array and a power supply selection module 1. Among them, the power supply selection module 1 may be the power supply selection module 1 in the above embodiment.

[0153] Among the multiple groups of light-emitting sub-pixels 20 arranged in an array, taking the number of rows of the light-emitting sub-pixels as n as an example, each group of light-emitting sub-pixels 20 may include x consecutive rows of light-emitting sub-pixels 20, where x < n and x is a positive integer.

[0154] When x=1, the number of the plurality of groups of light-emitting sub-pixels 20 is the number of rows of the light-emitting sub-pixels 20 in the display panel. When x>1, the number of the plurality of groups of light-emitting sub-pixels 20 is the number of rows of the light-emitting sub-pixels 20 in the display panel divided by the number of rows of light-emitting sub-pixels x in each group of light-emitting sub-pixels 20, that is, (n / x).

[0155] In the same group of light-emitting sub-pixels 20 , the first electrodes corresponding to any two light-emitting sub-pixels 20 are electrically connected, that is, in the same group of light-emitting sub-pixels 20 , the potentials of the first electrodes corresponding to all the light-emitting sub-pixels 20 are the same.

[0156] In different groups of light-emitting sub-pixels 20, the first electrodes corresponding to any two light-emitting sub-pixels 20 are isolated and insulated from each other. That is, the first electrodes corresponding to the two light-emitting sub-pixels 20 in different groups of light-emitting sub-pixels 20 may be the same or different.

[0157] A power selection circuit is connected to the first electrode of a group of light-emitting sub-pixels 20. When the display panel includes multiple groups of light-emitting sub-pixels 20, multiple power selection modules 1 can be provided to be connected one-to-one with the multiple groups of light-emitting sub-pixels 20. The first end of each power selection module 1 is connected to the voltage signal line, the first end of each power selection module 1 is connected to the first electrode corresponding to a group of light-emitting sub-pixels 20, and the control end of each power selection module 1 is connected to the first control signal line EM.

[0158] In this embodiment, by providing a plurality of power selection modules 1 connected to the first electrodes of each group of light-emitting sub-pixels 20, respectively, the light-emitting state of each group of light-emitting sub-pixels 20 can be controlled by the power selection modules 1. By sequentially controlling each power selection module 1 to be disconnected, the light-emitting sub-pixels 20 of each group of light-emitting sub-pixels 20 can be sequentially entered into the non-light-emitting stage, and by sequentially controlling each power selection module 1 to be turned on, the light-emitting sub-pixels 20 of each group of light-emitting sub-pixels 20 can be sequentially entered into the light-emitting stage. Since the light-emitting stage and the non-light-emitting stage of each group of light-emitting sub-pixels 20 can be adjusted independently, each group of light-emitting sub-pixels 20 can be lit up group by group.

[0159] In some embodiments, the first electrodes of the light-emitting sub-pixels 20 in adjacent rows in the same group are electrically connected via isolation columns.

[0160] When a group of light-emitting sub-pixels 20 includes at least two rows of light-emitting sub-pixels 20, the first electrodes of adjacent rows of light-emitting sub-pixels 20 can be electrically connected through isolation columns. When the first electrodes of any row of light-emitting sub-pixels 20 are connected to the voltage signal line through the power selection circuit, the adjacent row of light-emitting sub-pixels 20 electrically connected to the row of light-emitting sub-pixels 20 through the isolation columns are also equivalent to being connected to the voltage signal line.

[0161] like Figure 8As shown, in some embodiments, the isolation column IS between the light-emitting sub-pixels 20 of different groups and adjacent rows is provided with an isolation groove Area, which can separate the isolation column IS into two sub-isolation columns IS1, and the two sub-isolation columns IS1 are respectively a first sub-isolation column and a second sub-isolation column. The first sub-isolation column and the second sub-isolation column are insulated.

[0162] In two adjacent pixel rows in different groups, one row of light-emitting sub-pixels 20 is electrically connected to the first sub-isolating column, and the other row of light-emitting sub-pixels 20 is electrically connected to the second sub-isolating column. That is, the first electrodes of the two adjacent pixel rows in different groups are insulated from each other.

[0163] In some embodiments, the isolation column may include a metal isolation column.

[0164] In some embodiments, in a single group extending direction perpendicular to the light-emitting sub-pixels 20 , the cross-sectional shape of the conductive portion of the isolation column may include but is not limited to a T-shape or an inverted trapezoid.

[0165] As an optional implementation, the power selection circuit can be connected to the isolation column. Since the isolation column can connect two adjacent rows of light-emitting sub-pixels 20 in the same group of light-emitting sub-pixels 20, when the power selection circuit is turned on, it can transmit the voltage signal of the voltage signal line to the isolation column, and the isolation column can provide a voltage signal for the first electrode of the two adjacent rows of light-emitting sub-pixels 20. At the same time, other rows of light-emitting sub-pixels 20 in the same group that are directly or indirectly electrically connected to the two rows of light-emitting sub-pixels 20 can also receive the voltage signal.

[0166] Please refer to Fig.16 , Fig.16 In the example, a single group of light-emitting sub-pixels 20 including x rows of continuous light-emitting sub-pixels 20 is used. In the light-emitting sub-pixels 20 in n rows and m columns, n / 2 power selection modules 1 are correspondingly arranged. Fig.12 As shown, n / 2 power selection modules 1 are connected to the first control signal lines EM_1, EM_2, ..., EM_n / 2 respectively. By outputting the light control signal row by row through the multiple first control signal lines EM, the n / 2 power selection modules 1 can be turned on one by one.

[0167] Please refer to Fig.17, when a single group of light-emitting sub-pixels 20 includes x rows of continuous light-emitting sub-pixels 20, taking the first control signal line EM_1 as an example, when the first control signal line EM_1 provides a high-level signal, the light-emitting sub-pixels 20 in the first and second rows are both in a non-light-emitting state, and at this time, the scanning signals Scan_1 and Scan_2 can be provided in sequence to write data signals to the light-emitting sub-pixels 20 in the first and second rows. Similarly, when the first control signal line EM_n / 2 provides a high-level signal, the light-emitting sub-pixels 20 in the n-1th row and the nth row are both in a non-light-emitting state, and at this time, the scanning signals Scan_1 and Scan_2 can be provided in sequence to write data signals to the light-emitting sub-pixels 20 in the n-1th row and the nth row.

[0168] Likewise, Fig.18 and Fig. 20 The schematic diagrams of the circuit structure of the display panel of the power selection module 1 in two other embodiments are respectively shown. Fig.18 and Fig. 20 It is also taken as an example that a single group of light-emitting sub-pixels 20 includes x rows of continuous light-emitting sub-pixels 20 . Fig.19 for Fig.18 The signal timing diagram corresponding to the circuit architecture, Fig.21 for Fig. 20 The signal timing diagram corresponding to the circuit architecture.

[0169] In some embodiments, the display panel may further include a plurality of scan signal lines, each of which is electrically connected to a corresponding row of light-emitting sub-pixels 20. The plurality of scan signal lines can output the enable effective level of the scan signal row by row, so that each row of light-emitting sub-pixels 20 can write the data voltage signal row by row.

[0170] When each group of light-emitting sub-pixels 20 includes one row of light-emitting sub-pixels 20, each row of light-emitting sub-pixels 20 is connected to one power selection module 1 and one scanning signal line. When the power selection module 1 corresponding to the row of light-emitting sub-pixels 20 is in the disconnected state, the row of light-emitting sub-pixels 20 is in the non-light-emitting stage, and the scanning signal line can provide an enable effective level for the row of light-emitting sub-pixels 20, so that the data writing transistor in the pixel driving circuit 21 is turned on, and the data voltage can be written into the light-emitting sub-pixels 20 through the data writing transistor.

[0171] When the power selection module 1 is in the on state, the row of light-emitting sub-pixels 20 is in the light-emitting stage, and the data voltage signal written in the non-light-emitting stage can enable the driving transistor in the pixel driving circuit 21 to generate a corresponding driving current, so that the light-emitting sub-pixels 20 display the corresponding target brightness.

[0172] When each group of light-emitting sub-pixels 20 includes at least 2 rows of light-emitting sub-pixels 20, the number of corresponding scanning signal lines in a single group of light-emitting sub-pixels 20 is the number of rows of light-emitting sub-pixels 20. For example, when a single group of light-emitting sub-pixels 20 includes 3 rows of light-emitting sub-pixels 20, the single group of light-emitting sub-pixels 20 corresponds to 3 scanning signal lines.

[0173] It can be understood that the multiple light-emitting sub-pixel rows in the same group of light-emitting sub-pixels 20 have the characteristic of state synchronization. Taking a single group of light-emitting sub-pixels 20 including three rows of light-emitting sub-pixels 20 as an example, when the power selection module 1 is turned on, the three light-emitting sub-pixel rows are all in the light-emitting stage; when the power selection module 1 is turned off, the three light-emitting sub-pixel rows are all in the non-light-emitting stage.

[0174] In a single light-emitting frame, the first control signal line EM can provide a non-light-emitting signal in the first time interval, at which time the first signal module 11 is in a disconnected state in the first time interval, and the three light-emitting sub-pixel rows are all in a non-light-emitting stage. In the non-light-emitting stage, the three scanning signal lines corresponding to the group of light-emitting sub-pixels 20 can sequentially output the enable effective levels of the three scanning signals row by row, so that the three light-emitting sub-pixel rows complete the writing of data signals row by row.

[0175] In some embodiments, within a single image frame, the duration of the first time interval of the first signal module 11 is t1, and the duration of the time interval of the enable effective level of the scanning signal is t2.

[0176] When a single group of light-emitting sub-pixels 20 includes x rows of light-emitting sub-pixels 20, in order to enable the first signal module 11 to complete the writing of data signals for the x rows of light-emitting sub-pixels 20 row by row in the disconnected state, the following conditions should be met:

[0177] t1 ≥ x*t2;

[0178] That is, the duration for x rows of light-emitting sub-pixels 20 to complete x data signal writing in sequence should be in the off state of the first signal module 11. That is, the off time of the first signal module 11 should at least include the enable effective levels of x scanning signals.

[0179] In some embodiments, the display panel may include a display area and a non-display area, the light-emitting sub-pixel 20 is located in the display area, and the power selection circuit is located in the non-display area.

[0180] The power selection module 1 is arranged in the non-display area, and can be connected to the first electrode corresponding to the light-emitting sub-pixel 20 at the junction area of ​​the display area and the non-display area through a signal line. The display area only includes the light-emitting sub-pixels 20. On the basis of being able to realize the function of lighting up the light-emitting sub-pixels row by row, the number of transistors of the pixel driving circuit 21 in the light-emitting sub-pixels 20 can be effectively reduced, thereby reducing the area of ​​a single light-emitting sub-pixel 20 and improving the PPI of the display panel. The power selection module 1 is arranged in the non-display area, which can also avoid occupying the area of ​​the display area and improve the PPI of the display panel.

[0181] In some embodiments, the non-display area may be located at least on one side of the display area. The power selection circuit in the non-display area may connect the first electrode corresponding to the light-emitting sub-pixel 20 via a signal line at the interface between the display area and the non-display area.

[0182] In some embodiments, the non-display area is located on two opposite sides of the display area, that is, the non-display area may include a first non-display area and a second non-display area, the first non-display area is located on one side of the display area along the first direction, and the second non-display area is located on the other side of the display area along the first direction. Wherein, the first non-display area and the second non-display area both include a power selection circuit.

[0183] For one of the multiple groups of light-emitting sub-pixels 20 , the group of light-emitting sub-pixels 20 may be connected to the power selection circuit in the first non-display area, or may be connected to the power selection circuit in the second non-display area.

[0184] In some embodiments, the first electrodes of the light-emitting sub-pixels 20 in the same row are respectively connected to power selection circuits in a plurality of non-display areas.

[0185] A certain group of light-emitting sub-pixels 20 can be connected to multiple power selection circuits. Multiple power selection circuits can be controlled by the same control signal. Compared with using a single power selection module 1 to connect a group of light-emitting sub-pixels 20, using multiple power selection modules 1 and a group of light-emitting sub-pixels 20 can effectively reduce the number of light-emitting sub-pixels 20 that need to be driven by a single power selection module 1, and improve the driving capability of the power selection module 1.

[0186] In some embodiments, the first electrodes of the same row of light-emitting sub-pixels are connected to two power selection circuits, and among the two power selection circuits connected to the first electrodes of the same row of light-emitting sub-pixels, one power selection circuit is located in a non-display area on one side of the display area, and the other power selection circuit is located in a non-display area on the opposite side of the display area.

[0187] Of the two power selection modules 1 connected to the same row of light-emitting sub-pixels 20, one is connected to the first electrode corresponding to the light-emitting sub-pixel 20 through a signal line starting from the first non-display area, and the other is connected to the first electrode corresponding to the light-emitting sub-pixel 20 through a signal line starting from the second non-display area. The light-emitting sub-pixels 20 in the same row can be connected to the two power selection modules 1 on both sides of the display area, respectively.

[0188] Compared with using a single power selection module 1 connected to a group of light-emitting sub-pixels 20, arranging two power selection modules 1 on both sides of the display area can effectively reduce the number of light-emitting sub-pixels 20 that need to be driven by a single power selection module 1, and improve the driving ability of the power selection module 1. In addition, the two power selection modules 1 are arranged on both sides of the display area, which can also avoid the uneven brightness between the light-emitting sub-pixels 20 that are farther away and the light-emitting sub-pixels 20 that are closer in the same row under a single power module, thereby improving the brightness uniformity of the display panel.

[0189] It should be noted that the arrangement of the multiple power selection modules 1 can be that all the power selection modules 1 are arranged in the first non-display area, or that all the power selection modules 1 are arranged in the second non-display area, or that some of the power selection modules 1 are arranged in the first non-display area and other power selection modules 1 are arranged in the second non-display area.

[0190] In some embodiments, two power selection modules 1 corresponding to any two adjacent groups of light-emitting sub-pixels 20 are respectively located in the first non-display area and the second non-display area. That is, multiple power selection modules 1 are alternately arranged in the first non-display area and the second non-display area.

[0191] By alternately arranging a plurality of power selection modules 1 in the first non-display area and the second non-display area, it is possible to avoid too many power selection modules 1 in one of the first non-display area and the second non-display area, thereby avoiding an excessively large border area and achieving a narrow border effect.

[0192] In some embodiments, the display panel may further include a plurality of shift register units.

[0193] A plurality of shift register units are arranged in the non-display area, and each shift register unit is connected to a corresponding first control signal line EM. That is, the plurality of shift register units are used to generate a light emitting control signal row by row. The first control signal line EM may extend in the non-display area and be connected to the power selection module 1 .

[0194] The shift register unit and the first control signal line EM are both located in the non-display area, and the length of the signal line can be greatly reduced, thereby avoiding the influence of the impedance on the signal line on the light-emitting control signal and reducing the number of signal lines in the display area.

[0195] Figure 22 to Figure 27 The signal timing diagrams of a single light-emitting frame under three driving modes and the light-emitting state diagrams of each row of light-emitting sub-pixels 20 are respectively shown. Fig. 22 In the related art, the number of transistors in the pixel driving circuit 21 is reduced, resulting in a signal timing diagram of the light-emitting sub-pixels 20 that cannot be lit up row by row or group by group. Fig.23 for Fig. 22 The schematic diagram of the light-emitting state of each row of light-emitting sub-pixels 20 under the signal timing diagram. Fig.23 In the figure, the horizontal direction is the serial number of each stage in a single light-emitting frame, and the vertical direction is the row number of each row of light-emitting sub-pixels 20. That is, in the first frame, there are n data writing stages and 1 light-emitting stage L. The first data writing stage is for writing data to the light-emitting sub-pixels in the first row, and the nth data writing stage is for writing data to the light-emitting sub-pixels in the nth row. Since all light-emitting sub-pixels 10 need to enter the non-light-emitting stage synchronously, the data voltage Vdata needs to be written row by row in the non-light-emitting stage, so the duration of the non-light-emitting stage is at least the sum of the durations of the n data writing stages, which will greatly reduce the time of the light-emitting stage. At this time, the time that all light-emitting sub-pixels 10 in a single light-emitting frame are not emitting light is greatly increased. At any time, the probability that all pixels are turned off is greatly increased, thereby causing a more serious flickering phenomenon visually.

[0196] Fig.24 2 is a signal timing diagram of each row of light-emitting sub-pixels 20 under the driving mode adopted in the embodiment of the present application. Fig.24 As shown, taking each group of light-emitting sub-pixels 20 including one row as an example, the non-light-emitting stages of each group of light-emitting sub-pixels 20 can be staggered, so that at any moment, only part of the light-emitting sub-pixels 20 do not emit light, which can effectively improve the flicker phenomenon.

[0197] Fig.25 for Fig.24 Schematic diagram of the light-emitting state of each row of light-emitting sub-pixels 20 under the control of the signal timing. It can be understood that the light-emitting sub-pixels in the first row are written with data in the first stage, the light-emitting sub-pixels in the second row are written with data in the second stage, and the light-emitting sub-pixels in the nth row are written with data in the nth stage. Each row of light-emitting sub-pixels 20 can independently write data, thereby greatly increasing the duration of the light-emitting stage in a single light-emitting frame.

[0198] In an optional embodiment, if Fig.26 As shown, when the shift register unit provides the EM signal for each row of light-emitting sub-pixels 20, the shift register unit can also adjust the duty cycle of the light-emitting control signal. Fig. 27 for Fig.26 Schematic diagram of the light-emitting state of each row of light-emitting sub-pixels 20 under the control of the signal timing. Fig. 27As shown, in the light-emitting stage, by controlling the duty cycle of the EM signal, the light-emitting sub-pixel can be in a non-light-emitting state when the EM signal is a non-enable signal in the light-emitting stage. By adjusting the duty cycle of the light-emitting control signal, the total duration of the light-emitting sub-pixel 20 actually emitting light in the light-emitting stage of a single light-emitting frame can be adjusted and controlled to realize the PWM (Pulse width modulation) dimming function.

[0199] As an example, Fig.28 The schematic diagram of the voltage and current waveforms in the driving light-emitting mode in the above embodiment is shown. Taking the voltage signal in the voltage signal line as ELVDD as an example, when the EM signal jumps from a low level to a high level, the voltage of the N4 node gradually increases to ELVDD. At this time, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is less than the turn-on voltage Von, the light-emitting sub-pixel does not emit light, and the light-emitting current flowing through the light-emitting sub-pixel 20 is substantially 0. When the EM signal jumps from a high level to a low level, the potential of the first electrode of the light-emitting sub-pixel 20 drops to ELVSS. At this time, the light-emitting sub-pixel 20 emits light normally, and the light-emitting current flowing through the light-emitting sub-pixel 20 is associated with the data voltage written into the pixel driving circuit 21.

[0200] The present application also provides a display device. Fig.29 The display device may be a PC, a television, a monitor, a mobile terminal, a tablet computer, a wearable device, etc. The display device may include the display panel provided in the embodiment of the present application.

[0201] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0202] It should be noted that, in this article, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or apparatus.

[0203] This article uses specific examples to illustrate the principles and implementation methods of this application. The above examples are only used to help understand the methods and core ideas of this application. The above are only preferred implementation methods of this application. It should be pointed out that due to the limitations of textual expression and the objective existence of infinite specific structures, ordinary technicians in this technical field can make several improvements, modifications or changes without departing from the principles of this application, and can also combine the above technical features in an appropriate manner; these improvements, modifications, changes or combinations, or the direct application of the concepts and technical solutions of this application to other occasions without improvement, should be regarded as the scope of protection of this application.

Claims

1. A power selection circuit, characterized in that: comprising a voltage signal line, wherein the voltage signal line is used to transmit a voltage signal to a first electrode of a light-emitting sub-pixel and control at least two groups of the light-emitting sub-pixels to emit light group by group; Wherein, a group of the light-emitting sub-pixels includes at least one row of the light-emitting sub-pixels.

2. The power selection circuit according to claim 1, characterized in that: The voltage signal line discontinuously transmits a voltage signal which is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel and the light-on voltage of the light-emitting sub-pixel; Preferably, the voltage signal line transmits a voltage signal which is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel, and a voltage signal which is larger than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel in a time-sharing manner.

3. The power selection circuit according to claim 1, characterized in that: It also includes a first signal module, and the voltage signal line includes a first voltage signal line; A first end of the first signal module is connected to the first voltage signal line, a second end of the first signal module is connected to a group of first electrodes of the light-emitting sub-pixels, and a control end of the first signal module is connected to a first control signal line; The voltage signal transmitted in the first voltage signal line is smaller than the difference between the second electrode voltage of the light-emitting sub-pixel and the light-on voltage of the light-emitting sub-pixel.

4. The power selection circuit according to claim 3, characterized in that: It also includes a second signal module, and the voltage signal line also includes a second voltage signal line; The first end of the second signal module is connected to the second voltage signal line, the second end of the second signal module is connected to the second end of the first signal module, and the control end of the second signal module is connected to the second control signal line; The voltage signal transmitted in the second voltage signal line is greater than the difference between the second electrode voltage of the light-emitting sub-pixel and the light-on voltage of the light-emitting sub-pixel.

5. The power selection circuit according to claim 4, characterized in that: The first signal module comprises a first transistor, a first electrode of the first transistor is connected to the first voltage signal line, a second electrode of the first transistor is connected to a first electrode of a group of light-emitting sub-pixels, and a gate of the first transistor is connected to the first control signal line; The second signal module includes a second transistor, a first electrode of the second transistor is connected to the second voltage signal line, a second electrode of the second transistor is connected to the second electrode of the first transistor, and a gate of the second transistor is connected to the second control signal line.

6. The power selection circuit according to claim 5, characterized in that: The type of the first transistor is opposite to the type of the second transistor, and the signal in the first control signal line and the signal in the second control signal line are the same signal.

7. The power selection circuit according to claim 5, characterized in that: The type of the first transistor is the same as the type of the second transistor, and the signal in the first control signal line and the signal in the second control signal line are opposite signals.

8. The power selection circuit according to any one of claims 4 to 7, characterized in that: The signal in the first control signal line and the signal in the second control signal line are both step-by-step shift signals; Preferably, the duty cycle of the signal in the first control signal line and the duty cycle of the signal in the second control signal line are both adjustable.

9. A display panel, characterized in that: comprising a power selection circuit as claimed in any one of claims 1 to 8, and A plurality of groups of light-emitting sub-pixels arranged in an array, each group of the light-emitting sub-pixels comprising at least one row of the light-emitting sub-pixels, the first electrodes of the light-emitting sub-pixels in the same group being electrically connected, and the first electrodes of the light-emitting sub-pixels in different groups being insulated from each other; One of the power selection circuits is connected to the first electrodes of a group of the light-emitting sub-pixels.

10. The display panel according to claim 9, characterized in that: The first electrodes of the light-emitting sub-pixels in adjacent rows in the same group are electrically connected via isolation columns; Preferably, a partition groove is provided in the isolation column between the light-emitting sub-pixels in different groups and adjacent rows, and the partition groove is used to separate the isolation column into a first sub-isolation column and a second sub-isolation column, the first sub-isolation column and the second sub-isolation column are insulated, the light-emitting sub-pixels in one row in different groups and adjacent rows are electrically connected to the first sub-isolation column, and the light-emitting sub-pixels in another row in different groups and adjacent rows are electrically connected to the second sub-isolation column; Preferably, the power selection circuit is electrically connected to the isolation column; Preferably, the isolation column comprises a metal isolation column; Preferably, in a direction perpendicular to the single group extension direction of the light-emitting sub-pixels, the cross-sectional shape of the conductive portion of the isolation column includes a T-shape or an inverted trapezoid.

11. The display panel according to claim 9, characterized in that: The display panel comprises a display area and a non-display area, the light-emitting sub-pixel is located in the display area, and the power selection circuit is located in the non-display area.

12. The display panel according to claim 11, characterized in that: The non-display area is located on at least one side of the display area; Preferably, the non-display area is located on two opposite sides of the display area, and the non-display area on each side includes the power selection circuit; Preferably, the first electrodes of the light-emitting sub-pixels in the same row are connected to a plurality of the power selection circuits; Preferably, the first electrodes of the light-emitting sub-pixels in the same row are connected to the two power selection circuits, and among the two power selection circuits connected to the first electrodes of the light-emitting sub-pixels in the same row, one of the power selection circuits is located in the non-display area on one side of the display area, and the other power selection circuit is located in the non-display area on the opposite side of the display area.

13. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 9 to 12.

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