Chip packaging structure and packaging method of copper-cylinder-free wafer

Abstract

The embodiment of the invention discloses a chip packaging structure and packaging method of a copper-cylinder-free wafer. The chip packaging structure comprises a plastic packaging layer and a chip packaged in the plastic packaging layer. The chip surface of the chip is provided with metal pins, and the metal pins are electrically connected with multiple layers of circuits exposed out of the plastic packaging layer; and the metal pins are electrically connected with the multiple layers of circuits through metal ball structures manufactured by a ball mounting process. According to the chip packaging structure of the copper-cylinder-free wafer provided by the invention, Buffing packaging is replaced by ball mounting, and the metal ball structure is manufactured on the metal pin of the chip through a ball mounting process before circuit manufacturing, so that the manufacturing and connection of a subsequent circuit are not influenced, the problem that a small-size chip copper cylinder cannot be manufactured by Buffing packaging can be solved, the copper-cylinder-free wafer can be stably packaged, and the production efficiency of the copper-cylinder-free wafer is improved. The ball mounting process is completed during packaging, the overall production efficiency of the wafer is improved, and the packaging cost can be reduced by combining with PLP packaging.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a chip packaging structure and packaging method for a copper-free wafer. Background Art

[0002] Wafer packaging refers to encapsulating and protecting independent chips with plastic shells to protect chip components from external damage. After wafer packaging, a series of processes such as curing and electroplating are required.

[0003] The bumping process is usually used in existing wafer packaging operations. The bumping process is also called the convex point process. Generally, the chip is transferred to a double-sided adhesive film, and a plastic encapsulation material is coated on the copper column layer of the wafer to encapsulate the chip for plastic encapsulation and shaping. The pins of the chip are electrically connected to the circuits of the substrate to make a multi-layer circuit to obtain a packaged finished product.

[0004] This method can only package wafers with copper pillars. When the wafer is a wafer without copper pillars, since there are no copper pillar pins exposed on the wafer chip, it will affect the subsequent production and connection of multi-layer circuits on the chip. Summary of the invention

[0005] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a chip packaging structure and packaging method for a copper-free wafer, so as to realize chip packaging without affecting the subsequent circuit manufacturing and connection of the chip, thereby improving wafer production efficiency.

[0006] In a first aspect, the present application provides a chip packaging structure of a copper pillar-free wafer, the chip packaging structure comprising: a plastic packaging layer and a chip packaged in the plastic packaging layer;

[0007] The chip surface of the chip is provided with metal pins, and the metal pins are electrically connected to the multi-layer circuit exposed from the plastic packaging layer;

[0008] The metal pin is electrically connected to the multi-layer circuit through a metal ball structure manufactured by a ball planting process.

[0009] The chip packaging structure of the copper-pillar-free wafer provided in the present application uses ball planting instead of bumping packaging. The metal ball structure is produced on the metal pins of the chip before circuit manufacturing through the ball planting process. The metal pins on the chip surface exposed from the plastic packaging layer of the chip are electrically connected to the multi-layer circuit through the metal ball structure, which does not affect the production and connection of subsequent circuits. It can solve the problem that the bumping package cannot produce small-size chip copper pillars, can stably package copper-pillar-free wafers, and can complete the ball planting process at the same time during packaging, thereby improving the overall production efficiency of the wafer. Combined with PLP packaging, it can reduce the packaging cost.

[0010] In one embodiment of the chip packaging structure of the copper-post-free wafer, the material used for the metal ball structure manufactured by the ball implantation process is gold.

[0011] Gold is used as the ball planting material, which has more stable performance.

[0012] In a second aspect, the present application further provides a chip packaging method for a copper-free wafer, the chip packaging method comprising:

[0013] Transferring the chip to a substrate;

[0014] Flip-chip packaging the chip on the substrate;

[0015] The substrate is removed and separated to obtain a plastic-encapsulated chip, wherein the chip surface of the plastic-encapsulated chip is exposed from the plastic-encapsulation layer, and a metal pin is provided on the chip surface;

[0016] Fabricating a metal ball structure on the metal pin based on a ball planting process;

[0017] The chip is packaged for a second time and a multi-layer circuit is manufactured based on the metal ball structure to obtain a chip packaging structure.

[0018] The chip packaging method for copper-pillar-free wafers provided in the present application packages the chip twice, and uses a ball planting process to make a metal ball structure on the chip between the two packaging processes, so that the chip can be smoothly manufactured with multi-layer circuits after packaging, and ball planting is completed during the packaging process, effectively improving production efficiency.

[0019] In one embodiment of the above-mentioned chip packaging method for copper-free wafers, the substrate includes a metal layer and an adhesive film layer, and the adhesive film layer is attached to the metal layer;

[0020] The transferring of the chip to the substrate comprises:

[0021] The chip is transferred onto the adhesive film layer, and the chip is flipped onto the adhesive film layer.

[0022] The chip is flipped on the substrate. After the plastic package is removed from the substrate, the chip surface can be exposed, which is convenient for subsequent ball planting and circuit production. The substrate is composited with a metal layer and a film layer, which has stable supporting force and is easy to remove.

[0023] Furthermore, the flip-chip packaging of the chip on the substrate includes:

[0024] The chip is flip-chip-molded on the adhesive film layer to form a plastic package covering the chip.

[0025] The plastic-encapsulated chip is flipped onto the film layer, and the plastic encapsulation is complete.

[0026] In one embodiment of the chip packaging structure of the copper pillar-free wafer, the step of manufacturing the metal ball structure on the metal pin based on the ball implantation process includes:

[0027] Get the metal pin position data of the current chip;

[0028] Based on the metal pin position data of the current chip, a ball implanter is driven to simultaneously fabricate metal ball structures on all metal pins of the current chip.

[0029] The metal ball structure required on the chip can be manufactured at one time according to the metal pin position data, which has higher production efficiency.

[0030] Furthermore, the step of obtaining the metal pin position data of the current chip includes:

[0031] Get the model information of the current wafer;

[0032] Based on the model information of the current wafer, a preset database storing corresponding information of chip models and pin positions is queried to obtain metal pin position data of the current chip.

[0033] According to the model of the current wafer, the metal pin position data of the current chip is queried from a preset database storing chip models and corresponding pin position information, which takes a short time and effectively improves the efficiency of wafer production.

[0034] Furthermore, the step of obtaining the metal pin position data of the current chip includes:

[0035] Optically scan the current chip to obtain the metal pin position data of the current chip.

[0036] By locating the metal pin position data of the current chip through optical scanning, the accuracy of the obtained metal pin position data is more guaranteed.

[0037] In one embodiment of the above-mentioned chip packaging structure of the copper pillar-free wafer, the secondary packaging includes:

[0038] The chip after molding and ball planting is encapsulated by a plastic encapsulation material, wherein the plastic encapsulation material covers the chip and the metal ball structure;

[0039] The end surface of the molding compound adjacent to the metal ball structure is ground and shaped so that the metal ball structure is exposed from the molding compound.

[0040] The chip and the metal ball structure are encapsulated by secondary plastic encapsulation to improve the completion of the plastic encapsulation, and the metal ball structure is exposed by grinding to avoid affecting the connection and production of subsequent circuits.

[0041] In one embodiment of the chip packaging structure of the copper pillar-free wafer, the secondary packaging of the chip and manufacturing a multi-layer circuit based on the metal ball structure to obtain the chip packaging structure includes:

[0042] depositing copper on the chip surface of the chip as a seed layer;

[0043] A multi-layer circuit is fabricated on the seed layer to obtain a chip packaging structure.

[0044] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The disclosure of the present application will become more easily understood with reference to the accompanying drawings. It is easy for those skilled in the art to understand that these drawings are only for illustrative purposes and are not intended to limit the scope of protection of the present application. In addition, similar numbers in the drawings are used to represent similar components, among which:

[0046] Figure 1 It is a structural schematic diagram of a chip packaging structure of a copper pillar-free wafer provided by an embodiment of the present application;

[0047] Figure 2 It is a flow chart of a chip packaging method for a copper pillar-free wafer provided by an embodiment of the present application;

[0048] Figure 3 It is a schematic diagram of a chip after flip-chip packaging on a substrate in a chip packaging method for a copper-pillar-free wafer provided in one embodiment of the present application;

[0049] Figure 4 This is a schematic structural diagram of a chip after secondary packaging in a chip packaging method for a copper pillar-free wafer provided in an embodiment of the present application;

[0050] Figure 5 It is a schematic diagram of a structure in which a metal ball structure is exposed from a plastic packaging material after grinding in a chip packaging method for a copper-free wafer provided by an embodiment of the present application;

[0051] Figure 6 It is a schematic diagram of the structure after depositing a seed layer after secondary packaging in a chip packaging method for a copper-pillar-free wafer provided in an embodiment of the present application.

[0052] Among them: 100, chip packaging structure of copper-free wafer; 1, plastic packaging layer; 2, chip; 3, metal pins; 4, multi-layer circuit; 5, metal ball structure; 6, metal deposition block; 7, substrate; 71, metal layer; 72, film layer; 8, seed layer. DETAILED DESCRIPTION

[0053] Some embodiments of the present application are described below with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are only used to explain the technical principles of the present application and are not intended to limit the protection scope of the present application.

[0054] As described in the background technology, the current wafer packaging method generally requires coating resin on the processed copper pillar layer of the chip for resin sealing to achieve the effect of protecting the chip. Usually, when the resin is sealed, it is often necessary to fill the gaps in the copper pillar layer with resin and compact it, and then perform subsequent grinding and other operations after the copper pillar layer is fully encapsulated with the help of resin. However, for wafers without copper pillars, there are no obvious protruding copper pillars on the chip surface, so it is impossible to fill the copper pillar gaps with resin and compact it. However, if the resin is simply poured and compacted on the chip surface for plastic sealing, the entire chip surface is covered with resin, and it is impossible to connect and make multi-layer circuits later.

[0055] In order to solve the above problems, the present application creatively proposes a chip packaging structure and packaging method for a copper-free wafer, so as to achieve chip packaging without affecting the subsequent circuit manufacturing and connection of the chip, thereby improving wafer production efficiency.

[0056] The present application will be described in detail below through specific embodiments.

[0057] Embodiment 1:

[0058] Figure 1 Schematic diagram of the chip packaging structure of the copper-free wafer provided in the embodiment of the present application, referring to Figure 1 As shown, the chip packaging structure of the copper pillar-free wafer provided in the embodiment of the present application generally includes: a plastic packaging layer 1 and a chip 2 packaged in the plastic packaging layer 1; a metal pin 3 is provided on the chip surface of the chip 2, and the metal pin is electrically connected to a multi-layer circuit 4 exposed from the plastic packaging layer 1;

[0059] The metal pin 3 is electrically connected to the multi-layer circuit 4 through a metal ball structure 5 manufactured by a ball planting process.

[0060] Bumping packaging is a bump manufacturing technology, which lies between the front-end integrated circuit manufacturing and the back-end packaging test of the industrial chain. It provides a "point" interface for electrical interconnection of the chip by manufacturing metal bumps on the chip. The chip packaging structure of the copper-pillar-free wafer provided in this application uses ball planting to replace the bumping package. The metal ball structure is made on the metal pins of the chip before the circuit is manufactured through the ball planting process. The metal pins on the chip surface where the chip is exposed to the plastic sealing layer are electrically connected to the multi-layer circuit through the metal ball structure, which does not affect the subsequent production and connection of the circuit. It can solve the problem that the bumping package cannot produce small-size chip copper pillars, and can stably package copper-pillar-free wafers. The ball planting process is completed at the same time during packaging, which improves the overall production efficiency of the wafer. Combined with PLP packaging, it can reduce the packaging cost.

[0061] As a preferred implementation, the material used for the metal ball structure 5 manufactured by the ball planting process is gold.

[0062] Gold is used as the ball planting material, which has more stable performance.

[0063] As a preferred implementation, a metal deposition block 6 is further connected between the metal ball structure 5 and the multi-layer circuit 4 .

[0064] A chip packaging structure 100 of a copper-free wafer may have one chip 2 or two or more chips 2. The present application does not specifically limit the number of chips 2 in a chip packaging structure 100 of a copper-free wafer. The plastic packaging layer 1 in the chip packaging structure 100 of the copper-free wafer encapsulates all the chips 2, the gaps between the chips 2, and the edges of the chip 2 array, and each chip 2 has independently connected multi-layer circuits 4.

[0065] Embodiment 2:

[0066] Corresponding to the above-mentioned embodiment 1, the present application also provides a chip packaging method for a copper-free wafer, referring to Figure 2 As shown, the chip packaging method includes the following steps:

[0067] S210, transferring the chip to the substrate.

[0068] S220, flip-chip packaging the chip on the substrate.

[0069] S230, removing and separating the substrate to obtain a plastic-encapsulated chip, in which the chip surface of the plastic-encapsulated chip is exposed from the plastic-encapsulation layer, and metal pins are provided on the chip surface.

[0070] S240, manufacturing a metal ball structure on the metal pin based on a ball implantation process.

[0071] S250, re-packaging the chip and manufacturing a multi-layer circuit based on the metal ball structure to obtain a chip packaging structure.

[0072] The chip packaging method for copper-pillar-free wafers provided in the present application packages the chip 2 twice, and uses a ball planting process to make a metal ball structure 5 on the chip 2 between the two packagings, so that the chip 2 can smoothly produce multi-layer circuits after packaging, and the ball planting is completed in the packaging process, effectively improving production efficiency.

[0073] As a preferred implementation, in the present application examples, refer to Figure 3 As shown, Figure 3Schematic diagram of the chip 2 after flip-chip packaging on the substrate 7; the substrate 7 includes a metal layer 71 and a film layer 72, the film layer 72 is attached to the metal layer 71, and the first plastic packaging is completed at this time, and the chip 2 is packaged with the first plastic packaging layer formed by the first plastic packaging;

[0074] The step of transferring the chip 2 to the substrate 7 comprises:

[0075] The chip 2 is transferred onto the film layer 72 and flipped onto the film layer 72. The term "flip" means that the chip 2 with the metal pins 3 faces downward, that is, the chip surface of the chip 2 with the metal pins 3 is in contact with the top surface of the film layer 72 facing away from the metal layer 71.

[0076] The chip 2 is flipped on the substrate 7. After the plastic package is removed, the chip surface can be exposed, which is convenient for subsequent ball planting and circuit production. The substrate 7 is composed of a metal layer 71 and a film layer 72, which has a stable support force and is easy to remove. For example only, the metal layer 71 is a steel plate and the film layer 72 is a double-sided film.

[0077] As a preferred implementation, in the embodiment of the present application, the flip-chip package chip 2 on the substrate 7 includes:

[0078] The plastic package chip 2 is flipped onto the adhesive film layer 72 to form a plastic package body covering the chip 2 .

[0079] The flip-chip plastic-encapsulated chip 2 is placed on the film layer 72, and the plastic encapsulation is complete. After removing the substrate 7, the chip surface of the chip 2 is exposed. The chip 2 of the copper-free wafer does not have an obviously protruding copper column. The chip surface of the chip 2 provides a "point" interface for chip electrical interconnection, that is, the metal pin 3 is relatively flat relative to the chip surface, and the height difference with the chip surface of the chip 2 is extremely small.

[0080] As a preferred implementation, in the embodiment of the present application, the metal ball structure 5 is manufactured on the metal pin 3 based on the ball implantation process, including:

[0081] Get the metal pin position data of the current chip;

[0082] Based on the metal pin position data of the current chip, the ball implanter is driven to simultaneously fabricate metal ball structures on all metal pins of the current chip.

[0083] The metal ball structure required on the chip is manufactured at one time according to the metal pin position data, and the production efficiency is higher. Specifically, the ball implanter sinter-welds the metal ball structure 5 on the end face of the metal pin 3 of the current chip, that is, the face of the metal pin 3 facing away from the chip 2. The metal ball structure 5 may have one metal ball or two or more metal balls. When the metal ball structure 5 has two or more metal balls, the metal balls are arranged and connected in a direction perpendicular to the chip surface of the chip 2.

[0084] As a preferred implementation, in the embodiment of the present application, obtaining the metal pin position data of the current chip includes:

[0085] Get the model information of the current wafer;

[0086] Based on the model information of the current wafer, a preset database storing the corresponding information of the chip model and the pin position is queried to obtain the metal pin position data of the current chip.

[0087] The number of chips 2 on each model of wafer, the spacing between chips 2, the number and position of metal pins 3 on chip 2 are fixed. In industrial assembly line production, wafers are also fixed at fixed positions on the machine when they are plastic-sealed. Therefore, the metal pin position data of the chip corresponding to each model of wafer is pre-stored in the database, and the ball implanter is placed at a pre-set position fixed relative to the machine where the wafer is placed. When implanting balls, the metal pin position data of the current chip is directly obtained to drive the ball implanter to implant balls, so that balls can be accurately implanted on all metal pins 3 on the current wafer at the same time.

[0088] According to the model of the current wafer, the metal pin position data of the current chip is queried from a preset database storing chip models and corresponding pin position information, which takes a short time and effectively improves the efficiency of wafer production.

[0089] As a preferred implementation, in the embodiment of the present application, obtaining the metal pin position data of the current chip includes:

[0090] Optically scan the current chip to obtain the metal pin position data of the current chip.

[0091] By locating the metal pin position data of the current chip through optical scanning, the accuracy of the obtained metal pin position data is more guaranteed.

[0092] Preferably, before making the metal ball structure 5 on the metal pin 3 based on the ball implantation process, the surface of the chip 2 is cleaned with Plasma to make its surface free of pollution. Plasma refers to plasma, i.e., plasma. When cleaning the surface of the chip 2 with Plasma, there is no need to use strong acid, strong alkali or other solutions to avoid damaging the metal pin 3 on the chip surface of the chip 2. At the same time, the cleaning with Plasma does not require drying, and there is no need for subsequent wastewater treatment, which is simple, efficient, economical and environmentally friendly. In addition, it can also improve the adhesion of the chip surface of the chip 2.

[0093] In some embodiments, after the ball implantation is completed, the chip 2 is repackaged, and the repackage includes:

[0094] The chip 2 after ball implantation is encapsulated by a plastic encapsulation material, and the plastic encapsulation material covers the chip 2 and the metal ball structure 5, such as Figure 3As shown, the plastic sealing layer formed by the plastic sealing material of the second plastic sealing is combined with the plastic sealing layer of the first plastic sealing to form a complete plastic sealing layer 1;

[0095] The end surface of the molding compound adjacent to the metal ball structure 5 is ground and shaped so that the metal ball structure 5 is exposed from the molding compound. Figure 4 shown.

[0096] The chip 2 and the metal ball structure 5 are encapsulated by secondary plastic encapsulation to improve the degree of plastic encapsulation completion, and the metal ball structure 5 is exposed by grinding to avoid affecting the connection and production of subsequent circuits. When optical scanning is used to obtain the metal pin position data of the current chip, the end surface of the metal ball structure 5 adjacent to the plastic encapsulation material after grinding is performed to expose the metal ball structure 5 from the plastic encapsulation material and then perform optical scanning.

[0097] As a preferred implementation, in the embodiment of the present application, the chip 2 is packaged twice and a multi-layer circuit 4 is manufactured based on the metal ball structure 5 to obtain a chip packaging structure, including:

[0098] Copper is deposited on the chip surface of the chip 2 as a seed layer 8; the structure after deposition is as follows Figure 6 As shown;

[0099] A multi-layer circuit 4 is fabricated on the seed layer 8 to obtain a chip packaging structure.

[0100] Specifically, in one embodiment, the multi-layer circuit 4 is connected to the metal pin 3 by image transfer. Image transfer refers to a film-sticking-exposure-development or glue-coating-exposure-development process. The film is covered on the chip surface of the chip 2, and a through groove corresponding to the multi-layer circuit 4 to be produced is opened on the film. The multi-layer circuit 4 is produced on the seed layer 8 by electroplating. Specifically, an electroplating layer is plated on the chip surface of the chip 2 covered with the film, and then the portion of the seed layer 8 corresponding to the position of the metal pin 3 on the chip surface of the chip 2 and the film that affects the transfer are removed, and the electroplating layer in the through groove of the film is retained, which is the circuit, and finally a chip packaging structure 100 of a copper pillar-free wafer is obtained, wherein the portion of the seed layer 8 corresponding to the metal pin 3 retained is the metal deposition block 6.

[0101] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0102] In the description of the present application, it should be understood that the terms "vertical", "parallel", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0103] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0104] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0105] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A chip packaging structure without copper pillar wafer, characterized in that: The chip packaging structure comprises: a plastic packaging layer and a chip packaged in the plastic packaging layer; The chip surface of the chip is provided with metal pins, and the metal pins are electrically connected to the multi-layer circuit exposed from the plastic packaging layer; The metal pin is electrically connected to the multi-layer circuit through a metal ball structure manufactured by a ball planting process.

2. The chip packaging structure of the copper pillar-free wafer according to claim 1, characterized in that: The material used for the metal ball structure manufactured by the ball planting process is gold.

3. A chip packaging method for a copper-free wafer, characterized in that: The chip packaging method comprises: Transferring the chip to a substrate; Flip-chip packaging the chip on the substrate; The substrate is removed and separated to obtain a plastic-encapsulated chip, wherein the chip surface of the plastic-encapsulated chip is exposed from the plastic-encapsulation layer, and a metal pin is provided on the chip surface; Fabricating a metal ball structure on the metal pin based on a ball planting process; The chip is packaged for a second time and a multi-layer circuit is manufactured based on the metal ball structure to obtain a chip packaging structure.

4. The chip packaging method of copper-free wafer according to claim 3, characterized in that: The substrate comprises a metal layer and a film layer, wherein the film layer is attached to the metal layer; The transferring of the chip to the substrate comprises: The chip is transferred onto the adhesive film layer, and the chip is flipped onto the adhesive film layer.

5. The chip packaging method of copper-free wafer according to claim 4, characterized in that: The flip-chip packaging of the chip on the substrate comprises: The chip is flip-chip-molded on the adhesive film layer to form a plastic package covering the chip.

6. The chip packaging method of copper-free wafer according to claim 3, characterized in that: The manufacturing of the metal ball structure on the metal pin based on the ball implantation process includes: Get the metal pin position data of the current chip; Based on the metal pin position data of the current chip, a ball implanter is driven to simultaneously fabricate metal ball structures on all metal pins of the current chip.

7. The chip packaging method of copper-free wafer according to claim 6, characterized in that: The step of obtaining the metal pin position data of the current chip includes: Get the model information of the current wafer; Based on the model information of the current wafer, a preset database storing corresponding information of chip models and pin positions is queried to obtain metal pin position data of the current chip.

8. The chip packaging method of copper-free wafer according to claim 6, characterized in that: The step of obtaining the metal pin position data of the current chip includes: Optically scan the current chip to obtain the metal pin position data of the current chip.

9. The chip packaging method of copper-free wafer according to claim 3, characterized in that: The secondary packaging includes: The chip after molding and ball planting is encapsulated by a plastic encapsulation material, wherein the plastic encapsulation material covers the chip and the metal ball structure; The end surface of the molding compound adjacent to the metal ball structure is ground and shaped so that the metal ball structure is exposed from the molding compound.

10. The chip packaging method of copper-free wafer according to claim 3, characterized in that: The second packaging of the chip and manufacturing a multi-layer circuit based on the metal ball structure to obtain a chip packaging structure includes: depositing copper on the chip surface of the chip as a seed layer; A multi-layer circuit is fabricated on the seed layer to obtain a chip packaging structure.

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