Multi-battery parallel connection anti-reverse connection circuit

Abstract

The invention discloses a multi-battery parallel connection anti-reverse connection circuit, and relates to the technical field of alcohol detection. The multi-battery parallel connection anti-reverse connection circuit comprises a switch unit, a detection control unit, a battery compartment and a protection unit, the switch unit is respectively connected with the battery compartment, the detection control unit and the load; the protection unit is connected with the battery compartment; the battery compartment is used for mounting a battery; the detection control unit is used for detecting the connection state of the battery and sending a cut-off signal to the switch unit when detecting that the battery is reversely connected; the switch unit is used for disconnecting the battery from the load when receiving the cut-off signal; and the protection unit is used for disconnecting the battery from the load under the condition of overcurrent or overload of the circuit. Through the detection control unit, the connection between the battery and the load can be disconnected when the reverse connection of the battery is detected.

Description

Technical Field

[0001] The invention relates to the technical field of battery reverse connection prevention, and in particular to a multi-cell battery reverse connection prevention circuit. Background Art

[0002] As handheld devices and portable devices become more and more popular, the anti-reverse connection and anti-short circuit design of built-in lithium batteries is particularly important. The current technology is designed for single-cell lithium batteries or directly makes battery pack designs. There is no anti-short circuit technology design for parallel circuits of multiple lithium batteries. Summary of the invention

[0003] The main purpose of the present invention is to propose a multi-cell battery parallel anti-reverse connection circuit, aiming to solve the problem that the current technology is designed for a single lithium battery or directly makes a battery pack design, and there is no anti-short circuit technology design for the parallel circuit design of multiple lithium batteries.

[0004] To achieve the above object, the present invention proposes a multi-cell battery parallel anti-reverse connection circuit, the multi-cell battery parallel anti-reverse connection circuit comprising: a switch unit, a detection control unit, a battery compartment and a protection unit;

[0005] The switch unit is connected to the battery compartment, the detection control unit and the load respectively;

[0006] The protection unit is connected to the battery compartment;

[0007] The battery compartment is used to install batteries;

[0008] The detection control unit is used to detect the connection status of the battery, and when the reverse connection of the battery is detected, send a cutoff signal to the switch unit;

[0009] The switch unit is used to disconnect the battery from the load when receiving the cut-off signal;

[0010] The protection unit is used to disconnect the battery from the load when an overcurrent or overload occurs in the circuit.

[0011] Optionally, the first switch subunit is connected to the second switch subunit, the detection control unit and the battery compartment respectively, and is used to disconnect the negative electrode of the battery from the load when receiving the cut-off signal;

[0012] The second switch sub-unit is connected to the battery compartment, the detection control unit and the protection unit respectively, and is used to disconnect the battery positive electrode from the load when receiving the cut-off signal.

[0013] Optionally, the first switch subunit includes: a first MOS tube;

[0014] The gate of the first MOS tube is respectively connected to the second end of the battery compartment, the detection control unit and the second switch subunit;

[0015] The source electrode of the first MOS tube is respectively connected to the first end of the battery compartment and the second switch subunit;

[0016] The drain of the first MOS tube is connected to the detection control unit.

[0017] Optionally, the second switch subunit includes: a second MOS tube;

[0018] The gate of the second MOS tube is respectively connected to the first end of the battery compartment, the detection control unit and the first switch sub-unit;

[0019] The source of the second MOS tube is connected to the detection control unit and the protection unit respectively;

[0020] The drain of the first MOS tube is connected to the first end of the battery compartment and the first switch subunit respectively.

[0021] Optionally, the detection control unit includes: a first resistor and a second resistor;

[0022] The first end of the first resistor is connected to the drain of the first MOS tube and the load respectively, and the second end of the first resistor is connected to the gate of the first MOS tube and the second end of the battery compartment respectively;

[0023] The first end of the second resistor is connected to the source of the second MOS tube and the protection unit respectively, and the second end of the second resistor is connected to the gate of the second MOS tube and the first end of the battery compartment respectively.

[0024] Optionally, the protection unit includes: a fuse;

[0025] The first end of the fuse is connected to the second switch subunit;

[0026] The second end of the fuse is connected to the load.

[0027] Optionally, the multi-battery parallel reverse connection protection circuit further includes: a battery protection module;

[0028] The battery protection module is connected to the battery reverse connection protection module and the load respectively;

[0029] The battery protection module is used to detect the voltage output by the battery reverse connection protection module and perform corresponding actions according to the voltage to ensure the safety of the battery.

[0030] Optionally, the battery protection module includes: a control unit and an execution unit;

[0031] The control unit is connected to the execution unit and the battery reverse connection prevention module respectively;

[0032] The control unit is used to detect the voltage output by the battery reverse connection protection module and output a corresponding control signal according to the voltage;

[0033] The execution unit is used to receive the control signal and execute corresponding actions according to the control signal to ensure the safety of the battery.

[0034] Optionally, the control unit includes: a chip, a first capacitor and a third resistor;

[0035] The power input terminal of the chip is connected to the second end of the third resistor, the ground terminal of the chip is connected to the second end of the first capacitor, the discharge control terminal of the chip is connected to the execution unit; the charge control terminal of the chip is connected to the execution unit, and the charge and discharge current detection terminal of the chip is connected to the execution unit;

[0036] The first end of the third resistor is connected to the second end of the first capacitor.

[0037] Optionally, the execution unit includes: a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube and a fourth resistor;

[0038] The gate of the third MOS tube is respectively connected to the discharge control terminal of the chip and the gate of the fifth MOS tube, the source of the third MOS tube is respectively connected to the ground terminal of the chip and the source of the fifth MOS tube, and the drain of the third MOS tube is connected to the drain of the fourth MOS tube;

[0039] The gate of the fourth MOS tube is respectively connected to the charging control terminal of the chip and the gate of the sixth MOS tube, and the source of the fourth MOS tube is respectively connected to the second end of the fourth resistor and the source of the sixth MOS tube;

[0040] The drain of the fifth MOS tube is connected to the drain of the sixth MOS tube;

[0041] The first end of the fourth resistor is connected to the charge and discharge current detection terminal of the chip, and the second end of the fourth resistor is connected to the source of the sixth MOS tube.

[0042] The present application discloses a multi-cell battery parallel anti-reverse connection circuit, which relates to the technical field of alcohol detection. The disclosed multi-cell battery parallel anti-reverse connection circuit comprises: a switch unit, a detection control unit, a battery compartment and a protection unit; the switch unit is respectively connected to the battery compartment, the detection control unit and the load;

[0043] The protection unit is connected to the battery compartment;

[0044] The battery compartment is used to install the battery; the detection control unit is used to detect the connection status of the battery, and when the battery is detected to be reversely connected, a cut-off signal is sent to the switch unit; the switch unit is used to disconnect the battery from the load when receiving the cut-off signal; the protection unit is used to disconnect the battery from the load when the circuit is overcurrent or overloaded. The present application can disconnect the battery from the load when the battery is detected to be reversely connected through the detection control unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0046] Figure 1 This is a structural schematic diagram of the first embodiment of the multi-battery parallel anti-reverse connection circuit of the present application;

[0047] Figure 2 This is a structural schematic diagram of a second embodiment of a multi-battery parallel reverse connection protection circuit of the present application;

[0048] Figure 3 This is a structural schematic diagram of a third embodiment of a multi-battery parallel anti-reverse connection circuit of the present application;

[0049] Figure 4 This is a schematic structural diagram of a fourth embodiment of a multi-battery parallel reverse connection protection circuit of the present application.

[0050] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings.

[0051] Description of Figure Numbers:

[0052] 1. Switch unit; 2. Detection control unit; 3. Battery compartment; 4. Protection unit; 5. Load; 11. First switch sub-unit; 12. Second switch sub-unit; Q1. First MOS tube; Q2. Second MOS tube; Q3. Third MOS tube; Q4. Fourth MOS tube; Q5. Fifth MOS tube; Q6. Sixth MOS tube; R1. First resistor; R2. Second resistor; R3. Third resistor; R4. Fourth resistor; F1. Fuse; IC1. Chip; C1. First capacitor. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components in a certain specific posture. If the specific posture changes, the directional indication will also change accordingly.

[0055] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features limited to "first" and "second" may explicitly or implicitly include at least one of the features. In addition, if "and / or" or "and / or" appears in the full text, its meaning includes three parallel solutions. Taking "A and / or B" as an example, it includes solution A, solution B, or solutions that satisfy both A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in this field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0056] The present application embodiment provides a multi-cell battery parallel anti-reverse connection circuit, referring to Figure 1 , Figure 1 This is a schematic structural diagram of the first embodiment of the multi-battery parallel reverse connection protection circuit of the present application.

[0057] In this embodiment, the multi-cell battery parallel reverse connection protection circuit includes a switch unit 1, a detection control unit 2, a battery compartment 3 and a protection unit 4;

[0058] The switch unit 1 is connected to the battery compartment 3, the detection control unit 2 and the load 5 respectively;

[0059] The protection unit 4 is connected to the battery compartment 3;

[0060] The battery compartment 3 is used to install the battery;

[0061] The detection control unit 2 is used to detect the connection status of the battery, and when the reverse connection of the battery is detected, a cut-off signal is sent to the switch unit 1;

[0062] The switch unit 1 is used to disconnect the battery from the load 5 when receiving the cut-off signal;

[0063] It should be noted that the switch unit 1 may be a mechanical switch, a solid-state switch, or a magnetic switch, which is not limited in this embodiment. The specific type of the switch unit 1 may be a triode or a field effect transistor, which may be set according to actual conditions, which is not limited in this embodiment. The switch unit 1 is used to control the connection between the battery and the load 5.

[0064] It should be noted that the battery compartment 3 can be a lead-acid battery compartment, a lithium-ion battery compartment, or a sodium-sulfur battery compartment, which is not limited in this embodiment.

[0065] It should be noted that the detection control unit 2 may be an MCU, a DSP, or an FPGA or other components, which is not limited in this embodiment.

[0066] It should be noted that the protection unit 4 may be a fuse, a thermal relay, an electromagnetic current release, or an overcurrent relay or a fuse, which is not limited in this embodiment.

[0067] It should be noted that the switch unit 1, the detection control unit 2, the battery compartment 3 and the protection unit 4 constitute a battery circuit in a plurality of parallel batteries, and multiple switch units 1, multiple detection control units 2, multiple battery compartments 3 and multiple protection units 4 constitute multiple battery circuits in a plurality of parallel batteries.

[0068] It is understandable that, for example: when one or more batteries in a plurality of parallel batteries are reversely connected, the detection control unit 2 immediately sends a cutoff signal to the switch unit 1 upon detecting that the one or more batteries are reversely connected, so that the switch unit 1 immediately cuts off the connection between the one or more batteries and the load 5.

[0069] In a specific implementation, the switch unit 1 is respectively connected to the battery compartment 3, the detection control unit 2 and the load 5; the protection unit 4 is connected to the battery compartment 3; the battery compartment 3 is used to install the battery; the detection control unit 2 is used to detect the connection status of the battery, and when the battery is detected to be reversely connected, sends a cutoff signal to the switch unit 1; the switch unit 1 is used to disconnect the battery from the load 5 when receiving the cutoff signal; the protection unit 4 is used to disconnect the battery from the load 5 when the circuit is overcurrent or overloaded.

[0070] It can be understood that when the battery is normally connected, the detection unit controls the switch unit to be turned on, the battery and the load are in a connected state, and the battery can be charged and discharged normally.

[0071] It can be understood that when the battery is reversely connected, the detection unit controls the switch unit to be turned off, the battery and the load are disconnected, and the battery cannot be charged or discharged.

[0072] It can be understood that by connecting a plurality of the multi-cell battery reverse connection prevention circuits in parallel, since the detection control unit controls the switch unit to disconnect the load from the battery when the battery reverse connection is detected, the multi-cell battery reverse connection prevention can be achieved.

[0073] In this embodiment, the detection control unit 2 can send a cutoff signal to the switch unit 1 when the reverse connection of the battery is detected, so as to disconnect the connection between the battery and the load 5.

[0074] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the first embodiment can refer to the above introduction, and will not be repeated in the following. Figure 2 , Figure 2 This is a structural schematic diagram of the second embodiment of the multi-battery parallel reverse connection protection circuit of the present application.

[0075] In this embodiment, the switch unit 1 includes: a first switch subunit 11 and a second switch subunit 12;

[0076] The first switch subunit 11 is connected to the second switch subunit 12, the detection control unit 2 and the battery compartment 3 respectively, and is used to disconnect the battery negative electrode from the load 5 when receiving the cut-off signal;

[0077] The second switch subunit 12 is connected to the battery compartment 3, the detection control unit 2 and the protection unit 4 respectively, and is used to disconnect the battery positive electrode from the load 5 when receiving the cut-off signal.

[0078] It should be noted that the first switch subunit 11 may be a mechanical switch, a solid-state switch, or a magnetic switch, which is not limited in this embodiment.

[0079] It should be noted that the second switch subunit 12 may be a mechanical switch, a solid-state switch, or a magnetic switch, which is not limited in this embodiment.

[0080] In a specific implementation, the first switch subunit 11 is respectively connected to the second switch subunit 12, the detection control unit 2 and the battery compartment 3, and is used to disconnect the connection between the negative electrode of the battery and the load 5 when the cut-off signal is received; the second switch subunit 12 is respectively connected to the battery compartment 3, the detection control unit 2 and the protection unit 4, and is used to disconnect the positive electrode of the battery from the load 5 when the cut-off signal is received.

[0081] It can be understood that, for example: when one or more batteries in a plurality of parallel batteries are reversely connected, the detection control unit 2 sends a cutoff signal to disconnect the battery or batteries from the load 5 to the first switch sub-unit 11 and the second switch sub-unit 12 respectively when detecting that the battery or batteries are reversely connected. After receiving the cutoff signal, the first switch sub-unit 11 immediately disconnects the negative pole of the designated battery from the load 5, and the second switch sub-unit 12 immediately disconnects the positive pole of the designated battery from the load 5 after receiving the cutoff signal.

[0082] Based on the second embodiment of the present application, in the third embodiment of the present application, the same or similar contents as those of the second embodiment can be referred to the above introduction, and will not be repeated in the following. Figure 3 , Figure 3 This is a schematic structural diagram of a third embodiment of a multi-battery parallel reverse connection protection circuit of the present application.

[0083] In this embodiment, the first switch sub-unit 11 includes: a first MOS transistor Q1;

[0084] The gate of the first MOS transistor Q1 is connected to the second end of the battery compartment 3, the detection control unit 2 and the second switch sub-unit 12 respectively;

[0085] The source of the first MOS transistor Q1 is connected to the first end of the battery compartment 3 and the second switch subunit 12 respectively;

[0086] The drain of the first MOS transistor Q1 is connected to the detection control unit 2 .

[0087] The second switch sub-unit 12 includes: a second MOS tube Q2;

[0088] The gate of the second MOS transistor Q2 is respectively connected to the first end of the battery compartment 3, the detection control unit 2 and the first switch sub-unit 11;

[0089] The source of the second MOS tube Q2 is connected to the detection control unit 2 and the protection unit 4 respectively;

[0090] The drain of the first MOS transistor Q1 is connected to the first end of the battery compartment 3 and the first switch sub-unit 11 respectively.

[0091] The detection control unit 2 includes: a first resistor R1 and a second resistor R2;

[0092] The first end of the first resistor R1 is connected to the drain of the first MOS transistor Q1 and the load 5 respectively, and the second end of the first resistor R1 is connected to the gate of the first MOS transistor Q1 and the second end of the battery compartment 3 respectively;

[0093] The first end of the second resistor R2 is connected to the source of the second MOS transistor Q2 and the protection unit 4 respectively, and the second end of the second resistor R2 is connected to the gate of the second MOS transistor Q2 and the first end of the battery compartment 3 respectively.

[0094] The protection unit 4 includes: a fuse F1;

[0095] A first end of the fuse F1 is connected to the second switch subunit 12 .

[0096] The second end of the fuse F1 is connected to the load 5 .

[0097] It should be noted that the first MOS transistor Q1 may be an enhancement-mode MOS transistor or a depletion-mode MOS transistor, which is not limited in this embodiment.

[0098] It should be noted that the second MOS transistor Q2 may be an enhancement-mode MOS transistor or a depletion-mode MOS transistor, which is not limited in this embodiment.

[0099] It should be noted that the first resistor R1 may be a common resistor, a precision resistor, or a special resistor, which is not limited in this embodiment.

[0100] It should be noted that the second resistor R2 can be a common resistor, a precision resistor, or a special resistor, which is not limited in this embodiment.

[0101] The fuse F1 may be a porcelain plug-in fuse, a spiral fuse, a tube fuse or other types of fuses, which are not limited in this embodiment.

[0102] In specific implementation, the gate of the first MOS transistor Q1 is respectively connected to the second end of the battery compartment 3, the detection control unit 2, and the second switch subunit 12; the source of the first MOS transistor Q1 is respectively connected to the first end of the battery compartment 3 and the second switch subunit 12; the drain of the first MOS transistor Q1 is connected to the detection control unit 2. The second switch subunit 12 includes: a second MOS transistor Q2; the gate of the second MOS transistor Q2 is respectively connected to the first end of the battery compartment 3, the detection control unit 2, and the first switch subunit 11; the source of the second MOS transistor Q2 is respectively connected to the detection control unit 2 and the protection unit 4; the drain of the first MOS transistor Q1 is respectively connected to the first end of the battery compartment 3 and the first switch subunit 11. The detection control unit 2 includes: a first resistor R1 and a second resistor R2; the first end of the first resistor R1 is connected to the drain of the first MOS transistor Q1 and the load 5 respectively, and the second end of the first resistor R1 is connected to the gate of the first MOS transistor Q1 and the second end of the battery compartment 3 respectively; the first end of the second resistor R2 is connected to the source of the second MOS transistor Q2 and the protection unit 4 respectively, and the second end of the second resistor R2 is connected to the gate of the second MOS transistor Q2 and the first end of the battery compartment 3 respectively. The protection unit 4 includes: a fuse F1; the first end of the fuse F1 is connected to the second switch subunit 12. The second end of the fuse F1 is connected to the load 5.

[0103] It should be noted that the first MOS tube Q1, the second MOS tube Q2, the first resistor R1, the second resistor R2, the battery compartment 3 and the fuse F1 constitute a battery circuit in a plurality of parallel batteries, and multiple first MOS tubes Q1, multiple second MOS tubes Q2, multiple first resistors R1, multiple second resistors R2, multiple battery compartments 3 and multiple fuses F1 constitute multiple battery circuits in a plurality of parallel batteries.

[0104] It can be understood that, for example, when the battery is placed normally, the gate voltage of the first MOS tube Q1 is less than the source voltage, and the first MOS tube is in a conducting state; similarly, the gate voltage of the second MOS tube Q2 is greater than the drain voltage, and the second MOS tube is also in a conducting state, at this time, the battery is in a normal charging and discharging state. When the battery is reversely connected, the gate voltage of the first MOS tube Q1 is greater than the source voltage, and the first MOS tube is in a cut-off state; similarly, the gate voltage of the second MOS tube Q2 is less than the drain voltage, and the second MOS tube is also in a cut-off state, at this time, the positive and negative electrodes of the battery are both in a state of being disconnected from the load 5, thereby achieving battery reverse connection protection.

[0105] Based on the third embodiment of the present application, in the fourth embodiment of the present application, the same or similar contents as those in the third embodiment can refer to the above description, and will not be repeated in the following. Figure 4 , Figure 4 This is a schematic structural diagram of a fourth embodiment of a multi-battery parallel reverse connection protection circuit of the present application.

[0106] Considering that the battery charging and discharging may cause over-charging and discharging, which may easily affect the life and safety of the battery, the multi-cell battery parallel anti-reverse connection circuit in this embodiment also includes: a battery protection module;

[0107] The battery protection module includes: a control unit and an execution unit;

[0108] The control unit is connected to the execution unit and the battery reverse connection prevention module respectively;

[0109] The control unit is used to detect the voltage output by the battery reverse connection protection module and output a corresponding control signal according to the voltage;

[0110] The execution unit is used to receive the control signal and execute corresponding actions according to the control signal to ensure the safety of the battery.

[0111] The control unit includes: a chip IC1, a first capacitor C1 and a third resistor R3;

[0112] The power input terminal of the chip IC1 is connected to the second end of the third resistor R3, the ground terminal of the chip IC1 is connected to the second end of the first capacitor C1, the discharge control terminal of the chip IC1 is connected to the execution unit; the charge control terminal of the chip IC1 is connected to the execution unit, and the charge and discharge current detection terminal of the chip IC1 is connected to the execution unit;

[0113] A first end of the third resistor R3 is connected to a second end of the first capacitor C1 .

[0114] The execution unit includes: a third MOS tube Q3, a fourth MOS tube Q4, a fifth MOS tube Q5, a sixth MOS tube Q6 and a fourth resistor R4;

[0115] The gate of the third MOS transistor Q3 is connected to the discharge control terminal of the chip IC1 and the gate of the fifth MOS transistor Q5 respectively, the source of the third MOS transistor Q3 is connected to the ground terminal of the chip IC1 and the source of the fifth MOS transistor Q5 respectively, and the drain of the third MOS transistor Q3 is connected to the drain of the fourth MOS transistor Q4;

[0116] The gate of the fourth MOS transistor Q4 is respectively connected to the charging control terminal of the chip IC1 and the gate of the sixth MOS transistor Q6, and the source of the fourth MOS transistor Q4 is respectively connected to the second end of the fourth resistor R4 and the source of the sixth MOS transistor Q6;

[0117] The drain of the fifth MOS transistor Q5 is connected to the drain of the sixth MOS transistor Q6;

[0118] The first end of the fourth resistor R4 is connected to the charge and discharge current detection terminal of the chip IC1, and the second end of the fourth resistor R4 is connected to the source of the sixth MOS transistor Q6.

[0119] It should be noted that the chip IC1 may be a DSP, an MCU, or an FPGA or other types of chip IC1, which is not limited in this embodiment.

[0120] In this embodiment, the model of the chip IC1 is sot23_6.

[0121] It should be noted that the first capacitor C1 may be a fixed capacitor, a variable capacitor, or a micro-variable capacitor, which is not limited in this embodiment.

[0122] It should be noted that the third MOS transistor Q3 may be an enhancement-mode MOS transistor or a depletion-mode MOS transistor, which is not limited in this embodiment.

[0123] It should be noted that the fourth MOS transistor Q4 can be an enhancement-mode MOS transistor or a depletion-mode MOS transistor, which is not limited in this embodiment.

[0124] It should be noted that the fifth MOS transistor Q5 may be an enhancement-mode MOS transistor or a depletion-mode MOS transistor, which is not limited in this embodiment.

[0125] It should be noted that the sixth MOS transistor Q6 may be an enhancement-type MOS transistor or a depletion-type MOS transistor, which is not limited in this embodiment.

[0126] It should be noted that the fourth resistor R4 may be a common resistor, a precision resistor, or a special resistor, which is not limited in this embodiment.

[0127] In a specific implementation, the multi-cell battery parallel anti-reverse connection circuit also includes: a battery protection module; the battery protection module includes: a control unit and an execution unit; the control unit is connected to the execution unit and the battery anti-reverse connection module respectively; the control unit is used to detect the voltage output by the battery anti-reverse connection module and output a corresponding control signal according to the voltage; the execution unit is used to receive the control signal and perform a corresponding action according to the control signal to ensure the safety of the battery. The control unit includes: a chip IC1, a first capacitor C1 and a third resistor R3; the power input terminal of the chip IC1 is connected to the second end of the third resistor R3, the ground terminal of the chip IC1 is connected to the second end of the first capacitor C1, and the discharge control terminal of the chip IC1 is connected to the execution unit; the charging control terminal of the chip IC1 is connected to the execution unit, and the charge and discharge current detection terminal of the chip IC1 is connected to the execution unit; the first end of the third resistor R3 is connected to the second end of the first capacitor C1. The execution unit includes: a third MOS transistor Q3, a fourth MOS transistor Q4, a fifth MOS transistor Q5, a sixth MOS transistor Q6 and a fourth resistor R4; the gate of the third MOS transistor Q3 is respectively connected to the discharge control terminal of the chip IC1 and the gate of the fifth MOS transistor Q5, the source of the third MOS transistor Q3 is respectively connected to the ground terminal of the chip IC1 and the source of the fifth MOS transistor Q5, and the drain of the third MOS transistor Q3 is connected to the drain of the fourth MOS transistor Q4; the gate of the fourth MOS transistor Q4 is respectively connected to the charge control terminal of the chip IC1 and the gate of the sixth MOS transistor Q6, the source of the fourth MOS transistor Q4 is respectively connected to the second end of the fourth resistor R4 and the source of the sixth MOS transistor Q6; the drain of the fifth MOS transistor Q5 is connected to the drain of the sixth MOS transistor Q6; the first end of the fourth resistor R4 is connected to the charge and discharge current detection terminal of the chip IC1, and the second end of the fourth resistor R4 is respectively connected to the source of the sixth MOS transistor Q6.

[0128] It can be understood that when the charging state of the battery is in a normal state, that is, the over-discharge detection voltage is less than the working voltage and less than the over-charge detection voltage, and the over-current detection voltage is less than the CS terminal input voltage and less than the discharge over-current detection voltage, the third MOS tube Q3, the fifth MOS tube Q5, the fourth MOS tube Q4 and the sixth MOS tube Q6 are controlled to be turned on. At this time, both charging and discharging can be carried out normally.

[0129] When entering the charging state from the normal state, the battery voltage is detected by the working voltage. When the battery voltage is detected to enter the overcharge state, that is, when the working voltage is greater than the overcharge detection voltage and the delay time exceeds the preset overcharge detection delay time, the fourth MOS tube Q4 and the sixth MOS tube Q6 are controlled to be turned off. At this time, the battery cannot continue to be charged normally; the working voltage of the battery continues to be detected, and when the working voltage is less than the overcharge detection voltage, the fourth MOS tube Q4 and the sixth MOS tube Q6 are controlled to be turned on. At this time, the battery can be charged normally.

[0130] When entering the discharge state from the normal state, the battery voltage is detected by the working voltage. When the battery voltage is detected to enter the over-discharge state, that is, the working voltage is less than the over-discharge detection voltage, and the delay time exceeds the over-discharge detection delay time, the third MOS tube Q3 and the fifth MOS tube Q5 are controlled to be turned off. At this time, the battery cannot continue to discharge normally; continue to detect the working voltage of the battery, and when the working voltage is greater than or equal to the over-discharge detection voltage, control the fourth MOS tube Q4 and the sixth MOS tube Q6 to be turned on. At this time, the battery can be charged.

[0131] It should be noted that the overcharge detection voltage can be set according to actual needs, such as 4.28V, and this embodiment does not limit this.

[0132] It should be noted that the over-discharge detection voltage can be set according to actual needs, such as 2.4V, and this embodiment does not limit this.

[0133] The above description is only for the present invention and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A multi-cell battery reverse connection protection circuit, characterized in that: The multi-cell battery parallel reverse connection protection circuit comprises: a switch unit, a detection control unit, a battery compartment and a protection unit; The switch unit is connected to the battery compartment, the detection control unit and the load respectively; The protection unit is connected to the battery compartment; The battery compartment is used to install batteries; The detection control unit is used to detect the connection status of the battery, and when the reverse connection of the battery is detected, send a cutoff signal to the switch unit; The switch unit is used to disconnect the battery from the load when receiving the cut-off signal.

2. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 1, characterized in that: The switch unit comprises: a first switch subunit and a second switch subunit; The first switch subunit is connected to the second switch subunit, the detection control unit and the battery compartment respectively, and is used to disconnect the negative electrode of the battery from the load when receiving the cut-off signal; The second switch sub-unit is connected to the battery compartment, the detection control unit and the protection unit respectively, and is used to disconnect the battery positive electrode from the load when receiving the cut-off signal.

3. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 2, characterized in that: The first switch subunit includes: a first MOS tube; The gate of the first MOS tube is respectively connected to the second end of the battery compartment, the detection control unit and the second switch subunit; The source electrode of the first MOS tube is respectively connected to the first end of the battery compartment and the second switch subunit; The drain of the first MOS tube is connected to the detection control unit.

4. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 3, characterized in that: The second switch subunit includes: a second MOS tube; The gate of the second MOS tube is respectively connected to the first end of the battery compartment, the detection control unit and the first switch sub-unit; The source of the second MOS tube is connected to the detection control unit and the protection unit respectively; The drain of the first MOS tube is connected to the first end of the battery compartment and the first switch subunit respectively.

5. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 2, characterized in that: The detection control unit comprises: a first resistor and a second resistor; The first end of the first resistor is connected to the drain of the first MOS tube and the load respectively, and the second end of the first resistor is connected to the gate of the first MOS tube and the second end of the battery compartment respectively; The first end of the second resistor is connected to the source of the second MOS tube and the protection unit respectively, and the second end of the second resistor is connected to the gate of the second MOS tube and the first end of the battery compartment respectively.

6. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 2, characterized in that: The protection unit comprises: a fuse; The first end of the fuse is connected to the second switch subunit; The second end of the fuse is connected to the load.

7. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 1, characterized in that: The multi-cell battery parallel reverse connection protection circuit further includes: a battery protection module; The battery protection module is connected to the battery reverse connection protection module and the load respectively; The battery protection module is used to detect the voltage output by the battery reverse connection protection module and perform corresponding actions according to the voltage to ensure the safety of the battery.

8. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 7, characterized in that: The battery protection module includes: a control unit and an execution unit; The control unit is connected to the execution unit and the battery reverse connection prevention module respectively; The control unit is used to detect the voltage output by the battery reverse connection protection module and output a corresponding control signal according to the voltage; The execution unit is used to receive the control signal and execute corresponding actions according to the control signal to ensure the safety of the battery.

9. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 8, characterized in that: The control unit includes: a chip, a first capacitor and a third resistor; The power input terminal of the chip is connected to the second end of the third resistor, the ground terminal of the chip is connected to the second end of the first capacitor, the discharge control terminal of the chip is connected to the execution unit; the charge control terminal of the chip is connected to the execution unit, and the charge and discharge current detection terminal of the chip is connected to the execution unit; The first end of the third resistor is connected to the second end of the first capacitor.

10. The multi-cell battery parallel anti-reverse connection circuit as claimed in claim 9, characterized in that: The execution unit includes: a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube and a fourth resistor; The gate of the third MOS tube is respectively connected to the discharge control terminal of the chip and the gate of the fifth MOS tube, the source of the third MOS tube is respectively connected to the ground terminal of the chip and the source of the fifth MOS tube, and the drain of the third MOS tube is connected to the drain of the fourth MOS tube; The gate of the fourth MOS tube is respectively connected to the charging control terminal of the chip and the gate of the sixth MOS tube, and the source of the fourth MOS tube is respectively connected to the second end of the fourth resistor and the source of the sixth MOS tube; The drain of the fifth MOS tube is connected to the drain of the sixth MOS tube; The first end of the fourth resistor is connected to the charge and discharge current detection terminal of the chip, and the second end of the fourth resistor is connected to the source of the sixth MOS tube.

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