Switching circuit

Abstract

The embodiment of the invention discloses a switching circuit. The switching circuit comprises: an input terminal for receiving an input voltage; the output end provides output voltage; the control circuit comprises a third switch tube and a bias current source which are connected in series, the control circuit receives the enable signal and generates a switch control signal according to the enable signal, and the bias current source provides bias current according to the enable signal; the first switch tube is provided with a first end coupled to the input end, a control end receives the switch control signal, and the first switch tube is switched on or switched off under the control of the switch control signal; the second switching tube is provided with a first end coupled to the second end of the first switching tube, a control end for receiving the switching control signal and a second end coupled to the output end, and is switched on or off under the control of the switching control signal; when the enable signal is in a first state, the bias current is not zero, and the first switch tube, the second switch tube and the third switch tube are conducted; and when the enable signal is in a second state, the reference current is zero, and the first switch tube, the second switch tube and the third switch tube are switched off.

Description

Technical Field

[0001] The present application relates to the technical field of switch circuits, and in particular to a switch circuit. Background Art

[0002] The selection and switching of the input signal of the high-voltage detection circuit usually involves the use of a switch selection circuit. The switch selection circuit can select one output from multiple input signals. When the existing switch selection circuit selects one output from multiple input signals, because the current in the control circuit affects the output signal, there is an error between the input and the output.

[0003] Therefore, a high-precision switch selection circuit is needed, and the multi-way selection circuit can be unaffected by the current in the control circuit. Summary of the invention

[0004] The present application provides a switching circuit, aiming to solve the problem that a switching current that enables a control switch circuit will cause a voltage difference between an input terminal and an output terminal, thereby affecting the detection accuracy of an input signal.

[0005] According to a first aspect of the present application, the present application provides a switch circuit, comprising: an input end, receiving an input voltage; an output end, providing an output voltage; a control circuit, comprising a third switch tube and a bias current source connected in series, the control circuit receives an enable signal and generates a switch control signal according to the enable signal, and the bias current source provides a bias current according to the enable signal; a first switch tube, having a first end, a second end and a control end, wherein the first end is coupled to the input end, the control end receives a switch control signal, and the first switch tube is turned on or off under the control of the switch control signal; and a second switch tube, having a first end, a second end and a control end, wherein the first end is coupled to the second end of the first switch tube, the control end receives the switch control signal, the second end is coupled to the output end, and the second switch tube is turned on or off under the control of the switch control signal; when the enable signal is in a first state, the bias current is not zero, the first switch tube, the second switch tube and the third switch tube are turned on, and the bias current flows through the third switch tube; when the enable signal is in a second state, the bias current is zero, and the first switch tube, the second switch tube and the third switch tube are turned off.

[0006] Through one or more of the above embodiments of the present invention, at least the following technical effects can be achieved:

[0007] In the present application, a control circuit having a third switch tube and a bias current source connected in series is used so that the bias current does not need to flow through the first switch tube and the second switch tube to realize the enabling control of the switch circuit, thereby avoiding the voltage drop caused by the on-resistance of the first switch tube and the second switch tube when the bias current flows through the channel of the first switch tube and the second switch tube, thereby reducing the voltage difference between the input voltage at the input end and the output voltage at the output end, and improving the detection accuracy of the input signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0009] Figure 1 A schematic diagram of the structure of an existing switch selection circuit is shown;

[0010] Figure 2 Shows Figure 1 A schematic diagram of a specific circuit structure of the first switch circuit and the second switch circuit shown;

[0011] Figure 3 A schematic diagram of the circuit structure of a switch circuit according to an embodiment of the present application is shown;

[0012] Figure 4 A schematic diagram of the circuit structure of a switch circuit according to an embodiment of the present application is shown;

[0013] Figure 5 A schematic diagram of the circuit structure of a bias current source according to an embodiment of the present application is shown;

[0014] Figure 6 A circuit structure schematic diagram of a switch circuit according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0015] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0016] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0017] It should be understood that in the following description, "circuit" refers to a conductive loop composed of at least one element or subcircuit through electrical connection or electromagnetic connection. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0018] Figure 1 A schematic diagram of the structure of an existing switch selection circuit is shown. Figure 1 As shown, the switch selection circuit includes N switch circuits, the input end of each switch circuit is coupled to N input ends IN1 to INn, and the output end of each switch circuit is coupled to the output end OUT. When high-voltage input detection is performed, the enable signal of one of the switch circuits is high level, and the switch circuit corresponding to the high-level enable signal is turned on, and the enable signals of the remaining N-1 switch circuits are low level, and the switch circuit corresponding to the low-level enable signal is turned off. When one of the switch circuits is turned on, the output voltage of the output end OUT is equal to the input voltage of the input end of the path.

[0019] Figure 2 Shows Figure 1 The specific circuit structure diagram of the first switch circuit and the second switch circuit is shown in FIG. Figure 2As shown, the working principle of the first switch circuit and the second switch circuit is that when the start-up current output by the control current source IEN1 is not zero, the switch tubes MN1 and MN2 in the first switch circuit are turned on, and the first input signal Vin1 is transmitted to the output terminal OUT, or when the start-up current output by the control current source IEN2 is not zero, the switch tubes MN3 and MN4 in the second switch circuit are turned on, and the second input signal Vin2 is transmitted to the output terminal OUT. It can be concluded from the working principle of the first switch circuit and the second switch circuit that since the start-up current is not zero, the start-up current will flow to the input terminal and the output terminal through the turned-on switch tube, resulting in a voltage difference between the input voltage Vin and the output voltage Vout (the voltage difference is equal to the start-up current multiplied by the on-resistance of the switch), thereby affecting the detection accuracy of the input signal. In order to reduce the influence of the voltage difference on the detection accuracy, the size of the switch tube is usually increased to reduce the on-resistance of the switch tube, but this will increase the area of ​​the circuit, which is not conducive to the miniaturization and integration of the switch circuit, and will also increase the production cost.

[0020] Figure 3 The circuit structure schematic diagram of the switch circuit according to an embodiment of the present application is shown. The switch circuit includes an input terminal IN, an output terminal OUT, a control circuit 10, a first switch tube M1 and a second switch tube M2, wherein the input terminal IN receives an input voltage Vin, and the output terminal OUT provides an output voltage Vout. The control circuit 10 includes a third switch tube M3 and a bias current source IBIAS connected in series, the control circuit 10 receives an enable signal EN and generates a switch control signal CTRL according to the enable signal EN, and the bias current source IBIAS provides a bias current IB according to the enable signal EN. In one embodiment, when the enable signal EN is in a first state, the bias current IB is not zero, and when the enable signal EN is in a second state, the bias current IB is zero. The first switch tube M1 has a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the input terminal IN, the control terminal receives the switch control signal CTRL, and the first switch tube M1 is turned on or off under the control of the switch control signal CTRL. The second switch tube M2 has a first end, a second end and a control end, wherein the first end is coupled to the second end of the first switch tube M1, the control end receives the switch control signal CTRL, and the second end is coupled to the output end OUT. The second switch tube M2 is turned on or off under the control of the switch control signal CTRL. Figure 3In the embodiment, when the enable signal EN is in the first state, the bias current IB is not zero, the first switch tube M1, the second switch tube M2 and the third switch tube M3 are turned on, and the bias current IB flows through the third switch tube M3. When the enable signal EN is in the second state, the bias current IB is zero, and the first switch tube M1, the second switch tube M2 and the third switch tube M3 are turned off. Exemplarily, the enable signal EN can be a digital level signal, and the first state and the second state of the enable signal EN can be a logic high level state or a logic low level state, which is determined according to the conductivity type of the transistor used in the actual circuit.

[0021] exist Figure 3 In the embodiment shown, the first switch tube M1 and the second switch tube M2 serve as control switches between the input terminal IN and the output terminal OUT. When the control circuit 10 receives the enable signal EN, the bias current source IBIAS provides a bias current IB to flow through the third switch tube M3 according to the enable signal EN, and the control circuit 10 generates a switch control signal CTRL according to the enable signal EN. The first switch tube M1 and the second switch tube M2 are turned on after receiving the switch control signal CTRL, so that the output voltage Vout is equal to the input voltage Vin. Figure 3 In the embodiment shown, the third switch M3 includes an N-type field effect transistor, and the bias current is coupled to the drain of the N-type field effect transistor and flows from the drain to the source of the N-type field effect transistor. It should be noted that in other embodiments, the third switch M3 may also include a P-type field effect transistor.

[0022] Figure 4 FIG. 1 shows a schematic diagram of a circuit structure of a switch circuit according to an embodiment of the present application. Figure 4 In the illustrated embodiment, the first switch tube M1 and the second switch tube M2 include N-type field effect transistors, and the third switch tube M3 includes a P-type field effect transistor. The third switch tube M3 has a first terminal, a second terminal and a control terminal, the first terminal of the third switch tube M3 receives the power supply voltage VS, the control terminal is coupled to the second terminal of the first switch tube M1, the first terminal of the bias current source IBIAS is coupled to the power supply voltage, and the control circuit 10 further includes a voltage generating circuit and a fourth transistor M4. The voltage generating circuit has a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the third switch tube M3. The fourth transistor M4 has a first terminal, a second terminal and a control terminal, the first terminal of the fourth transistor M4 is coupled to the second terminal of the voltage generating circuit and provides a switch control signal CTRL, the control terminal receives the enable non-signal ENB, and the third terminal is coupled to the second terminal of the bias current source IBIAS, wherein the enable non-signal ENB and the enable signal EN are complementary signals. When the enable non-signal is in the first state, the fourth transistor M4 is turned on. Exemplarily, the fourth transistor M4 includes an N-type field effect transistor, and when the enable negation signal ENB is at a logic high level, the fourth transistor M4 is turned on.

[0023] In some embodiments, the voltage generating circuit includes a resistor or a series-connected diode or a series-connected field effect transistor. When a series-connected diode or field effect transistor is used, appropriate component parameters and power supply voltage parameters are selected to use the two as resistive devices. In some embodiments, the voltage across the voltage generating circuit is about 4V.

[0024] exist Figure 4 In the illustrated embodiment, the switch circuit further includes a Zener diode Zener for performing overvoltage protection on the switch circuit.

[0025] Figure 5 A schematic diagram of the circuit structure of a bias current source according to an embodiment of the present application is shown. The bias current source IBIAS includes a fifth transistor M5, a sixth transistor M6 and a seventh transistor M7. The fifth transistor M5 has a first terminal, a second terminal and a third terminal, wherein the first terminal is coupled to the power supply voltage terminal VDD, and the second terminal and the third terminal are coupled together.

[0026] The sixth transistor M6 has a first end, a second end and a third end, wherein the first end is coupled to the power supply voltage end VDD, the second end is coupled to the second end of the fifth transistor M5, and the third end provides a bias current. The seventh transistor M7 has a first end, a second end and a third end, wherein the first end is coupled to the third end of the fifth transistor M5, the second end receives the enable signal EN, and the third end is coupled to the constant current source. When the enable signal EN is a logic low level, the seventh transistor M7 is turned off, the current mirror output bias current IB formed by the fifth transistor M5 and the sixth transistor M6 is 0A, and the first switch tube M1, the second switch tube M2 and the third switch tube M3 are turned off; when the enable signal EN is a logic high level, the seventh transistor M7 is turned on, the reference current source IREF flows through the seventh transistor M7, and is mirrored by the current mirror formed by the fifth transistor M5 and the sixth transistor M6 to output to the voltage generating circuit to generate a switch control signal CTRL, and the first switch tube M1, the second switch tube M1 and the third switch tube M3 are turned on.

[0027] Figure 6 FIG. 1 shows a schematic diagram of a circuit structure of a switch circuit according to an embodiment of the present application. Figure 6In the illustrated embodiment, the first switch tube M1 and the second switch tube M2 include P-type field effect transistors, and the third switch tube M3 includes an N-type field effect transistor, wherein the third switch tube M3 has a first terminal, a second terminal and a control terminal, the first terminal of the third switch tube M3 receives the power supply voltage VS, the control terminal is coupled to the second terminal of the first switch tube M1, the first terminal of the bias current source IBIAS is coupled to the reference ground, and the control circuit 10 further includes a voltage generating circuit and a fourth transistor M4. The voltage generating circuit has a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the third switch tube M3. The fourth transistor M4 has a first terminal, a second terminal and a control terminal, the first terminal of the fourth transistor M4 is coupled to the second terminal of the voltage generating circuit and provides a switch control signal CTRL, the control terminal receives the enable signal EN, and the third terminal is coupled to the second terminal of the bias current source IBIAS, wherein when the enable signal EN is in the first state, the fourth transistor M4 is turned on. Exemplarily, the fourth transistor M4 includes an N-type field effect transistor, and when the first state of the enable signal EN is a logic high level, the fourth transistor M4 is turned on.

[0028] In the present application, a control circuit having a third switch tube M3 and a bias current source IBIAS connected in series is provided, so that the bias current IB does not need to flow through the first switch tube M1 and the second switch tube M2 to achieve enabling control of the switch circuit, thereby avoiding the voltage drop caused by the on-resistance of the first switch tube M1 and the second switch tube M2 due to the bias current IB flowing through the first switch tube M1 and the second switch tube M2, thereby reducing the voltage difference between the input voltage at the input end and the output voltage at the output end, and improving the detection accuracy of the input signal.

[0029] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A switching circuit, characterized in that: include: An input terminal, receiving an input voltage; An output terminal, providing an output voltage; A control circuit, comprising a third switch tube and a bias current source connected in series, the control circuit receiving an enable signal and generating a switch control signal according to the enable signal, and the bias current source providing a bias current according to the enable signal; A first switch tube has a first end, a second end and a control end, wherein the first end is coupled to the input end, the control end receives a switch control signal, and the first switch tube is turned on or off under the control of the switch control signal; as well as A second switch tube has a first end, a second end and a control end, wherein the first end is coupled to the second end of the first switch tube, the control end receives a switch control signal, the second end is coupled to the output end, and the second switch tube is turned on or off under the control of the switch control signal; When the enable signal is in the first state, the bias current is not zero, the first switch tube, the second switch tube and the third switch tube are turned on, and the bias current flows through the third switch tube; when the enable signal is in the second state, the bias current is zero, and the first switch tube, the second switch tube and the third switch tube are turned off. 2 . The switch circuit according to claim 1 , wherein the first switch tube and the second switch tube comprise N-type field effect transistors, and the third switch tube comprises a P-type field effect transistor.

3. The switch circuit according to claim 2, wherein a first terminal of the third switch tube is coupled to a reference ground, a control terminal is coupled to a second terminal of the first switch tube, a first terminal of the bias current source is coupled to a supply voltage, and the control circuit further comprises: A voltage generating circuit has a first end and a second end, wherein the first end is coupled to the second end of the bias current source and provides a switch control signal, and the second end is coupled to the second end of the third switch tube; and The fourth transistor has a first end, a second end and a control end, the first end of the fourth transistor receives a switch control signal, the control end receives an enable signal, and the third end is coupled to a reference ground, wherein when the enable signal is in a first state, the fourth transistor is turned off. 4 . The switch circuit according to claim 3 , wherein the voltage generating circuit comprises a resistor or a series-connected diode or a series-connected field effect transistor. The switch circuit according to claim 3 , wherein the fourth transistor comprises an N-type field effect transistor.

6. The switching circuit according to claim 1, wherein the bias current source comprises: a fifth transistor having a first terminal, a second terminal and a third terminal, wherein the first terminal is coupled to the power supply voltage terminal, and the second terminal and the third terminal are coupled together; a sixth transistor having a first terminal, a second terminal and a third terminal, wherein the first terminal is coupled to the power supply voltage terminal, the second terminal is coupled to the second terminal of the fifth transistor, and the third terminal provides a bias current; as well as The seventh transistor has a first terminal, a second terminal and a third terminal, wherein the first terminal is coupled to the third terminal of the fifth transistor, the second terminal receives an enable signal, and the third terminal is coupled to the constant current source. 7 . The switch circuit according to claim 1 , wherein the first switch tube and the second switch tube comprise P-type field effect transistors, and the third switch tube comprises an N-type field effect transistor.

8. The switch circuit according to claim 7, wherein the third switch tube has a first terminal, a second terminal and a control terminal, the first terminal of the third switch tube receives a power supply voltage, the control terminal is coupled to the second terminal of the first switch tube, the first terminal of the bias current source is coupled to a reference ground, and the control circuit further comprises: A voltage generating circuit has a first end and a second end, wherein the first end is coupled to the second end of the third switch tube; and A fourth transistor has a first end, a second end and a control end, wherein the first end of the fourth transistor is coupled to the second end of the voltage generating circuit and provides a switch control signal, the control end receives an enable signal, and the third end is coupled to the second end of the bias current, wherein when the enable signal is in the first state, the fourth transistor is turned on. 9 . The switch circuit according to claim 8 , wherein the voltage generating circuit comprises a resistor or a series-connected diode or a series-connected field effect transistor.

10. The switch circuit of claim 8, wherein the fourth transistor comprises an N-type field effect transistor.

Images