Control node, bus system and method of operating control node of bus system
By setting a switching unit in the control node, the problem of stuck caused by unstable signal transmission during the initialization of the bus system is solved, and a more efficient and reliable address allocation process is achieved.
Patent Information
- Application Number
- CN202411537880.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-11-10
- Filing Date
- 2024-10-31
- Publication Date
- 2025-05-13
AI Technical Summary
The prior art is prone to accidental jamming of the bus system due to the incomplete reception of the confirmation signal or the switching signal during the initialization process, affecting the efficiency and reliability of address allocation.
By providing a switching unit in the control node, the control node electrically interconnects the first power supply terminal with the second power supply terminal immediately after receiving the address allocation signal, thereby ensuring the continuity of the power supply and the rapid completion of the address allocation.
It effectively reduces the risk of stuckness caused by unstable signal transmission during the initialization process, and improves the efficiency and reliability of controlling node address allocation in the bus system.
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Figure CN119996104A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to an automation system having a plurality of zones, each zone comprising one or more control nodes. The invention relates to communication between control nodes via a bus system, in particular to the allocation of bus addresses to a plurality of control nodes. Background Art
[0002] In the field of automation, bus systems are used to allow communication between multiple control nodes and a bus master. The communication over the bus is carried out using an individual address for each of the control nodes connected in the bus system.
[0003] For example, a bus system such as a CAN bus having at least one data line and at least one power supply line may be used. The data line is unshielded and interconnects the control nodes to achieve data communication. At least one power line is used to provide power supply to each of the control nodes.
[0004] A bus master is provided for a plurality of control nodes, the bus master being a gateway, for example, which itself can be connected to a higher level fieldbus of an industrial automation system. The bus system for communicating with the control nodes can then act as a sub-bus system for the fieldbus and can selectively control a single physical device connected to each of the control nodes.
[0005] Typically, these single physical devices may include switching devices, electrical drives, sensors, actuators, etc. to perform physical and sensing operations.
[0006] Typically, bus systems used in the field of automation systems usually require a simple and robust structure for communicating with control nodes, such as that provided by a CAN bus or the like.
[0007] The typical structure of such a CAN bus system includes two data lines and two power supply lines. Therefore, a bus system with only four lines can both supply power to the control nodes and establish data communication with sufficient transmission bandwidth between the bus master and the control nodes.
[0008] In order to individually control a device having control nodes, the bus master must assign a unique address to each of the control nodes. Various methods are known, including manually setting an individual address for each control node, such as by means of a dip switch.
[0009] In addition, automated address allocation in the initialization phase is also known. For example, from document DE 10 2006 030706 B4, an addressing method is known in which the bus stations are permanently connected to the bus master via power supply lines and data lines. In addition, the bus has a control line that extends from the bus master to the first bus station and circulates from the first bus station to the next bus station in the form of a daisy chain. The daisy chain marks the automatic address allocation by connecting the bus stations to the control line in succession, so that the address can be assigned to the latest connected node. However, this method requires an additional control line.
[0010] From the document WO2016 / 184889A1, a method for allocating addresses of bus users by a bus master is known, wherein the bus users are connected to the bus master by a bus having at least one data line and at least one power supply line for the bus users. At least one data line is routed from the bus master to all bus users, and the power supply line is routed from the bus master to a first bus user among the bus users, and circulates through the first bus user to another bus user through a switching element in the first bus user. In order to assign an address to the first bus user, a supply voltage is provided to the first bus user via the power supply line. The first address is transmitted to the first bus user by the bus master. The first address is received and stored by the first bus user, and the switching member of the first bus user is activated to apply the power supply voltage to the next bus user via the next section of the power supply line.
[0011] After assigning the address to the corresponding bus user, the bus master waits for a confirmation signal confirming that the address has been associated with the corresponding bus user. Only when the bus master receives the confirmation signal does the bus master have to actively command the corresponding bus user to switch the switching element. In the event that the confirmation or command signal is disturbed or not completely received, this process can cause the initialization process to get stuck unexpectedly.
[0012] The object of the invention is to provide a bus system and a method for assigning addresses to control nodes of a bus system in which the risk of an initialization process getting stuck is significantly reduced. Summary of the invention
[0013] This object has been achieved by a bus system comprising a bus master and a control node according to claim 1 and by a method for assigning real addresses to control nodes in a bus system according to a further independent claim.
[0014] Further embodiments are indicated in the dependent claims.
[0015] According to a first aspect, a control node for a bus system is provided, wherein the control node is suitable for controlling a plurality of devices; the control node comprises:
[0016] a control unit configured to, when supply power is applied to the control node via at least one power supply line at the first power supply terminal or the second power supply terminal, send an address request signal and receive an address allocation signal including a unique address via at least one data line;
[0017] - a switching unit configured to electrically interconnect the first power supply terminal with the second power supply terminal immediately after the control unit detects that the address assignment signal has been received.
[0018] According to another aspect, there is provided a bus system, the bus system comprising:
[0019] - the above mentioned control node;
[0020] - A bus master configured to receive the address request signal and to immediately send an address assignment signal in response via at least one data line.
[0021] The bus system for communicating with multiple control nodes includes at least one power supply line and at least one data line. At least one data line is connected to each control node in the control node. The transmission of the signal can be controlled by a bus master, which sends a control signal and commands the addressed control node to confirm or provide data through at least one data line. In other embodiments, the bus master only assigns addresses, and the control nodes can communicate directly with each other. Specifically, each control node can assume the address of an adjacent control node by subtracting 1 from the address to obtain the address of the previous node, and obtain the address of the next control node by adding 1 to the address.
[0022] According to an embodiment, at least one data line interconnecting all control nodes and bus master controllers may be provided, wherein at least one power supply line has a portion that provides a point-to-point interconnection between the bus master controller and one of the first power supply terminal and the second power supply terminal of the control node, or provides a point-to-point interconnection between one of the first power supply terminal and the second power supply terminal of one of the control nodes and one of the first power supply terminal and the second power supply terminal of another control node.
[0023] The control nodes are sequentially connected in series to the bus master and to each other via multiple sections of at least one power supply line, wherein each of the multiple sections of at least one power supply line connects the bus master to a first control node or to two control nodes, respectively.
[0024] Each control node has a first power supply terminal and a second power supply terminal for connecting to a portion or only a portion of at least one power supply line. A portion of at least one power supply line from the bus master is connected to the first power supply terminal of the first control node, and the second power supply terminal of the first control node is connected to another portion of the at least one power supply line. The other portion of the at least one power supply line is connected to the first terminal of the next control node. Thus, this portion of at least one power supply line provides a point-to-point connection between the second power supply terminal of one control node and the first power control node of the next control node.
[0025] In each of the control nodes, a switching unit is provided between a first power supply terminal and a second power supply terminal of the corresponding control node to selectively allow a portion of at least one power supply line connected to the corresponding control node to be connected or disconnected. In addition, the switching unit is configured to allow power to be supplied to the corresponding control node after a supply voltage is applied, however, the connection between the first power supply terminal and the second power supply terminal is established only by a switching control command generated by a control unit of the corresponding control node. With this configuration, the control nodes are connected in a daisy-chain form with respect to a portion of at least one power supply line.
[0026] Thus, in an initial state, a portion of at least one power supply line is first electrically separated by a switching unit in each of the control nodes. The control nodes are configured such that the switching unit is open when power is not supplied to the respective control node.
[0027] In the initialization process, each of the unidentified control nodes (not provided with a unique address) is assigned an address in turn. For the initialization process, it makes no difference whether one or more daisy-chained control nodes are connected to a bus master or to a control node that has been provided with a unique address.
[0028] In order to assign a unique address to each of the control nodes, according to the initialization process, the bus master receives an address request signal each time the control node is connected to the bus system and supplies power to the newly connected control node. When connected, the control node is configured to receive power supply through the corresponding first (or second) power supply terminal. Powering the control unit in the control node causes the address request signal to be generated on at least one data line.
[0029] The address request signal is received by the bus master, and in response, the bus master provides an address allocation signal containing a unique address of the corresponding control node to the corresponding control node via at least one data line. In the bus master, the unique address is associated with the corresponding control node and is stored accordingly in the bus master.
[0030] The control node is further configured such that, upon receipt of the address assignment signal, the control unit immediately controls the switching unit to close, thereby providing an electrical interconnection between the first power supply terminal and the second power supply terminal, in order to power a next portion of the at least one power line, i.e. connected to the power supply. In other words, directly and immediately means that controlling the switching unit to close is performed without receiving any further commands from the bus master and is controlled by the control node itself only after receipt of the address assignment signal.
[0031] When the further control node receives power supply via the new supply section of at least one power supply line, the above initialization process is started again. Therefore, in the respective further control node, an address request signal is issued on at least one data line. The address request signal is again received by the bus master, which provides a further address allocation signal containing a further unique address to at least one data line, which is then received by the respective further control node. Then, after the unique address has been registered in the control node, the further control node immediately closes the respective switch. This process can be repeated when an unidentified control node is connected to a respective section of the power supply line for which a unique address has not yet been registered.
[0032] Provision may be made for the control unit to be configured to confirm assignment of the unique address to the bus master upon receipt of the address assignment signal.
[0033] A switching unit may be provided that includes a first forward polarized diode between the first power supply terminal and the control unit and a second forward polarized diode between the second power supply terminal and the control unit. A first bypass switch arranged in parallel with the first forward polarized diode is configured to bypass the first diode so that the control unit is powered when power is supplied through a corresponding portion of at least one power supply line connected to the first power supply terminal. A second bypass switch is arranged in parallel with the second forward polarized diode, and the second bypass switch is configured to bypass the second diode so that the control unit is powered when power is supplied through a corresponding portion of at least one power supply line connected to the second power supply terminal. The control unit is configured to control the corresponding bypass switch to close, and the control unit is immediately provided with power supply via the bypass switch after power is turned on.
[0034] In particular, the control unit may be configured to control the remaining opened bypass switches to close after the address assignment signal is received.
[0035] Thus, the switching unit may have a forward polarized diode connected between each power supply terminal and the control unit, which allows to immediately power the control unit of the control node when a power supply voltage is applied to one of the power supply terminals.
[0036] When the power supply is applied to the control unit, the initialization process begins. If each power supply terminal is connected to the control unit via a forward polarized diode, the control node can be powered via each of the power supply terminals, thereby facilitating installation of the control node in the bus system, since a portion of at least one power supply line can be arbitrarily connected to any of the power supply terminals.
[0037] Furthermore, a power supply is provided to the control unit through a common power supply node connected to each of the diodes and each of the bypass switches.
[0038] When the initialization process starts, the bypass switch is closed, thereby bypassing the corresponding diode that supplies power to the control unit.
[0039] It may be provided that, when power is supplied to the control unit, the first diode or the second diode for supplying power to the control unit is detected, and the corresponding bypass switch associated with the corresponding diode is closed (conducting), while the other switch remains open (non-conducting). When the control unit receives an address assignment signal comprising a unique address, the other bypass switch is closed, thereby forming a direct interconnection between the first power supply terminal and the second power supply terminal, thereby starting to supply power to another part of the power line to which power supply was not previously applied.
[0040] Furthermore, the control unit may be configured to store the unique address after receiving the address assignment signal.
[0041] The bus system and method described above allow for the quick and efficient assignment of unique addresses to control nodes of the bus system, avoiding the problem of the initialization process getting stuck when a confirmation signal or a switching signal is not correctly transmitted via the data line.
[0042] According to another aspect, a method for operating a control node for a bus system is provided, wherein the control node is adapted to control a plurality of devices; the method comprising the following steps:
[0043] - after detecting at the first power supply terminal or the second power supply terminal that power supply is applied to the control node via at least one power supply line, sending an address request signal via at least one data line;
[0044] - waiting to receive or receiving an address assignment signal comprising a unique address via the at least one data line;
[0045] - immediately upon detecting that the address assignment signal has been received, directly electrically interconnecting the first power supply terminal with the second power supply terminal. BRIEF DESCRIPTION OF THE DRAWINGS
[0046] Embodiments are described in more detail with reference to the accompanying drawings, in which:
[0047] Figure 1 Schematically shows a bus system including a bus master and a plurality of control nodes;
[0048] Figure 2 A control node is shown in more detail, the control node comprising a switching unit with interchangeable terminals for connecting a power line; and
[0049] Figure 3 A flow chart is shown which illustrates a method of assigning a unique address to each control node. DETAILED DESCRIPTION
[0050] Figure 1 Schematically shown is a bus system 1 having a bus master 2 and a plurality of control nodes 3. External communication with the control nodes 3 takes place via the bus master 2, which can be connected to a field bus 4 or the like. The bus master 2 is connected to the control nodes 3 via a power supply line and a data line which feeds into all of the control nodes 3 in the control nodes 3.
[0051] Each control node 3 includes a control unit 31 and a switching unit 32, and each control node 3 may also be connected to at least one device 6, the device 6 includes at least one of one or more actuators and / or measuring sensors, the actuators are, for example, motors, drives, etc. The control unit may control the at least one device 6 according to commands received from the bus master 2.
[0052] The control unit 31 has in particular the function of operating the device 6 comprising one or more actuators and / or one or more measuring sensors according to the commands received by the bus master 2 .
[0053] like Figure 2 As shown in more detail in FIG, the bus system comprises: two power supply lines 7 for providing a DC supply voltage; and two data lines 8 for transmitting data as differential data signals. Such a bus architecture is common for automation bus systems such as CAN.
[0054] Each control node 3 has a first power supply terminal 33 and a second power supply terminal 34, wherein the first power supply terminal 33 of the first control node 3A among the control nodes is connected to the bus master controller 2 via a portion 7A of the power supply line 7, and the second power supply terminal 34 of the first control node 3A is connected to the first power supply terminal 33 of another control node 3B via another portion 7B of the power supply line 7.
[0055] Between the first power supply terminal 33 and the second power supply terminal 34 of each control node 3, a switching unit 32 is provided, which allows interconnection between the first power supply terminal and the second power supply terminal to provide power supply from one part of the power supply line 7 to the next part of the power supply line 7.
[0056] In an initial state, ie, when power supply is not applied or after power has been supplied to the control node but a unique address has not yet been assigned, the switching unit 32 disconnects the first power supply terminal 33 and the second power supply terminal 34 from each other.
[0057] exist Figure 3 In , a flow chart is depicted, which illustrates a method for assigning a unique address to each unidentified control node of a bus system. If a control node is not assigned a unique address, the control node is unidentified.
[0058] In step S1, it is checked in each of the unidentified control nodes whether power supply has been newly applied. If the answer is affirmative (optional: yes), the method proceeds to step S2, otherwise (optional: no), the method returns to step S1.
[0059] In step S2, when the control node receives power supply through the first power supply terminal or the second power supply terminal, the initialization process is started. Power is supplied to the control unit of the control node, and an address request signal is generated in the control unit and sent out through the data line 8.
[0060] In step S3, the request signal is received by the bus master 2, to which the bus master 2 in response provides an address assignment signal comprising a unique address via the data line 8. The unique address is an address which has not been provided to any other control node 2 before.
[0061] In step S4, the control node 3 that sent the address request signal receives the unique address. The unique address is stored in the control unit 31 so that commands directed to the control node with the unique address can be processed in the control unit.
[0062] Triggered by receiving a unique address, in step S5, the switching unit 32 is controlled by the corresponding control unit 31 so that the first power supply terminal 33 and the second power supply terminal 34 are electrically interconnected, and power is supplied to a portion of the power supply line 7 that is connected to the second power supply terminal 34 or was not previously equipped with power supply.
[0063] Furthermore, in step S6, the bus master 2 may be informed that the unique address is correctly received in the control node.
[0064] The method continues with step S1.
[0065] If a further control node 3 is connected to the corresponding section of the power supply line 7, the further control node 3 is powered again and an initialization process is started by issuing an address request signal to the data line 8. This results in the generation of a further unique address, which will be provided to the corresponding inquiring control node via the data line, and so on.
[0066] The above process automatically assigns a unique address to each of the control nodes newly connected to the bus system, or when another control node interconnects the first power supply terminal and the second power supply terminal, each of the control nodes is supplied with power, thereby applying power to a portion of the power supply line that was previously not supplied with power.
[0067] In order to make the first power supply terminal 33 and the second power supply terminal 34 of each control node 3 interchangeable, the switching unit 32 may have a configuration such as Figure 2 The structure shown.
[0068] The first power supply terminal 33 is connected to the common power supply node C of the control unit 31 through the first forward polarized diode 35, so that when power is supplied to the first power supply terminal 33, due to the forward operation of the first diode, the power is directly applied to the control unit 31. The first bypass switch 36 is connected in parallel with the first diode 35, thereby bypassing the first diode 35. In order to compensate for the voltage drop across the first diode, the control unit 31 can close the first switch 36 immediately after power-on to apply the full power supply voltage to the control unit 31.
[0069] The second power supply terminal 34 is similarly connected to the common power supply node C of the control unit 31 via a second forward polarized diode 37. In parallel with the second diode 37, a second bypass switch 38 is provided. If the control unit 31 is powered via the second power supply terminal 34, the second bypass switch can be closed, thereby bypassing the second diode 37. This allows interchangeable operation of the first power supply terminal 33 and the second power supply terminal 34.
[0070] In response to receiving the address assignment signal comprising the unique address, the switching unit 32 may be closed to provide electrical interconnection between the first power supply terminal 33 and the second power supply terminal 34 by closing a corresponding bypass switch which remains open when providing power supply to the control node 3 .
Claims
1. A control node (3) for a bus system (1), wherein: The control node (3) is suitable for controlling a plurality of devices (6); the control node (3) comprises: - a control unit (31) configured to: send an address request signal when supply power is applied to the control node (3) via at least one power supply line (7) at a first power supply terminal (33) or a second power supply terminal (34); and receive an address allocation signal including a unique address via at least one data line (8); - a switching unit (32) configured to directly and electrically interconnect the first power supply terminal (33) and the second power supply terminal (34) immediately after the control unit (31) detects that the address allocation signal has been received.
2. The control node (3) according to claim 1, wherein: The control unit (31) is configured to confirm the allocation of the unique address after receiving the address allocation signal.
3. The control node (3) according to claim 1 or 2, wherein: The control unit (31) is configured to store the unique address after receiving the address allocation signal.
4. The control node (3) according to any one of claims 1 to 3, wherein: The switching unit (32) comprises a first forward polarization diode (35) located between the first power supply terminal (33) and the control unit (31), and a second forward polarization diode (37) located between the second power supply terminal and the control unit (31), wherein a first bypass switch (36) is arranged in parallel with the first forward polarization diode (35), and a second bypass switch (38) is arranged in parallel with the second forward polarization diode (37), wherein the control unit (31) is configured to control the corresponding bypass switches (36, 38) to be closed, and via the bypass switches, the control unit (31) is immediately provided with power supply after power is turned on.
5. The control node (3) according to claim 4, wherein: The control unit (31) is configured to control the remaining open bypass switches (36, 38) to be closed after the address assignment signal has been received.
6. A bus system (1), comprising: - at least one control node (3) according to any one of claims 1 to 5; A bus master (2) configured to receive the address request signal and to immediately send an address assignment signal in response via the at least one data line (8).
7. The bus system according to claim 6, wherein: At least one data line is provided for interconnecting at least one of the control nodes with the bus master controller (2), wherein at least one of the power supply lines (7) has a portion that provides a point-to-point interconnection between the bus master controller (2) and one of the first power supply terminal (33) and the second power supply terminal (34) of at least one of the control nodes (3), or provides a point-to-point interconnection between one of the first power supply terminal (33) and the second power supply terminal (34) of one of the at least one control nodes (3) and one of the first power supply terminal (33) and the second power supply terminal (34) of another of the at least one control nodes (3).
8. The bus system according to claim 6 or 7, wherein: At least one of the control nodes (3) is connected to a plurality of devices (6), which include a transport driver of a transport system.
9. A method for operating a control node (3) for a bus system (29), wherein: The control node (3) is suitable for controlling a plurality of devices (6); the method comprises the following steps: - after detecting at a first power supply terminal (33) or a second power supply terminal (34) that power is supplied to the control node (3) via at least one power supply line (7), sending an address request signal via at least one data line (8); - receiving or waiting to receive an address allocation signal comprising a unique address via the at least one data line (8); - immediately upon detecting that the address assignment signal has been received, directly electrically interconnecting the first power supply terminal (33) with the second power supply terminal (34).
Citation Information
Patent Citations
System and method for controlling bus-networked devices via an open fieldbus
DE102006030706B4
Bus system and method for assigning addresses of bus components of a bus system
WO2016184889A1