Fault monitoring methods, devices, electronic equipment and storage media

Abstract

This invention provides a fault monitoring method, apparatus, electronic device, and storage medium, relating to the field of data processing technology. The method includes: obtaining a first completion timeout exit time range supported by each PCIe device in a server; globally modifying each of the first completion timeout exit time ranges according to an input preset timeout exit time adjustment instruction to obtain a modified second completion timeout exit time range; wherein the preset timeout exit time adjustment instruction includes adjustment methods for multiple preset completion timeout exit times; restarting the server and setting completion timeout exit times for all PCIe devices in the server according to the second completion timeout exit time range; and determining a fault monitoring result based on a comparison between the second completion timeout exit time range corresponding to the restarted PCIe device and the first completion timeout exit time range supported by each PCIe device.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a fault monitoring method, apparatus, electronic device, and storage medium. Background Technology

[0002] In PCIe device communication, when a device called a Requester issues a request, it often needs to wait for a response from another device, the Completer, before continuing to perform subsequent operations. However, in some cases, such as configuration errors or system failures, the Requester may not receive a timely response from the Completer. To ensure that the system can recover from this waiting state and continue to operate normally, a mechanism is needed. This is where the Completion Timeout mechanism comes in: it sets a timeout limit for the Requester to wait for a response. Once this timeout limit is exceeded, the Requester will no longer wait but will trigger a timeout exit mechanism, allowing the system to continue executing subsequent tasks and avoiding stagnation caused by waiting.

[0003] However, in related technologies, timeout exit mechanisms may still have problems such as false alarms, which may affect the normal operation of the system. Therefore, how to better monitor the faults of timeout exit mechanisms has become an urgent problem to be solved in the industry. Summary of the Invention

[0004] This invention provides a fault monitoring method, device, electronic device, and storage medium to address the shortcomings of existing technologies in how to better monitor faults related to timeout exit mechanisms.

[0005] This invention provides a fault monitoring method, comprising the following steps:

[0006] Obtain the first completion timeout exit time range supported by each PCIe device in the server;

[0007] Based on the input preset timeout exit time adjustment instruction, each of the first completion timeout exit time ranges is globally modified to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes adjustment methods for multiple preset completion timeout exit times;

[0008] Restart the server and set the completion timeout exit time for all PCIe devices on the server according to the second completion timeout exit time range;

[0009] The fault monitoring result is determined by comparing the second completion timeout exit time range corresponding to the PCIe device after restart with the first completion timeout exit time range supported by each PCIe device.

[0010] According to a fault monitoring method provided by the present invention, obtaining the first completion timeout exit time range supported by each PCIe device in the server includes:

[0011] Obtain device information for all PCIe devices in the server;

[0012] According to the preset register command, obtain the first completion timeout exit time range supported by the PCIe device;

[0013] The first completion timeout exit time range includes at least one of the following: a first preset time range [a1,b1], a second preset time range [c1,d1], a third preset time range [e1,f1], a fourth preset time range [g1,h1], where a1≤b1≤c1≤d1≤f1≤g1≤h1.

[0014] According to a fault monitoring method provided by the present invention, the step of globally modifying each of the first completion timeout exit time ranges according to the input preset timeout exit time adjustment command to obtain a modified second completion timeout exit time range includes:

[0015] Export the server's basic input / output system options using the server configuration tool;

[0016] By searching the Basic Input / Output System options and setting the global timeout for PCIe devices, the first preset time range [a1,b1] in each of the first completion timeout exit time ranges is modified to the fifth preset time range [a2,b1], the second preset time range [c1,d1] is modified to the sixth preset time range [c2,d1], the third preset time range [e1,f1] is modified to the seventh preset time range [e2,f1], and the fourth preset time range [g1,h1] is modified to the eighth preset time range [g2,h1]; thus, the modified second completion timeout exit time ranges are obtained; wherein, the second completion timeout exit time range includes at least one of the following: the fifth preset time range [a2,b1], the sixth preset time range [c2,d1], the seventh preset time range [e2,f1], and the eighth preset time range [g2,h1]; b1>a2>a1, d1>c2>c1, f1>e2>e1, h1>g2>g1;

[0017] The server configuration tool executes the import command for the second completion timeout exit time range to obtain the modified basic input / output system options;

[0018] The modified Basic Input / Output System options are used to set a global completion timeout exit time according to the second completion timeout exit time range after the server restarts.

[0019] According to a fault monitoring method provided by the present invention, the server is restarted, and completion timeout exit times are set for all PCIe devices in the server according to a second completion timeout exit time range, including:

[0020] After restarting the server and initializing the system parameters using the system basic input / output system, the corresponding second completion timeout exit time range is loaded for the PCIe devices to enable timeout exit time settings for all PCIe devices on the server.

[0021] According to a fault monitoring method provided by the present invention, before the step of determining the fault monitoring result based on a comparison result between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device, the method further includes:

[0022] After restarting the server, use the device query command to query the target value of the second completion timeout exit time range of the register characterization register in the PCIE;

[0023] The target value includes at least one of the following: a first target value in a fifth preset time range [a2,b1], a second target value in a sixth preset time range [c2,d1], a third target value in a seventh preset time range [e2,f1], and a fourth target value in an eighth preset time range [g2,h1].

[0024] According to a fault monitoring method provided by the present invention, determining the fault monitoring result based on a comparison between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device includes:

[0025] If the first completion timeout exit time range includes the second completion timeout exit time range, the register verification passes, and a completion timeout exit time fault monitoring log of the PCIe device where the register is located is generated.

[0026] According to a fault monitoring method provided by the present invention, determining the fault monitoring result based on a comparison between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device includes:

[0027] If the second completion timeout exit time range is not included in the first completion timeout exit time range, the register verification fails, and basic input / output system configuration fault information of the PCIe device where the register is located is generated.

[0028] The present invention also provides a fault monitoring device, comprising the following modules:

[0029] The acquisition module is used to obtain the first completion timeout exit time range supported by each PCIe device in the server;

[0030] The modification module is used to globally modify each of the first completion timeout exit time ranges according to the input preset timeout exit time adjustment instruction, so as to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes the adjustment method for multiple preset completion timeout exit times;

[0031] The restart module is used to restart the server and set the completion timeout exit time for all PCIe devices in the server according to the second completion timeout exit time range.

[0032] The monitoring module is used to determine the fault monitoring result based on the comparison result between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device.

[0033] According to the fault monitoring device provided by the present invention, the device is further used for:

[0034] Obtain device information for all PCIe devices in the server;

[0035] According to the preset register command, obtain the first completion timeout exit time range supported by the PCIe device;

[0036] The first completion timeout exit time range includes at least one of the following: a first preset time range [a1,b1], a second preset time range [c1,d1], a third preset time range [e1,f1], a fourth preset time range [g1,h1], where a1≤b1≤c1≤d1≤f1≤g1≤h1.

[0037] According to the fault monitoring device provided by the present invention, the device is further used for:

[0038] Export the server's basic input / output system options using the server configuration tool;

[0039] By searching the Basic Input / Output System options and setting the global timeout for PCIe devices, the first preset time range [a1,b1] in each of the first completion timeout exit time ranges is modified to the fifth preset time range [a2,b1], the second preset time range [c1,d1] is modified to the sixth preset time range [c2,d1], the third preset time range [e1,f1] is modified to the seventh preset time range [e2,f1], and the fourth preset time range [g1,h1] is modified to the eighth preset time range [g2,h1]; thus, the modified second completion timeout exit time ranges are obtained; wherein, the second completion timeout exit time range includes at least one of the following: the fifth preset time range [a2,b1], the sixth preset time range [c2,d1], the seventh preset time range [e2,f1], and the eighth preset time range [g2,h1]; b1>a2>a1, d1>c2>c1, f1>e2>e1, h1>g2>g1;

[0040] The server configuration tool executes the import command for the second completion timeout exit time range to obtain the modified basic input / output system options;

[0041] The modified Basic Input / Output System options are used to set a global completion timeout exit time according to the second completion timeout exit time range after the server restarts.

[0042] According to the fault monitoring device provided by the present invention, the device is further used for:

[0043] After restarting the server and initializing the system parameters using the system basic input / output system, the corresponding second completion timeout exit time range is loaded for the PCIe devices to enable timeout exit time settings for all PCIe devices on the server.

[0044] According to the fault monitoring device provided by the present invention, the device is further used for:

[0045] After restarting the server, use the device query command to query the target value of the second completion timeout exit time range of the register characterization register in the PCIE;

[0046] The target value includes at least one of the following: a first target value in a fifth preset time range [a2,b1], a second target value in a sixth preset time range [c2,d1], a third target value in a seventh preset time range [e2,f1], and a fourth target value in an eighth preset time range [g2,h1].

[0047] According to the fault monitoring device provided by the present invention, the device is further used for:

[0048] If the first completion timeout exit time range includes the second completion timeout exit time range, the register verification passes, and a completion timeout exit time fault monitoring log of the PCIe device where the register is located is generated.

[0049] According to the fault monitoring device provided by the present invention, the device is further used for:

[0050] If the second completion timeout exit time range is not included in the first completion timeout exit time range, the register verification fails, and basic input / output system configuration fault information of the PCIe device where the register is located is generated.

[0051] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the fault monitoring method described above.

[0052] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the fault monitoring method as described above.

[0053] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the fault monitoring method as described above.

[0054] The fault monitoring method, apparatus, electronic device, and storage medium provided by this invention allow the system to obtain the first completion timeout exit time range supported by each PCIe device in the server. Based on an input preset timeout exit time adjustment command, the timeout range supported by each device is globally modified to obtain a modified second completion timeout exit time range. After restarting the server, the completion timeout exit time is set for all PCIe devices in the server according to the modified timeout range. Then, the system determines the fault monitoring result by comparing the second completion timeout exit time range corresponding to each register in the PCIe device with the first completion timeout exit time range supported by the device. If the completion timeout set by a device is not within its supported range, a fault may exist, requiring further investigation. This significantly reduces false alarms caused by improper configuration of the timeout exit mechanism, ensuring the stability and reliability of the server. Simultaneously, it provides a flexible mechanism to adapt to constantly changing system requirements and environmental conditions, thereby optimizing the performance of PCIe devices and the overall operating efficiency of the server. Attached Figure Description

[0055] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0056] Figure 1 This is a flowchart illustrating the fault monitoring method provided by the present invention.

[0057] Figure 2 A flowchart illustrating the query process provided in this application embodiment.

[0058] Figure 3 This is a schematic diagram of the verification process provided in an embodiment of this application.

[0059] Figure 4 This is a schematic diagram of the fault monitoring device provided in the embodiments of this application;

[0060] Figure 5 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0062] Figure 1 This is a flowchart illustrating the fault monitoring method provided by the present invention, as shown below. Figure 1 As shown, the method includes the following:

[0063] Step 110: Obtain the first completion timeout exit time range supported by each PCIe device in the server;

[0064] In this embodiment of the application, each PCIe device has a series of configuration registers that contain the device’s functional and performance parameters, including the supported completion timeout exit time range.

[0065] You can access these registers using system management tools or directly through the PCIe configuration space to read their values. For example, the `lspci` command can list all PCIe devices and their related information, including supported timeout ranges.

[0066] The supported timeout ranges are parsed from the device configuration register. This information is typically in the form of bit fields and needs to be parsed according to the PCIe specification.

[0067] Assume there are two PCIe devices in the server. Device A supports a timeout range of 50µs-10ms, and device B supports a timeout range of 10ms-250ms.

[0068] Step 120: Based on the input preset timeout exit time adjustment instruction, globally modify each of the first completion timeout exit time ranges to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes adjustment methods for multiple preset completion timeout exit times;

[0069] In this application embodiment, the range of timeout time that needs to be adjusted and the adjustment method are understood. Instructions may include increasing or decreasing the timeout time, setting a specific timeout threshold, etc.

[0070] Modify the first completion timeout exit time range for all PCIe devices in the server. This typically requires doing so through the BIOS / firmware configuration interface or using system management tools.

[0071] Use command-line tools (such as lspci with scripts) or graphical interface tools to batch update device timeout settings. Apply the preset timeout adjustments to the configuration of each device. This may involve writing new values ​​to the configuration registers of the PCIe devices.

[0072] Record the modified second completion timeout exit time range for each device. These records can be used for future reference and further adjustments.

[0073] Step 130: Restart the server and set the completion timeout exit time for all PCIe devices on the server according to the second completion timeout exit time range;

[0074] In this embodiment, a server restart operation is performed. This can be accomplished via a physical restart button, system commands (such as reboot in Linux or remote restart via BMC tools).

[0075] During system startup, the BIOS loads an updated configuration, including settings for the second completion timeout exit time range. These settings take effect when the BIOS initializes PCIe devices.

[0076] Observe the server startup process to ensure that the system can start smoothly and that no new hardware errors or configuration problems occur.

[0077] Once the server has started up, use system management tools or command-line tools (such as lspci) to check the configuration of each PCIe device and verify that the new timeout settings have been applied correctly.

[0078] Step 140: Determine the fault monitoring result based on the comparison result between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device.

[0079] After the server restarts and loads the new timeout settings, use system management tools or command-line tools (such as lspci) to collect configuration register data for each PCIe device.

[0080] From the collected register data, extract the current timeout exit time range for each device, i.e., the second completion timeout exit time range. Compare the second completion timeout exit time range for each device with the original first completion timeout exit time range.

[0081] Confirm whether the modified timeout setting is within the device's preset supported range. Compare the results and record them. If the modified timeout setting is within the supported range, record it as normal; otherwise, record it as abnormal. Generate a fault monitoring report based on the comparison results. The report should list in detail the original timeout range, the modified timeout range, and the comparison results for each device.

[0082] In this embodiment, the system obtains the first completion timeout exit time range supported by each PCIe device in the server. Based on the input preset timeout exit time adjustment command, the system globally modifies the timeout range supported by each device to obtain the modified second completion timeout exit time range. After restarting the server, the system sets the completion timeout exit time for all PCIe devices in the server according to the modified timeout range. Then, the system determines the fault monitoring result based on the comparison between the second completion timeout exit time range corresponding to each register in the PCIe device and the first completion timeout exit time range supported by the device. If the completion timeout set by the device is not within its supported range, a fault may exist, requiring further investigation. This significantly reduces false alarms caused by improper configuration of the timeout exit mechanism, ensuring the stability and reliability of the server. Simultaneously, it provides a flexible mechanism to adapt to constantly changing system requirements and environmental conditions, thereby optimizing the performance of PCIe devices and the overall operating efficiency of the server.

[0083] Optionally, the step of obtaining the first completion timeout exit time range supported by each PCIe device in the server includes:

[0084] Obtain device information for all PCIe devices in the server;

[0085] According to the preset register command, obtain the first completion timeout exit time range supported by the PCIe device;

[0086] The first completion timeout exit time range includes at least one of the following: a first preset time range [a1,b1], a second preset time range [c1,d1], a third preset time range [e1,f1], and a fourth preset time range [g1,h1].

[0087] In this embodiment, the bus / device / function of all currently plugged PCIe devices can be obtained using `lspci -tv` in the system, and the CompletionTimeout Range supported by the current PCIe device itself can be viewed using register commands. The commands are as follows:

[0088] `lspci -s bus:device.function –xxx` (this is the value of `bus:device.function`), check the value of bits [0-3] of offset 64 as X, and use the value of X to check the range supported by PCI-E Completion Timeout (CTO).

[0089] 0001b:RangA;

[0090] 0010b:RangB0011b:RangA and RangB

[0091] 0110b:RangB and RangC0111b:RangA,RankB and RangC

[0092] 1110b:RangB,RangCand RangD1111b:RangA,RangB,RangC and RangD

[0093] In an optional embodiment, the first preset time range [a1,b1] is 50us-10ms, the second preset time range [c1,d1] is 10ms-250ms, the third preset time range [e1,f1] is 250ms-4s, and the fourth preset time range is 4s-64s.

[0094] Taking X as an example with a value of 0111, this device itself supports the first preset time range [a1,b1], the second preset time range [c1,d1], the third preset time range [e1,f1], and the fourth preset time range [g1,h1]. You can check that the current device supports a Completion Timeout value of 50us-4s.

[0095] Figure 2 The query flowchart provided for the embodiments of this application is as follows: Figure 2 As shown, it includes:

[0096] First, PCIe device enumeration is performed, then I / O initialization is performed, and then the PCIeBAR register is polled to check the enable status of PCIEDevice Control 2 Register.

[0097] When the fourth preset time range [g1, h1] is supported, CTO is set to 4s-64s; when the third preset time range [e1, f1] is supported, CTO is set to 250ms-4s; when the second preset time range [c1, d1] is supported, CTO is set to 10ms-250ms; when the first preset time range [a1, b1] is supported, CTO is set to 50usms-10ms.

[0098] In this embodiment, the configuration register of the PCIe device contains information about the timeout range supported by the device. By reading this register, the supported completion timeout range can be obtained. Obtaining the supported timeout range allows for understanding the device's characteristics and performance, providing a basis for subsequent configuration and optimization.

[0099] Optionally, the step of globally modifying each of the first completion timeout exit time ranges according to the input preset timeout exit time adjustment instruction to obtain the modified second completion timeout exit time range includes:

[0100] Export the server's basic input / output system options using the server configuration tool;

[0101] By searching the Basic Input / Output System options and setting the global timeout for PCIe devices, the first preset time range [a1,b1] in each of the first completion timeout exit time ranges is modified to the fifth preset time range [a2,b1], the second preset time range [c1,d1] is modified to the sixth preset time range [c2,d1], the third preset time range [e1,f1] is modified to the seventh preset time range [e2,f1], and the fourth preset time range [g1,h1] is modified to the eighth preset time range [g2,h1]; thus, the modified second completion timeout exit time ranges are obtained; wherein, the second completion timeout exit time range includes at least one of the following: the fifth preset time range [a2,b1], the sixth preset time range [c2,d1], the seventh preset time range [e2,f1], and the eighth preset time range [g2,h1]; b1>a2>a1, d1>c2>c1, f1>e2>e1, h1>g2>g1;

[0102] The server configuration tool executes the import command for the second completion timeout exit time range to obtain the modified basic input / output system options;

[0103] The modified Basic Input / Output System options are used to set a global completion timeout exit time according to the second completion timeout exit time range after the server restarts.

[0104] In this embodiment, a server configuration tool is used to export the current server's Basic Input / Output System (BIOS) options. This step typically involves using the BIOS interface or a specific export command.

[0105] For example, export BIOS options using the SCE tool: . / SCELnx64 / o / s bios.txt / b.

[0106] Locate and set Enable PCI-E Completion Timeout (Global) to Global in bios.txt (Global is the master switch). Set the PCI-E Global Timeout Value to 50us to 100us / 1ms to 10ms / 16ms to 55ms / 65ms to 210ms / 260ms to 900ms / 1s to 3.5s / 4s to 13s, and save this change.

[0107] Specifically, by searching the Basic Input / Output System options and setting the global timeout for PCIe devices, the first preset time range [a1,b1] in each of the first completion timeout exit time ranges is modified to the fifth preset time range [a2,b1], the second preset time range [c1,d1] is modified to the sixth preset time range [c2,d1], the third preset time range [e1,f1] is modified to the seventh preset time range [e2,f1], and the fourth preset time range [g1,h1] is modified to the eighth preset time range [g2,h1]; thus, the modified second completion timeout exit time ranges are obtained; wherein, the second completion timeout exit time range includes at least one of the following: the fifth preset time range [a2,b1], the sixth preset time range [c2,d1], the seventh preset time range [e2,f1], and the eighth preset time range [g2,h1]; b1 > a2 > a1, d1>c2>c1, f1>e2>e1, h1>g2>g1;

[0108] For example: change 50 microseconds (µs) to 100 microseconds. Change 1 millisecond (ms) to 10 milliseconds. Change 6 milliseconds to 55 milliseconds. Change 65 milliseconds to 210 milliseconds. Change 260 milliseconds to 900 milliseconds. Change 1 second (s) to 3.5 seconds. Change 4 seconds to 13 seconds. These modifications will generate a new second completion timeout exit time range.

[0109] Then, import this modification using the SCE tool by executing the following command: . / SCELnx64 / i / s bios.txt / b, to obtain the modified basic input / output system options.

[0110] In this embodiment, adjusting the timeout period can reduce false alarms caused by improper timeout settings. Appropriate timeout settings can improve the overall stability of the system and prevent system failures due to timeouts.

[0111] Optionally, the server is restarted, and completion timeout exit times are set for all PCIe devices on the server according to the second completion timeout exit time range, including:

[0112] After restarting the server and initializing the system parameters using the system basic input / output system, the corresponding second completion timeout exit time range is loaded for the PCIe devices to enable timeout exit time settings for all PCIe devices on the server.

[0113] In this embodiment, the server restart is triggered by system commands, a physical restart button, or a remote management tool (such as IPMI). During the server startup process, the BIOS (Basic Input / Output System) performs a self-test and initializes system parameters.

[0114] The BIOS loads a new timeout exit time configuration for each PCIe device based on the imported second completion timeout exit time range setting. As the PCIe device initializes, the new timeout settings are applied, overriding the previous default or original settings.

[0115] Once the server has started up, use system management tools or command-line tools (such as lspci) to check the configuration of each PCIe device and verify that the new timeout settings have been applied correctly.

[0116] Optionally, before the step of determining the fault monitoring result based on the comparison result between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device, the method further includes:

[0117] After restarting the server, use the device query command to query the target value of the second completion timeout exit time range of the register characterization register in the PCIE;

[0118] Among them, the first target value of the fifth preset time range [a2,b1], the second target value of the sixth preset time range [c2,d1], the third target value of the seventh preset time range [e2,f1], and the fourth target value of the eighth preset time range [g2,h1].

[0119] In this embodiment of the application, after restarting the server, the target value of bit [0-3] of offset 68 of the PCIe device register is queried to determine the second completion timeout exit time range of each register.

[0120] Restart the server to apply the modified BIOS options. Then, use the device query command to find the target value of bits [0-3] in offset 68 of the PCIe device register. This value represents the device's current completion timeout exit time range.

[0121] Based on the retrieved target value, determine the corresponding completion timeout exit time range. The correspondence between the target value and the timeout range is as follows:

[0122] 0001: 50us to 100us

[0123] 0010: 1ms to 10ms

[0124] 0101: 16ms to 55ms

[0125] 0110: 65ms to 210ms

[0126] 1001: 260ms to 900ms

[0127] 1010: 1s to 3.5s

[0128] 0000: 4s to 13s

[0129] In this embodiment of the application, querying the register value can verify whether the modified BIOS options are set correctly and determine the current completion timeout exit time range of the device.

[0130] Optionally, determining the fault monitoring result based on the comparison between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device includes:

[0131] If the first completion timeout exit time range includes the second completion timeout exit time range, the register verification passes, and a completion timeout exit time fault monitoring log of the PCIe device where the register is located is generated.

[0132] If the second completion timeout exit time range is not included in the first completion timeout exit time range, the register verification fails, and basic input / output system configuration fault information of the PCIe device where the register is located is generated.

[0133] Figure 3 This is a schematic diagram of the verification process provided in the embodiments of this application, such as... Figure 3 As shown, the system will compare the second completion timeout exit time range corresponding to the PCIe device register queried after restarting with the first completion timeout exit time range supported by the device obtained previously.

[0134] If the second completion timeout exit time range is encompassed by the first completion timeout exit time range, this means the register settings are correct and the device can function normally within its supported timeout range. Therefore, the register verification passes, and the system will generate a completion timeout exit time fault monitoring log for the PCIe device, recording the normal state.

[0135] If the second completion timeout exit range is not encompassed by the first completion timeout exit range, this indicates that the register settings are outside the range supported by the device, which may be a configuration error or device malfunction. In this case, register verification fails, and the system will generate a Basic Input / Output System (BIOS) configuration fault message, indicating a configuration problem with the PCIe device.

[0136] The system will record detailed information about the PCIe device where the fault occurred, including the device ID, register settings, supported timeout range, and the actual timeout range set. The system may issue an alert to notify maintenance personnel that a configuration fault has occurred and needs to be checked and repaired. Fault information will be logged in the system's log file for subsequent analysis and troubleshooting.

[0137] In this embodiment, the system can promptly detect and report configuration problems of PCIe devices, helping maintenance personnel to quickly locate and resolve issues, thereby ensuring the stable operation of the system.

[0138] In an alternative embodiment, a PCIe device is installed in the server, and the necessary BIOS configuration is performed to ensure hardware compatibility and performance optimization with the system settings.

[0139] Install the PCIe Completion Timeout Adaptive Device, a hardware or software solution designed to dynamically adjust PCIe device timeout settings. After installation, start the server and boot the operating system.

[0140] After the system boots up, the PCIe Completion Timeout adaptive program is automatically triggered. This program is designed to monitor all PCIe devices within the server and can track their status and performance metrics in real time.

[0141] If the monitoring program detects any PCIe device malfunction or timeout, it will automatically generate a detailed fault matching log.

[0142] These logs record in detail the time of the fault event, the device identifier, the fault type, and the possible causes, and save them in the result.log file.

[0143] The device automatically sends the logs in the result.log file back to the central monitoring system or the analysis platform of the operations and maintenance team.

[0144] After receiving these logs, maintenance personnel use them to accurately locate faulty devices and conduct in-depth analysis to determine the root cause of the fault.

[0145] Based on the results of log analysis, the operations and maintenance team develops and implements corresponding troubleshooting measures, which may include adjusting timeout settings, hardware repair or replacement, driver updates, etc.

[0146] After troubleshooting, continuously monitor the device status to verify that the problem has been resolved and ensure that the server and PCIe devices have returned to normal operation.

[0147] In this embodiment of the application, through this refined monitoring and response process, the data center can achieve rapid response to PCIe device failures, minimize service interruptions, and improve overall system stability and reliability.

[0148] The fault monitoring device provided by the present invention is described below. The fault monitoring device described below can be referred to in correspondence with the fault monitoring method described above.

[0149] Figure 4 This is a schematic diagram of the fault monitoring device provided in the embodiments of this application, such as... Figure 4 As shown, it includes:

[0150] The acquisition module 410 is used to acquire the first completion timeout exit time range supported by each PCIe device in the server;

[0151] The modification module 420 is used to globally modify each of the first completion timeout exit time ranges according to the input preset timeout exit time adjustment instruction, so as to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes the adjustment method for multiple preset completion timeout exit times;

[0152] The restart module 430 is used to restart the server and set the completion timeout exit time for all PCIe devices in the server according to the second completion timeout exit time range;

[0153] The monitoring module 440 is used to determine the fault monitoring result based on the comparison result between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device.

[0154] According to the fault monitoring device provided by the present invention, the device is further used for:

[0155] Obtain device information for all PCIe devices in the server;

[0156] According to the preset register command, obtain the first completion timeout exit time range supported by the PCIe device;

[0157] The first completion timeout exit time range includes at least one of the following: a first preset time range [a1,b1], a second preset time range [c1,d1], a third preset time range [e1,f1], a fourth preset time range [g1,h1], a1≤b1≤c1≤d1≤f1≤g1≤h1.

[0158] According to the fault monitoring device provided by the present invention, the device is further used for:

[0159] Export the server's basic input / output system options using the server configuration tool;

[0160] By searching the Basic Input / Output System options and setting the global timeout for PCIe devices, the first preset time range [a1,b1] in each of the first completion timeout exit time ranges is modified to the fifth preset time range [a2,b1], the second preset time range [c1,d1] is modified to the sixth preset time range [c2,d1], the third preset time range [e1,f1] is modified to the seventh preset time range [e2,f1], and the fourth preset time range [g1,h1] is modified to the eighth preset time range [g2,h1]; thus, the modified second completion timeout exit time ranges are obtained; wherein, the second completion timeout exit time range includes at least one of the following: the fifth preset time range [a2,b1], the sixth preset time range [c2,d1], the seventh preset time range [e2,f1], and the eighth preset time range [g2,h1]; b1 > a2 > a1, d1 > c2 > c1, f1 > e2 > e1, h1 > g2 > g1; the server configuration tool executes the second import instruction for the timeout exit range to obtain the modified basic input / output system options;

[0161] The modified Basic Input / Output System options are used to set a global completion timeout exit time according to the second completion timeout exit time range after the server restarts.

[0162] According to the fault monitoring device provided by the present invention, the device is further used for:

[0163] After restarting the server and initializing the system parameters using the system basic input / output system, the corresponding second completion timeout exit time range is loaded for the PCIe devices to enable timeout exit time settings for all PCIe devices on the server.

[0164] According to the fault monitoring device provided by the present invention, the device is further used for:

[0165] After restarting the server, the second completion timeout query is performed using the device query command to query the target value of the second completion timeout exit time range of the register in the PCIE.

[0166] Among them, the first target value of the fifth preset time range [a2,b1], the second target value of the sixth preset time range [c2,d1], the third target value of the seventh preset time range [e2,f1], and the fourth target value of the eighth preset time range [g2,h1].

[0167] According to the fault monitoring device provided by the present invention, the device is further used for:

[0168] If the first completion timeout exit time range includes the second completion timeout exit time range, the register verification passes, and a completion timeout exit time fault monitoring log of the PCIe device where the register is located is generated.

[0169] According to the fault monitoring device provided by the present invention, the device is further used for:

[0170] If the second completion timeout exit time range is not included in the first completion timeout exit time range, the register verification fails, and basic input / output system configuration fault information of the PCIe device where the register is located is generated.

[0171] In this embodiment, the system obtains the first completion timeout exit time range supported by each PCIe device in the server. Based on the input preset timeout exit time adjustment command, the system globally modifies the timeout range supported by each device to obtain the modified second completion timeout exit time range. After restarting the server, the system sets the completion timeout exit time for all PCIe devices in the server according to the modified timeout range. Then, the system determines the fault monitoring result based on the comparison between the second completion timeout exit time range corresponding to each register in the PCIe device and the first completion timeout exit time range supported by the device. If the completion timeout set by the device is not within its supported range, a fault may exist, requiring further investigation. This significantly reduces false alarms caused by improper configuration of the timeout exit mechanism, ensuring the stability and reliability of the server. Simultaneously, it provides a flexible mechanism to adapt to constantly changing system requirements and environmental conditions, thereby optimizing the performance of PCIe devices and the overall operating efficiency of the server.

[0172] Figure 5 This is a schematic diagram of the structure of the electronic device provided by the present invention, such as... Figure 5 As shown, the electronic device may include: a processor 510, a communications interface 520, a memory 530, and a communication bus 540, wherein the processor 510, the communications interface 520, and the memory 530 communicate with each other through the communication bus 540. The processor 510 can call logical instructions in the memory 530 to execute a fault monitoring method, which includes: obtaining the first completion timeout exit time range supported by each PCIe device in the server;

[0173] Based on the input preset timeout exit time adjustment instruction, each of the first completion timeout exit time ranges is globally modified to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes adjustment methods for multiple preset completion timeout exit times;

[0174] Restart the server and set the completion timeout exit time for all PCIe devices on the server according to the second completion timeout exit time range;

[0175] The fault monitoring result is determined by comparing the second completion timeout exit time range corresponding to the PCIe device after restart with the first completion timeout exit time range supported by each PCIe device.

[0176] Furthermore, the logical instructions in the aforementioned memory 530 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0177] On the other hand, the present invention also provides a computer program product, the computer program product including a computer program, the computer program being able to be stored on a non-transitory computer-readable storage medium, and when the computer program is executed by a processor, the computer is able to execute the fault monitoring method provided by the above methods, the method including: obtaining a first completion timeout exit time range supported by each PCIe device in the server;

[0178] Based on the input preset timeout exit time adjustment instruction, each of the first completion timeout exit time ranges is globally modified to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes adjustment methods for multiple preset completion timeout exit times;

[0179] Restart the server and set the completion timeout exit time for all PCIe devices on the server according to the second completion timeout exit time range;

[0180] The fault monitoring result is determined by comparing the second completion timeout exit time range corresponding to the PCIe device after restart with the first completion timeout exit time range supported by each PCIe device.

[0181] In another aspect, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to perform the fault monitoring method provided by the above methods, the method comprising: obtaining a first completion timeout exit time range supported by each PCIe device in the server;

[0182] Based on the input preset timeout exit time adjustment instruction, each of the first completion timeout exit time ranges is globally modified to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes adjustment methods for multiple preset completion timeout exit times;

[0183] Restart the server and set the completion timeout exit time for all PCIe devices on the server according to the second completion timeout exit time range;

[0184] The fault monitoring result is determined by comparing the second completion timeout exit time range corresponding to the PCIe device after restart with the first completion timeout exit time range supported by each PCIe device.

[0185] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0186] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0187] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A fault monitoring method, characterized in that, include: Obtain the first completion timeout exit time range supported by each PCIe device in the server; Based on the input preset timeout exit time adjustment instruction, each of the first completion timeout exit time ranges is globally modified to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes adjustment methods for multiple preset completion timeout exit times; Restart the server and set the completion timeout exit time for all PCIe devices on the server according to the second completion timeout exit time range; The fault monitoring result is determined by comparing the second completion timeout exit time range corresponding to the PCIe device after restart with the first completion timeout exit time range supported by each PCIe device. The step of determining the fault monitoring result based on the comparison between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device includes: After restarting the server, use the device query command to query the target value of the second completion timeout exit time range of the register characterization register in the PCIE; The target value includes at least one of the following: a first target value in a fifth preset time range [a2,b1], a second target value in a sixth preset time range [c2,d1], a third target value in a seventh preset time range [e2,f1], and a fourth target value in an eighth preset time range [g2,h1]. The step of determining the fault monitoring result based on a comparison between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device includes: If the first completion timeout exit time range includes the second completion timeout exit time range, the register verification passes, and a completion timeout exit time fault monitoring log of the PCIe device where the register is located is generated; The step of determining the fault monitoring result based on a comparison between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device includes: If the second completion timeout exit time range is not included in the first completion timeout exit time range, the register verification fails, and basic input / output system configuration fault information of the PCIe device where the register is located is generated.

2. The fault monitoring method according to claim 1, characterized in that, The first completion timeout exit time range supported by each PCIe device in the server includes: Obtain device information for all PCIe devices in the server; According to the preset register command, obtain the first completion timeout exit time range supported by the PCIe device; The first completion timeout exit time range includes at least one of the following: a first preset time range [a1,b1], a second preset time range [c1,d1], a third preset time range [e1,f1], a fourth preset time range [g1,h1], where a1≤b1≤c1≤d1≤f1≤g1≤h1.

3. The fault monitoring method according to claim 2, characterized in that, The step of globally modifying each of the first completion timeout exit time ranges according to the input preset timeout exit time adjustment command to obtain the modified second completion timeout exit time range includes: Export the server's basic input / output system options using the server configuration tool; By searching the Basic Input / Output System options and setting the global timeout for PCIe devices, the first preset time range [a1,b1] in each of the first completion timeout exit time ranges is modified to the fifth preset time range [a2,b1], the second preset time range [c1,d1] is modified to the sixth preset time range [c2,d1], the third preset time range [e1,f1] is modified to the seventh preset time range [e2,f1], and the fourth preset time range [g1,h1] is modified to the eighth preset time range [g2,h1]; thus, the modified second completion timeout exit time ranges are obtained; wherein, the second completion timeout exit time range includes at least one of the following: the fifth preset time range [a2,b1], the sixth preset time range [c2,d1], the seventh preset time range [e2,f1], and the eighth preset time range [g2,h1]; b1>a2>a1, d1>c2>c1, f1>e2>e1, h1>g2>g1; The server configuration tool executes the import command for the second completion timeout exit time range to obtain the modified basic input / output system options; The modified Basic Input / Output System options are used to set a global completion timeout exit time according to the second completion timeout exit time range after the server restarts.

4. The fault monitoring method according to claim 1, characterized in that, Restart the server, and set completion timeout exit times for all PCIe devices on the server according to the second completion timeout exit time range, including: After restarting the server and initializing the system parameters using the system basic input / output system, the corresponding second completion timeout exit time range is loaded for the PCIe devices to enable timeout exit time settings for all PCIe devices on the server.

5. A fault monitoring device, characterized in that, include: The acquisition module is used to obtain the first completion timeout exit time range supported by each PCIe device in the server; The modification module is used to globally modify each of the first completion timeout exit time ranges according to the input preset timeout exit time adjustment instruction, so as to obtain the modified second completion timeout exit time range; wherein, the preset timeout exit time adjustment instruction includes the adjustment method for multiple preset completion timeout exit times; The restart module is used to restart the server and set the completion timeout exit time for all PCIe devices in the server according to the second completion timeout exit time range. The monitoring module is used to determine the fault monitoring result based on the comparison result between the second completion timeout exit time range corresponding to the PCIe device after restart and the first completion timeout exit time range supported by each PCIe device. The device is also used for: After restarting the server, use the device query command to query the target value of the second completion timeout exit time range of the register characterization register in the PCIE; The target value includes at least one of the following: a first target value in a fifth preset time range [a2,b1], a second target value in a sixth preset time range [c2,d1], a third target value in a seventh preset time range [e2,f1], and a fourth target value in an eighth preset time range [g2,h1]. The device is also used for: If the first completion timeout exit time range includes the second completion timeout exit time range, the register verification passes, and a completion timeout exit time fault monitoring log of the PCIe device where the register is located is generated; The device is also used for: If the second completion timeout exit time range is not included in the first completion timeout exit time range, the register verification fails, and basic input / output system configuration fault information of the PCIe device where the register is located is generated.

6. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the fault monitoring method as described in any one of claims 1 to 4.

7. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the fault monitoring method as described in any one of claims 1 to 4.

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