Solar cell and preparation method thereof, cell module and photovoltaic system

Abstract

The invention provides a solar cell and a preparation method thereof, a cell assembly, and a photovoltaic system, and the solar cell comprises a silicon substrate, one side of which is provided with a first conductive type region, a second conductive type region, and a gap region. The first conductive type region and the second conductive type region are opposite in conductive type and are alternately arranged in a crossed shape, the gap region is distributed between the first conductive type region and the second conductive type region, and the gap region is arranged between the first conductive type region and the second conductive type region in the extending direction of the gap region. The difference between the maximum width of the gap region and the minimum width of the gap region is w, and w < = 3 [mu] m. Thus, widening of the gap region is reduced, the width of the region having photoelectric conversion activity is increased, and the photoelectric conversion efficiency of the solar cell is improved.

Description

Technical Field

[0001] The present application relates to the field of solar cells, and in particular, to solar cells and methods for preparing the same, cell modules, and photovoltaic systems. Background Art

[0002] As solar cell technology has developed to date, high efficiency has become increasingly important. Interdigitated back contact (IBC) solar cells (BC cells for short) have obvious advantages. Further improving the conversion efficiency of solar cells is an effective research direction for further reducing the cost of solar cells and achieving parity.

[0003] Currently, the industry mostly uses laser ablation grooving technology to open grooves for TBC batteries. The energy is transmitted by lasers of different wavelengths to create grooves between the oxide layer and the polysilicon. However, there is a thermal melting effect, which widens the effective light spot at the edge, increases the width of the gap area, and reduces efficiency. Summary of the invention

[0004] The present application aims to solve one of the technical problems in the related art at least to some extent.

[0005] In a first aspect, the present application provides a solar cell, comprising: a silicon substrate, wherein one side of the silicon substrate has a first conductive type region, a second conductive type region and a gap region, the first conductive type region and the second conductive type region have opposite conductive types and are alternately arranged in a cross-shaped manner, the gap region is distributed between the first conductive type region and the second conductive type region, and in the extension direction of the gap region, the difference between the maximum width of the gap region and the minimum width of the gap region is w, and satisfies w≤3μm.

[0006] The thermal melting effect in the process of laser ablation grooving of solar cells will cause the actual width of the gap area (gap area) to be greater than the designed width, and there are many protrusions on the edge of the gap area, and the width of the gap area varies greatly at different positions. The solar cell proposed in this application has a small difference in width at different positions of the gap area, that is, the side edges of the gap area adjacent to the first conductive type and the second conductive type are nearly straight, and the actual width of the gap area is slightly different from the designed width, which can improve the photoelectric conversion efficiency of the solar cell.

[0007] According to some embodiments of the present application, the width of the gap region is less than or equal to 40 μm, thereby improving the photoelectric conversion efficiency of the solar cell.

[0008] According to some embodiments of the present application, the first conductive type region is a P-type conductive region, and the second conductive type region is an N-type conductive region.

[0009] The second aspect of the present application provides a method for preparing the solar cell provided in the first aspect of the present application, the method comprising: providing a double-sided polished silicon substrate, forming a first doped polysilicon layer on the backlight surface of the silicon substrate; using a first laser to irradiate a non-first conductive type area, and using a second laser to irradiate an edge position of the first conductive type area close to the non-first conductive type area, the energy of the second laser is greater than the energy of the first laser; then etching the laser irradiated area with alkaline solution; forming a whole layer of second doped polysilicon layer in the first conductive type area and other areas of the backlight surface; using a third laser to irradiate an area where a gap is to be formed, and using a fourth laser to irradiate an edge position of the first conductive type area and an edge position of the second conductive type area, the energy of the fourth laser is greater than the energy of the third laser; then etching the laser irradiated area with alkaline solution, wherein the conductivity types of the first conductive type area and the second conductive type area are opposite, and the gap area is between the first conductive type area and the second conductive type area.

[0010] In the method for preparing solar cells proposed in the present application, high-energy laser lines (second laser and fourth laser) are added during the first laser irradiation and the second laser irradiation. The high-energy laser irradiation on polycrystalline silicon will cause the polycrystalline silicon to completely melt. During the cooling process, fine silicon grains will grow again from the liquid oxide interface. After the edge of the light spot is cooled, more silicon will be precipitated at the edge of the polycrystalline silicon. During the alkali washing process, the precipitated silicon will be etched first, and then the polycrystalline silicon will be etched. Under the same etching conditions, the corrosion of the alkali solution on the polycrystalline silicon layer can be reduced, and the polycrystalline silicon on the edge side can be retained, thereby reducing the widening of the gap area after the alkali washing, so that the actual width of the gap area is close to the designed width of the gap area, and the damage to the polycrystalline silicon on the edge side is reduced, and the passivation effect of the side can be increased to improve the photoelectric conversion efficiency.

[0011] According to some embodiments of the present application, the energies of the first laser and the third laser are independently 50 μJ-80 μJ, and the energies of the second laser and the fourth laser are independently greater than or equal to 110 μJ.

[0012] According to some embodiments of the present application, the spot diameters of the second laser and the fourth laser are independently 2 μm-15 μm.

[0013] According to some embodiments of the present application, the light spots of the second laser and the fourth laser are square.

[0014] According to some embodiments of the present application, the first doped polysilicon layer is a P-type polysilicon layer, and the second doped polysilicon layer is an N-type polysilicon layer.

[0015] The third aspect of the present application provides a battery assembly, including the solar cell provided in the first aspect of the present application or the solar cell prepared by the method provided in the second aspect of the present application.

[0016] A fourth aspect of the present application provides a photovoltaic system, comprising the battery assembly provided in the third aspect of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0018] Figure 1 The morphology of the gap region in the related art is shown.

[0019] Figure 2 The morphology of the gap region of one embodiment of the present application is shown.

[0020] Figure 3 A schematic flow chart of a method for preparing a solar cell according to an embodiment of the present application is shown.

[0021] Figure 4 A schematic flow chart of a method for preparing a solar cell according to an embodiment of the present application is shown.

[0022] Figure 5 A schematic diagram showing the second laser irradiation area according to an embodiment of the present application is shown.

[0023] Figure 6 A schematic diagram showing a P region, an N region, and a gap region formed according to an embodiment of the present application is shown.

[0024] Reference numerals:

[0025] 100 silicon substrate; 110 first doped polysilicon layer; 120 tunnel passivation contact layer; 130 second doped polysilicon layer; A edge position. DETAILED DESCRIPTION

[0026] The embodiments of the present application are described in detail below. The embodiments described below are exemplary and are only used to explain the present application, and should not be construed as limiting the present application. If no specific technology or conditions are indicated in the embodiments, the technology or conditions described in the document in this area or the product specification are used. The reagents used or the instruments that do not indicate the manufacturer are all conventional products that can be obtained commercially.

[0027] In a first aspect, the present application provides a solar cell, comprising: a silicon substrate, wherein one side of the silicon substrate has a first conductive type region, a second conductive type region and a gap region, the first conductive type region and the second conductive type region have opposite conductive types and are alternately arranged in a cross-shaped manner, the gap region is distributed between the first conductive type region and the second conductive type region, and in the extension direction of the gap region, the difference between the maximum width of the gap region and the minimum width of the gap region is w, and satisfies w≤3μm.

[0028] The thermal melting effect in the process of laser ablation grooving of solar cells will cause the actual width of the gap area (gap area) to be greater than the designed width, and there are many protrusions on the edge of the gap area, and the width of the gap area varies greatly at different positions. The solar cell proposed in this application has a small difference in width at different positions of the gap area, that is, the side edges of the gap area adjacent to the first conductive type and the second conductive type are nearly straight, and the actual width of the gap area is slightly different from the designed width, which can improve the photoelectric conversion efficiency of the solar cell.

[0029] In the present application, the maximum width of the gap region may be, for example, the width measured at a position where no protrusion is formed at the edge of the gap, and the minimum width of the gap region may be, for example, the width measured at a position where a tiny protrusion is formed at the edge of the gap. Figure 1-2 , the maximum width w1 and the minimum width w2 are shown in the figure, w1-w2=w, and w≤3μm.

[0030] According to some embodiments of the present application, the width of the gap region is less than or equal to 40 μm. Figure 1 , d is the width of the gap region. A narrower gap region can reduce the probability of carrier recombination and enable effective current output. A narrower gap region also helps maintain a more stable and efficient built-in electric field distribution, allowing carriers to move quickly in a given direction, increasing the short-circuit current and open-circuit voltage of solar cells and improving photoelectric conversion efficiency. A smaller gap region means a larger active region with photoelectric conversion capability, which can also generate more photogenerated carriers and help improve photoelectric conversion efficiency.

[0031] According to some embodiments of the present application, the first conductive type region is a P-type conductive region, and the second conductive type region is an N-type conductive region.

[0032] Specifically, the solar cell comprises:

[0033] A silicon substrate having a front surface and a backlight surface that are oppositely disposed;

[0034] A P-type polysilicon layer, the P-type polysilicon layer is arranged on the back side of the silicon substrate and covers the P-type conductive area;

[0035] An N-type polysilicon layer, wherein the N-type polysilicon layer is disposed on the back side of the silicon substrate and covers the N-type conductive region, and a gap region is formed between the P-type conductive region and the N-type conductive region;

[0036] A tunneling passivation contact layer is disposed on the back side of the silicon substrate and covers the P-type conductive region (P region) and the N-type conductive region (N region).

[0037] The second aspect of the present application provides a method for preparing the solar cell provided in the first aspect of the present application, the method comprising: providing a double-sided polished silicon substrate, forming a first doped polysilicon layer on the backlight surface of the silicon substrate; performing regional heat treatment on the first doped polysilicon layer using a first laser irradiation process to form a first conductive type region on the backside of the silicon substrate, the first laser irradiation process comprising: using a first laser to irradiate a non-first conductive type region, using a second laser to irradiate an edge position of the first conductive type region close to the non-first conductive type region, the energy of the second laser is greater than the energy of the first laser, and alkali washing; forming a whole layer of a second doped polysilicon layer in the first conductive type region and other regions of the backlight surface; performing regional heat treatment on the second doped polysilicon layer using a second laser irradiation process to form a second conductive type region in a partial region on the backside of the silicon substrate, the second laser irradiation process comprising using a third laser to irradiate a non-second conductive type region, using a fourth laser to irradiate an edge position of the first conductive type region and an edge position of the second conductive type region, the energy of the fourth laser is greater than the energy of the third laser, and alkali washing, wherein the conductivity types of the first conductive type region and the second conductive type region are opposite, and there is a gap region between the first conductive type region and the second conductive type region.

[0038] In the method for preparing solar cells proposed in the present application, high-energy laser lines (second laser and fourth laser) are added during the first laser irradiation and the second laser irradiation. The high-energy laser irradiation on polycrystalline silicon will cause the polycrystalline silicon to completely melt. During the cooling process, fine silicon grains will grow again from the liquid oxide interface. After the edge of the light spot is cooled, more silicon will be precipitated at the edge of the polycrystalline silicon. During the alkali washing process, the precipitated silicon will be etched first, and then the polycrystalline silicon will be etched. Under the same etching conditions, the corrosion of the alkali solution on the polycrystalline silicon layer can be reduced, and the polycrystalline silicon on the edge side can be retained, thereby reducing the widening of the gap area after the alkali washing, so that the actual width of the gap area is close to the designed width of the gap area, and the damage to the polycrystalline silicon on the edge side is reduced, and the passivation effect of the side can be increased to improve the photoelectric conversion efficiency.

[0039] The method for preparing a solar cell proposed in this application is described in detail below. Figure 3 and Figure 4 , the method comprising:

[0040] S10: providing a double-sided polished silicon substrate, and forming a first doped polysilicon layer on the backlight surface of the silicon substrate.

[0041] Specifically, the silicon substrate 100 is chemically pre-cleaned to remove the mechanical damage layer and contaminants on the surface of the silicon substrate 100, and then double-sided polishing and re-cleaning are performed with alkali, and a first doped polysilicon layer and a tunnel passivation contact layer 120 are sequentially formed in a direction away from the silicon substrate 100 by low-pressure chemical vapor deposition (LPCVD); the first doped polysilicon layer 110 is formed by a diffusion process.

[0042] According to some embodiments of the present application, the first doped polysilicon layer is a P-type polysilicon layer.

[0043] The first doped polysilicon layer is a P-type polysilicon layer, and the doped elements can be activated by annealing or laser to form a conductive region. The PN region is formed by patterning with laser. Specifically, the embodiment of the present application activates the doped elements by laser.

[0044] S20: using a first laser to irradiate a non-first conductive type region, and using a second laser to irradiate an edge position of the first conductive type region close to the non-first conductive type region, wherein energy of the second laser is greater than energy of the first laser.

[0045] Specifically, a first laser irradiation process is used to perform regional heat treatment on the first doped polysilicon layer to form a first conductive type region on the back side of the silicon substrate. The first laser irradiation process also includes removing part of the BSG by laser, specifically, using a first laser to irradiate a non-first conductive type region, and using a second laser to irradiate the first conductive type region near the edge position of the non-first conductive type region, and the energy of the second laser is greater than the energy of the first laser.

[0046] Then, the laser irradiated area is etched with alkaline solution. Through the above process, the BSG in the non-first conductive type area is eliminated by the laser energy or becomes loose by the laser, and the poly in the corresponding area is etched by the alkaline solution without the protection of BSG.

[0047] Specifically, the irradiation positions of the first laser and the second laser can refer to Figure 4After the high-energy second laser irradiates the edge position A, position A will be completely melted. During the cooling process, fine silicon grains begin to grow again from the liquid oxide interface, so that after the edge of the spot cools, more silicon is precipitated on the polysilicon. During the alkali washing process, the silicon precipitated on the surface will be etched first, and then the polysilicon will be etched (the morphology after alkali washing is referenced). Figure 5 ), under the same etching conditions, the corrosion of polysilicon at the edge of the first conductive type region can be reduced, thereby improving edge passivation.

[0048] According to some embodiments of the present application, the energy of the first laser can be 50 μJ-80 μJ, for example, 50 μJ, 60 μJ, 70 μJ, 80 μJ, etc., or can be a range of any of the above values. The energy of the second laser is greater than or equal to 110 μJ.

[0049] According to some embodiments of the present application, the spot diameter of the second laser may be 2 μm-15 μm, for example, 2 μm, 5 μm, 8 μm, 11 μm, 15 μm, etc., or may be a range consisting of any of the above numerical values.

[0050] According to some embodiments of the present application, the spot of the second laser is square.

[0051] S30: forming a whole second doped polysilicon layer in the first conductive type region and other regions of the backlight surface.

[0052] Specifically, a whole polysilicon layer is formed in the first conductive type region and other regions of the backlight surface of the silicon substrate 100 , and a second doped polysilicon layer 130 is formed by a diffusion process.

[0053] According to some embodiments of the present application, the second doped polysilicon layer is an N-type polysilicon layer.

[0054] The second doped polysilicon layer is an N-type polysilicon layer, and the doped elements can be activated by annealing or laser to form a conductive region. Specifically, the embodiment of the present application activates the doped elements by laser.

[0055] S40: using a third laser to irradiate the area where the gap is to be formed, and using a fourth laser to irradiate the edge position of the first conductive type area and the edge position of the second conductive type area, wherein the energy of the fourth laser is greater than the energy of the third laser.

[0056] Specifically, a second laser irradiation process is used to perform regional heat treatment on the second doped polysilicon layer to form a second conductive type region in a partial area on the back side of the silicon substrate. The second laser irradiation process includes using a third laser to irradiate the area where the gap is to be formed, and using a fourth laser to irradiate the edge position of the first conductive type region and the edge position of the second conductive type region. The energy of the fourth laser is greater than the energy of the third laser. The edge position of the first conductive type region refers to the edge position of the first conductive type region adjacent to the gap, and the edge position of the second conductive type region refers to the edge position of the second conductive type region adjacent to the gap.

[0057] Then, the laser irradiated area is etched with alkaline solution. Through the above process, the PSG in the non-first conductive type area is eliminated by laser energy or becomes loose by the laser, and the poly in the corresponding area is etched by alkaline solution without the protection of PSG.

[0058] The first conductive type region and the second conductive type region have opposite conductive types, and a gap region is between the first conductive type region and the second conductive type region.

[0059] Specifically, the positions of the third laser and the fourth laser irradiation can refer to Figure 4 After the high-energy fourth laser irradiates the edge position A, the position A will be completely melted. During the cooling process, the fine silicon grains begin to grow again from the liquid oxide interface, so that after the edge of the spot cools, more silicon is precipitated on the polysilicon. During the alkali washing process, the silicon precipitated on the surface will be etched first, and then the polysilicon will be etched (the morphology after alkali washing is referenced). Figure 6 ), under the same etching conditions, the corrosion of the polysilicon side surfaces of the first conductive type region and the second conductive type region can be reduced, forming a nearly straight gap region, reducing the widening of the gap region due to corrosion by the alkaline solution, reducing the difference between the actual width of the gap region and the designed width, increasing the area of ​​the active region with photoelectric conversion capability, and thereby improving the photoelectric conversion efficiency.

[0060] According to some embodiments of the present application, the energy of the third laser is 50 μJ-80 μJ, and the energy of the fourth laser is greater than or equal to 110 μJ.

[0061] According to some embodiments of the present application, the spot diameter of the fourth laser is 2 μm-15 μm, for example, 2 μm, 5 μm, 8 μm, 11 μm, 15 μm, etc., or a range consisting of any of the above values.

[0062] According to some embodiments of the present application, the spot of the fourth laser is square to form a nearly straight gap area.

[0063] In the present application, the composition and ratio of the alkali solution used in alkali washing and the time of alkali washing can refer to the relevant technology and are not particularly limited here.

[0064] In the present application, the N-type region may be prepared first, then the P-type region, and then the gap region. The preparation order of the P-type region and the N-type region is not limited in the embodiments of the present application.

[0065] The third aspect of the present application provides a battery assembly, comprising at least two solar cells provided by the first aspect of the present application. Adjacent solar cells can be connected together by serial welding.

[0066] The fourth aspect of the present application provides a photovoltaic system, comprising the battery assembly in any of the above embodiments. The photovoltaic system also has the advantages of the above battery assembly, which will not be repeated here.

[0067] The above-mentioned photovoltaic systems have a wide range of applications and are not limited to photovoltaic power stations, such as ground power stations, rooftop power stations and water surface power stations, but also include various equipment and devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars and solar buildings.

[0068] Of course, it is understandable that the application scenarios of photovoltaic systems are not limited to this, that is, photovoltaic systems can be used in all fields that require the use of solar energy for power generation. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic components. For example, multiple photovoltaic components may form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box, which can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to achieve solar power supply.

[0069] Example

[0070] For the convenience of description, the layer structure related to the present application is described. The solar cell comprises:

[0071] The silicon substrate may be an intrinsic conductive substrate, an N-type silicon substrate, or a P-type silicon substrate. Preferably, the silicon substrate is an N-type silicon substrate or a P-type silicon substrate. Compared with the intrinsic silicon substrate, the N-type silicon substrate and the P-type silicon substrate have higher conductivity, which is beneficial to reduce the series resistance of the back contact battery and improve the efficiency of the back contact battery. The silicon substrate has a front side and a backlight side. The front side may be a capacitor to improve the utilization rate of light; the backlight side of the silicon substrate may be a flat surface or a velvet surface, without any special restrictions.

[0072] The backlight surface of the silicon substrate has a first conductivity type region and a second conductivity type region with opposite conductivity types. For example, the first conductivity type region is a P-type conductivity region, and the second conductivity type region is an N-type conductivity region. There is a gap region between the P-type conductivity region and the N-type conductivity region. The width of the gap region is less than or equal to 40μm. The difference between the maximum width and the minimum width of the gap region is w, and w≤3μm is satisfied, and the shape is close to straight. The width of the gap region is small, which can reduce the probability of carrier recombination and enable the current to be effectively output. The narrower gap region also helps to maintain a more stable and efficient built-in electric field distribution, so that the carriers move quickly in a predetermined direction, increase the short-circuit current and open-circuit voltage of the solar cell, and improve the photoelectric conversion efficiency. The width of the gap region is small, and the area of ​​the active region with photoelectric conversion capability is larger, which can also generate more photogenerated carriers, helping to improve the photoelectric conversion efficiency. In addition, this embodiment can reduce the poly at the edge of the P-type conductive region and the N-type conductive region near the gap, thereby improving the passivation effect of the side edges of the P-type conductive region and the N-type conductive region near the gap, and further improving the conversion efficiency of the battery.

[0073] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A solar cell, characterized in that: include: A silicon substrate, wherein one side of the silicon substrate has a first conductive type region, a second conductive type region and a gap region, the first conductive type region and the second conductive type region have opposite conductive types and are alternately arranged in a cross-shaped manner, the gap region is distributed between the first conductive type region and the second conductive type region, and in the extension direction of the gap region, the difference between the maximum width and the minimum width of the gap region is w, and satisfies w≤3μm.

2. The solar cell according to claim 1, characterized in that The width of the gap region is less than or equal to 40 μm.

3. The solar cell according to claim 1, characterized in that The first conductive type region is a P-type conductive region, and the second conductive type region is an N-type conductive region.

4. A method for preparing the solar cell according to any one of claims 1 to 3, characterized in that: include: Providing a double-sided polished silicon substrate, and forming a first doped polysilicon layer on the backlight side of the silicon substrate; Using a first laser to irradiate a non-first conductive type region, and using a second laser to irradiate an edge position of the first conductive type region close to the non-first conductive type region, wherein the energy of the second laser is greater than the energy of the first laser; The laser irradiated area is then etched using an alkali solution; forming a whole second doped polysilicon layer in the first conductive type region and other regions of the backlight surface; Using a third laser to irradiate the area where the gap is to be formed, using a fourth laser to irradiate the edge position of the first conductive type area and the edge position of the second conductive type area, wherein the energy of the fourth laser is greater than the energy of the third laser; The laser irradiated area is then etched using an alkali solution; The first conductive type region and the second conductive type region have opposite conductive types, and a gap region is between the first conductive type region and the second conductive type region.

5. The method according to claim 4, characterized in that The energies of the first laser and the third laser are independently 50 μJ-80 μJ, and the energies of the second laser and the fourth laser are independently greater than or equal to 110 μJ.

6. The method according to claim 5, characterized in that The spot diameters of the second laser and the fourth laser are independently 2 μm-15 μm.

7. The method according to claim 6, characterized in that The light spots of the second laser and the fourth laser are square.

8. The method according to claim 4, characterized in that The first doped polysilicon layer is a P-type polysilicon layer, and the second doped polysilicon layer is an N-type polysilicon layer.

9. A battery assembly, characterized in that: A solar cell comprising the solar cell according to any one of claims 1 to 3 or a solar cell prepared by the method according to any one of claims 4 to 8.

10. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 9.

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