Solar cell, preparation method thereof and solar cell module

Abstract

The invention discloses a solar cell and a preparation method thereof and a solar cell module, the solar cell comprises a silicon substrate and a poly layer, the poly layer is arranged on one side of the silicon substrate and is connected with the silicon substrate, a dielectric layer is arranged between the silicon substrate and the poly layer, the poly layer is provided with a first area and a second area, and the first area and the second area are arranged on the silicon substrate. The second area is arranged around the first area, and an adjusting groove is formed in the first area or the second area. According to the solar cell, the adjusting groove is formed in the first region or the second region, so that the material consumption of Poly-Si in the region where the adjusting groove is formed can be effectively reduced, parasitic absorption is effectively reduced, the photoelectric conversion efficiency is improved, and laser treatment does not need to be carried out on the whole surface of the solar cell, so that the manufacturing cost is reduced. Therefore, the thermal damage risk of the solar cell is reduced.

Description

Technical Field

[0001] The invention relates to the technical field of solar cells, and in particular to a solar cell and a preparation method thereof, and a solar cell assembly. Background Art

[0002] The relevant technology points out that at present, the market share of TOPCon solar cells based on poly-Si / SiOx passivation contacts is rapidly increasing, and its photoelectric conversion efficiency is constantly approaching the theoretical limit. However, the inherent parasitic absorption problem of the poly Si layer causes light to be absorbed but no effective electron-hole pairs are generated, resulting in the loss of optical and electrical efficiency. In order to solve the problem of parasitic absorption of the poly Si layer, there are currently several conventional improvement methods, including poly thinning, introducing a transparent conductive film buffer layer, light element doping, and local poly-Si / SiOx contact.

[0003] Poly layer thinning is mainly to reduce parasitic absorption loss by reducing the thickness of the poly-Si layer, but it needs to maintain sufficient thickness to provide protection and maintain sufficient lateral conductivity; the conductive film buffer layer is to introduce additional transparent conductive films to further reduce the thickness while maintaining the electrical properties of the poly-Si layer; light element doping is to improve the optical performance by introducing light elements (such as carbon, oxygen, and nitrogen) into the poly-Si / SiOx contact. Although the first two can effectively reduce parasitic absorption, their process window is too narrow, the yield is low, and stable mass production is difficult. The optical instability and process cost of light element doping also make this method unable to meet the requirements of large-scale production. The local poly-Si / SiOx contact is to add a laser process on the basis of the current TOPcon process flow, combined with a wet process to remove the poly-Si / SiOx layer in the non-required area to achieve the reduction of parasitic absorption. This method is feasible and effective and meets the requirements of industrial production.

[0004] Currently, local poly-Si / SiOx passivation contacts are mainly presented in the form of poly fingers, that is, the PSG (phosphosilicate glass) in the non-gate line area is removed by laser film opening, the PSG in the metal gate line area is retained, and then the poly layer in the non-gate line area is wet-etched to achieve the purpose of reducing the poly-Si / SiOx passivation contact area, thereby reducing parasitic absorption.

[0005] At present, the spot size of photovoltaic laser applications is usually 150-400um, and the metal grid line printing width is usually 30-50μm. To achieve a larger poly removal area, that is, a smaller grid line poly width, it is necessary to increase the overlap rate. The increase in overlap rate will lead to an extension of the CT value, and there are potential risks of thermal damage and laser graphic accuracy problems. Keeping the poly film layer at a single thickness cannot achieve precise separation of areas with good passivation performance or functionalization of different areas. Summary of the invention

[0006] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides a solar cell, which can effectively reduce parasitic absorption and improve photoelectric conversion efficiency.

[0007] The invention also provides a method for preparing the solar cell.

[0008] The present invention also provides a solar cell assembly having the solar cell.

[0009] A solar cell according to a first aspect of the present invention comprises: a silicon substrate and a poly layer, wherein the poly layer is arranged on one side of the silicon substrate and connected to the silicon substrate, a dielectric layer is arranged between the silicon substrate and the poly layer, and the poly layer is formed with a first zone and a second zone, wherein the first zone is located at the center of the solar cell, and the second zone is arranged around the first zone, and an adjustment groove is formed in the first zone or the second zone.

[0010] According to the solar cell of the present invention, by forming an adjustment groove in the first zone or the second zone, the amount of Poly-Si material used in the area where the adjustment groove is located can be effectively reduced, thereby effectively reducing parasitic absorption and improving photoelectric conversion efficiency. In addition, since there is no need to perform laser processing on the entire surface of the solar cell, the risk of thermal damage to the solar cell is reduced.

[0011] In some embodiments, the adjustment groove is disposed in the first region, and the adjustment groove penetrates the poly layer and the dielectric layer in a thickness direction of the solar cell.

[0012] In some embodiments, the adjustment groove is disposed in the second region, the adjustment groove extends in a direction surrounding the first region, and the adjustment groove penetrates the poly layer and the dielectric layer in a thickness direction of the solar cell.

[0013] In some embodiments, the ratio between the area of ​​the first region and the area of ​​the second region is 0-1.

[0014] In some embodiments, the solar cell has a metal grid line contact region and a non-metal grid line contact region, and the first region and / or the second region are both disposed in the non-metal grid line contact region.

[0015] In some embodiments, the front side of the silicon substrate is provided with an emitter layer, a passivation layer and a metal contact layer in sequence in the direction away from the silicon substrate, the poly layer is provided on the back side of the silicon substrate, a dielectric layer is provided between the poly layer and the silicon substrate, and a passivation layer and a metal contact layer are provided in sequence on the side of the poly layer facing away from the silicon substrate.

[0016] The method for preparing a solar cell according to the second aspect of the present invention is used to produce the solar cell according to the first aspect of the present invention, and the method comprises:

[0017] Step S1, texturing the surface of the silicon substrate;

[0018] Step S2, diffusing boron into the silicon substrate to form a PN junction, and cleaning and oxidizing the back side of the silicon substrate to form a dielectric layer;

[0019] Step S3, performing alkali polishing on the silicon substrate to remove the borosilicate glass and the boron diffusion layer on the back side of the silicon substrate;

[0020] Step S4, forming a poly layer on the surface of the dielectric layer facing away from the silicon substrate by low pressure chemical vapor deposition;

[0021] Step S5, performing phosphorus doping treatment on the poly layer;

[0022] Step S6, forming an adjustment groove in the first area or the second area on the back side of the silicon substrate by laser;

[0023] Step S7, removing the phosphosilicate glass on the silicon substrate and etching the silicon substrate;

[0024] Step S8, depositing an aluminum oxide layer on the silicon substrate by ALD to form a passivation layer;

[0025] Step S9, coating the front surface of the silicon substrate;

[0026] Step S10, coating the back of the silicon substrate;

[0027] Step S11: printing a first fine grid on the back side of the solar cell, and printing a second fine grid on the front side of the solar cell at a position aligned with the first fine grid.

[0028] According to the preparation method of solar cells of the present invention, the solar cells of the first aspect above optimize the thickness distribution of the poly layer by using the preparation method of the present invention, effectively reduce parasitic absorption, improve the photoelectric conversion efficiency, and perform customized processing on different areas to meet specific functional requirements, such as better passivation effect, higher conductivity, etc., shorten the cycle time, and since there is no need for comprehensive laser processing on the entire surface, only specific areas are processed, which significantly reduces the risk of thermal damage.

[0029] In some embodiments, the boundary of the adjustment groove is determined according to a test gray value after the low pressure chemical vapor deposition method.

[0030] In some embodiments, the single spot energy of the laser is 0-100 μj.

[0031] In some embodiments, the spot size of the laser is 150 μm, and / or the laser is a green laser.

[0032] A solar cell module according to a third aspect of the present invention comprises a plurality of solar cells according to the first aspect of the present invention.

[0033] According to the solar cell assembly of the present invention, by arranging a plurality of solar cells according to the first aspect of the present invention, the energy conversion efficiency of the solar cell assembly is improved, the performance of the solar cell assembly is enhanced, the power generation and land space utilization rate are increased, the production and installation costs are reduced, and the economic benefits are ensured.

[0034] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a schematic structural diagram of a solar cell according to an embodiment of the first aspect of the present invention;

[0036] Figure 2 yes Figure 1 Schematic diagram of the adjustment tank of the solar cell shown in;

[0037] Figure 3 yes Figure 1 A schematic diagram of an adjustment tank for a solar cell according to another embodiment of the present invention is shown in FIG.

[0038] Figure 4 It is a flow chart of a method for preparing a solar cell according to an embodiment of the second aspect of the present invention.

[0039] Reference numerals:

[0040] 100. Solar cell; 1. Silicon substrate; 2. Emitter layer; 3. Passivation layer; 4. Metal contact layer; 5. Dielectric layer; 6. Poly layer; 7. Adjustment groove; 71. First region; 72. Second region; 8. Metal grid line contact region; 9. Non-metal grid line contact region. DETAILED DESCRIPTION

[0041] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0042] Reference below Figure 1-Figure 3 A solar cell 100 according to an embodiment of the first aspect of the present invention is described.

[0043] like Figure 1-Figure 3 As shown, the solar cell 100 according to the first embodiment of the present invention includes: a silicon substrate 1 and a poly layer 6.

[0044] Specifically, the poly layer 6 is disposed on one side of the silicon substrate 1 and connected to the silicon substrate 1, a dielectric layer 5 is disposed between the silicon substrate 1 and the poly layer 6, and the poly layer 6 is formed with a first area 71 and a second area 72, the first area 71 is located at the center of the solar cell 100, the second area 72 is arranged around the first area 71, and an adjustment groove 7 is formed in the first area 71 or the second area 72. It can be understood that the adjustment groove 7 located in the first area 71 or the second area 72 can be used to adjust the thickness of the poly layer 6, thereby optimizing the optical and electrical properties of each area; the existence of the adjustment groove 7 can reduce the thickness of the poly layer 6 in the inactive area, reduce parasitic absorption, and keep the poly layer 6 in the key area thick enough to maintain its passivation and conductive effects.

[0045] What needs to be explained in detail here is that when the solar cell 100 is undergoing processes such as heat treatment or chemical vapor deposition, there are uneven conditions in the flow rate and distribution of the special gas in the furnace tube, resulting in a more sufficient supply of reactants near the gas inlet, thereby making the quality of the passivation layer formed on the solar cell 100 uneven; in the production process of the solar cell 100, automated tools are used to process the silicon substrate 1 (such as cutting, printing electrodes, etc.), and there are cases where surface damage is caused due to equipment accuracy problems or improper operation, thereby affecting the passivation effect; in the heat treatment step, due to the existence of a temperature gradient, the temperature difference at different positions of the solar cell 100 will affect the passivation quality.

[0046] According to the solar cell 100 of the embodiment of the present invention, by forming the adjustment groove 7 in the first area 71 or the second area 72, the amount of Poly-Si material used in the area where the adjustment groove 7 is formed can be effectively reduced, thereby effectively reducing parasitic absorption and improving the photoelectric conversion efficiency. In addition, since there is no need to perform laser processing on the entire surface of the solar cell 100, the risk of thermal damage to the solar cell 100 is reduced.

[0047] Specifically, in the solar cell 100, a capacitor is formed between the Poly layer 6 and the underlying silicon substrate 1. Here, the capacitor is caused by the dielectric layer between the two conductive layers. When the thickness or coverage area of ​​the Poly layer 6 decreases, the capacitance between the Poly layer 6 and the silicon substrate 1 will also decrease accordingly. Therefore, when the solar cell 100 is working, less energy is stored between the Poly layer 6 and the silicon substrate 1, thereby improving the conversion efficiency of the solar cell 100. In addition, reducing the amount of unnecessary Poly-Si material can shorten the current path, thereby reducing the series resistance, increasing the fill factor, and thereby improving the overall performance of the solar cell 100.

[0048] It should be noted that, in order to determine whether to set the adjustment groove 7 in the first area 71 or the second area 72, the boundary of the adjustment groove 7 is determined according to the gray value tested after the low pressure chemical vapor deposition method. In this way, a high-resolution optical microscope, a scanning electron microscope (SEM) or other appropriate imaging equipment can be used to image the surface of the Poly layer 6 after LPCVD treatment, and multiple sampling is performed in the same area to obtain more comprehensive data and reduce the influence of local abnormalities. The collected grayscale image is converted into numerical data using image processing software (such as ImageJ, MATLAB, etc.). These software can calculate the grayscale value of each pixel point and generate a grayscale distribution map, perform standardization on all images, eliminate deviations caused by factors such as lighting conditions and equipment parameters, ensure the comparability of grayscale values, apply edge detection algorithms (such as Canny edge detection, Sobel operator, etc.) to identify the boundaries of regions where the grayscale value changes significantly, and finally, compare the grayscale value distribution of the Poly layer surface and comprehensively analyze and determine the boundary between the first area 71 and the second area 72, and set the adjustment groove 7 in the first area 71 or the second area 72 according to the actual situation of the Poly layer 6 surface.

[0049] Furthermore, the conventional full-layer removal treatment method will damage the passivation layer 3 on the surface of the solar cell 100, resulting in an increase in the interface state density, thereby reducing the open-circuit voltage and the overall performance and efficiency of the solar cell 100. Compared with the conventional full-layer removal treatment method, the surface of the Poly layer 6 of the solar cell 100 of the embodiment of the present invention can retain the passivation layer 3 as much as possible by forming an adjustment groove 7 in the first area 71 or the second area 72, thereby reducing the reduction in open-circuit voltage and carrier recombination losses, and by still retaining the Poly layer 6 in the area with higher current density, it can provide a lower contact resistivity, reduce the series resistance, and thus improve the fill factor. Removing the Poly layer 6 in the low current density area can reduce the recombination probability of photogenerated carriers, maintain a higher open-circuit voltage, and thus improve the overall efficiency of the solar cell 100;

[0050] The treatment method of uniform thinning of the entire layer means that the thickness of the Poly layer 6 of the battery is removed uniformly, that is, the surface of the solar cell 100 is still completely covered with the Poly layer 6. In this way, in the solar cell 100, the capacitance value of the capacitor formed between the Poly layer 6 and the underlying silicon substrate 1 is large, which causes the battery to react slowly to rapidly changing light conditions or load requirements, and also becomes a recombination center for carriers, resulting in unnecessary recombination losses, reducing the open circuit voltage (Voc) and short-circuit current density, and, in a high temperature environment, the capacitance value may change, affecting the stability and long-term reliability of the battery, especially in an outdoor environment, where changes in ambient temperature can cause unstable capacitance characteristics, thereby affecting battery performance. Compared with the treatment method of thinning the entire layer, the solar cell 100 of the embodiment of the present invention reduces the capacitance between the Poly layer 6 and the silicon substrate 1 by forming an adjustment groove 7 in the first area 71 or the second area 72, thereby improving the battery's response speed to rapidly changing light regulation or load requirements, reducing carrier recombination losses, effectively reducing parasitic absorption, reducing the degree of change in capacitance value, ensuring the stability and reliability of the battery, and improving the photoelectric conversion efficiency.

[0051] In some embodiments of the present invention, Figure 2As shown, the adjustment groove 7 is provided in the first area 71, and the adjustment groove 7 penetrates the poly layer 6 and the dielectric layer 5 in the thickness direction of the solar cell 100. It can be understood that by providing the adjustment groove 7 penetrating the poly layer 6 and the dielectric layer 5 in the first area 71, the amount of poly-Si material in the first area can be significantly reduced. Since a capacitor is formed between the poly layer 6 and the underlying silicon substrate 1 in the solar cell 100, where the capacitor is caused by the dielectric layer 5 between the two conductive layers, when the thickness or coverage area of ​​the poly layer 6 in the first area 71 is reduced, the capacitance between the poly layer 6 and the silicon substrate 1 will also be reduced accordingly, so that when the solar cell 100 is working, less energy is stored between the poly layer 6 and the silicon substrate 1, thereby improving the conversion efficiency of the solar cell 100, thereby directly reducing parasitic absorption and improving optical efficiency.

[0052] Furthermore, the groove 7 is adjusted so that the distribution of the poly layer 6 on the solar cell 100 shortens the current path, is beneficial to current collection, and improves the electrical performance of the solar cell 100; and, since unnecessary poly-Si material is reduced, the resistance loss of the solar cell 100 is reduced, thereby improving the overall photoelectric conversion efficiency of the solar cell 100.

[0053] Moreover, this allows for a clearer functional division between the first region 71 and the second region 72. By removing part of the Poly layer 6 and the dielectric layer 5, a low-resistance path can be formed in the first region 71, promoting effective carrier transmission, reducing series resistance, and improving the fill factor (FF), which helps to concentrate the current collection function and ensure high-efficiency power output. The second region 72 that is not affected by the adjustment groove 7 can continue to maintain a good surface passivation effect, reduce interface state density, and reduce carrier recombination losses, thereby maintaining a relatively high open circuit voltage (Voc) and conversion efficiency.

[0054] Compared with the traditional full-layer laser processing, the local through-type adjustment groove 7 can reduce the heat-affected zone and reduce the potential risk of thermal damage.

[0055] In other embodiments of the present invention, Figure 3As shown, the adjustment groove 7 is provided in the second area 72, the adjustment groove 7 extends in the direction surrounding the first area 71, and the adjustment groove 7 penetrates the poly layer 6 and the dielectric layer 5 in the thickness direction of the solar cell 100. It can be understood that by providing the adjustment groove 7 penetrating the poly layer 6 and the dielectric layer 5 in the second area 72, the amount of poly-Si material in the second area 72 can be significantly reduced. Since a capacitor is formed between the poly layer 6 and the underlying silicon substrate 1 in the solar cell 100, where the capacitor is caused by the dielectric layer 5 between the two conductive layers, when the thickness or coverage area of ​​the poly layer 6 in the second area 72 is reduced, the capacitance between the poly layer 6 and the silicon substrate 1 will also be reduced accordingly, so that when the solar cell 100 is working, less energy is stored between the poly layer 6 and the silicon substrate 1, thereby improving the conversion efficiency of the solar cell 100, thereby directly reducing parasitic absorption and improving optical efficiency.

[0056] Furthermore, the groove 7 is adjusted so that the distribution of the poly layer 6 on the solar cell 100 shortens the current path, is beneficial to current collection, and improves the electrical performance of the solar cell 100; and, since unnecessary poly-Si material is reduced, the resistance loss of the solar cell 100 is reduced, thereby improving the overall photoelectric conversion efficiency of the solar cell 100.

[0057] Moreover, this allows for a clearer functional division between the first region 71 and the second region 72. By removing part of the Poly layer 6 and the dielectric layer 5, a low-resistance path can be formed in the second region 72, promoting effective carrier transmission, reducing series resistance, and improving the fill factor (FF), which helps to concentrate the current collection function and ensure high-efficiency power output. The first region 71 that is not affected by the adjustment groove 7 can continue to maintain a good surface passivation effect, reduce interface state density, and reduce carrier recombination losses, thereby maintaining a relatively high open circuit voltage (Voc) and conversion efficiency.

[0058] In some embodiments of the present invention, the ratio between the area of ​​the first area 71 and the area of ​​the second area 72 is 0-1. It can be understood that when the ratio between the area of ​​the first area 71 and the area of ​​the second area 72 is 0, it means that the entire surface is designed as the first area 71 or the second area 72, and when the ratio between the area of ​​the first area 71 and the area of ​​the second area 72 is 1, it means that the areas of the first area 71 and the second area 72 are equal, wherein the areas of the first area 71 and the second area 72 can be adjusted according to specific application requirements.

[0059] Specifically, the ratio between the area of ​​the first region 71 and the area of ​​the second region 72 can be any value from 0 to 1, for example: 0, 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1, etc., which can maximize the passivation effect while ensuring efficient current collection, thereby improving the overall conversion efficiency and reliability.

[0060] In some embodiments of the present invention, Figure 1 As shown, the solar cell 100 has a metal grid line contact area 8 and a non-metal grid line contact area 9, and the first area 71 and / or the second area 72 are arranged in the non-metal grid line contact area 9. It can be understood that the metal grid line contact area 8 is responsible for current collection and transmission, while the non-metal grid line contact area 9 is mainly used for passivation and reducing surface recombination.

[0061] In some embodiments of the present invention, the front side of the silicon substrate 1 is sequentially provided with an emitter layer 2, a passivation layer 3 and a metal contact layer 4 in the direction away from the silicon substrate 1, a poly layer 6 is provided on the back side of the silicon substrate 1, a dielectric layer 5 is provided between the poly layer 6 and the silicon substrate 1, and a passivation layer 3 and a metal contact layer 4 are sequentially provided on the side of the poly layer 6 away from the silicon substrate 1. It can be understood that the silicon substrate 1, as the basic material of the battery, is responsible for photon absorption and generation of electron-hole pairs; the emitter layer 2 is usually composed of n-type / p-type doped silicon, which is used to collect the generated carriers, is located on the front side of the silicon substrate 1, and is in direct contact with the incident light; the passivation layer 3 provides surface passivation, reduces surface recombination losses, and increases the open circuit voltage, and can be SiN x , Al2O3 and other materials; the metal contact layer 4 includes gate lines and other electrodes for current collection and transmission. These metal contacts need to ensure good conductivity while minimizing the shading area; the poly layer 6 is located on the back of the silicon substrate 1, and a dielectric layer 5 is provided between the poly layer 6 and the silicon substrate 1. The main function of the poly layer 6 is to provide an additional carrier collection path and improve the passivation effect of the back surface; the dielectric layer 5 can be a very thin layer of oxide (such as SiOx), allowing carriers to pass through the quantum tunneling effect (or through the pinhole defects of the dielectric layer) and block minority carriers to reduce recombination losses; the passivation layer 3 is on the outside of the poly layer 6, further enhancing the passivation effect of the back and reducing recombination losses; the metal contact layer 4 is used for current collection and transmission, but the design of the back may be different to meet different current collection requirements.

[0062] It should be explained in detail here that when the thickness of the dielectric layer 5 is less than 2nm, the carriers mainly pass through the dielectric layer 5 through the quantum tunneling mechanism, so that electrons or holes can pass through the insulating barrier with a higher probability through the tunneling effect in quantum mechanics without sufficient energy to overcome the entire potential barrier. In the TOPCon battery, the thickness of the dielectric layer 5 is usually less than 2nm, and the majority carriers pass through while blocking the minority carriers, thereby reducing the recombination loss and improving the fill factor; when the thickness of the dielectric layer 5 is greater than 2nm, pinholes (pinhole defects) exist in the dielectric layer 5, and the carriers directly pass through the dielectric layer 5 through tiny holes, that is, when it is greater than 2nm, the carriers are more transmitted through pinholes.

[0063] It is understood that when the thickness of the dielectric layer 5 is less than 2nm, it is a tunneling layer of the TOPCon cell. In the solar cell 100 of the embodiment of the present invention, the thickness of the dielectric layer 5 is less than 2nm, that is, the embodiment of the present invention is a TOPCon cell. It is understood that the thickness of the dielectric layer 5 can also be set to be greater than 2nm, and the carriers are transmitted through the pinholes, which will not be repeated here.

[0064] Thus, the combination of the poly layer 6 and the dielectric layer 5 enables carriers to be efficiently transferred from the silicon substrate 1 to the metal contact layer 4 on the back, thereby increasing the short-circuit current density; both the front and back sides are provided with a passivation layer 3, especially the poly layer 6 on the back side.

[0066] Combined with the dielectric layer 5, it provides excellent surface passivation effect, significantly reduces surface recombination loss, and improves open circuit voltage; the presence of the back poly layer 6 reduces the thickness requirement of the front emitter layer 2, reduces the parasitic absorption of the front side, and thus improves the optical efficiency.

[0067] The method for preparing the solar cell 100 according to the second embodiment of the present invention comprises the solar cell 100 according to the first embodiment of the present invention.

[0068] Specifically, Figure 4 As shown, the preparation method comprises:

[0069] Step S1, texturing the surface of the silicon substrate 1;

[0070] Step S2, performing boron diffusion on the silicon substrate 1 to form a PN junction, and cleaning and oxidizing the back side of the silicon substrate 1 to form a dielectric layer 5;

[0071] Step S3, performing alkali polishing on the silicon substrate 1 to remove the borosilicate glass and the boron diffusion layer on the back side of the silicon substrate 1;

[0072] Step S4, forming a poly layer 6 on the surface of the dielectric layer 5 facing away from the silicon substrate 1 by low pressure chemical vapor deposition;

[0073] Step S5, performing phosphorus doping treatment on the poly layer 6;

[0074] Step S6, forming an adjustment groove 7 in the first area 71 or the second area 72 on the back side of the silicon substrate 1 by laser;

[0075] Step S7, removing the phosphosilicate glass on the silicon substrate 1, and etching the silicon substrate 1;

[0076] Step S8, depositing an aluminum oxide layer on the silicon substrate 1 by ALD to form a passivation layer 3;

[0077] Step S9, coating the front surface of the silicon substrate 1;

[0078] Step S10, performing coating treatment on the back side of the silicon substrate 1;

[0079] Step S11 : printing a first fine grid on the back side of the solar cell 100 , and printing a second fine grid on the front side of the solar cell 100 .

[0080] According to the preparation method of the solar cell 100 of the embodiment of the present invention, the solar cell 100 of the first aspect embodiment above optimizes the thickness distribution of the poly layer 6 by using the preparation method of the embodiment of the present invention, effectively reduces parasitic absorption, improves the photoelectric conversion efficiency, and performs customized processing on different areas to meet specific functional requirements, such as better passivation effect, higher conductivity, etc., shortens the cycle time, and since there is no need for comprehensive laser processing on the entire surface, only specific areas are processed, which significantly reduces the risk of thermal damage.

[0081] It is understood that in step S1, an alkaline or acidic solution is usually used to treat the surface of the N-type silicon substrate to form a microstructure to improve the light capture ability, thereby increasing the light absorption rate and reducing reflection;

[0082] In step S2, a pn junction is formed on the front side of the silicon substrate 1 by high-temperature diffusion of a boron source; the back side is then cleaned and subjected to low-temperature oxidation treatment to form a high-quality tunneling oxide layer, thereby forming a p+ emitter on the front side and an ultra-thin tunneling oxide layer on the back side;

[0083] In step S3, alkaline solution is used for light polishing to improve the surface quality, and wet chemical cleaning is used to remove borosilicate glass (BSG) and remove excess boron impurities on the back side to prepare for the subsequent deposition of poly layer 6;

[0084] In step S4, a uniform polysilicon layer is deposited at a relatively low pressure using LPCVD technology, so that a layer of polysilicon is deposited as part of the tunnel passivation contact;

[0085] In step S5, phosphorus atoms may be introduced by ion implantation or diffusion, followed by annealing to activate the dopant, converting the poly layer 6 into n+ doping to enhance its conductivity and selective contact performance;

[0086] In step S6, the poly layer 6 and the dielectric layer 5 are partially removed to reduce parasitic absorption while maintaining the functionality of key areas;

[0087] In step S7, wet chemical cleaning is used to remove the phosphosilicate glass, and then etching is performed to ensure that the surface is clean and flat, remove the phosphosilicate glass formed during the phosphorus diffusion process, and optimize the surface morphology;

[0088] In step S8, a high-quality aluminum oxide layer is deposited using atomic layer deposition (ALD) technology to ensure uniform coverage, provide additional surface passivation, and further reduce the surface recombination velocity;

[0089] In step S9, PECVD or other suitable coating techniques may be used to deposit materials such as silicon nitride to form an anti-reflective coating to improve light absorption efficiency;

[0090] In step S10, PECVD and other technologies can also be used for coating. The specific material is selected according to the design requirements to protect the back structure and may provide additional optical management functions;

[0091] In step S11, screen printing technology is used to print silver paste on the back to form a fine grid; a fine grid is printed at the corresponding position on the front to ensure that the grid lines on both sides are aligned with each other, defining a non-metallic grid line contact area 9, and the adjustment groove 7 is located in the non-metallic grid line contact area 9, thereby forming an efficient current collection system.

[0092] In some other embodiments, silver paste is printed on the back side of the solar cell 100 to form a fine grid and a main grid, and the fine grid and the main grid are perpendicular to each other, and the first fine grid and the second fine grid are printed in alignment.

[0093] In some embodiments of the present invention, to ensure accuracy, the boundary of the adjustment groove 7 is determined according to the grayscale value tested after the low pressure chemical vapor deposition method. It is understandable that the front and / or back of the battery may not be printed with a main grid, but only with a fine grid.

[0094] In some embodiments of the present invention, the single spot energy of the laser is 0-100 μj, and the spot size of the laser is 150 μm, which can achieve good etching effect without damaging the underlying material; the laser is a green light laser with high absorption rate and low thermal effect, and is suitable for fine processing.

[0095] Specifically, the single spot energy of the laser can be any value of 0-100μj, for example: 0μj, 1μj, 2μj, 3μj, 4μj, 5μj, 6μj, 7μj, 8μj, 9μj, 10μj, 15μj, 20μj, 25μj, 30μj, 35μj, 40μj, 45μj, 50μj, 55μj, 60μj, 65μj, 70μj, 75μj, 80μj, 85μj, 90μj, 95μj, 100μj and the like.

[0096] In some embodiments of the present invention, a non-metallic grid line contact region 9 is defined between the first fine grids, and the adjustment groove 7 is formed between the first fine grids. Thus, efficient current collection can be achieved while maintaining a good surface passivation effect, thereby improving the overall performance and reliability of the solar cell 100.

[0097] According to the third aspect of the present invention, the solar cell assembly includes a plurality of solar cells 100 according to the first aspect of the present invention. It can be understood that the plurality of solar cells 100 constitute the solar cell assembly, and the plurality of solar cells 100 can be combined together in a series, parallel or mixed connection manner. Due to the use of a highly efficient single solar cell 100, the energy conversion efficiency of the entire solar cell assembly is improved, thereby generating more power output under the same light regulation and reducing the installation area.

[0098] The solar cell assembly according to the embodiment of the present invention improves the energy conversion efficiency of the solar cell assembly, enhances the performance of the solar cell assembly, increases the power generation and land space utilization, reduces the production and installation costs, and ensures economic benefits by disposing a plurality of solar cells 100 according to the first aspect of the present invention.

[0099] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0100] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0101] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or a communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0102] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0103] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A solar cell, characterized in that: include: A silicon substrate and a poly layer, wherein the poly layer is arranged on one side of the silicon substrate and connected to the silicon substrate, a dielectric layer is arranged between the silicon substrate and the poly layer, and the poly layer forms a first area and a second area, wherein the first area is located at the center of the solar cell, and the second area is arranged around the first area, and an adjustment groove is formed in the first area or the second area.

2. The solar cell according to claim 1, characterized in that The adjustment groove is disposed in the first region, and the adjustment groove penetrates the poly layer and the dielectric layer in a thickness direction of the solar cell.

3. The solar cell according to claim 1, characterized in that The adjustment groove is disposed in the second region, the adjustment groove extends in a direction surrounding the first region, and the adjustment groove penetrates the poly layer and the dielectric layer in a thickness direction of the solar cell.

4. The solar cell according to claim 2 or 3, characterized in that: The ratio between the area of ​​the first region and the area of ​​the second region is 0-1.

5. The solar cell according to claim 4, characterized in that: The solar cell comprises a metal grid line contact region and a non-metal grid line contact region, and the first region and / or the second region are both arranged in the non-metal grid line contact region.

6. The solar cell according to claim 5, characterized in that: The front side of the silicon substrate is provided with an emitter layer, a passivation layer and a metal contact layer in sequence in the direction away from the silicon substrate, the poly layer is provided on the back side of the silicon substrate, a dielectric layer is provided between the poly layer and the silicon substrate, and the side of the poly layer facing away from the silicon substrate is provided with a passivation layer and a metal contact layer in sequence.

7. A method for preparing a solar cell, characterized in that: For producing the solar cell according to any one of claims 1 to 6, the preparation method comprises: Step S1, texturing the surface of the silicon substrate; Step S2, diffusing boron into the silicon substrate to form a PN junction, and cleaning and oxidizing the back side of the silicon substrate to form a dielectric layer; Step S3, performing alkali polishing on the silicon substrate to remove the borosilicate glass and the boron diffusion layer on the back side of the silicon substrate; Step S4, forming a poly layer on the surface of the dielectric layer facing away from the silicon substrate by low pressure chemical vapor deposition; Step S5, performing phosphorus doping treatment on the poly layer; Step S6, forming an adjustment groove in the first area or the second area on the back side of the silicon substrate by laser; Step S7, removing the phosphosilicate glass on the silicon substrate and etching the silicon substrate; Step S8, depositing an aluminum oxide layer on the silicon substrate by ALD to form a passivation layer; Step S9, coating the front surface of the silicon substrate; Step S10, coating the back of the silicon substrate; Step S11 : printing a first fine grid on the back side of the solar cell, and printing a second fine grid on the front side of the solar cell.

8. The preparation method according to claim 7, characterized in that: The boundary of the adjustment groove is determined according to the test gray value after the low pressure chemical vapor deposition method.

9. The preparation method according to claim 8, characterized in that: The single spot energy of the laser is 0-100 μj.

10. The preparation method according to any one of claims 7 to 9, characterized in that: The spot size of the laser is 150 μm, and / or the laser is a green laser.

11. A solar cell module, characterized in that: The invention comprises a plurality of solar cells according to any one of claims 1 to 6.

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