Crystalline silicon solar cell and preparation method thereof

By using oxidation and boron deposition technology in the preparation process of crystalline silicon solar cells, combined with high-power laser-induced sintering and reverse bias voltage, the problems of low doping depth and large damage in the space charge region are solved, and the photoelectric conversion efficiency of the battery is significantly improved.

CN119997642APending Publication Date: 2025-05-13BEIJING LIANKONG QIANZHAN TECH CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
CN202411949421.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-27
Publication Date
2025-05-13

AI Technical Summary

Technical Problem

The laser-induced sintering technology in the prior art prepares crystalline silicon cells with low doping depth and large damage to the space charge region, resulting in the photoelectric conversion efficiency not meeting the expected target.

Method used

The silicon wafer surface oxidation and boron precursor deposition are carried out in the presence of inert gas and oxygen, followed by step oxidation under a pure oxygen atmosphere to form a cell. A high-power laser-induced sintering process is adopted and a reverse bias voltage is applied to improve doping depth and metal-semiconductor contact quality and reduce damage in the space charge region.

Benefits of technology

By increasing the doping depth and square resistance, the metal-semiconductor contact quality is improved, the space charge region damage is reduced, the pseudo-filling factor and actual filling factor are improved, and the photoelectric conversion efficiency of crystalline silicon cells is significantly improved.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure BDA0005214498550000141
    Figure BDA0005214498550000141
Patent Text Reader

Abstract

The invention relates to the technical field of solar cells, in particular to a crystalline silicon solar cell and a preparation method thereof. The preparation method of the crystalline silicon solar cell provided by the invention comprises the following steps: S1, in the presence of inert gas and oxygen, oxidizing the surface of a pretreated silicon wafer to obtain a first intermediate; s2, in the presence of inert gas and oxygen, depositing a boron precursor on the first intermediate obtained in the step S1 to form a second intermediate; s3, oxidizing the second intermediate in a pure oxygen atmosphere to obtain a battery piece; and S4, the battery piece is coated with the conductive coating, the battery piece is sintered through a laser-induced sintering process, the power of the laser-induced sintering process is larger than or equal to 150 W, the irradiation time ranges from 0.1 ms to 2 ms, meanwhile, reverse bias voltage is applied, and the reverse bias voltage is 1 / 8-1 / 4 of the breakdown voltage of the battery piece. The photoelectric conversion efficiency of the crystalline silicon cell can be improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a crystalline silicon solar cell and a preparation method thereof. Background Art

[0002] In response to global climate change, the world's energy landscape is undergoing profound adjustments. Crystalline silicon solar cells are the battery category with the highest production capacity in the photovoltaic industry. In crystalline silicon solar cells, the rapid thermal firing (RTF) process occupies an absolute dominant position in metallization methods. In order to achieve high metal-semiconductor contact quality and low recombination loss at the same time, the RTF process must be strongly bound to the selective emitter (SE) technology, that is, the metallized area (pre-printed electrode area) is locally heavily doped to show low square resistance and improve the metal-semiconductor contact quality, while the non-metallized area (electrode-free area) is lightly doped to show high square resistance and reduce recombination loss. Although SE technology improves both the "contact" and "recombination" problems, it also complicates the battery process, increases process costs and energy consumption, and reduces production capacity.

[0003] Laser induced firing (LIF) technology is used to process electrodes, which not only avoids the introduction of SE process during the preparation of the upstream emitter, but also realizes efficient metallization operation. The metal contact part does not need to be secondary doped to form local heavy doping, but the emitter of laser induced firing technology generally adopts shallow junction technology, and the low doping depth has low size adaptability to the metal-semiconductor contact structure (depth 300-600nm), which can easily cause high metal under-composite current density and increase the probability of pn junction puncture leakage; in addition, the low doping depth causes impurity atoms to accumulate on the surface of the silicon wafer, limiting the further improvement of the short-wave spectral response. At the same time, the standard reverse bias voltage of laser induced sintering causes greater damage to the space charge region, reduces the pseudo fill factor (Pseudo Fill Factor, pFF), and limits the potential for improving the open circuit voltage and fill factor of the cell, resulting in the photoelectric conversion efficiency of crystalline silicon cells produced by laser induced sintering technology far from the expected target. Summary of the invention

[0004] Therefore, the technical problem to be solved by the present invention is to overcome the defect of low doping depth in preparing crystalline silicon cells by laser induced sintering technology in the prior art, thereby providing a method for preparing crystalline silicon cells.

[0005] Another technical problem to be solved by the present invention is to overcome the defect of the laser induced sintering technology in the prior art in preparing crystalline silicon cells that causes significant damage to the space charge region, thereby providing a method for preparing crystalline silicon cells.

[0006] To this end, the present invention provides a method for preparing a crystalline silicon solar cell, comprising the following steps: S1, oxidizing the surface of a pretreated silicon wafer in the presence of an inert gas and oxygen to obtain a first intermediate; S2, depositing a boron precursor on the first intermediate obtained in step S1 in the presence of an inert gas and oxygen to form a second intermediate; S3, oxidizing the second intermediate in a pure oxygen atmosphere to obtain a cell; S4, coating a conductive coating on the cell, and sintering the cell by a laser induced sintering process, wherein the power of the laser induced sintering process is greater than or equal to 150W, the irradiation time is 0.1ms-2ms, and a reverse bias voltage is applied at the same time, and the reverse bias voltage is 1 / 8-1 / 4 of the breakdown voltage of the cell.

[0007] Preferably, the power of the laser induced sintering process is greater than or equal to 150W to the power that damages the surface of the cell and causes a change in reflectivity, wherein when the reflectivity change is less than or equal to 1%, it is considered to be lossless, and when the reflectivity is greater than 1%, it is considered to cause damage to the cell. Exemplarily, the power of the laser induced sintering process is 150W, 160W, 175W, 180W, 200W, 220W, 250W, 300W, or an interval consisting of any two values.

[0008] In some of the embodiments, in step S2, the flow ratio of oxygen to inert gas is 1:1.0-4.5, and the molar ratio of boron precursor to inert gas is 1:10-40.

[0009] In some of the embodiments, the boron precursor includes a boron halide, and preferably, the boron precursor includes at least one of boron trichloride or boron tribromide.

[0010] In some of the embodiments, in step S3, the step of oxidizing the second intermediate is a stepwise oxidation, specifically, reacting at 840-950° C. for 1000-1500 s and reacting at 950-1080° C. for 2200-2700 s.

[0011] In some embodiments, step S3 also includes the steps of cooling and re-pressurizing the battery cells.

[0012] In some embodiments, the pretreatment step of the silicon wafer in step S1 includes a step of anisotropically etching the silicon wafer using a texturing solution.

[0013] In some embodiments, the emitter square resistance of the crystalline silicon solar cell is 260-350Ω / m 2 , the doping depth is 0.6-1.3μm.

[0014] In some of the embodiments, the method for preparing the crystalline silicon solar cell further includes, before coating the conductive coating, forming an anti-reflection film on the surface of the cell.

[0015] Preferably, the step of forming an anti-reflection film on the surface of the cell is specifically to form SiN on the front side of the cell by plasma enhanced chemical vapor deposition in the presence of a nitrogen source and a silicon source. x / SiN x / SiO x N y Layered film, forming SiN on the back of the cell x / SiN x / SiN x Laminated film.

[0016] In some of the embodiments, before forming an anti-reflection film on the surface of the cell, the process also includes forming an oxide layer on the back side of the polished cell; depositing a phosphorus-doped amorphous silicon layer on the back side of the cell using plasma enhanced chemical vapor deposition; and annealing; before forming an anti-reflection film on the surface of the cell, the process also includes forming a passivation film on the front side of the cell by atomic layer deposition in the presence of an aluminum source and an oxygen source.

[0017] In some embodiments, in the step of crystallizing the back side of the cell, the deposition source includes silane and the phosphorus source includes phosphine.

[0018] In some of the embodiments, in the step of forming a passivation film on the front side of the cell, the aluminum source includes trimethylaluminum.

[0019] In the step of forming an anti-reflection film on the surface of the cell, the nitrogen source includes nitrogen gas and the silicon source includes silane.

[0020] At the same time, the present invention also provides a crystalline silicon solar cell produced by the above-mentioned preparation method of the crystalline silicon solar cell.

[0021] The technical solution of the present invention has the following advantages:

[0022] 1. A method for preparing a crystalline silicon solar cell provided by the present invention comprises the following steps: S1, oxidizing the surface of a pretreated silicon wafer in the presence of an inert gas and oxygen to obtain a first intermediate; S2, depositing a boron precursor on the first intermediate obtained in step S1 in the presence of an inert gas and oxygen to form a second intermediate; S3, oxidizing the second intermediate in a pure oxygen atmosphere to obtain a cell; S4, coating a conductive coating on the cell, and sintering the cell by a laser induced sintering process, wherein the power of the laser induced sintering process is greater than or equal to 150W, the irradiation time is 0.1ms-2ms, and a reverse bias voltage is applied at the same time, wherein the reverse bias voltage is 1 / 8-1 / 4 of the breakdown voltage of the cell. The present invention uses oxygen to form an ultra-thin oxide buffer layer on the surface of the silicon wafer, then deposits a boron source on the surface of the silicon wafer, and then uses oxygen to promote and increase the doping depth of impurity atoms on the silicon wafer. At the same time, the present invention adopts a low-bias, high-power laser induced sintering process, which can not only increase the total amount of photogenerated carriers, generate a higher reverse current, and maintain good metal-semiconductor contact, but also reduce the damage to the space charge region of the battery cell, increase the pseudo fill factor, and increase the actual fill factor. The room for improvement improves the photoelectric conversion efficiency of the crystalline silicon battery.

[0023] 2. A method for preparing a crystalline silicon solar cell provided by the present invention, wherein the flow ratio of oxygen to inert gas in step S2 is 1:1.0-4.5, and the molar ratio of boron precursor to inert gas is 1:10-40. The step of forming the second intermediate on the first intermediate of the present invention is a low-source deposition, wherein the source is a boron source, which avoids the accumulation of impurity atoms and is conducive to increasing the square resistance after subsequent step-by-step oxidation.

[0024] 3. The present invention provides a method for preparing a crystalline silicon solar cell, wherein the step of oxidizing the second intermediate is stepwise oxidation, specifically, reacting at 840-950°C for 1000-1500s, and reacting at 950-1080°C for 2200-2700s. The present invention can effectively achieve high-temperature advancement of impurity atoms through stepwise oxidation in combination with specific temperature and reaction time, and can increase the doping depth of impurity atoms while reducing lattice distortion.

[0025] 4. A method for preparing a crystalline silicon solar cell provided by the present invention, wherein the emitter square resistance of the crystalline silicon solar cell is 260-350Ω / m 2 The doping depth is 0.6-1.3 μm. The emitter doping depth of the crystalline silicon solar cell prepared by the method provided by the present invention is deeper and the square resistance is higher.

[0026] 5. The present invention provides a method for preparing a crystalline silicon solar cell, which can improve the efficiency of metallization operations, simplify the doping process, and shorten the processing time. DETAILED DESCRIPTION

[0027] The following examples are provided for a better understanding of the present invention, but are not intended to limit the best mode of implementation, nor to limit the content and protection scope of the present invention. Any product identical or similar to the present invention obtained by anyone under the inspiration of the present invention or by combining the features of the present invention with other prior arts shall fall within the protection scope of the present invention.

[0028] If no specific experimental steps or conditions are specified in the examples, the conventional experimental steps or conditions described in the literature in the field can be used. If no manufacturer is specified for the reagents or instruments used, they are all conventional reagent products that can be obtained commercially.

[0029] The standard RCA process, anisotropic etching, ionized N2O, deposition of an amorphous silicon layer, formation of a passivation film and preparation of an anti-reflection film mentioned in the embodiments of the present invention are all conventional technical means, and the embodiments of the present invention are not described in detail. Reference may be made to the technical solutions of relevant public texts such as publication numbers CN118299468A, CN112442739A, CN 118448478 A, CN 118380510A, and CN 116031333A.

[0030] Example 1

[0031] This embodiment provides a method for preparing a crystalline silicon cell, and the specific steps and parameters are as follows:

[0032] (1) Preparation of emitter:

[0033] S11. Pretreatment of silicon wafers: Use N-type silicon wafers and use standard RCA process to remove organic residues and metal ions on the surface of the silicon wafers;

[0034] The silicon wafer is anisotropically etched using a texturing solution to produce a pyramid texture surface with uniform size.

[0035] S12, the quartz boat carries the silicon wafer into the furnace tube, the chamber temperature in the tube is 805°C, nitrogen is introduced to purge the chamber, the nitrogen flow rate is 2000sccm, and the duration is 800 seconds;

[0036] The tube was evacuated at a chamber temperature of 838°C for 740 seconds; the air tightness of the tube was checked at a chamber temperature of 838°C for 60 seconds;

[0037] Nitrogen was introduced into the tube, the chamber temperature was maintained at 838°C, the nitrogen flow rate was 3100 sccm, and the duration was 1000 seconds;

[0038] Oxygen was introduced into the tube, the chamber temperature was 850°C, the oxygen flow rate was 500 sccm, and the duration was 80 seconds, so that an oxide buffer layer was formed on the surface of the silicon wafer;

[0039] S13. A mixed gas of nitrogen, oxygen and boron trichloride is introduced into the tube to deposit a boron source on the surface of the silicon wafer. The chamber temperature is maintained at 850°C, wherein the nitrogen flow rate is 3000sccm, the oxygen flow rate is 1000sccm, the boron trichloride flow rate is 90sccm, and the duration is 900 seconds.

[0040] The chamber inside the tube is purged with nitrogen to exhaust oxygen, boron trichloride and generated waste gas;

[0041] A large amount of oxygen is introduced into the tube, with an oxygen flow rate of 25,000 sccm, to perform high-temperature propulsion on the impurity atoms. The specific steps of high-temperature propulsion are: the chamber temperature is 950°C, the duration is 1,200 seconds, and the chamber temperature is raised to 1,040°C, the duration is 2,200 seconds.

[0042] S14, post-treatment of the emitter: cool the furnace tube, maintain the nitrogen atmosphere, reduce the chamber temperature to 830°C, the nitrogen flow rate is 3000sccm, and the duration is 1800 seconds;

[0043] A large amount of nitrogen was introduced into the tube, the chamber temperature was maintained at 830°C, the nitrogen flow rate was 20,000 sccm, and the duration was 700 seconds for back pressure;

[0044] The silicon wafer is transported out of the furnace tube via a quartz boat and maintained in a nitrogen atmosphere. The chamber temperature is lowered to 800°C, the nitrogen flow rate is 3000sccm, and the duration is 750 seconds to obtain the emitter.

[0045] The emitter square resistance was measured by a four-probe square resistance meter (FT-331) and was 285Ω / m 2 The doping depth of the emitter was measured to be 0.91 μm using an electrochemical capacitance voltage tester (CVP21).

[0046] (2) Deposition of anti-reflection film

[0047] S21, using hydrofluoric acid to etch and remove the back and edge borosilicate glass; using potassium hydroxide and polishing additives to isotropically etch the back of the silicon wafer to achieve back polishing;

[0048] S22, ionizing N2O in a tubular plasma polysilicon deposition furnace to create an oxygen-rich environment, so that a tunneling oxide layer is formed on the back of the silicon wafer;

[0049] Using silane (SiH4) as a deposition source and phosphine (PH3) as a doping source, a phosphorus-doped amorphous silicon layer is deposited on the tunnel oxide layer by plasma-enhanced chemical vapor deposition (PECVD), and annealed in a N2 atmosphere to achieve phosphorus activation and crystallization of amorphous silicon;

[0050] S23, using 15wt% hydrofluoric acid to remove the edge phosphosilicate glass and the front borosilicate glass; using the mixed solution to remove the polysilicon that is plated;

[0051] Using trimethylaluminum (Al(CH3)3) as aluminum source and water (H2O) as oxygen source, an Al2O3 passivation film with a thickness of 2-3 nm was prepared on the front side by atomic layer deposition (ALD);

[0052] SiN deposition on the front side by PECVD x / SiN x / SiO x N y Laminated films;

[0053] SiN deposition on the back side x / SiN x / SiN x Laminated film.

[0054] S24, patterning the electrode by screen printing, and pre-sintering the conductive paste by an infrared chain furnace, wherein the conductive paste includes 95wt% of silver particles, 4wt% of organic solvent, and 1wt% of glass powder, the pre-sintering temperature is 600°C, the time is 60s, and the thickness of the conductive layer formed by the conductive paste is about 17μm;

[0055] The reverse breakdown voltage of this type of battery is obtained by preparing companion pieces: a small amount of pre-sintered battery cells are taken as companion pieces, and the companion pieces are processed using a conventional laser induced sintering process (100W laser irradiation and 18V reverse bias voltage). After the processing is completed, a reverse bias voltage is applied to the companion pieces using an ordinary DC power supply. At the same time, the temperature change of the companion piece is observed using an infrared imaging thermometer, and the output voltage of the DC power supply is slowly increased. When a sudden temperature change occurs on the entire surface of the companion piece, the output voltage of the DC power supply at this time is selected as the reverse breakdown voltage of this type of battery.

[0056] The breakdown voltage of the battery cell prepared in this embodiment is 36V.

[0057] The entire surface of the pre-sintered semi-finished battery cell (including the metallized area and the non-metallized area) is irradiated with a laser of 160W for 1.5 milliseconds and a reverse bias voltage of 7.5V is applied at the same time, so that a reverse current is generated at the contact interface between the electrode and the silicon wafer. Under the thermal effect of the reverse current, high-quality ohmic contact is achieved between the electrode and the silicon wafer to prepare a finished crystalline silicon battery.

[0058] Example 2

[0059] This embodiment provides a method for preparing a crystalline silicon cell, and the specific steps and parameters are as follows:

[0060] (1) Preparation of emitter:

[0061] S11. Pretreatment of silicon wafers: Use N-type silicon wafers and use standard RCA process to remove organic residues and metal ions on the surface of the silicon wafers;

[0062] The silicon wafer is anisotropically etched using the texturing liquid to produce a pyramid texture surface with uniform size.

[0063] S12, the quartz boat carries the silicon wafer into the furnace tube, the chamber temperature in the tube is 805°C, nitrogen is introduced to purge the chamber, the nitrogen flow rate is 2000sccm, and the duration is 800 seconds;

[0064] The tube was evacuated at a chamber temperature of 838°C for 740 seconds; the air tightness of the tube was checked at a chamber temperature of 838°C for 60 seconds;

[0065] Nitrogen was introduced into the tube, the chamber temperature was maintained at 838°C, the nitrogen flow rate was 3100 sccm, and the duration was 1000 seconds;

[0066] Oxygen was introduced into the tube, the chamber temperature was 850°C, the oxygen flow rate was 500 sccm, and the duration was 80 seconds, so that an oxide buffer layer was formed on the surface of the silicon wafer;

[0067] S13. A mixed gas of nitrogen, oxygen and boron trichloride is introduced into the tube to deposit a boron source on the surface of the silicon wafer. The chamber temperature is maintained at 850°C, wherein the nitrogen flow rate is 1000sccm, the oxygen flow rate is 1000sccm, the boron trichloride flow rate is 120sccm, and the duration is 900 seconds.

[0068] The chamber inside the tube is purged with nitrogen to exhaust oxygen, boron trichloride and generated waste gas;

[0069] A large amount of oxygen is introduced into the tube, with an oxygen flow rate of 25,000 sccm, to perform high-temperature propulsion on the impurity atoms. The specific steps of high-temperature propulsion are: the chamber temperature is 840°C, the duration is 1,500 seconds, and the chamber temperature is raised to 1,080°C, the duration is 2,200 seconds.

[0070] S14, post-treatment of the emitter: cool the furnace tube, maintain the nitrogen atmosphere, reduce the chamber temperature to 830°C, the nitrogen flow rate is 3000sccm, and the duration is 1800 seconds;

[0071] A large amount of nitrogen was introduced into the tube, the chamber temperature was maintained at 830°C, the nitrogen flow rate was 20,000 sccm, and the duration was 700 seconds for back pressure;

[0072] The silicon wafer is transported out of the furnace tube via a quartz boat and maintained in a nitrogen atmosphere. The chamber temperature is lowered to 800°C, the nitrogen flow rate is 3000sccm, and the duration is 750 seconds to obtain the emitter.

[0073] The emitter square resistance was measured by a four-probe square resistance meter (FT-331) and was 262Ω / m 2 The doping depth of the emitter was measured to be 1.28 μm using an electrochemical capacitance voltage tester (CVP21).

[0074] (2) Deposition of anti-reflection film

[0075] S21, using hydrofluoric acid to etch and remove the back and edge borosilicate glass; using potassium hydroxide and polishing additives to isotropically etch the back of the silicon wafer to achieve back polishing;

[0076] S22, ionizing N2O in a tubular plasma polysilicon deposition furnace to create an oxygen-rich environment, so that a tunneling oxide layer is formed on the back of the silicon wafer;

[0077] Using silane (SiH4) as a deposition source and phosphine (PH3) as a doping source, a phosphorus-doped amorphous silicon layer is deposited on the tunnel oxide layer by plasma-enhanced chemical vapor deposition (PECVD), and annealed in a N2 atmosphere to achieve phosphorus activation and crystallization of amorphous silicon;

[0078] S23, using 15wt% hydrofluoric acid to remove the edge phosphosilicate glass and the front borosilicate glass; using the mixed solution to remove the polysilicon that is plated;

[0079] Using trimethylaluminum (Al(CH3)3) as aluminum source and water (H2O) as oxygen source, an Al2O3 passivation film with a thickness of 2-3 nm was prepared on the front side by atomic layer deposition (ALD);

[0080] SiN deposition on the front side by PECVD x / SiN x / SiO x N y Laminated films;

[0081] SiN deposition on the back side x / SiN x / SiN x Laminated film.

[0082] S24, patterning the electrode by screen printing, and pre-sintering the conductive paste by an infrared chain furnace, wherein the conductive paste includes 95wt% of silver particles, 4wt% of organic solvent, and 1wt% of glass powder, the pre-sintering temperature is 600°C, the time is 60s, and the thickness of the conductive layer formed by the conductive paste is about 17μm;

[0083] The reverse breakdown voltage of this type of battery is obtained by preparing companion pieces: a small amount of pre-sintered battery cells are taken as companion pieces, and the companion pieces are processed using a conventional laser induced sintering process (100W laser irradiation and 18V reverse bias voltage). After the processing is completed, a reverse bias voltage is applied to the companion pieces using an ordinary DC power supply. At the same time, the temperature change of the companion piece is observed using an infrared imaging thermometer, and the output voltage of the DC power supply is slowly increased. When a sudden temperature change occurs on the entire surface of the companion piece, the output voltage of the DC power supply at this time is selected as the reverse breakdown voltage of this type of battery.

[0084] The breakdown voltage of the battery cell prepared in this embodiment is 40V.

[0085] The entire surface of the pre-sintered semi-finished battery cell (including the metallized area and the non-metallized area) is irradiated with a laser of 150W for 1.5 milliseconds and a 10V reverse bias voltage is applied at the same time, so that a reverse current is generated at the contact interface between the electrode and the silicon wafer. Under the thermal effect of the reverse current, high-quality ohmic contact is achieved between the electrode and the silicon wafer to prepare a finished crystalline silicon battery.

[0086] Example 3

[0087] This embodiment provides a method for preparing a crystalline silicon cell, and the specific steps and parameters are as follows:

[0088] (1) Preparation of emitter:

[0089] S11. Pretreatment of silicon wafers: Use N-type silicon wafers and use standard RCA process to remove organic residues and metal ions on the surface of the silicon wafers;

[0090] The silicon wafer is anisotropically etched using the texturing liquid to produce a pyramid texture surface with uniform size.

[0091] S12, the quartz boat carries the silicon wafer into the furnace tube, the chamber temperature in the tube is 805°C, nitrogen is introduced to purge the chamber, the nitrogen flow rate is 2000sccm, and the duration is 800 seconds;

[0092] The tube was evacuated at a chamber temperature of 838°C for 740 seconds; the air tightness of the tube was checked at a chamber temperature of 838°C for 60 seconds;

[0093] Nitrogen was introduced into the tube, the chamber temperature was maintained at 838°C, the nitrogen flow rate was 3100 sccm, and the duration was 1000 seconds;

[0094] Oxygen was introduced into the tube, the chamber temperature was 850°C, the oxygen flow rate was 500 sccm, and the duration was 80 seconds, so that an oxide buffer layer was formed on the surface of the silicon wafer;

[0095] S13. A mixed gas of nitrogen, oxygen and boron trichloride is introduced into the tube to deposit a boron source on the surface of the silicon wafer. The chamber temperature is maintained at 850°C, wherein the nitrogen flow rate is 4500sccm, the oxygen flow rate is 1000sccm, the boron trichloride flow rate is 52sccm, and the duration is 900 seconds.

[0096] The chamber inside the tube is purged with nitrogen to exhaust oxygen, boron trichloride and generated waste gas;

[0097] A large amount of oxygen is introduced into the tube, with an oxygen flow rate of 25,000 sccm, to perform high-temperature propulsion on the impurity atoms. The specific steps of high-temperature propulsion are: the chamber temperature is 400°C, the duration is 1,500 seconds, and the chamber temperature is raised to 950°C, the duration is 2,700 seconds.

[0098] S14, post-treatment of the emitter: cool the furnace tube, maintain the nitrogen atmosphere, reduce the chamber temperature to 830°C, the nitrogen flow rate is 3000sccm, and the duration is 1800 seconds;

[0099] A large amount of nitrogen was introduced into the tube, the chamber temperature was maintained at 830°C, the nitrogen flow rate was 20,000 sccm, and the duration was 700 seconds for back pressure;

[0100] The silicon wafer is transported out of the furnace tube via a quartz boat and maintained in a nitrogen atmosphere. The chamber temperature is lowered to 800°C, the nitrogen flow rate is 3000sccm, and the duration is 750 seconds to obtain the emitter.

[0101] The emitter resistance was measured using a four-probe square resistance meter (FT-331) and was 348Ω / m 2 The doping depth of the emitter was measured to be 0.62 μm using an electrochemical capacitance voltage tester (CVP21).

[0102] (2) Deposition of anti-reflection film

[0103] S21, using hydrofluoric acid to etch and remove the back and edge borosilicate glass; using potassium hydroxide and polishing additives to isotropically etch the back of the silicon wafer to achieve back polishing;

[0104] S22, ionizing N2O in a tubular plasma polysilicon deposition furnace to create an oxygen-rich environment, so that a tunneling oxide layer is formed on the back of the silicon wafer;

[0105] Using silane (SiH4) as a deposition source and phosphine (PH3) as a doping source, a phosphorus-doped amorphous silicon layer is deposited on the tunnel oxide layer by plasma-enhanced chemical vapor deposition (PECVD), and annealed in a N2 atmosphere to achieve phosphorus activation and crystallization of amorphous silicon;

[0106] S23, using 15wt% hydrofluoric acid to remove the edge phosphosilicate glass and the front borosilicate glass; using the mixed solution to remove the polysilicon that is plated;

[0107] Using trimethylaluminum (Al(CH3)3) as aluminum source and water (H2O) as oxygen source, an Al2O3 passivation film with a thickness of 2-3 nm was prepared on the front side by atomic layer deposition (ALD);

[0108] SiN deposition on the front side by PECVD x / SiN x / SiO x N y Laminated films;

[0109] SiN deposition on the back side x / SiN x / SiN x Laminated film.

[0110] S24, patterning the electrode by screen printing, and pre-sintering the conductive paste by an infrared chain furnace, wherein the conductive paste includes 95wt% of silver particles, 4wt% of organic solvent, and 1wt% of glass powder, the pre-sintering temperature is 600°C, the time is 60s, and the thickness of the conductive layer formed by the conductive paste is about 16μm;

[0111] The reverse breakdown voltage of this type of battery is obtained by preparing companion pieces: a small amount of pre-sintered battery cells are taken as companion pieces, and the companion pieces are processed using a conventional laser induced sintering process (100W laser irradiation and 18V reverse bias voltage). After the processing is completed, a reverse bias voltage is applied to the companion pieces using an ordinary DC power supply. At the same time, the temperature change of the companion piece is observed using an infrared imaging thermometer, and the output voltage of the DC power supply is slowly increased. When a sudden temperature change occurs on the entire surface of the companion piece, the output voltage of the DC power supply at this time is selected as the reverse breakdown voltage of this type of battery.

[0112] The breakdown voltage of the battery cell prepared in this embodiment is 38V.

[0113] The entire surface of the pre-sintered semi-finished battery cell (including the metallized area and the non-metallized area) is irradiated with a laser of 160W for 1.5 milliseconds and a 5V reverse bias voltage is applied at the same time, so that a reverse current is generated at the contact interface between the electrode and the silicon wafer. Under the thermal effect of the reverse current, high-quality ohmic contact is achieved between the electrode and the silicon wafer to prepare a finished battery cell.

[0114] Comparative Example

[0115] This embodiment provides a method for preparing a crystalline silicon cell. The specific steps and parameters are the same as those in Embodiment 1, except that the power of the laser irradiation in step S24 is 100W and the reverse bias voltage is 18V.

[0116] Experimental Example 1

[0117] The series resistance, space charge region composite current density, pseudo fill factor and photoelectric conversion efficiency of the crystalline silicon cells prepared in Example 1 and the comparative example were tested using a solar cell illumination I-V tester (Sinton-FCT-750). The results are shown in Table 1.

[0118] Table 1 Crystalline silicon cell performance parameters

[0119]

[0120] According to the data in Table 1, compared with the comparative example using a high bias voltage and low power laser sintering process, the crystalline silicon cell formed by the embodiment of the present invention using a low bias voltage and high power laser sintering process can not only increase the total amount of photogenerated carriers, generate a higher reverse current, and maintain good metal-semiconductor contact, but also reduce the damage to the space charge region of the cell, increase the pseudo fill factor, increase the room for the actual fill factor to rise, and improve the photoelectric conversion efficiency of the crystalline silicon cell, and perform better in terms of series resistance, space charge region composite current density, pseudo fill factor and photoelectric conversion efficiency performance.

[0121] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention.

Claims

1. A method for preparing a crystalline silicon solar cell, characterized in that: The following steps are included: S1. In the presence of an inert gas and oxygen, oxidizing the surface of the pretreated silicon wafer to obtain a first intermediate; S2, in the presence of an inert gas and oxygen, depositing a boron precursor on the first intermediate obtained in step S1 to form a second intermediate; S3, oxidizing the second intermediate in a pure oxygen atmosphere to obtain a battery cell; S4. Apply a conductive coating on the battery cell and sinter the battery cell using a laser induced sintering process. The power of the laser induced sintering process is greater than or equal to 150W, the irradiation time is 0.1ms-2ms, and a reverse bias voltage is applied at the same time. The reverse bias voltage is 1 / 8-1 / 4 of the breakdown voltage of the battery cell.

2. The method for preparing a crystalline silicon solar cell according to claim 1, characterized in that: In step S2, the flow ratio of oxygen to inert gas is 1:1.0-4.5, The molar ratio of the boron precursor to the inert gas is 1:10-40; and / or, The boron precursor includes boron halide.

3. The method for preparing a crystalline silicon solar cell according to claim 2, characterized in that: The boron precursor includes at least one of boron trichloride or boron tribromide.

4. The method for preparing a crystalline silicon solar cell according to claim 3, characterized in that: In step S3, the step of oxidizing the second intermediate is stepwise oxidation, specifically, reacting at 840-950° C. for 1000-1500 s, and reacting at 950-1080° C. for 2200-2700 s; and / or, The step S3 also includes the steps of cooling and re-pressurizing the battery cell; and / or, The pretreatment step of the silicon wafer in step S1 includes the step of anisotropically etching the silicon wafer using a texturing solution.

5. The method for preparing a crystalline silicon solar cell according to claim 4, characterized in that: The emitter square resistance of the crystalline silicon solar cell is 260-350Ω / m 2 , the doping depth is 0.6-1.3μm.

6. The method for preparing a crystalline silicon solar cell according to claim 1, characterized in that: The method for preparing the crystalline silicon solar cell further includes: Before applying the conductive coating, an anti-reflection film is formed on the surface of the cell.

7. The method for preparing a crystalline silicon solar cell according to claim 6, characterized in that: Before forming an anti-reflection film on the surface of the battery cell, the method also includes Forming an oxide layer on the back of the polished cell; A phosphorus-doped amorphous silicon layer is deposited on the back of the cell using plasma enhanced chemical vapor deposition; annealing; Before forming the anti-reflection film on the surface of the cell, a passivation film is formed on the front side of the cell by atomic layer deposition in the presence of an aluminum source and an oxygen source.

8. The method for preparing a crystalline silicon solar cell according to claim 7, characterized in that: The step of forming an anti-reflection film on the surface of the cell is specifically to form SiN on the front side of the cell by plasma enhanced chemical vapor deposition in the presence of a nitrogen source and a silicon source. x / SiN x / SiO x N y Layered film, forming SiN on the back of the cell x / SiN x / SiN x Laminated film.

9. The method for preparing a crystalline silicon solar cell according to claim 8, characterized in that: In the step of crystallizing the back side of the cell, the deposition source includes silane and the phosphorus source includes phosphine; and / or, In the step of forming a passivation film on the front side of the cell, the aluminum source includes trimethylaluminum; and / or, In the step of forming an anti-reflection film on the surface of the cell, the nitrogen source includes nitrogen gas and the silicon source includes silane.

10. A crystalline silicon solar cell, characterized in that: The crystalline silicon solar cell is prepared by the preparation method of any one of claims 1 to 9.

Citation Information

Patent Citations

  • Pyramid rapid texturing solution and texturing method and silicon wafer product thereof

    CN112442739A

  • Method for monitoring passivation contact process of tunneling oxide layer of TOPCon battery

    CN116031333A

  • Novel edge-passivated TOPCon battery, preparation method and device

    CN118299468A

  • Method for preparing laminated aluminum oxide film layer based on ALD (Atomic Layer Deposition) process

    CN118380510A

  • TOPCon battery and preparation process thereof

    CN118448478A