Tunneling passivation contact structure of solar cell, preparation method of tunneling passivation contact structure, solar cell, cell module and photovoltaic system
By designing a tunnel passivation contact structure including a silicon substrate, an inner layer, a first tunneling layer and a first conductive contact layer in a solar cell, the problem of difficulty in taking into account high passivation quality and gate line contact effect in the prior art is solved, and a higher open circuit voltage, fill factor and photoelectric conversion efficiency are achieved.
Patent Information
- Application Number
- CN202411998590.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-05-13
AI Technical Summary
The tunnel passivation contact structure of existing solar cells is difficult to take into account the high passivation quality and gate line contact effect, resulting in low open circuit voltage, filling factor and photoelectric conversion efficiency.
A tunnel passivation contact structure is adopted, including a silicon substrate, an inner layer, a first tunneling layer and a first conductive contact layer. By controlling the surface doping concentration of the first conductive contact layer and the thickness of the inner layer, combined with the design of the thin-layer tunneling layer, the passivation quality and gate line contact effect are improved.
The open circuit voltage, filling factor and photoelectric conversion efficiency of solar cells are improved, while the internal expansion depth is reduced, and the carrier contact collection ability is enhanced.
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Figure CN119997664A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of solar cells, and in particular, to a tunneling passivation contact structure of a solar cell and a preparation method thereof, a solar cell, a battery module, and a photovoltaic system. Background Art
[0002] As the global demand for clean energy continues to increase, high-efficiency, low-cost solar cells have become an important development direction for the photovoltaic market. High-efficiency cell technologies, such as TOPCon, are favored for their high conversion efficiency and potential low-cost production. Advances in passivation contact technology, such as tunneling layer passivation contact, have enabled cell efficiency to be improved. The maturity of back contact technology, including the successful commercialization of IBC cells, has laid the foundation for the development of TBC cells. While TBC needs to improve the back passivation effect, it also needs to ensure carrier contact collection. The balance between the two has always been a difficult problem for the industry to solve.
[0003] Most of the existing TBC solar cells use N-poly and P-poly as the passivation contact structure at the gate line position on the back, but it is difficult to take into account both high passivation quality and ensure the gate line contact effect. In order to ensure the gate line contact, the method of increasing the doping surface concentration is usually adopted. However, high-concentration doping will lead to deeper inward expansion, affecting the passivation effect. By increasing the thickness of the tunneling layer, the depth of inward expansion can be reduced to a certain extent, thereby improving the passivation effect, but the increased thickness of the tunneling layer becomes an obstacle to the contact and collection of carriers.
[0004] Therefore, the tunneling passivation contact structure of current solar cells needs to be further improved. Summary of the invention
[0005] The present application aims to solve one of the technical problems in the related art at least to some extent.
[0006] In a first aspect, the present application provides a tunnel passivation contact structure of a solar cell, comprising a silicon substrate, an inner expansion layer, a first tunneling layer, and a first conductive contact layer are sequentially arranged in a direction away from the silicon substrate, wherein the inner expansion layer, the first tunneling layer, and the first conductive contact layer satisfy: the surface doping concentration of the first conductive contact layer is 8E19 / cm -3 -10E19 / cm -3 ; The thickness of the inner expansion layer is less than or equal to 0.15μm; The thickness of the first tunneling layer is 1.5nm-2nm.
[0007] The tunnel passivation contact structure proposed in the present application can reduce the depth of internal expansion while making the first conductive contact layer have a higher doping concentration. At the same time, the thickness of the first tunnel layer is relatively thin, which can improve the contact effect of the gate line while improving the passivation quality, thereby improving the open circuit voltage, fill factor and photoelectric conversion efficiency of the solar cell.
[0008] According to some embodiments of the present application, the inner expansion layer includes an N-type inner expansion layer or a P-type inner expansion layer.
[0009] According to some embodiments of the present application, the first tunneling layer includes at least one of silicon oxide, silicon carbide, silicon nitride, silicon oxynitride, and amorphous silicon.
[0010] According to some embodiments of the present application, the first conductive contact layer includes a polysilicon layer.
[0011] The second aspect of the present application provides a method for preparing a tunneling passivation contact structure of a solar cell provided in the first aspect of the present application, the method comprising performing double-sided polishing on a silicon substrate, forming a first tunneling layer on both sides of the silicon substrate, forming a first conductive contact layer on a side of the first tunneling layer away from the silicon substrate, forming a second tunneling layer on a side of the first conductive contact layer away from the first tunneling layer, and forming a second conductive contact layer on a side of the second tunneling layer away from the first conductive contact layer; performing a diffusion process to form an inner expansion layer between the silicon substrate and the first tunneling layer, forming a doping layer on a side of the second conductive contact layer away from the second tunneling layer; and wet etching the doping layer and the second conductive contact layer.
[0012] The method for preparing a tunnel passivation contact structure proposed in the present application first forms a first tunneling layer, a first conductive contact layer, a second tunneling layer, and a second conductive contact layer on a silicon substrate, and then performs a diffusion process. During the diffusion process, doping atoms need to pass through the second conductive contact layer, the second tunneling layer, the first conductive contact layer, and the first tunneling layer to form an inner expansion layer. The second conductive contact layer and the second tunneling layer serve as doping masks to reduce the inner expansion depth of the doping atoms, thereby improving the passivation effect and improving the open circuit voltage and photoelectric conversion efficiency of the solar cell; at the same time, the surface doping atom concentration of the first conductive contact layer can be increased through multiple and multi-layer mask diffusion, the contact resistance can be reduced, and the ohmic contact between the electrode and the semiconductor layer can be improved, thereby improving the fill factor and photoelectric conversion efficiency of the solar cell.
[0013] According to some embodiments of the present application, the thickness of the second tunneling layer is 15nm-20nm.
[0014] According to some embodiments of the present application, the thickness of the second conductive contact layer is 250nm-270nm.
[0015] The third aspect of the present application provides a solar cell, comprising the tunnel passivation contact structure provided in the first aspect of the present application, wherein the solar cell comprises at least one of a TopCon cell, a TBC cell, and a HTBC cell. The solar cell proposed in the present application has a high open circuit voltage, a fill factor, and a photoelectric conversion efficiency.
[0016] A fourth aspect of the present application provides a battery assembly, including the solar cell provided in the third aspect of the present application.
[0017] A fifth aspect of the present application provides a photovoltaic system, comprising the battery assembly provided in the fourth aspect of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0019] Figure 1 A schematic diagram showing a tunneling passivation contact structure of a solar cell according to an embodiment of the present application is shown.
[0020] Figure 2 A schematic flow chart of a method for preparing a solar cell according to an embodiment of the present application is shown.
[0021] Figure 3 A schematic flow chart of a method for preparing a solar cell according to an embodiment of the present application is shown.
[0022] Reference numerals:
[0023] 11 silicon substrate; 12 first tunneling layer; 13 first conductive contact layer; 14 second tunneling layer; 15 second conductive contact layer; 16 inner diffusion layer; 17 doping layer. DETAILED DESCRIPTION
[0024] The embodiments of the present application are described in detail below. The embodiments described below are exemplary and are only used to explain the present application, and should not be construed as limiting the present application. If no specific technology or conditions are indicated in the embodiments, the technology or conditions described in the document in this area or the product specification are used. The reagents used or the instruments that do not indicate the manufacturer are all conventional products that can be obtained commercially.
[0025] The present application provides a tunnel passivation contact structure for a solar cell, referring to Figure 1 , comprising a silicon substrate 11, an inner expansion layer 16, a first tunneling layer 12, and a first conductive contact layer 13 are sequentially arranged in a direction away from the silicon substrate 11, wherein the inner expansion layer 16, the first tunneling layer 12, and the first conductive contact layer 13 satisfy: the surface doping concentration of the first conductive contact layer 13 is 8E19 / cm -3-10E19 / cm -3 ; The thickness of the inner expansion layer 16 is less than or equal to 0.15μm; The thickness of the first tunneling layer 13 is 1.5nm-2nm.
[0026] The tunneling passivation contact structure proposed in the present application has a first conductive contact layer with a higher surface doping concentration and a thinner inner expansion layer, that is, the tunneling passivation contact structure proposed in the present application can reduce the inner expansion depth while making the first conductive contact layer have a higher doping concentration. At the same time, the first tunneling layer has a thinner thickness, which can improve the passivation quality while also improving the contact effect of the gate line, thereby improving the open circuit voltage, fill factor and photoelectric conversion efficiency of the solar cell.
[0027] In the present application, the surface doping concentration of the first conductive contact layer can be 8E19 / cm -3 、8.5E19 / cm -3 、9E19 / cm -3 、9.5E19 / cm -3 、10E19 / cm -3 The above-mentioned arbitrary numerical ranges may also be used.
[0028] According to some embodiments of the present application, the inner expansion layer includes an N-type inner expansion layer or a P-type inner expansion layer. For example, a boron diffusion process can form a P-type inner expansion layer, and a phosphorus diffusion process can form an N-type inner expansion layer.
[0029] According to some embodiments of the present application, the first tunneling layer includes at least one of silicon oxide, silicon carbide, silicon nitride, silicon oxynitride, and amorphous silicon.
[0030] According to some embodiments of the present application, the first conductive contact layer includes a polysilicon layer.
[0031] The second aspect of the present application provides a method for preparing a tunneling passivation contact structure of a solar cell provided in the first aspect of the present application, the method comprising performing double-sided polishing on a silicon substrate, forming a first tunneling layer on both sides of the silicon substrate, forming a first conductive contact layer on a side of the first tunneling layer away from the silicon substrate, forming a second tunneling layer on a side of the first conductive contact layer away from the first tunneling layer, and forming a second conductive contact layer on a side of the second tunneling layer away from the first conductive contact layer; performing a diffusion process to form an inner expansion layer between the silicon substrate and the first tunneling layer, forming a doping layer on a side of the second conductive contact layer away from the second tunneling layer; and wet etching the doping layer and the second conductive contact layer.
[0032] The method for preparing a tunnel passivation contact structure proposed in the present application first forms a first tunneling layer, a first conductive contact layer, a second tunneling layer, and a second conductive contact layer on a silicon substrate, and then performs a diffusion process. During the diffusion process, doping atoms need to pass through the second conductive contact layer, the second tunneling layer, the first conductive contact layer, and the first tunneling layer to form an inner expansion layer. The second conductive contact layer and the second tunneling layer serve as doping masks to reduce the inner expansion depth of the doping atoms, thereby improving the passivation effect and improving the open circuit voltage and photoelectric conversion efficiency of the solar cell; at the same time, the surface doping atom concentration of the first conductive contact layer can be increased through multiple and multi-layer mask diffusion, the contact resistance can be reduced, and the ohmic contact between the electrode and the semiconductor layer can be improved, thereby improving the fill factor and photoelectric conversion efficiency of the solar cell.
[0033] The method proposed in this application is described in detail below. Figure 2 and Figure 3 , the method comprising:
[0034] S10: Perform double-sided polishing on the silicon substrate 11 to form a first tunneling layer 12 on both sides of the silicon substrate 11, a first conductive contact layer 13 is formed on a side of the first tunneling layer 12 away from the silicon substrate 11, a second tunneling layer 14 is formed on a side of the first conductive contact layer 13 away from the first tunneling layer 12, and a second conductive contact layer 15 is formed on a side of the second tunneling layer 14 away from the first conductive contact layer 13.
[0035] According to some embodiments of the present application, the double-sided polishing process includes:
[0036] The silicon substrate is subjected to the first double-sided polishing in a wet alkali polishing tank machine. The alkaline solution used for the first double-sided polishing is composed of H2O, NaOH and polishing agent in a volume ratio of (290-310): (10-20): (2-8), wherein the NaOH concentration is 1%-5%, the process time is 80s-120s, and the tank body temperature of the wet alkali polishing tank machine is 50℃-75℃.
[0037] The N-type silicon substrate is subjected to a second double-sided polishing in a wet alkali polishing tank machine. The alkaline solution used for the second double-sided polishing is composed of H2O, NaOH and polishing agent in a volume ratio of (290-310): (10-20): (2-8), wherein the NaOH concentration is 1%-5%, the process time is 350s-450s, and the temperature of the wet alkali polishing tank machine is 50℃-75℃.
[0038] According to some embodiments of the present application, the first tunneling layer, the first conductive contact layer, the second tunneling layer, and the second conductive contact layer may be formed by low pressure chemical vapor deposition (LPCVD).
[0039] As an example, the silicon substrate includes a first surface and a second surface in its thickness direction. The temperature for forming the first tunneling layer on the first surface and the second surface is preferably 610°C, and the deposition time is preferably 400s. It can be understood that the above temperature and deposition time can be flexibly adjusted according to the thickness and deposition speed of the first tunneling layer to be prepared.
[0040] According to some embodiments of the present application, the thickness of the first tunneling layer may be 1.5 nm-2 nm. For example, it may be 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm, 2 nm, etc., or may be a range of any of the above values. Thus, the first tunneling layer is thinner, which can improve the tunneling ability of carriers, thereby improving the fill factor and photoelectric conversion efficiency of the solar cell.
[0041] As an example, the temperature for forming the first conductive contact layer on the side of the first tunneling layer away from the silicon substrate is preferably 550° C., and the deposition time may be 8000 s. It is understandable that the temperature and deposition time may be flexibly adjusted according to the thickness and deposition speed of the first conductive contact layer to be prepared.
[0042] According to some embodiments of the present application, the thickness of the first conductive contact layer may be 200 nm-220 nm, for example, 200 nm, 205 nm, 210 nm, 215 nm, 220 nm, etc., or may be a range consisting of any of the above numerical values.
[0043] As an example, the temperature for forming the second tunneling layer on the side of the first conductive contact layer away from the first tunneling layer is preferably 610° C., and the deposition time may be 4000 s. It is understandable that the above temperature and deposition time may be flexibly adjusted according to the thickness and deposition speed of the second tunneling layer to be prepared.
[0044] According to some embodiments of the present application, the thickness of the second tunneling layer may be 15 nm-20 nm, for example, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc., or may be a range consisting of any of the above numerical values.
[0045] As an example, the temperature for forming the second conductive contact layer on the side of the second tunneling layer away from the first conductive contact layer is preferably 550° C., and the deposition time may be 10000 s. It is understandable that the above temperature and deposition time may be flexibly adjusted according to the thickness and deposition speed of the second conductive contact layer to be prepared.
[0046] According to some embodiments of the present application, the thickness of the second conductive contact layer may be 250 nm-270 nm, for example, 250 nm, 255 nm, 260 nm, 265 nm, 270 nm, etc., or may be a range consisting of any of the above numerical values.
[0047] S20 : performing a diffusion process to form an inner extension layer 16 between the silicon substrate 11 and the first tunneling layer 13 , and forming a doping layer 17 on a side of the second conductive contact layer 15 away from the second tunneling layer 14 .
[0048] According to some embodiments of the present application, when the silicon substrate is a P-type silicon substrate, the diffusion process is a phosphorus and / or boron diffusion process, and the method proposed in the present application can reduce the internal diffusion depth of phosphorus and / or boron; when the silicon substrate is an N-type silicon substrate, the diffusion process is a boron and / or phosphorus diffusion process, and the method proposed in the present application can reduce the internal diffusion depth of boron and / or phosphorus.
[0049] The method proposed in the present application is described in detail below by assuming that the silicon substrate is an N-type silicon substrate and the diffusion process is a boron diffusion process.
[0050] According to some embodiments of the present application, the boron diffusion process includes a diffusion process, a driving process and an oxidation process.
[0051] As an example, the diffusion temperature of the diffusion process is 800° C.-900° C., and the time is 40s-60s.
[0052] It should be noted that during the boron diffusion process, the diffusion temperature can be gradually increased from 800°C to 900°C, or multiple diffusions can be performed at different temperatures during the diffusion process. For example, the diffusion can be performed at 820°C, 830°C, and 850°C for 150s, 200s, and 300s, respectively, and then the temperature can be further increased to perform the diffusion advancement process.
[0053] As an example, the temperature of the advancement process may be 960°C-980°C, and the time may be 700s-900s. For example, the temperature of the advancement process may be 960°C, 965°C, 970°C, 975°C, 980°C, etc., or may be in a range consisting of any of the above values; the time of the advancement process may be 700s, 800s, 900s, etc., or may be in a range consisting of any of the above values.
[0054] As an example, the temperature of the oxidation process is 960°C-980°C, and the time is 750s-950s. For example, the temperature of the oxidation process can be 960°C, 965°C, 970°C, 975°C, 980°C, etc., or can be a range composed of any of the above values; the time of the oxidation process can be 700s, 800s, 900s, etc., or can be a range composed of any of the above values.
[0055] This improves the uniformity of boron diffusion.
[0056] S30: wet-etching the doping layer 17 and the second conductive contact layer 15.
[0057] According to some embodiments of the present application, reference Figure 2 The method may further include removing the doping layer 17 by acid washing and removing the second conductive contact layer 15 by alkali washing. Thus, a large amount of impurity ions are removed, the inner layer recombination centers are reduced, and the passivation effect is improved.
[0058] As an example, the acid solution used for pickling is composed of HF and H2O in a volume ratio of 2:3, the acid solution temperature is preferably 45°C, and the pickling time is preferably 240s. It is understandable that the ratio, temperature and pickling time of the acid solution can be selected according to the thickness of the doping layer.
[0059] As an example, the alkaline solution used in the alkaline washing is composed of H2O, NaOH, and polishing agent in a volume ratio of 300:20:3, the temperature of the alkaline solution is preferably 50°C-75°C, and the alkaline washing time is preferably 300s. It is understandable that the ratio, temperature, and alkaline washing time of the alkaline solution can be selected according to the thickness of the second conductive contact layer.
[0060] According to some embodiments of the present application, the thickness of the second tunneling layer is 15nm-20nm.
[0061] According to some embodiments of the present application, the thickness of the second conductive contact layer is 250nm-270nm.
[0062] The third aspect of the present application provides a solar cell, comprising the tunnel passivation contact structure provided in the first aspect of the present application, wherein the solar cell comprises at least one of a TopCon cell, a TBC cell, and a HTBC cell. The solar cell proposed in the present application has a high open circuit voltage, a fill factor, and a photoelectric conversion efficiency.
[0063] Example
[0064] The present application proposes a solar cell, the solar cell comprising the tunnel passivation contact structure proposed in the present application. For the convenience of description, the layer structure related to the present application is described. The solar cell comprises:
[0065] A silicon substrate, wherein along the thickness direction of the silicon substrate, the silicon substrate comprises a first surface and a second surface arranged opposite to each other, wherein the first surface is a surface facing the sun, and the second surface is a surface facing away from the sun. The silicon substrate may be a single crystal silicon wafer or a multi-crystalline silicon wafer, and further, the single crystal silicon wafer may be an N-type single crystal silicon wafer or a P-type single crystal silicon wafer.
[0066] The first tunneling layer is arranged on the second surface of the silicon substrate, which can reduce the dangling bonds and defects on the surface of the silicon wafer, and use the quantum tunneling effect to realize the selective transmission of carriers, so that electrons and holes can be separated and selectively transmitted more efficiently, and the short-circuit current of the solar cell can be increased. The thickness of the first tunneling layer can be 1.5nm-2nm, and the thinner first tunneling layer can ensure the tunneling effect. The material of the first tunneling layer includes at least one of silicon oxide, silicon carbide, silicon nitride, silicon oxynitride, and amorphous silicon. Specifically, it can be a first tunneling layer formed by a single material, or a first tunneling layer formed by a combination of multiple materials.
[0067] According to some specific embodiments of the present application, the first tunneling layer may be a silicon oxide layer.
[0068] The inner expansion layer is located between the silicon substrate and the first tunneling layer. The thickness of the inner expansion layer reflects the concentration of the doped elements in the conductive contact layer penetrating into the silicon substrate. The inner expansion layer has a higher concentration (or a thicker thickness). On the one hand, it will increase the Auger recombination, greatly reducing the lifetime of minority carriers, thereby reducing the battery efficiency. On the other hand, if the thickness of the inner expansion layer is too large, it means that more doped elements pass through the first tunneling layer during the diffusion process, which will cause greater damage to the first tunneling layer and reduce the passivation effect of the first tunneling layer. The thickness of the inner expansion layer in the tunneling passivation structure proposed in this application is less than or equal to 0.15μm, which can protect the first tunneling layer to a certain extent and reduce Auger recombination.
[0069] The first conductive contact layer is disposed on the surface of the first tunneling layer away from the silicon substrate, and the first conductive contact layer can be an N-type polysilicon layer or a P-type polysilicon layer. The surface doping concentration of the first conductive contact layer is greater than 8E19 / cm -3 -10E19 / cm -3 , for example, can be 8E19 / cm -3 、8.5E19 / cm -3 、9E19 / cm -3 、9.5E19 / cm -3 、10E19 / cm -3Etc., or can be a range composed of any of the above numerical values. Specifically, when preparing a tunnel passivation contact structure, taking an N-type silicon substrate as an example, a first tunnel layer, a first conductive contact layer, a second tunnel layer, and a second conductive contact layer (along the direction away from the silicon substrate) are sequentially formed on the first surface and the second surface of the N-type silicon substrate, and boron diffusion is performed. During the diffusion process, the doping elements sequentially pass through the second conductive contact layer, the second tunnel layer, the first conductive contact layer, and the first tunnel layer, and diffuse in batches. Before the boron diffusion, a multi-layer film structure is formed on the silicon substrate, which can increase the surface doping concentration of the first conductive contact layer while reducing the depth of the boron internal diffusion, thereby ensuring the contact effect of the gate line while improving the passivation effect, thereby improving the open circuit voltage, fill factor and photoelectric conversion efficiency of the solar cell.
[0070] According to some embodiments of the present application, the thickness of the first conductive contact layer is 200 nm-220 nm.
[0071] The fourth aspect of the present application provides a battery assembly, comprising at least two solar cells provided in the third aspect of the present application. Adjacent solar cells can be connected together by a connection method in the prior art, such as serial welding, and the specific connection method is not limited by the present application.
[0072] The fifth aspect of the present application provides a photovoltaic system, comprising the battery assembly in any of the above embodiments. The photovoltaic system also has the advantages of the above battery assembly, which will not be repeated here.
[0073] The above-mentioned photovoltaic systems have a wide range of applications and are not limited to photovoltaic power stations, such as ground power stations, rooftop power stations and water surface power stations, but also include various equipment and devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars and solar buildings.
[0074] Of course, it is understandable that the application scenarios of photovoltaic systems are not limited to this, that is, photovoltaic systems can be used in all fields that require the use of solar energy for power generation. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic components. For example, multiple photovoltaic components may form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box, which can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to achieve solar power supply.
[0075] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.
Claims
1. A tunnel passivation contact structure for a solar cell, characterized in that: include: A silicon substrate, wherein an inner expansion layer, a first tunneling layer, and a first conductive contact layer are sequentially arranged in a direction away from the silicon substrate, and the inner expansion layer, the first tunneling layer, and the first conductive contact layer meet the following conditions: The surface doping concentration of the first conductive contact layer is 8E19 / cm -3 -10E19 / cm -3 ; The thickness of the inner expansion layer is less than or equal to 0.15 μm; The thickness of the first tunneling layer is 1.5 nm-2 nm.
2. The tunnel passivation contact structure according to claim 1, characterized in that: The inner expansion layer includes an N-type inner expansion layer or a P-type inner expansion layer.
3. The tunnel passivation contact structure according to claim 1, characterized in that: The first tunneling layer includes at least one of silicon oxide, silicon carbide, silicon nitride, silicon oxynitride, and amorphous silicon.
4. The tunnel passivation contact structure according to claim 1, characterized in that: The first conductive contact layer includes a polysilicon layer.
5. A method for preparing a tunnel passivation contact structure of a solar cell according to any one of claims 1 to 4, characterized in that: include: Performing double-sided polishing on the silicon substrate, forming a first tunneling layer on both sides of the silicon substrate, forming a first conductive contact layer on a side of the first tunneling layer away from the silicon substrate, forming a second tunneling layer on a side of the first conductive contact layer away from the first tunneling layer, and forming a second conductive contact layer on a side of the second tunneling layer away from the first conductive contact layer; Performing a diffusion process to form an inner diffusion layer between the silicon substrate and the first tunneling layer, and forming a doping layer on a side of the second conductive contact layer away from the second tunneling layer; The doping layer and the second conductive contact layer are wet-etched.
6. The method according to claim 5, characterized in that The thickness of the second tunneling layer is 15nm-20nm.
7. The method according to claim 5, characterized in that The thickness of the second conductive contact layer is 250nm-270nm.
8. A solar cell, characterized in that: Comprising the tunnel passivation contact structure according to any one of claims 1 to 4, the solar cell comprises at least one of a TopCon cell, a TBC cell, and a HTBC cell.
9. A battery assembly, characterized in that: Comprising the solar cell according to claim 8.
10. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 9.