Light emitting mesa for micro light emitting diode and forming method thereof

Abstract

The invention provides a light-emitting table top for a miniature light-emitting diode, and the table top comprises a transparent conductive layer which is disposed at one side, opposite to a light-emitting side, of the light-emitting table top; a first epitaxial layer disposed between the transparent conductive layer and the light emitting layer; a light emitting layer disposed between the first epitaxial layer and the second epitaxial layer and configured to emit light; the second epitaxial layer is arranged on the side, facing the light emitting side, of the light emitting table top, the area of the second epitaxial layer is larger than that of the first epitaxial layer, the side face of the light emitting table top is provided with an inclined face, and the inclination angle of the inclined face ranges from 55 degrees to 75 degrees. In addition, the invention also provides a micro light-emitting diode with the light-emitting mesa and a method for forming the light-emitting mesa. According to the invention, the aperture opening ratio of the micro light-emitting diode can be obviously improved, so that the luminous quantity is improved.

Description

Technical Field

[0001] The present invention generally relates to the field of micro light emitting diodes, and more specifically to a light emitting mesa for a micro light emitting diode and a method for forming the same. In addition, the present invention also relates to a micro light emitting diode having such a light emitting mesa. Background Art

[0002] Micro Light Emitting Diode is a new type of LED structure obtained by thin-filming, miniaturizing and arraying the original LED structure. It integrates arrayed micron-sized micro light-emitting diodes on an active addressing drive panel to realize the lighting and individual control of the micro light-emitting diodes, thereby outputting the desired display image. The core structure of the micro light-emitting diode is a light-emitting table, which includes a PN junction diode, which is composed of a direct bandgap semiconductor material. When the upper and lower electrodes apply a forward bias to the micro light-emitting diode to cause current to pass through, electrons and holes recombine in the active region and emit single-color light photons at the same time.

[0003] The light-emitting mesa of the micro-LED includes a positive trapezoidal light-emitting mesa and an inverted trapezoidal light-emitting mesa, wherein the upper surface of the positive trapezoidal light-emitting mesa is smaller than the lower surface, while the inverted trapezoidal light-emitting mesa is just the opposite. At present, the etching of the inverted trapezoidal light-emitting mesa includes the following steps: first, an epitaxial wafer with an epitaxial layer is provided; then, a photoresist is coated on the surface of the epitaxial wafer, and then the designed mesa pattern is transferred to the photoresist through a mask using a photolithography technique, so that the area to be etched to form the mesa is exposed, and the remaining area is protected by the photoresist. Then, etching is performed to remove the material, for example, dry etching, such as reactive ion etching (RIE) or wet etching process can be used to remove the exposed semiconductor material to form a light-emitting mesa structure. However, due to the vertical morphology of the photoresist, the inclination angle of the etched light-emitting mesa is large, close to 90°. In addition, although the wet etching process is less expensive, the anisotropy of the etching is relatively poor, which may cause the inclination of the side wall of the mesa to be too large, close to 90°. Too large a tilt angle will affect the aperture ratio of the chip. Summary of the invention

[0004] Based on the prior art, the task of the present invention is to provide a light-emitting table for a micro light-emitting diode and a method for forming the same, as well as a micro light-emitting diode having such a light-emitting table. Through the light-emitting table, the method or the micro light-emitting diode, the aperture ratio of the micro light-emitting diode can be significantly improved, thereby increasing its light emission.

[0005] In a first aspect of the present invention, the aforementioned task is solved by a light-emitting mesa for a micro light-emitting diode, the light-emitting mesa comprising:

[0006] A transparent conductive layer, which is arranged on a side of the light-emitting platform facing away from the light-emitting side;

[0007] a first epitaxial layer disposed between the transparent conductive layer and the light emitting layer;

[0008] a light emitting layer disposed between the first epitaxial layer and the second epitaxial layer and configured to emit light; and

[0009] The second epitaxial layer is arranged on the side of the light-emitting mesa facing the light-emitting side, wherein the area of ​​the second epitaxial layer is larger than that of the first epitaxial layer, and the side surface of the light-emitting mesa has an inclined surface with an inclination angle of 55° to 75°.

[0010] In one embodiment of the present invention, the side surface of the transparent conductive layer has a first slope, and the first epitaxial layer has a second slope, wherein the first slope is not equal to the second slope.

[0011] In another embodiment of the present invention, the inclination angle of the inclined surface is 60° to 70°.

[0012] In another embodiment of the present invention, the side surfaces of the second epitaxial layer and the light-emitting layer have a second slope, wherein the inclination angles corresponding to the first slope and the second slope are both less than or equal to 70°.

[0013] In another embodiment of the present invention, the inclination angles corresponding to the first slope and the second slope are both less than or equal to 65°.

[0014] In another embodiment of the present invention, the light-emitting table further comprises:

[0015] A temporary substrate is in contact with the second epitaxial layer.

[0016] In another embodiment of the present invention, the light-emitting table further comprises:

[0017] A marking layer is disposed between the temporary substrate and the second epitaxial layer.

[0018] In another embodiment of the present invention, it is provided that:

[0019] The temporary substrate has a thickness of 600 to 1000 μm; and / or

[0020] The thickness of the marking layer is 4.4 um to 5 um.

[0021] In another embodiment of the present invention, the material of the marking layer is selected from the group consisting of:

[0022] AlN, which has a thickness of 150 to 200 nm;

[0023] AlGaN, which has a thickness of 300 to 400 nm;

[0024] U-GaN, which has a thickness of 2300 to 2800 nm;

[0025] N-GaN, which has a thickness of 1000 to 1200 nm;

[0026] MQW having a thickness of 200 to 400 nm; and

[0027] P-GaN, the thickness of which is 100 to 200 nm.

[0028] In another embodiment of the present invention, the larger width at both ends of the inclined surface of the light emitting mesa is 1.4 to 1.7 μm.

[0029] In another embodiment of the present invention, the light emitting mesa has a depth of 0.3 to 0.7 μm.

[0030] In another embodiment of the present invention, it is provided that the second epitaxial layer comprises:

[0031] a stepped portion in electrical contact with the light emitting layer; and

[0032] The base portion extends from the step portion to both sides.

[0033] In another embodiment of the present invention, base portions of adjacent light emitting mesas are connected to each other.

[0034] In another embodiment of the present invention, it is provided that:

[0035] The thickness of the step portion is: 400nm to 800nm; and / or

[0036] The thickness of the base portion is 4 to 4.4 um.

[0037] In another embodiment of the present invention, it is provided that:

[0038] The thickness of the transparent conductive layer is: 600 to 150 nm; and / or

[0039] The thickness of the first epitaxial layer is: 80 to 120 nm; and / or

[0040] The thickness of the light-emitting layer is: 280 to 400 nm; and / or

[0041] The thickness of the second epitaxial layer is 180 to 220 nm.

[0042] In another embodiment of the present invention, the side surface of the transparent conductive layer has a first inclined edge, and the side surfaces of the first epitaxial layer, the light emitting layer, and the second epitaxial layer have a second inclined surface, wherein:

[0043] An end portion of the first inclined edge and an end portion of the second inclined surface are connected to each other; or

[0044] A distance between an end of the first inclined edge and an end of the second inclined surface in the horizontal direction is less than or equal to 200 nm.

[0045] In another embodiment of the present invention, the first inclined edge has a first inclined angle X, and the second inclined surface has a second inclined angle X, wherein the first inclined angle X and the second inclined angle satisfy the following relationship:

[0046] d=(X*d1+Y*d2) / (d1+d2);

[0047] 60°≤d≤70°,

[0048] Wherein d1 is the thickness of the transparent conductive layer, d2 is the sum of the thicknesses of the first epitaxial layer, the light-emitting layer, and the second epitaxial layer, and d is the average value of the tilt angle of the light-emitting mesa over the entire thickness.

[0049] In another embodiment of the present invention, the material of the transparent conductive layer is selected from the group consisting of:

[0050] Indium tin oxide, zinc oxide, and cadmium tin oxide.

[0051] In another embodiment of the present invention, the material of the second epitaxial layer is a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer is a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, wherein the first conductivity type is different from the second conductivity type.

[0052] In another embodiment of the present invention, the light emitting layer comprises a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, an InGaAs / AlGaAs multi-quantum well layer, or an AlGaInP multi-quantum well layer.

[0053] In another embodiment of the present invention, an electron blocking layer is disposed on a first side of the light emitting layer, the first side being a side of the light emitting layer pointing in the same direction or in the opposite direction of the light.

[0054] In a second aspect of the present invention, the aforementioned object is solved by a micro light emitting diode chip, the micro light emitting diode chip comprising:

[0055] The light-emitting tabletop according to the present invention;

[0056] an insulating layer configured to accommodate the light emitting mesas and the via contacts;

[0057] A driving circuit, a metal layer is disposed on the surface of the driving circuit, a plurality of through-hole contacts are disposed on the driving circuit, the through-hole contacts are electrically connected to the metal layer, the micro-LED array region is bonded to the driving circuit through a bottom conductive bonding layer, wherein the driving circuit further has a wiring stack under the metal layer, which is configured to lead out a first electrode;

[0058] a first electrode electrically connected to the through-hole contact portion;

[0059] a passivation layer covering at least a portion of a side surface of the light-emitting mesa;

[0060] a top transparent conductive layer, which is disposed on a surface of the passivation layer and is in electrical contact with the second epitaxial layer; and

[0061] The second electrode is disposed on the surface of the transparent conductive layer.

[0062] In one embodiment of the present invention, the second electrode is a ring-shaped reflective electrode, which is arranged around the light-emitting mesa.

[0063] In another embodiment of the present invention, the polarity of the second electrode is opposite to that of the first electrode.

[0064] In another embodiment of the present invention, the material of the second epitaxial layer is a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer is a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, wherein the first conductivity type is different from the second conductivity type.

[0065] In another embodiment of the present invention, the light emitting layer comprises a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, an InGaAs / AlGaAs multi-quantum well layer, or an AlGaInP multi-quantum well layer.

[0066] In another embodiment of the present invention, an electron blocking layer is disposed on a first side of the light-emitting layer, wherein the first side refers to a side along which electrons migrate out of the light-emitting layer.

[0067] In another embodiment of the present invention, the material of the passivation layer is Si3N4 film, SiO2 film or Al2O3 film.

[0068] In another embodiment of the present invention, the material of the substrate is selected from the group consisting of silicon (Si), silicon dioxide (SiO2), silicon nitride (Si3N4), silicon carbide (SiC), gallium nitride (GaN), glass, aluminum nitride (AlN), sapphire (α-Al2O3), and germanium (Ge).

[0069] In another embodiment of the present invention, it is provided that:

[0070] The material of the insulating layer is selected from the group consisting of silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon nitride (Si3N4), silicon carbonitride (SiCN), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), titanium dioxide (TiO2), zirconium oxide (ZrO2), lanthanum oxide (La2O3), magnesium oxide (MgO), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), or any combination thereof; and / or

[0071] The material of the metal layer is selected from the group consisting of aluminum (Al), copper (Cu), tungsten (W), silver (Ag), gold (Au), nickel (Ni), platinum (Pt), tantalum (Ta), and molybdenum (Mo).

[0072] In another embodiment of the present invention, the through-hole contact portion includes a first and a second through-hole contact portion, and the insulating layer includes a first and a second insulating layer, and the micro-light-emitting diode chip includes an upper stack and a lower stack, wherein the upper stack includes a first insulating layer, a light-emitting table and a first through-hole contact portion, and the lower stack includes a second insulating layer, a second through-hole contact portion and a driving circuit, wherein the lower stack is joined to the upper stack by hybrid bonding, so that the first through-hole contact portion is bonded to the second through-hole contact portion, and the first insulating layer is bonded to the second insulating layer.

[0073] In a third aspect of the present invention, the aforementioned task is solved by a method for forming a light-emitting mesa, the method comprising:

[0074] providing a temporary substrate;

[0075] forming an epitaxial layer on the temporary substrate, the epitaxial layer comprising a second epitaxial layer in contact with the temporary substrate, a light emitting layer arranged on the second epitaxial layer, and a first epitaxial layer arranged on the light emitting layer;

[0076] forming a transparent conductive layer on the epitaxial layer;

[0077] etching the transparent conductive layer in a first etching step to expose the first epitaxial layer, wherein the first epitaxial layer is not etched in the first etching step; and

[0078] In a second etching step after the first etching step, the first epitaxial layer, the light emitting layer and the second epitaxial layer are etched to form an inclined surface at a side surface of the light emitting mesa, wherein the inclined surface has an inclination angle of 55° to 75°.

[0079] In one embodiment of the present invention, the second etching step comprises:

[0080] Applying photoresist on the transparent conductive layer and the exposed first epitaxial layer;

[0081] exposing the photoresist to form an exposure portion on the periphery of the transparent conductive layer;

[0082] Baking the photoresist to produce a resist collapse at the exposed portion;

[0083] developing and washing the photoresist to pattern the photoresist; and

[0084] The first epitaxial layer, the light emitting layer and the second epitaxial layer are etched by patterned photoresist to form a light emitting mesa.

[0085] In another embodiment of the present invention, the baking temperature is 120° C. to 140° C., and the baking time is 8 to 12 minutes.

[0086] In another embodiment of the present invention, the etching includes one or more of the following: chemical wet etching, ion beam etching, and reactive ion etching.

[0087] In another embodiment of the present invention, etching the first epitaxial layer, the light emitting layer and the second epitaxial layer by patterned photoresist to form a light emitting mesa comprises:

[0088] Etching through the first epitaxial layer to expose the light emitting layer;

[0089] Etching through the light emitting layer to expose the second epitaxial layer; and

[0090] The etching penetrates only a portion of the second epitaxial layer.

[0091] In another embodiment of the present invention, the method further comprises the steps of:

[0092] A marking layer is formed between the temporary substrate and the epitaxial layer.

[0093] In another embodiment of the present invention, the method further comprises the steps of:

[0094] The temporary substrate is removed by debonding or grinding.

[0095] The present invention has at least the following technical effects:

[0096] (1) The inventors have found through research that when the side inclination angle α of the light-emitting mesa is between 55° and 75°, especially between 60° and 70°, a better aperture ratio can be obtained. The principle on which it is based is as follows. The inventors have found through research that when the upper area of ​​the inverted trapezoidal light-emitting mesa is constant, its aperture ratio (aperture ratio refers to the ratio of the actual light-emitting area to the total area of ​​the chip) depends on the inclination angle α of the bevel, that is, the opening area, that is, the lower side area depends on the inclination angle α of the bevel (0<α<90°), wherein the smaller the inclination angle α of the bevel, the larger the opening area, and conversely, the larger the inclination angle α of the bevel, the smaller the opening area, that is, the closer to the upper side area, when α=90°, the lower side area is equal to the upper side area, and the opening area is the smallest. However, the inclination angle α of the bevel cannot be infinitely small. When the inclination angle α of the bevel is too small, not only will it place too high a requirement on the process, but also the ratio between the first and second epitaxial layers and the light-emitting layer will be out of balance, affecting the light-emitting efficiency. The inventors also found that when the side inclination angle α is between 55° and 75°, especially between 60° and 70°, the best aperture ratio and the best luminous efficiency can be achieved. At the same time, this angle can be achieved by step-by-step etching, wherein step-by-step etching means that the transparent conductive layer and other layers are etched in different steps.

[0097] (2) The inventors have found through research that the main reason for the low aperture ratio of current micro-LEDs is that in the wet etching process, the transparent conductive layer and the epitaxial layer of the light-emitting table are made of different materials, so the etching speeds are different, and therefore it is difficult to control the etching size and angle. In view of this, the inventors can avoid the disadvantages of uncontrollable etching rate and angle faced by etching both in one step by etching the transparent conductive layer and the epitaxial layer thereunder in two separate etching steps. Instead, the etching size and etching angle of the transparent conductive layer and the epitaxial layer can be better controlled in the two steps, thereby achieving a better tilt angle, that is, a tilt angle of 55° to 75°, especially 60° to 70°. The tilt angle is difficult to achieve without separate etching.

[0098] (3) The present invention continues to bake the photoresist (e.g., 130°, 10 minutes) after the light-emitting mesa is exposed, which can cause a photoresist collapse near the exposed portion of the photoresist, thereby reducing the verticality of the patterned edge of the photoresist, thereby reducing the inclination angle of the etched light-emitting mesa. BRIEF DESCRIPTION OF THE DRAWINGS

[0099] The present invention will be further described below in conjunction with specific embodiments with reference to the accompanying drawings.

[0100] Figure 1 A first embodiment of a light-emitting mesa according to the present invention is shown;

[0101] Figure 2 A second embodiment of the light-emitting mesa according to the present invention is shown;

[0102] Figure 3 A schematic diagram showing a micro light emitting diode chip having a light emitting mesa according to the present invention; and

[0103] Figures 4A-4G A method of forming a light emitting mesa according to the present invention is shown. DETAILED DESCRIPTION

[0104] It should be noted that the components in the figures may be shown exaggeratedly for the sake of illustration and are not necessarily true to scale. In the figures, identical or functionally identical components are provided with the same reference numerals.

[0105] In the present invention, unless otherwise specified, "arranged on...", "arranged above..." and "arranged above..." do not exclude the existence of an intermediate between the two. In addition, "arranged on or above..." merely indicates the relative positional relationship between two components, and in certain cases, such as after reversing the product direction, it can also be converted into "arranged below or below...", and vice versa.

[0106] In the present invention, each embodiment is only intended to illustrate the aspects of the present invention and should not be construed as limiting.

[0107] In the present invention, unless otherwise specified, the quantifiers "a", "an" and "an" do not exclude the presence of a plurality of elements.

[0108] In the present invention, the term “connected” may refer to both being directly connected or being indirectly connected via an intermediate element.

[0109] In the present invention, the term "configuration" refers to the setting of the shape, structure, material and / or function of the target object to achieve the desired technical effect, wherein "configuration" includes a variety of alternative technical means for achieving the technical effect, which become obvious under the teaching of the present invention.

[0110] It should also be noted that in the embodiments of the present invention, for the sake of clarity and simplicity, only a portion of the parts or components may be shown, but those of ordinary skill in the art will understand that under the teachings of the present invention, the required parts or components may be added according to the needs of the specific scenario. In addition, unless otherwise specified, the features in different embodiments of the present invention may be combined with each other. For example, a feature in the second embodiment may be used to replace a corresponding or functionally identical or similar feature in the first embodiment, and the resulting embodiment also falls within the disclosure scope or recorded scope of the present application.

[0111] It should also be noted that within the scope of the present invention, the terms "same", "equal", "equal to" and the like do not mean that the values ​​of the two are absolutely equal, but allow a certain reasonable error, that is, the terms also cover "substantially the same", "substantially equal", "substantially equal to". By analogy, in the present invention, the terms "perpendicular to", "parallel to" and the like indicating directions also cover the meanings of "substantially perpendicular to" and "substantially parallel to".

[0112] In the present invention, the term "configuration" refers to the setting of the shape, structure, material and / or function of the target object to achieve the desired technical effect, wherein "configuration" includes a variety of alternative technical means for achieving the technical effect, which become obvious under the teaching of the present invention.

[0113] In the present invention, the term "tilt angle of the light-emitting table" refers to the angle between the side surface of the light-emitting table and the bottom surface (e.g., horizontal direction) of the light-emitting table. If the tilt angles of the side surfaces of each layer of the light-emitting table are the same, then the tilt angle is the tilt angle of each layer. If the tilt angles of the side surfaces of each layer are different, then the tilt angle is the average angle value over the total thickness, that is, the sum of all layer thicknesses multiplied by the thickness divided by the total thickness.

[0114] Figure 1 A first embodiment of a light emitting mesa 100 according to the present invention is shown.

[0115] like Figure 1 As shown, the light-emitting mesa 100 according to the present invention includes a transparent conductive layer 101, a first epitaxial layer 102, a light-emitting layer 103 and a second epitaxial layer 104 from top to bottom. Optionally, a marking layer 105 and a temporary substrate 106 are optionally arranged under the light-emitting mesa 100. Here, the transparent electrode layer 101 is at the uppermost side of the light-emitting mesa 100, but since the light-emitting mesa 100 is an inverted trapezoidal structure, it actually corresponds to the bottom of the light-emitting mesa 100, that is, it is facing away from the light-emitting side; the second epitaxial layer 104 is at the lowermost side of the light-emitting mesa 100, but since the light-emitting mesa 100 is an inverted trapezoidal structure, it actually corresponds to the top of the light-emitting mesa 100, that is, it is facing the light-emitting side. In the present invention, the term "light-emitting side" refers to the side where the light emitted by the light-emitting mesa leaves the micro light-emitting diode. For example, the "light-emitting side" may correspond to the side where the microlens of the micro light-emitting diode is located. From Figure 1 It can be seen that the side inclination angle of the light-emitting mesa 100 is α, wherein the side inclination angle α is between 55° and 75°, especially between 60° and 70°, thereby obtaining a better aperture ratio of the micro light-emitting diode chip.

[0116] The inventors have found through research that when the upper area of ​​the inverted trapezoidal light-emitting table is constant, its aperture ratio (aperture ratio refers to the ratio of the actual light-emitting area to the total area of ​​the chip) depends on the inclined plane angle α, that is, the aperture area, that is, the lower side area, depends on the inclined plane angle α (0<α<90°), wherein the smaller the inclined plane angle α, the larger the aperture area, and conversely, the larger the inclined plane angle α, the smaller the aperture area, that is, the closer to the upper side area, when α=90°, the lower side area is equal to the upper side area, and the aperture area is the smallest. However, the inclined plane angle α cannot be infinitely small. When the inclined plane angle α is too small, not only will it place too high a requirement on the process, but also the ratio between the first and second epitaxial layers and the light-emitting layer will be out of balance, affecting the light-emitting efficiency. The inventors also found that when the side tilt angle α is between 55° and 75°, especially between 60° and 70°, the best aperture ratio and the best luminous efficiency can be achieved, and this angle can be achieved by step-by-step etching, wherein step-by-step etching means that the transparent conductive layer 101 and other layers are etched in different steps. Step-by-step etching can achieve the above-mentioned optimal side tilt angle α, because the materials of the first epitaxial layer 102 and the second epitaxial layer 104 are the same, for example, both are gallium nitride or gallium arsenide, and the material of the light-emitting layer 103 is basically the same as the first and second epitaxial layers (for example, gallium nitride or gallium arsenide doped with a small amount of indium, aluminum and other elements), so it can be etched in the same etching step with the first and second epitaxial layers 102 and 104, even if the material of the light-emitting layer 103 is different (for example, aluminum gallium indium phosphide (AlGaInP)), but its thickness is relatively low (for example, a dozen to several dozen tenths) relative to the first and second epitaxial layers, and the influence on the side tilt angle is limited, so it can be etched in the same step with the first and second epitaxial layers. The material of the transparent conductive layer 101 is different from that of the first and second epitaxial layers 102 and 104. If etching is performed in the same etching step, it is difficult to achieve the optimal bevel tilt angle of 55° to 75°, especially 60° to 70°, because the etching speed and etching size of different materials are difficult to control. Therefore, the inventors have achieved the above-mentioned optimal side tilt angle by etching the transparent conductive layer 101 and other epitaxial layers in steps. Specifically, first in the first etching step, for example, the transparent conductive layer is etched using a first etchant using wet etching, and then in the second etching step, the first and second epitaxial layers and the light-emitting layer are etched using a second etchant, thereby achieving the above-mentioned side tilt angle. The first and second etchants may be the same or different, but the etching time can make the etching morphology more controllable in a separate etching step, thereby achieving the above-mentioned side tilt angle.

[0117] The various components of the light-emitting mesa 100 according to the present invention are described below.

[0118] Transparent conductive layer

[0119] The transparent conductive layer 101 is disposed on the side of the light-emitting mesa 100 facing away from the light-emitting side, that is, the side facing the driving circuit. The function of the transparent conductive layer 101 is to electrically connect the first epitaxial layer 102 in the light-emitting mesa 100 to the driving circuit, especially the first electrode, such as the anode. The material of the transparent conductive layer 102 is, for example, a metal oxide, such as indium tin oxide ITO, zinc oxide ZnO, etc., and its formation method includes, for example, physical vapor deposition (PVD), chemical vapor deposition (CVD), sol-gel method, solution coating method, etc. The thickness of the transparent conductive layer 101 is, for example, 1000 Å. Its width is, for example, 1.0um. In the present invention, when the transparent conductive layer 101 is formed above the first epitaxial layer 102, the transparent conductive layer 101 is first etched in a first etching step to form a first inclined edge 100A of the transparent conductive layer 101. Then, in a second etching step, the first epitaxial layer 102, the light-emitting layer 103, and the second epitaxial layer 104 are etched to form a second inclined edge 100B of the entire light-emitting mesa 100. The inclination angle of the first inclined edge 100A can be equal to the inclination angle of the second inclined edge 100B, for example, both are in the range of 55° to 75°, especially 60° to 70°. Alternatively, the inclination angle of the first inclined edge 100A can be larger, for example, greater than 70°, especially greater than 75°, while the second inclined edge 100B can be less than 75°, especially less than 70°. Since the thickness of the transparent conductive layer 101 is much smaller than the sum of the thicknesses of the first epitaxial layer 102, the light-emitting layer 103, and the second epitaxial layer 104, the average value of the inclination angle of the first inclined edge 100A and the second inclined edge 100B on the total height of the light-emitting mesa can still be within the range of 55° to 75°, especially 60° to 70°. In another case, the first inclined edge 100A and the second inclined edge 100B are not equal to each other, but their inclination angles are both within the range of 55° to 75°, especially 60° to 70°. Here, the "inclination angle of the inclined edge" refers to the angle between the inclined edge and the bottom surface of the light-emitting mesa 100 from the cross-sectional view of the light-emitting mesa 100, and the bottom surface direction of the light-emitting mesa 100 can be characterized by the length extension direction of the second epitaxial layer 102, for example. In addition, in this embodiment, the end of the first inclined edge 100A and the end of the second inclined edge 100B are connected to each other, that is, smoothly transitioned. In other embodiments, the end of the first inclined edge 100A and the end of the second inclined edge 100B can also be non-smoothly transitioned, that is, there is a certain distance between the adjacent ends in the horizontal direction, and the distance is less than or equal to 0.2um.

[0120] The etching method of the transparent conductive layer 101 includes but is not limited to: chemical wet etching, ion beam etching, and reactive ion etching. In addition, in one embodiment, after the photoresist is developed, the exposed portion of the photoresist is baked to produce a glue collapse, which will be beneficial to forming a tilted edge in the subsequent etching step. For the specific etching process, please refer to Figure 4 and its description.

[0121] First epitaxial layer, light-emitting layer, second epitaxial layer

[0122] The first epitaxial layer 102 is arranged between the transparent conductive layer 101 and the light emitting layer 103. The light emitting layer 103 is arranged between the first epitaxial layer 102 and the second epitaxial layer 104 and is configured to emit light. The second epitaxial layer 104 is arranged on the side of the light emitting mesa 100 facing the light emitting side, wherein the area of ​​the second epitaxial layer 104 is larger than the area of ​​the first epitaxial layer 102, and the side surface of the light emitting mesa 100 has an inclined surface, and the inclination angle α of the inclined surface is 55° to 75°, preferably 60° to 70°.

[0123] In some embodiments, the light-emitting layer is formed by a plurality of stacked quantum well layers, in particular, quantum well layers stacked in a superlattice. Preferably, the quantum well layers stacked in a superlattice include a plurality of pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first epitaxial layer is a semiconductor material having a first conductivity type and includes a plurality of semiconductor layers. Its main matrix material may be, but is not limited to, Ga, N, As, P, In, or Al. In addition, the first epitaxial layer may include, from top to bottom, but is not limited to, a waveguide layer, a restriction layer, a transition layer, and a window layer; in addition, an ohmic contact layer may be formed below the window layer. In some embodiments, the second epitaxial layer is a semiconductor material having a second conductivity type and includes a plurality of semiconductor layers. The main matrix material of the second epitaxial layer may be, but is not limited to, Ga, N, As, P, In, or Al. In addition, the second epitaxial layer may include, from top to bottom, but is not limited to, a restriction layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer may be formed on the restriction layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0124] In one embodiment, the second epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the first epitaxial layer is a P-type GaN layer or a P-type AlGaN layer, that is, the material of the second epitaxial layer may be a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer may be a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P. In one embodiment, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, and the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. In another embodiment, the first epitaxial layer may also be a P-type GaN layer or a P-type AlGaN layer, and the second epitaxial layer may be an N-type GaN layer or an N-type AlGaN layer.

[0125] In some embodiments, the light emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, wherein x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times greater than y. In some embodiments, the light emitting layer is a multiple quantum well (MQW).

[0126] In an embodiment of the present invention, one of the first epitaxial layer and the second epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer. The material of the N-type cladding layer is Al x In 1-x P, wherein x ranges from 0.1 to 0.5, for example, x is 0.5. In addition, in these embodiments, the thickness of the N-type cladding layer is not greater than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e 17 cm -3 To 1e 18 cm -3 In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer formed on the doped N-type contact layer. The doped N-type contact layer is configured to bond to the bonding layer. The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e 18 cm-3 To 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al x Ga 1-x ) y In 1-y P, wherein x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times greater than y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example 65 nm. In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer.

[0127] In some embodiments, the material of the P-type cladding layer is Al x In 1-x P, wherein x is 0.3 to 0.5, for example, x is 0.5. In such an embodiment, the thickness of the P-type cladding layer is not greater than 380 nm, for example, the thickness of the P-type cladding layer is 360 nm.

[0128] In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example, 20 nm.

[0129] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first doped P-type transition layer formed on the P-type cladding layer, and a second doped P-type transition layer formed on the first doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al x Ga 1-x ) y In 1-y P, wherein x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times greater than y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example 65 nm.

[0130] In some embodiments, the material of the first doped P-type transition layer is (Al x Ga 1-x ) y In 1-yP, wherein x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example 30 nm.

[0131] In some embodiments, the material of the second doped P-type transition layer is Al x Ga 1-x As, wherein x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, for example, 20 nm.

[0132] In some embodiments, the doping concentration of the second doped P-type transition layer is greater than the doping density of the first doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times the doping concentration of the second doped P-type transition layer.

[0133] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second doped P-type transition layer. In addition, in some embodiments, the doping concentration of the second doped P-type transition layer is 2 to 4 times the doping concentration of the first doped P-type transition layer.

[0134] For example, the doping concentration of the first doped P-type transition layer is greater than 1e 18 cm -3 The doping density of the second doped P-type transition layer is 2e 18 cm -3 -4e 18 cm -3 In the range of 5e 18 cm -3 .

[0135] In the present invention, the first epitaxial layer 102, the light emitting layer 103, and the second epitaxial layer 104 are etched in the second etching step after being formed. That is, in the first etching step, the transparent conductive layer 101 is first etched to form the first inclined edge 100A of the transparent conductive layer 101. Then, in the second etching step, the first epitaxial layer 102, the light emitting layer 103, and the second epitaxial layer 104 are etched to form the second inclined edge 100B of the entire light emitting mesa 100. The inclination angle of the first inclined edge 100A can be equal to the inclination angle of the second inclined edge 100B, for example, both are in the range of 55° to 75°, especially 60° to 70°. Alternatively, the inclination angle of the first inclined edge 100A may be larger, for example, greater than 70°, especially greater than 75°, while the second inclined edge 100B may be less than 75°, especially less than 70°. Since the thickness of the transparent conductive layer 101 is much smaller than the sum of the thicknesses of the first epitaxial layer 102, the light-emitting layer 103, and the second epitaxial layer 104 (for example, 1 / 10 or less), the average values ​​of the inclination angle of the first inclined edge 100A and the second inclined edge 100B on the total height of the light-emitting mesa are mainly determined by the inclination angle of the second inclined edge 100B, that is, they can still be within the range of 55° to 75°, especially 60° to 70°. In another case, the first inclined edge 100A and the second inclined edge 100B are not equal to each other, but their inclination angles are both within the range of 55° to 75°, especially 60° to 70°. Here, the “inclination angle of the inclined edge” refers to the angle between the inclined edge and the bottom surface of the light-emitting mesa 100 when viewed from the cross-sectional view of the light-emitting mesa 100. The bottom surface direction of the light-emitting mesa 100 can be characterized by the length extension direction of the second epitaxial layer 102. The side surface of the transparent conductive layer has a first inclined edge 100A, and the side surfaces of the first epitaxial layer 102, the light-emitting layer 103, and the second epitaxial layer 104 have a second inclined edge 100B.

[0136] For example, the first inclined edge 100A of the transparent conductive layer 101 has a first inclined angle X, and the thickness of the transparent conductive layer 101 is d1, and the second inclined edge 100B of the first epitaxial layer 102, the light emitting layer 103, and the second epitaxial layer 104 has a second inclined angle Y, and the first epitaxial layer 102, the light emitting layer 103, and the second epitaxial layer 104 have a thickness d2. Then the average value d of the inclined angle of the light emitting mesa 100 over the entire thickness is:

[0137] d=(X*d1+Y*d2) / (d1+d2).

[0138] Here, d is in the range of 55° to 75°, especially 60° to 70°. That is to say, even if the layers etched in different etching steps have different tilt angles, as long as the average tilt angle d is in the above range, a good aperture ratio can still be guaranteed. For example, X = 85°, Y = 65°, since d1 = d2 / 10, the average tilt angle d = 66.8°.

[0139] In addition, in this embodiment, the end of the first inclined edge 100A and the end of the second inclined edge 100B are connected to each other, that is, smoothly transitioned. In other embodiments, the end of the first inclined edge 100A and the end of the second inclined edge 100B may also be non-smoothly transitioned, that is, there is a certain distance between the adjacent ends in the horizontal direction, and the distance is less than or equal to 0.2um.

[0140] The etching methods of the first epitaxial layer 102, the light emitting layer 103, and the second epitaxial layer 104 include but are not limited to: chemical wet etching, ion beam etching, and reactive ion etching. In addition, in one embodiment, after the photoresist is developed, the exposed part of the photoresist is baked to produce a glue collapse, which will be beneficial to the formation of an inclined edge in the subsequent etching step. For the specific etching process, reference may be made to FIG. 4 and its description.

[0141] from Figure 1 It can be seen that the light-emitting mesa 100 according to the present invention has a good slope angle, and thus has a good opening area. For example, the bottom width of the light-emitting mesa 100 can reach 1.4 to 1.7 μm, preferably 1.6 μm. The depth of the light-emitting mesa 100 can be 0.3 to 0.7 μm, preferably 0.4 to 0.6 μm.

[0142] also, Figure 1 1 and 2 also show a marking layer 105 and a temporary substrate 106. The marking layer 105 is arranged between the second epitaxial layer 104 and the temporary substrate 106. The marking layer 105 is used to mark the position of the second epitaxial layer 106 when removing the temporary substrate 106 to avoid damaging the second epitaxial layer 106. For example, the marking layer 105 can serve as an etching buffer layer or a grinding buffer layer, and its thickness is, for example, The temporary substrate 106 is used for epitaxial growth of the epitaxial layer, i.e., the first epitaxial layer, the light-emitting layer, and the second epitaxial layer, and is used to carry the epitaxial layer and the transparent conductive layer in the subsequent process. The thickness of the temporary substrate 106 can be, for example, 600 to 1000 μm, preferably 800 μm. After the relevant processes are completed, the temporary substrate 106 and the marking layer 105 can be removed, for example, by debonding and grinding, such as CMP to remove the temporary substrate 106, and by etching or grinding, such as CMP to remove the marking layer 105.

[0143] Figure 2A second embodiment of a light emitting mesa 100 according to the present invention is shown.

[0144] Figure 2 The second embodiment of the light emitting platform 100 is shown in FIG. Figure 1 The first embodiment of the light-emitting table 100 shown is substantially the same, with the main difference being that Figure 2 In the second embodiment, the second epitaxial layer 104 of the light-emitting mesa 100 includes two parts, namely, a step portion 104A and a base portion 104B. The step portion 104A is in electrical contact with the light-emitting layer 103, and the base portion 104B extends from the step portion 104A to both sides, that is, extends beyond the step portion 104A. In one embodiment, the thickness of the step portion 104A is The thickness of the base portion 104B is Here, the second inclined edge 100B includes the inclined surface of the first epitaxial layer 102, the light emitting layer 103 and the step portion 104A. The base portion 104B can extend to the adjacent light emitting mesa and be continuously connected to its base portion. In this embodiment, the second epitaxial layer 104 can not only increase its thickness, but also its surface area facing the light emitting side is not limited by the slope, but can extend to the adjacent light emitting mesa, thereby improving the light emitting efficiency.

[0145] Figure 3 A schematic diagram of a micro-LED chip 600 having a light-emitting mesa according to the present invention is shown. In this application scenario, the light-emitting mesa or epitaxial layer of the micro-LED chip 600 has an inverted trapezoidal structure, that is, the light-emitting mesa has a large upper surface and a small lower surface, and the inclination angle of the light-emitting mesa is 55° to 75°, preferably 60° to 70°.

[0146] The various components of the micro-LED chip 600 are described in detail below.

[0147] like Figure 3 As shown, the micro-LED chip 600 according to the present invention comprises an upper stack 600A and a lower stack 600B, wherein the upper stack 600A and the lower stack 600B are hybrid-bonded at the interface A to form a complete micro-LED chip 600. The structures and components of the upper stack 600A and the lower stack 600B are described in detail below.

[0148] Upper layer

[0149] The upper stack 600A includes a first insulating layer 611A, a light emitting mesa 601, a transparent conductive layer 608, a first electrode 604 (cathode), a first via contact 602, a second electrode 610 (anode), a first bonding mark 609A, and a microlens 605. Each component is described below.

[0150] A first insulating layer 611A, which is configured to accommodate at least a portion of the light-emitting mesa 601 and provide electrical insulation therefor. Here, the first electrical insulating layer 611A has a recess 607, which is configured to accommodate the light-emitting layer and the second epitaxial layer of the light-emitting mesa 601 and the auxiliary structure of the light-emitting mesa 601. For a detailed description of the light-emitting mesa 601 and its auxiliary structures (such as the passivation layer 612, the reflector layer 615, etc.), reference can be made to the light-emitting mesa 601 and its description. Here, it should be noted that the recess 607 can be formed after the light-emitting mesa 601, that is, the light-emitting mesa 601 and its auxiliary structures are first formed on the temporary substrate, and then the first insulating layer 611A surrounding them is formed on the light-emitting mesa 601 and its auxiliary structures. The material of the first insulating layer 611A can be, for example, silicon dioxide, silicon nitride, a high dielectric constant material (such as hafnium oxide, aluminum oxide, etc.), etc. The first insulating layer 611A can be formed by thermal oxidation, chemical vapor deposition (CVD), etc. The thickness of the first insulating layer 611A is, for example, 1 to 3 μm, preferably 2 μm, and more preferably 0.6 to 1.4 μm. In addition, the first insulating layer 611A may be planarized at the interface A (eg, by chemical mechanical polishing (CMP)) to facilitate hybrid bonding with the second insulating layer 611B.

[0151] The first insulating layer 611A is transparent to the light emitted from the light emitting mesa 601. In some embodiments, the first insulating layer 611A is made of a dielectric material such as a solid inorganic material or a plastic material. In some embodiments, the solid inorganic material includes silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon nitride (Si3N4), silicon carbonitride (SiCN), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), titanium dioxide (TiO2), zirconium oxide (ZrO2), lanthanum oxide (La2O3), magnesium oxide (MgO), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), or any combination thereof. In some embodiments, the plastic material includes a polymer such as SU-8, PermiNex, benzocyclobutene (BCB), or a transparent plastic (resin) including spin-on glass (SOG), or an adhesive microresist BCL-1200, or any combination thereof. In some embodiments, the first insulating layer 611A can facilitate the passage of light emitted from the light-emitting mesa 601. In some embodiments, the first insulating layer 611A can include multiple parts, such as three embedded dielectric parts and two bonding dielectric parts. The embedded dielectric part refers to the dielectric layer surrounding each light-emitting diode structure; and the bonding dielectric part refers to the dielectric layer between two light-emitting diode structures. The embedded dielectric part and the bonding dielectric part may have the same or different compositions.

[0152] The light-emitting mesa 601 is configured to emit light, wherein the top surface area of ​​the light-emitting mesa 601 is larger than the bottom surface area of ​​the light-emitting mesa 601, and is in an "inverted trapezoidal" shape. The tilt angle of the light-emitting mesa 601 according to the present invention is 55° to 75°, preferably 60° to 70°. The light-emitting mesa 601 includes a first epitaxial layer 601A (which corresponds to Figure 1 The second epitaxial layer 104 in the embodiment of the present invention), the light emitting layer 601B (which corresponds to Figure 1 The light emitting layer 103 in the embodiment of the present invention) and the second epitaxial layer 601C (which corresponds to Figure 1 The first epitaxial layer 601A is arranged at the top of the light-emitting mesa, that is, on the side facing the light-emitting surface, the light-emitting layer 601B is arranged in the recess 607 and arranged between the first epitaxial layer 601A and the second epitaxial layer 601C, and the second epitaxial layer 601C is arranged at the bottom of the light-emitting mesa 601, that is, on the side facing the driving circuit 606. The light-emitting layer 601B, for example, includes a multi-quantum well layer and an electron blocking layer. In one embodiment of the present invention, the first epitaxial layer 601A is an N-type GaN layer or an N-type AlGaN layer, and the second epitaxial layer 601C is a P-type GaN layer or a P-type AlGaN layer, that is, the material of the second epitaxial layer 601C can be a material layer of the second conductivity type including at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer 601A can be a material layer of the first conductivity type including at least two or more elements of Ga, N, As, Al, In, and P. The multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. The electron blocking side is arranged on the first side of the light-emitting layer, and the first side refers to the side along which the electrons migrate out of the light-emitting layer. In another embodiment of the present invention, the first epitaxial layer may also be a P-type GaN layer or a P-type AlGaN layer, and the second epitaxial layer may be an N-type GaN layer or an N-type AlGaN layer. The top width of the light-emitting mesa 601 is, for example, 0.5 to 3 μm, preferably 1.0 to 2.0 μm. The thickness of the first epitaxial layer 601A is, for example, 4000 to 5000 angstroms, the thickness of the light-emitting layer 601B is, for example, 3500 to 4000 angstroms, and the thickness of the second epitaxial layer 601C is, for example, 2500 to 3500 angstroms. 1 angstrom m. from Figure 3It can be seen that the first epitaxial layer 601A is located outside the recess 607, while the light-emitting layer 601B and the second epitaxial layer 601C are located inside the recess 607. In this way, the surface area of ​​the first epitaxial layer 601A is not limited by the opening area of ​​the recess 607, but can be significantly larger than the opening area of ​​the recess 607, thereby significantly increasing the area and thickness of the first epitaxial layer 601A; in addition, since the recess 607 only needs to accommodate the light-emitting layer 601B and the second epitaxial layer 601C, these two layers have a larger area and thickness compared with the structure of the prior art that needs to accommodate three layers, thereby better increasing the area and thickness of the epitaxial layer 601 and improving the light emission. It can also be seen here that the first epitaxial layer 601A passes through the first electrode 604 from below the first electrode 604 (here, the cathode), so that the first epitaxial layers 601A of adjacent light-emitting mesas 601 can be connected to each other, so that in the case of a common cathode structure (i.e., the first epitaxial layers of all micro-LEDs in the same array are connected to a common cathode), the conductivity between the cathode 604 and the first epitaxial layer 601A can be significantly enhanced compared to the case where the cathode 604 is connected only by the transparent conductive layer 608 covering it, thereby increasing its power supply. In addition, the contact cross section between the first epitaxial layer 601A and the cathode 604 at the edge is partially flat and partially inclined. Compared with the vertical surface, the inclined surface increases the contact area between the first epitaxial layer 601A and the cathode 604, thereby increasing the conductivity.

[0153] The light-emitting mesa 601 further includes passivation layers 612 and 613, a reflector layer 615, a bottom transparent conductive layer 618 (corresponding to Figure 1The passivation layer 612 is arranged between the light emitting mesa 601 and the reflector layer 615, and optionally extends on the upper surface of the first insulating layer 611A, while the passivation layer 613 is arranged between the inner wall of the recess 607 and the reflector layer 615, and optionally extends on the upper surface of the first insulating layer 611A. In another embodiment, only one of the passivation layers 612 and 613 extends on the upper surface of the first insulating layer 611A, or both of them do not extend on the upper surface of the first insulating layer 611A, instead, they only extend to the upper surface of the first insulating layer 611A, and the upper surface of the first insulating layer 611A is covered by another insulating layer or a dielectric layer. The role of the passivation layers 612 and 613 is not only to reduce the current leakage at the sidewall, but also to passivate the sidewall defects, and prevent water, oxygen, etc. from damaging the light-emitting mesa during operation, and also to prevent the metal in the reflector layer 615, cathode 604, etc. from diffusing into the first insulating layer 611 or the light-emitting mesa 601. The passivation layers 612 and 613 can be formed by depositing SiO2 material using a CVD process, or by depositing Al2O3 material using an ALD process. The bottom transparent conductive layer 618 is arranged between the second epitaxial layer 601C and the reflector layer 615. The bottom transparent conductive layer 618 is configured to electrically connect the second epitaxial layer 601C of the light-emitting mesa 601 to the reflector layer 615 and then electrically connect to the through-hole contact 602. The material of the bottom transparent conductive layer 618 is, for example, a metal oxide, such as indium tin oxide ITO, zinc oxide ZnO, etc., and its formation method includes, for example, physical vapor deposition (PVD), chemical vapor deposition (CVD), sol-gel method, solution coating method, etc.

[0154] The reflector layer 615 is configured to reflect upward the light from the light emitting mesa 601. To this end, the reflector layer 615 has an inclined surface on the side facing the light emitting mesa 601, and its inclination angle is, for example, the same as the inclination angle of the light emitting mesa, which is 10° to 85°, preferably 30° to 70°, and especially 35° to 50°.

[0155] Here, the reflector layer 615 has a side reflector layer 615A and a bottom reflector layer 615B. The side reflector layer 615 covers at least a portion of the side of the light-emitting mesa 601. Both the side reflector layer 615A and the bottom reflector layer 615B are configured to reflect light from the light-emitting mesa 601 upward, and the bottom reflector layer 615B is also configured to electrically connect the bottom transparent conductive layer 618 to the first through-hole contact 602. In this embodiment, the side reflector layer 615 covers the side of the light-emitting mesa 601 in the recess 607, and the side reflector layer 615 is formed between the passivation layer 612 and the inner wall of the recess 607 of the insulating layer. Due to the presence of the passivation layer 612, the side reflector 615 may or may not have an atomic layer deposition layer on the side facing the light-emitting mesa 601. In the case of having an atomic layer deposition layer, the metal in the reflector layer 615 can be further prevented from penetrating into the light-emitting mesa 601 through the passivation layer 612. The side reflector layer 615A has an inclined surface on the side facing the light-emitting mesa 601 to reflect the light from the light-emitting mesa upward, and its inclination angle is, for example, the same as the inclination angle of the light-emitting mesa 601, which is 10° to 85°, preferably 30° to 70°, and especially 35° to 50°. The bottom reflector layer 615B covers at least a portion of the bottom surface of the light-emitting mesa 601. In this embodiment, the bottom reflector 615B covers the bottom transparent conductive layer 618 of the light-emitting mesa 601. The bottom reflector layer 615B has an atomic layer deposition layer on the side facing the light-emitting mesa 601. The atomic layer deposition layer can block the metal from the reflective metal layer to prevent its diffusion without substantially affecting the reflection of light. For the specific structure of the reflector layer 615, please refer to Figure 1 and Figure 2 and its description.

[0156] The reflector layer from top to bottom (i.e., from facing the light-emitting mesa 601 to facing away from the light-emitting mesa 601), for example, may include an atomic layer deposition layer, a reflective metal layer, a first barrier layer, and a second barrier layer, wherein the upper side of the reflector layer faces the light-emitting mesa or epitaxial layer of the micro-light-emitting diode, and the lower side of the reflector layer faces away from the light-emitting mesa or epitaxial layer of the micro-light-emitting diode or faces toward the bottom transparent conductive layer.

[0157] For example, the stacked structure of the reflector layer 615 is as follows (in order from close to the light-emitting mesa to far away from the light-emitting mesa):

[0158] Atomic layer deposition layer, made of nickel, 5 angstroms thick;

[0159] A reflective metal layer, made of silver and having a thickness of 1000 angstroms;

[0160] The first and second barrier layers are made of titanium and platinum, respectively, and have thicknesses of 200 and 500 angstroms, respectively;

[0161] The second barrier layer is made of titanium and has a thickness of 200 angstroms.

[0162] In addition, the number of layers of the first barrier layer is three.

[0163] The reflector layer 615 can be formed, for example, by evaporation, sputtering, chemical vapor deposition (CVD), etc., wherein the atomic layer deposition layer of the reflector layer 615 is formed by atomic layer deposition. The thickness of the passivation layer 612 between the reflector layer 612 and the light-emitting mesa 601 is 800 to 2000 angstroms, preferably 600 to 1600 angstroms. The thickness of the passivation layer 613 between the reflector layer 615 and the inner wall of the recess 607 is 200 to 800 angstroms, preferably 300 to 600 angstroms.

[0164] In the present invention, the bottom transparent conductive layer 618 (corresponding to Figure 1 The transparent conductive layer 618 in the first epitaxial layer 601A (which corresponds to Figure 1 The second epitaxial layer 104 in the embodiment of the present invention), the light emitting layer 601B (which corresponds to Figure 1 The light emitting layer 103 in the embodiment of the present invention) and the second epitaxial layer 601C (which corresponds to Figure 1 The first epitaxial layer 102 in the embodiment of the present invention is etched with inclined side surfaces in different etching steps. For example, in the first etching step, the top transparent conductive layer 618 is first etched to form a first inclined edge of the transparent conductive layer 618. Then, in the second etching step, the first epitaxial layer 601A, the light emitting layer 601B and the second epitaxial layer 601C are etched to form a second inclined edge of the entire light emitting mesa 601. The inclination angle of the first inclined edge can be equal to the inclination angle of the second inclined edge, for example, both are in the range of 55° to 75°, especially 60° to 70°. Alternatively, the inclination angle of the first inclined edge can be larger, for example, greater than 70°, especially greater than 75°, while the second inclined edge can be less than 75°, especially less than 70°. Since the thickness of the top transparent conductive layer 618 is much smaller than the sum of the thicknesses of the first epitaxial layer 601A, the light-emitting layer 601B, and the second epitaxial layer 601C, the inclination angle of the first inclined edge and the average value of the second inclined edge 100B on the total height of the light-emitting mesa can still be within the range of 55° to 75°, especially 60° to 70°. In another case, the first inclined edge 100A and the second inclined edge 100B are not equal to each other, but their inclination angles are both within the range of 55° to 75°, especially 60° to 70°. The above-mentioned optimized inclination angle setting can increase the surface area of ​​the first epitaxial layer 601A of the micro-light-emitting diode chip, that is, increase the aperture ratio, and at the same time increase the width and area of ​​the light-emitting layer 601B and the second epitaxial layer 601C, thereby increasing the total light emission.

[0165] A top transparent conductive layer 608, which is arranged on the first epitaxial layer 601A and electrically connects the first electrode 604 (cathode) to the first epitaxial layer 601A. Here, the top transparent conductive layer 608 extends on the first epitaxial layer 601A and completely covers the first epitaxial layer 601A, thereby providing a more uniform power supply for the first epitaxial layer 601A. In other embodiments, the top transparent conductive layer 608 may also only partially cover the first epitaxial layer 601A. In addition, the top transparent conductive layer 608 also extends under the first electrode 604, which is the cathode in this case, so that the transparent conductive layer 608 extends continuously on the first epitaxial layer 601A of the adjacent light-emitting mesa 601A, thereby increasing the coverage area of ​​the first epitaxial layer 601A. The material of the top transparent conductive layer 608 is, for example, a metal oxide, such as indium tin oxide ITO, zinc oxide ZnO, etc., and its formation method includes, for example, physical vapor deposition (PVD), chemical vapor deposition (CVD), sol-gel method, solution coating method, etc.

[0166] The first electrode 604, here a cathode, is arranged to surround the light-emitting mesa 604. The cathode 604 and its connecting parts can be made of materials such as metal (such as silver, gold or platinum), graphene, ITO, aluminum-doped zinc oxide (AZO) or fluorine-doped tin oxide (FTO) or any combination of the above materials. In another embodiment of the present invention, the cathode 604 and its connecting parts can be made of non-transparent or transparent conductive materials, such as indium tin oxide (ITO). In a preferred embodiment, the cathode 604 is made of a reflective metal, so that the cathode 604 can reflect light from the light-emitting mesa 601 while optically isolating adjacent light-emitting mesas 601 from each other, for example, reflecting the light upward to the microlens 605, thereby increasing the light output. In another embodiment, a reflective layer, such as a silver layer, can be coated on the surface of the cathode 604 to provide a reflective capability. Here, the surface of the cathode 604 facing the light-emitting mesa 601A is an inclined surface, and is inclined toward both sides (i.e., inclined toward both sides starting from the bottom surface), thereby reflecting the light falling thereon upward, i.e., toward the light-emitting side. In addition, the cathode 604 can be divided into an edge cathode 604A and a middle cathode 604B, wherein the edge cathode 604A is arranged between the second electrode 610 (here, the anode) and the edgemost light-emitting mesa 601, wherein a portion of the edge cathode 604A is arranged on the passivation layer 612, and another portion is arranged on the transparent conductive layer 608, and the middle cathode 604B is arranged between adjacent light-emitting mesas 601, wherein the middle cathode 604B is arranged on the transparent conductive layer 608. In this way, the edge cathode 604A can completely cover the side of the first epitaxial layer 601A and be in electrical contact with it, thereby increasing the electrical contact area between the cathode 604 and the first epitaxial layer 601A.

[0167] A first through-hole contact 602, which is electrically connected to the bottom of the light-emitting mesa 601 and passes through the first insulating layer 611A. The first through-hole contact 602 is used for hybrid bonding with the second through-hole contact 603, and thereby electrically connects the bottom of the light-emitting mesa 601, especially the second epitaxial layer 601C, to the second electrode 610 (here, the anode). The first through-hole contact 602 is preferably a cylindrical through-hole, and the inner wall and / or the middle space are filled with a conductor, such as metal copper. The diameter of the first through-hole contact 602 is 0.3 to 2 μm, preferably 0.6 to 1.4 μm. The first through-hole contact 602 can be planarized at the interface A (for example, by chemical mechanical polishing CMP) to facilitate hybrid bonding with the second through-hole contact 603. In addition, in order to promote the bonding strength between the first through-hole contact 602 and the second through-hole contact 603 and improve the conductivity, a first interface metal layer may be arranged at the first opening of the first through-hole contact 602, and the area of ​​the first interface metal layer is larger than the area of ​​the first opening. Similarly, a second interface metal layer may be arranged at the second opening of the second through-hole contact, and the area of ​​the second interface metal layer is larger than the area of ​​the second opening. The areas of the first interface metal layer and the second interface metal layer may be equal, or the area of ​​the first interface metal layer may be larger than or smaller than the area of ​​the second interface metal layer. When the first interface metal layer and the second interface metal layer 202 are bonded to each other, the bonding surface formed is larger than the bonding surface formed by directly bonding the first opening of the first through-hole contact 602 and the second opening 204 of the second through-hole contact 603, thereby increasing the bonding strength and improving the conductivity between the first through-hole contact 602 and the second through-hole contact 603. The first interface metal layer 201 and the second interface metal layer 202 are made of, for example, a conductive metal, such as copper. The formation method thereof may include, for example, physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, chemical plating, etc. The formation method of the first through-hole contact portion 603 may be, for example, as follows: a light-emitting mesa 601 and a first insulating layer 611A are formed on a temporary substrate, and then the first insulating layer 611A is etched to form a through hole leading to the bottom of the light-emitting mesa 601, and then a metal is deposited in the through hole, and finally the opening of the through hole is planarized to form a bonding surface.

[0168] In addition, the first through-hole contact 602 is used to electrically connect the driving circuit 606 to the bottom (here, the reflector layer 607) of the epitaxial layer 601 (or the light-emitting mesa) of the micro-LED array after bonding with the second through-hole contact 603, thereby connecting the epitaxial layer 601 to the anode 610. Here, a first metal barrier layer 617 is provided between the through-hole contact 602 and the reflector layer 607. The first metal barrier layer 617 can prevent the metal in the first through-hole contact 602 from diffusing into the epitaxial layer 601 or the insulating layer 611A or preventing oxidation thereof through the reflector layer 607 and other layers that may be arranged therebetween (e.g., the bottom transparent electrode layer). If the metal in the first through-hole contact 602 diffuses into the epitaxial layer 601, the light-emitting performance of the epitaxial layer 601 will be affected; if it diffuses into the insulating layer 611A, it will affect the insulating effect of the insulating layer 611A, thereby causing leakage current or even short circuit; if the metal in the through-hole contact 602 is oxidized, it may cause poor contact between the first through-hole contact 602 and the reflector layer 607, or even cause the electrical circuit to the epitaxial layer 601 to be broken. It can be seen that by providing the first through-hole contact 602 according to the present invention, the diffusion of the metal in the first through-hole contact 602 can be better avoided, thereby effectively preventing the risks of reduced light-emitting performance, short circuit, and open circuit of the micro-LED. The combination of the first metal barrier layer 617 and the first and second barrier layers 203 and 204 of the reflector layer can further enhance the metal barrier and anti-oxidation effects.

[0169] The second electrode 610, which is an anode in this case, is electrically connected to the driving circuit 606 through a third through-hole contact 614 that passes through the first insulating layer 611A and the second insulating layer 611B. The anode 610 can be connected to an external power source or a control source, for example, to power or control the micro-LED chip 600. Here, the third through-hole contact 614 can include a plurality of through-hole contacts, so as to connect the second epitaxial layer 601C of the plurality of light-emitting mesas to the anode 610. Here, it is exemplarily shown that the third through-hole contact 614 includes two through-hole contacts, but this is only exemplary, and other numbers of through-hole contacts 614 are also conceivable. The third through-hole contact 614 can be formed either before or after hybrid bonding. If the third through-hole contact 614 is formed before hybrid bonding, the upper and lower parts of the third through-hole contact 614 are first formed in the upper stack 600A and the lower stack 600B, respectively, and then the two are connected through the through-hole contact after hybrid bonding, and then the first insulating layer 611A is etched from above to form the anode 610 on the third through-hole contact 614. If the third through-hole contact 614 is formed after hybrid bonding, the first insulating layer 611A is etched from above to form a through hole leading to the driving circuit 606, and then metal is deposited in the through hole, and then the third through-hole contact 614 is etched to form a recess, and then metal is deposited in the recess to form the anode 610. The anode 610 and its connecting parts can be made of materials such as metal (such as copper, silver or aluminum), graphene, ITO, aluminum-doped zinc oxide (AZO) or fluorine-doped tin oxide (FTO) or any combination of the above materials.

[0170] · A first bonding mark 609A, which is disposed in the first insulating layer 611A and exposes a first mark surface, i.e., an opening of the first bonding mark. The first bonding mark 609A in the upper stack 600A serves as a mark for alignment with the second bonding mark 609B in the lower stack 600B, thereby achieving precise hybrid bonding, wherein the second bonding mark 609B is disposed in the second insulating layer 600B and exposes a second mark surface, i.e., an opening of the second bonding mark. The first bonding mark 609A and the second bonding mark 609B are aligned in such a way that, during hybrid bonding, the first mark surface is aligned and attached to the second mark surface, at which point the upper stack 600A and the lower stack 600B are aligned, and then hybrid bonding can be performed. The first bonding mark 609A and the second bonding mark 609B can be metal vias, and the two can be bonded at the interface. In addition, the first bonding mark 609A and the second bonding mark 609B may have enlarged openings and / or the openings may be coated with a metal layer to facilitate identification of their positions and increase bonding strength.

[0171] A microlens 605 is disposed above the light-emitting mesa 601 to shape the light emitted therefrom, such as converging or collimating. The microlens includes a lens portion 605A and a spacer portion 605B. The lens portion 605A is disposed at the outermost side, i.e., the uppermost side, and is configured to shape the light from the light-emitting mesa 601. The spacer portion 605B is disposed between the lens portion 605A and the light-emitting mesa 601 to adjust the focal position of the lens portion 605A. For example, the focal point of the lens portion 605A can be exactly located in the light-emitting mesa 601 of the micro-LED by adjusting the thickness of the spacer portion 605B and the curvature of the lens portion 605A. The width of the microlens 605 is, for example, 0.8 to 4 μm, preferably 1 to 3 μm. The distance between the lens portion 605A and the cathode 604 is, for example, 0.05 to 4 μm, preferably 0.1 to 0.3 μm. The microlens 605 corresponds to the light-emitting mesa 601 one by one. Meanwhile, in this embodiment, there is a gap between adjacent microlenses 605 and the bottoms thereof are connected to each other. The bottom of the gap is higher than the top of the light-emitting mesa 601, or higher than the bottom of the light-emitting layer 601B of the light-emitting mesa 601, and the lens portion 604A is located above the cathode 604. The microlenses 605 can be formed by multiple depositions. In the process of forming the microlenses, a SiO2 film layer needs to be deposited first, and then ion etching is performed. The microlenses are formed on the surface of the transparent conductive layer 608 at positions corresponding to each light-emitting mesa 601.

[0172] Lower stack

[0173] The lower stack 600B includes a second insulating layer 611B, a second through-hole contact 603, a driving circuit 606, and a second bonding mark 609B. Each component will be described below.

[0174] A second insulating layer 611B is arranged on the driving circuit 606 and is configured to accommodate the second through-hole contact 603. The material of the second insulating layer 611B can be, for example, silicon dioxide, silicon nitride, a high dielectric constant material (such as hafnium oxide, aluminum oxide, etc.), etc. The second insulating layer 611B can be formed on the driving circuit 606 by, for example, thermal oxidation, chemical vapor deposition (CVD), etc. The thickness of the second insulating layer 611B is, for example, 1 to 3 μm, preferably 2 μm, and more preferably 0.6 to 1.4 μm. In addition, the second insulating layer 611B can be planarized at the interface A (for example, by chemical mechanical polishing CMP) to promote hybrid bonding with the first insulating layer 611A.

[0175] The second insulating layer 611B may be transparent to the light emitted from the light emitting mesa 601. In some embodiments, the second insulating layer 611B is made of a dielectric material such as a solid inorganic material or a plastic material. In some embodiments, the solid inorganic material includes silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon nitride (Si3N4), silicon carbonitride (SiCN), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), titanium dioxide (TiO2), zirconium oxide (ZrO2), lanthanum oxide (La2O3), magnesium oxide (MgO), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), or any combination thereof. In some embodiments, the plastic material includes a polymer such as SU-8, PermiNex, benzocyclobutene (BCB), or a transparent plastic (resin) including spin-on glass (SOG), or an adhesive microresist BCL-1200, or any combination thereof. In some embodiments, the second insulating layer 611B can facilitate the passage of light emitted from the light-emitting mesa 601. In some embodiments, the second insulating layer 611B can include multiple parts, such as three embedded dielectric parts and two bonding dielectric parts. The embedded dielectric part refers to the dielectric layer surrounding each light-emitting diode structure; and the bonding dielectric part refers to the dielectric layer between two light-emitting diode structures. The embedded dielectric part and the bonding dielectric part may have the same or different compositions.

[0176] A second via contact 603, which passes through the second insulating layer 611B. The second via contact 603 is configured to be hybrid bonded with the first via contact 602 at the interface A, and thereby electrically connects the bottom of the light-emitting mesa 601, especially the second epitaxial layer 601C, to the second electrode 610 (here, the anode). The second via contact 603 is preferably a cylindrical through-hole, and the inner wall and / or the intermediate space are filled with a conductor, such as metal copper. The diameter of the second via contact 603 is 0.5 to 2.2 μm, preferably 0.8 to 1.6 μm. The second via contact 603 can be planarized at the interface A (for example, by chemical mechanical polishing CMP) to promote hybrid bonding with the first via contact 602. In addition, in order to promote the bonding strength between the second via contact 603 and the first via contact 602 and improve the conductivity, a second interface metal layer can be arranged at the second opening of the second via contact 603, and the area of ​​the second interface metal layer is larger than the area of ​​the second opening. Similarly, a first interface metal layer may be arranged at the first opening of the first through-hole contact 602, and the area of ​​the first interface metal layer is larger than the area of ​​the first opening. The areas of the first interface metal layer and the second interface metal layer may be equal, or the area of ​​the first interface metal layer may be larger than or smaller than the area of ​​the second interface metal layer. After the first interface metal layer and the second interface metal layer are bonded to each other, the bonding surface formed is larger than the bonding surface formed by directly bonding the first opening of the first through-hole contact 602 and the second opening of the second through-hole contact 603, thereby increasing the bonding strength and improving the conductivity between the first through-hole contact 602 and the second through-hole contact 603. The first interface metal layer and the second interface metal layer are, for example, made of a conductive metal, such as copper. The formation method thereof may, for example, include physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, chemical plating, and the like. The second through-hole contact portion 603 may be formed, for example, as follows: providing a driving circuit 606, then forming a second insulating layer 611B on the driving circuit 606, then etching the second insulating layer 611B to form a through hole leading to the top of the driving circuit 606, then depositing metal in the through hole, and finally flattening the opening of the through hole to form a bonding surface.

[0177] In addition, the second through-hole contact 603 is used to electrically connect the driving circuit 606 to the bottom (here, the reflector layer 607) of the epitaxial layer 601 (or the light-emitting mesa) of the micro-LED array after bonding with the first through-hole contact 603, thereby connecting the epitaxial layer 601 to the anode 610. Here, a first metal barrier layer 617 is provided between the second through-hole contact 603 and the driving circuit 607. The first metal barrier layer 617 can prevent the metal in the second through-hole contact 603 from diffusing into the driving circuit 606 or the insulating layer 611B or preventing it from being oxidized. If the metal in the second through-hole contact 602 diffuses into the driving circuit 606, the electrical performance of the driving circuit will be affected, such as a short circuit; if it diffuses into the insulating layer 611B, it will affect the insulating effect of the insulating layer 611B, thereby causing leakage current or even a short circuit; if the metal in the second through-hole contact 603 is oxidized, it may cause poor contact between the second through-hole contact 603 and the driving circuit 606, or even cause the electrical line to the driving circuit 606 to be broken. It can be seen that by providing the second through-hole contact 603 according to the present invention, the diffusion of the metal in the second through-hole contact 603 can be better avoided, thereby effectively preventing the risks of short circuit, open circuit, etc. of the driving circuit 606. The combination of the first metal barrier layer 617 and the first and second barrier layers 203 and 204 of the reflector layer can further enhance the metal barrier and anti-oxidation effects.

[0178] A driving circuit 606, which is electrically connected to the second through-hole contact 603 so as to electrically connect the second epitaxial layer 601C of the light-emitting mesa 601 to the anode 610. To this end, the driving circuit 606 has a conductive wiring layer for interconnecting each second through-hole contact 603 to the corresponding anode 610. The driving circuit 606 can be, for example, a thin film transistor TFT driving circuit, and can include a 2T1C driving circuit, a 3T1C driving circuit, and a 5T2C driving circuit. The driving circuit 606 is configured to drive the micro light-emitting diode, for example, to control the connection, disconnection and brightness of the micro light-emitting diode. The driving circuit 606 can include, for example, a transistor, a capacitor, a conductive wiring layer, an insulating layer, and a metal layer. The conductive wiring layer is formed on the substrate and is configured to supply power to the micro light-emitting diode array. The insulating layer is formed on the conductive wiring layer, wherein the insulating layer is provided with a through hole, and the through hole is provided with a through hole contact (such as an IC copper column) for electrically connecting the conductive wiring layer to the micro light-emitting diode array. The metal layer is used for bonding and electrically contacting the micro light-emitting diode. The conductive line layer, the metal layer and the insulating layer may have been formed on the substrate 601 by deposition, such as physical vapor deposition (PVD) and chemical vapor deposition (CVD).

[0179] A second bonding mark 609B, which is disposed in the second insulating layer 611B and exposes a second mark surface, i.e., an opening of the second bonding mark. The second bonding mark 609B in the lower stack 600B serves as a mark for alignment with the first bonding mark 609A in the upper stack 600A, thereby achieving precise hybrid bonding. The alignment method of the first bonding mark 609A and the second bonding mark 609B is that during hybrid bonding, the first mark surface is aligned and attached to the second mark surface. At this time, the upper stack 600A and the lower stack 600B have been aligned, and then hybrid bonding can be performed. The first bonding mark 609A and the second bonding mark 609B can be metal through holes, and the two can be bonded at the interface. In addition, the first bonding mark 609A and the second bonding mark 609B can have an enlarged opening and / or a metal layer can be coated at the opening to facilitate identification of their positions and increase bonding strength.

[0180] After the lower stack 600A and the upper stack 600B are formed, the lower stack 600A is bonded to the upper stack 600A by hybrid bonding, so that the first through hole contact 602 is bonded to the second through hole contact 603, and the first insulating layer 611A is bonded to the second insulating layer 611B, and optionally the first bonding mark 609A is bonded to the second bonding mark 609B, and the upper and lower parts of the third through hole between the preliminary 614 are bonded to each other. The present invention solves the technical problem encountered when manufacturing an inverted trapezoidal light-emitting mesa with a large upper surface and a small lower surface, that is, the problem of electrical connection between the light-emitting mesa and the driving circuit, by separately manufacturing the upper stack 600A and the lower stack 600B and then bonding the two to each other by hybrid bonding. The present invention realizes the electrical connection from the light-emitting table 601 to the driving circuit 606 through hybrid bonding, so that both the upper stack 600A and the lower stack 600B can be manufactured from the surface opposite to the hybrid bonding surface, that is, the interface A, toward the hybrid bonding surface, thereby realizing a high-quality conductive structure, such as the first to third through-hole contacts (such as IC copper pillars), and the length of the conductive structure can also be flexibly selected.

[0181] An example of a hybrid bond may include the following two parts:

[0182] (1) Dielectric-to-dielectric bonding (i.e., bonding between the first insulating layer 611A and the second insulating layer 611B): At room temperature, extremely flat and smooth dielectric surfaces obtained by chemical mechanical polishing (CMP) are activated by plasma treatment or other methods and then brought into close contact at room temperature to achieve preliminary bonding.

[0183] (2) Metal-to-metal bonding (i.e., bonding between through-hole contacts): After completing dielectric-to-dielectric bonding, the upper and lower layers are heated to 200-400°C for annealing to strengthen the dielectric bonding and promote metal-to-metal bonding, thereby achieving hybrid bonding.

[0184] Figures 4A-4G A method of forming a light emitting mesa according to the present invention is shown.

[0185] like Figure 4A As shown, in step S1, an epitaxial wafer is provided, wherein the epitaxial wafer includes a transparent conductive layer 101, a first epitaxial layer 102, a light emitting layer 103 and a second epitaxial layer 104 stacked on each other.

[0186] like Figure 4B As shown, in step S2, a photoresist 400 is applied on the epitaxial wafer. After the application of the photoresist, soft baking can be performed, which is a step of heating the photoresist at a certain temperature (usually 80-120 degrees Celsius). The main purpose of soft baking is to remove the solvent components in the photoresist, solidify the photoresist, and enhance the adhesion between the photoresist and the epitaxial wafer. At the same time, it can also reduce the exposure time error of the photoresist in the subsequent exposure process.

[0187] like Figure 4C As shown, in step S3, the photoresist 400 is exposed and developed. The exposure process is, for example, as follows: by using a photolithography machine, the pattern on the designed mask is transferred to the photoresist. The mask is a transparent or translucent template with a specific pattern, and the pattern part can, for example, transmit light. Depending on the type of photolithography machine, the exposure method is mainly divided into optical exposure (such as ultraviolet light exposure, deep ultraviolet light exposure, etc.) and electron beam exposure. The principle of optical exposure is to use ultraviolet light and other light to irradiate the photoresist through the mask, so that the photoresist undergoes chemical changes in the illuminated area. Electron beam exposure uses an electron beam to irradiate the photoresist. The exposed photoresist is then developed. The developer is a chemical solution that can dissolve the photoresist. For positive photoresist, the developer will dissolve the photoresist in the exposed area; for negative photoresist, the developer will dissolve the photoresist in the unexposed area. The development method is as follows: the substrate with the exposed photoresist is immersed in a developer for a certain period of time (generally ranging from tens of seconds to several minutes), or a spray development is used to make the developer act evenly on the surface of the photoresist. After development, a structure corresponding to the mask pattern is formed on the photoresist. Here, after development, for example, the part to be etched on the epitaxial wafer is exposed, that is, the exposed part A is generated.

[0188] like Figure 4DAs shown, in step S4, the photoresist 400 is baked to produce a glue collapse B at the exposure part A. The baking temperature is, for example, 120°C to 140°C, preferably 130°C, and the baking time is 8 to 12 minutes, preferably 10 minutes. The reason for the generation of the glue collapse B is, for example, as follows: the photoresist at the edge of the exposure part A gradually collapses toward the center under baking to form a collapse B, and the collapse B becomes thinner toward the center of the exposure part A, thereby forming a smooth edge of the exposure part A, thereby improving the subsequent etching angle. The structural feature caused by the generation of the glue collapse is, for example, that the side tilt angle of the transparent conductive layer 101 and the side tilt angle of the first epitaxial layer 102 can be significantly reduced, for example, both are lower than 70°. When the above temperature and baking time are used, the side tilt angle of the transparent conductive layer 101 and the side tilt angle of the first epitaxial layer 102 can be further reduced, for example, both are lower than 65°.

[0189] like Figure 4E As shown, in step S5, the transparent conductive layer 101 is etched in the first etching step to expose the first epitaxial layer 102, wherein the first epitaxial layer 102 is not etched in the first etching step. Here, the edge of the transparent conductive layer 101 is etched to form a first inclined edge 100A. The first inclined edge 100A has a first inclined angle X. The structural feature caused by the step-by-step etching can be reflected, for example, in that the side inclination angle of the transparent conductive layer 101 is not equal to the side inclination angle of the first epitaxial layer 102.

[0190] like Figure 4F As shown, in step S6, in a second etching step after the first etching step, the first epitaxial layer 102, the light emitting layer 103, and the second epitaxial layer 104 are etched to form a second inclined edge 100B at the side of the light emitting mesa, and the second inclined edge 100B has a second inclined angle Y, wherein the second inclined angle Y may be the same as the first inclined angle X, or different from the first inclined angle X. In this embodiment, the second inclined angle Y is less than the first inclined angle X, wherein the first inclined angle X is greater than 70°, which is 80°, and the second inclined angle Y is less than 70°, which is 65°.

[0191] The second inclination angle Y and the first inclination angle X satisfy the following relationship:

[0192] d=(X*d1+Y*d2) / (d1+d2);

[0193] 55°≤d≤75°, especially 60°≤d≤70°,

[0194] Where X is the tilt angle of the first tilted edge 100A, Y is the tilt angle of the second tilted edge 100B of the first epitaxial layer 102, the light emitting layer 103 and the second epitaxial layer 104, d1 is the thickness of the transparent conductive layer 101, d2 is the thickness d2 of the first epitaxial layer 102, the light emitting layer 103 and the second epitaxial layer 104, and d is the average tilt angle d of the light emitting mesa 100 over the entire thickness. According to the above formula, in this embodiment, d1=d2 / 15, d=65.9°.

[0195] Finally, if Figure 4G As shown, in step S7, the photoresist is removed.

[0196] Here, the light-emitting mesa formed according to the present invention has an optimized tilt angle, so that the opening area can be increased, thereby improving the aperture ratio of the micro light-emitting diode.

[0197] Although some embodiments of the present invention have been described in this application document, it will be appreciated by those skilled in the art that these embodiments are merely shown as examples. Those skilled in the art may conceive of numerous variations, alternatives, and improvements under the teachings of the present invention without departing from the scope of the present invention. The appended claims are intended to define the scope of the present invention and thus cover methods and structures within the scope of these claims themselves and their equivalents.

Claims

1. A light-emitting table for a micro light-emitting diode, comprising: A transparent conductive layer, which is arranged on a side of the light-emitting surface facing away from the light-emitting side; a first epitaxial layer disposed between the transparent conductive layer and the light emitting layer; a light emitting layer disposed between the first epitaxial layer and the second epitaxial layer and configured to emit light; as well as The second epitaxial layer is arranged on the side of the light-emitting mesa facing the light-emitting side, wherein the area of ​​the second epitaxial layer is larger than that of the first epitaxial layer, and the side surface of the light-emitting mesa has an inclined surface with an inclination angle of 55° to 75°. 2 . The light emitting mesa according to claim 1 , wherein the side surface of the transparent conductive layer has a first slope, and the first epitaxial layer has a second slope, wherein the first slope is not equal to the second slope. 3 . The light-emitting mesa according to claim 1 , wherein the inclined surface has an inclination angle of 60° to 70°. 4 . The light-emitting mesa according to claim 3 , wherein the side surfaces of the second epitaxial layer and the light-emitting layer have a second slope, wherein the inclination angles corresponding to the first slope and the second slope are both less than or equal to 70°. 5 . The light-emitting mesa according to claim 4 , wherein the inclination angles corresponding to the first slope and the second slope are both less than or equal to 65°.

6. The light-emitting table according to claim 1, further comprising: A temporary substrate is in contact with the second epitaxial layer.

7. The light-emitting table according to claim 6, further comprising: A marking layer is disposed between the temporary substrate and the second epitaxial layer.

8. The light-emitting table according to claim 7, wherein: The temporary substrate has a thickness of 600 to 1000 μm; and / or The thickness of the marking layer is 4.4 um to 5 um.

9. The light-emitting mesa according to claim 7, wherein the material of the marking layer is selected from the group consisting of: AlN, which has a thickness of 150 to 200 nm; AlGaN, which has a thickness of 300 to 400 nm; U-GaN, which has a thickness of 2300 to 2800 nm; N-GaN, which has a thickness of 1000 to 1200 nm; MQW having a thickness of 200 to 400 nm; and P-GaN, the thickness of which is 100 to 200 nm. 10 . The light emitting mesa according to claim 1 , wherein a larger width at both ends of the inclined surface of the light emitting mesa is 1.4 to 1.7 μm. 11 . The light-emitting mesa according to claim 1 , wherein a depth of the light-emitting mesa is 0.3 to 0.7 μm.

12. The light emitting mesa according to claim 1, wherein the second epitaxial layer comprises: a stepped portion in electrical contact with the light emitting layer; as well as The base portion extends from the step portion to both sides. The light-emitting mesa according to claim 12 , wherein base portions of adjacent light-emitting mesas are connected to each other.

14. The light-emitting tabletop according to claim 12, wherein: The thickness of the step portion is: 400nm to 800nm; and / or The thickness of the base portion is 4 to 4.4 um.

15. The light-emitting tabletop according to claim 1, wherein: The thickness of the transparent conductive layer is: 600 to 150 nm; and / or The thickness of the first epitaxial layer is: 80 to 120 nm; and / or The thickness of the light-emitting layer is: 280 to 400 nm; and / or The thickness of the second epitaxial layer is 180 to 220 nm.

16. The micro light emitting diode chip according to claim 1, wherein the side surface of the transparent conductive layer has a first inclined edge, and the side surfaces of the first epitaxial layer, the light emitting layer, and the second epitaxial layer have a second inclined surface, wherein: An end portion of the first inclined edge and an end portion of the second inclined surface are connected to each other; or A distance between an end of the first inclined edge and an end of the second inclined surface in the horizontal direction is less than or equal to 200 nm.

17. The micro-LED chip according to claim 16, wherein the first inclined edge has a first inclined angle X, and the second inclined surface has a second inclined angle X, wherein the first inclined angle X and the second inclined angle satisfy the following relationship: d=(X*d1+Y*d2) / (d1+d2); 60°≤d≤70°， Wherein d1 is the thickness of the transparent conductive layer, d2 is the sum of the thicknesses of the first epitaxial layer, the light-emitting layer, and the second epitaxial layer, and d is the average value of the tilt angle of the light-emitting mesa over the entire thickness.

18. The light-emitting mesa according to claim 1, wherein the material of the transparent conductive layer is selected from the group consisting of: Indium tin oxide, zinc oxide, and cadmium tin oxide.

19. The light-emitting mesa according to claim 1, wherein the material of the second epitaxial layer is a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer is a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, wherein the first conductivity type is different from the second conductivity type.

20. The light-emitting mesa according to claim 1, wherein the light-emitting layer comprises a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, an InGaAs / AlGaAs multi-quantum well layer, or an AlGaInP multi-quantum well layer. 21 . The micro light emitting diode chip according to claim 1 , wherein an electron blocking layer is disposed on a first side of the light emitting layer, the first side being a side along which electrons migrate out of the light emitting layer.

22. A micro light emitting diode chip, comprising: The light-emitting tabletop according to claim 1; an insulating layer accommodating the light-emitting mesa and the through-hole contact; A driving circuit, a metal layer is provided on its surface, a plurality of through-hole contacts are provided on the driving circuit, the through-hole contacts are electrically connected to the metal layer, the micro-LED array area is bonded to the driving circuit through a bottom conductive bonding layer, wherein the driving circuit further has a wiring stack under the metal layer, which leads to a first electrode; a first electrode electrically connected to the through-hole contact portion; a passivation layer covering at least a portion of a side surface of the light-emitting mesa; a top transparent conductive layer, which is located on the surface of the passivation layer and is in electrical contact with the second epitaxial layer; as well as The second electrode is located on the surface of the transparent conductive layer. 23 . The micro-LED chip according to claim 22 , wherein the second electrode is a ring-shaped reflective electrode, which is arranged around the light-emitting mesa.

24. The micro light emitting diode chip according to claim 22, wherein the polarity of the second electrode is opposite to that of the first electrode.

25. A micro-light emitting diode chip according to claim 22, wherein the material of the second epitaxial layer is a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer is a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, wherein the first conductivity type is different from the second conductivity type.

26. The micro-LED chip according to claim 22, wherein the light-emitting layer comprises a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, an InGaAs / AlGaAs multi-quantum well layer, or an AlGaInP multi-quantum well layer.

27. The micro light emitting diode chip according to claim 26, wherein an electron blocking layer is disposed on a first side of the light emitting layer, the first side being a side of the light emitting layer pointing in the same direction or the opposite direction of light.

28. The micro light emitting diode chip according to claim 22, wherein the material of the passivation layer is Si3N4 film, SiO2 film or Al2O3 film.

29. A bare chip wafer according to claim 22, wherein the material of the substrate is selected from the group consisting of: silicon (Si), silicon dioxide (SiO2), silicon nitride (Si3N4), silicon carbide (SiC), gallium nitride (GaN), glass, aluminum nitride (AlN), sapphire (α-Al2O3), and germanium (Ge).

30. The micro-LED chip according to claim 22, wherein: The material of the insulating layer is selected from the group consisting of silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon nitride (Si3N4), silicon carbonitride (SiCN), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), titanium dioxide (TiO2), zirconium oxide (ZrO2), lanthanum oxide (La2O3), magnesium oxide (MgO), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), or any combination thereof; and / or The material of the metal layer is selected from the group consisting of aluminum (Al), copper (Cu), tungsten (W), silver (Ag), gold (Au), nickel (Ni), platinum (Pt), tantalum (Ta), and molybdenum (Mo).

31. A micro-light emitting diode chip according to claim 22, wherein the through-hole contact portion includes a first and a second through-hole contact portion, and the insulating layer includes a first and a second insulating layer, and the micro-light emitting diode chip includes an upper stack and a lower stack, wherein the upper stack includes a first insulating layer, a light-emitting table and a first through-hole contact portion, and the lower stack includes a second insulating layer, a second through-hole contact portion and a driving circuit, wherein the lower stack is joined to the upper stack by hybrid bonding, so that the first through-hole contact portion is bonded to the second through-hole contact portion, and the first insulating layer is bonded to the second insulating layer.

32. A method of forming a light-emitting mesa, comprising: providing a temporary substrate; forming an epitaxial layer on the temporary substrate, the epitaxial layer comprising a second epitaxial layer in contact with the temporary substrate, a light emitting layer arranged on the second epitaxial layer, and a first epitaxial layer arranged on the light emitting layer; forming a transparent conductive layer on the epitaxial layer; etching the transparent conductive layer in a first etching step to expose the first epitaxial layer, wherein the first epitaxial layer is not etched in the first etching step; and In a second etching step after the first etching step, the first epitaxial layer, the light emitting layer and the second epitaxial layer are etched to form an inclined surface at a side surface of the light emitting mesa, wherein the inclined surface has an inclination angle of 55° to 75°.

33. The method of claim 32, wherein the second etching step comprises: Applying photoresist on the transparent conductive layer and the exposed first epitaxial layer; exposing the photoresist to form an exposure portion on the periphery of the transparent conductive layer; Baking the photoresist to produce a resist collapse at the exposed portion; developing and washing the photoresist to pattern the photoresist; as well as The first epitaxial layer, the light emitting layer and the second epitaxial layer are etched by patterned photoresist to form a light emitting mesa.

34. The method according to claim 33, wherein the baking temperature is 120°C to 140°C, and the baking time is 8 to 12 minutes.

35. The method of claim 32, wherein the etching comprises one or more of: chemical wet etching, ion beam etching, and reactive ion etching.

36. The method according to claim 33, wherein etching the first epitaxial layer, the light emitting layer and the second epitaxial layer through a patterned photoresist to form a light emitting mesa comprises: Etching through the first epitaxial layer to expose the light emitting layer; Etching through the light emitting layer to expose the second epitaxial layer; as well as The etching penetrates only a portion of the second epitaxial layer.

37. The method according to claim 32, further comprising the steps of: A marking layer is formed between the temporary substrate and the epitaxial layer.

38. The method according to claim 32, further comprising the steps of: The temporary substrate is removed by debonding or grinding.

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