Chip structure capable of improving lighting effect

Abstract

The invention relates to a chip structure for improving light efficiency. The chip structure comprises a light-emitting device composed of a first semiconductor layer, a second semiconductor layer and an active layer. The active layer is located between the first semiconductor layer and the second semiconductor layer; the first recess penetrates through the second semiconductor layer and the active layer and extends to the interior of the first semiconductor layer and the second recesses on the two sides, the first recess is located in the first area, and the second recesses are located in the second area; the second reflecting layer is mostly in contact with the surface of the second insulating layer and is electrically connected with the first semiconductor layer, and the second reflecting layer is filled in the first recess and partially covers the second recess; covering a second reflecting layer in a region which is not covered by the first reflecting layer in the first region; and the second reflecting layer covers the surface of the second insulating layer in the second region. According to the invention, a double-reflecting-layer structural design is adopted, and a new reflecting layer is introduced into the non-light-emitting area, so that the non-light-emitting area also has a reflecting effect, and the light-emitting efficiency of the whole device can be further improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor light emitting diodes, and in particular to a chip structure for improving light efficiency. Background Art

[0002] The existing light-emitting device is composed of a first semiconductor layer, a second semiconductor layer and an active layer. The photons emitted by the active layer are emitted with equal probability in all directions. The known structure has a reflective layer in the light-emitting area, but no reflective layer in other areas, so that the non-light-emitting area has no reflective effect. Therefore, the luminous efficiency of the light-emitting device is general. Therefore, the present invention proposes a chip structure for improving the luminous efficiency, introduces a new reflective layer in the non-light-emitting area, so that the non-light-emitting area also has a reflective effect, thereby improving the luminous efficiency of the entire device. Summary of the invention

[0003] Based on the technical problems existing in the background technology, the present invention proposes a chip structure for improving the light efficiency, introducing a new reflective layer in the non-luminous area so that the non-luminous area also has a reflective effect, thereby improving the light-emitting efficiency of the entire device.

[0004] A chip structure for improving light efficiency proposed in the present invention comprises a light-emitting device composed of a first semiconductor layer, a second semiconductor layer and an active layer; the active layer is located between the first semiconductor layer and the second semiconductor layer; a first depression penetrating the second semiconductor layer and the active layer and extending to the inside of the first semiconductor layer and second depressions on both sides, wherein the first depression is located in a first area and the second depression is located in a second area; the first area is a light-emitting area and the second area is a non-light-emitting area; a second reflective layer that is mostly in contact with a surface of a second insulating layer and forms an electrical connection with the first semiconductor layer, the second reflective layer fills the first depression and partially covers the second depression; the area in the first area not covered by the first reflective layer is covered with the second reflective layer; and the second reflective layer in the second area covers the surface of the second insulating layer.

[0005] Preferably, a first conductive layer forms an ohmic contact with the second semiconductor layer, a first reflective layer forms an electrical connection with the first conductive layer, a second conductive layer forms an electrical connection with the first reflective layer, a third conductive layer forms an electrical connection with the second conductive layer, the third conductive layer is covered with a third insulating layer, the third conductive layer is separated by the third insulating layer into a third conductive layer on the left, a third conductive layer in the middle and a third conductive layer on the right, a second pad forms an electrical connection with the third conductive layer in the middle, and the first conductive layer, the first reflective layer, the second conductive layer, the third conductive layer and the second pad together constitute a first electrical connection layer.

[0006] Preferably, the third conductive layer on the left side covers the surface of the second reflective layer and partially contacts the surface of the second insulating layer and is electrically connected to the first semiconductor layer, and the third conductive layer on the left side and the first pad together constitute a second electrical connection layer.

[0007] Preferably, a first insulating layer covers part of the surface of the second semiconductor layer, part of the surface of the first conductive layer, the first recess sidewall and the second recess sidewall, and a second insulating layer covers part of the surface of the second conductive layer, part of the surface of the first insulating layer and one side of the first electrical connection layer.

[0008] Preferably, the third insulating layer covers most of the surface of the third conductive layer and isolates the first electrical connection layer and the second electrical connection layer from being directly connected.

[0009] Preferably, the reflectivity of the first reflective layer is higher than that of the second reflective layer, and the reflectivity of the second reflective layer is higher than that of the third conductive layer.

[0010] Preferably, the second reflective layer is a multi-metal structural material with high reflectivity and high activity; the third conductive layer is a multi-metal structural material with low activity; the reflectivity of the second reflective layer is higher than that of the third conductive layer, the reflectivity of the second reflective layer is higher than 90%, and the reflectivity of the third conductive layer 7 is approximately 85%~88%.

[0011] Preferably, the second reflective layer and the third conductive layer have different potentials, wherein the potential difference between the second reflective layer and the first semiconductor layer is smaller than the potential difference between the third conductive layer and the first semiconductor layer.

[0012] Preferably, the first reflective layer is a multi-layer structure.

[0013] Preferably, the first pad, the second pad, the second conductive layer and the third conductive layer are a multi-layer metal structure.

[0014] The beneficial effects of the present invention are: introducing a new second reflective layer in the non-luminous area, so that the non-luminous area also has a reflective effect, thereby improving the luminous efficiency of the entire device. A double reflective layer structure design is adopted: in the luminous area, the area not covered by the first reflective layer must be covered by the second reflective layer; in the non-luminous area, the second reflective layer is introduced, so that the non-luminous area also has a reflective effect, thereby improving the reflective effect of the entire chip.

[0015] The second reflective layer and the third conductive layer have different potentials, wherein the potential difference between the second reflective layer and the first semiconductor layer is smaller than the potential difference between the third conductive layer and the first semiconductor layer. The design of the second reflective layer can reduce chip resistance and improve the electrical performance of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 The schematic diagram of the structure of a chip for improving light efficiency proposed by the present invention.

[0017] Figure 2 It is a schematic diagram of the positions of the recessed and luminous areas of the present invention.

[0018] Figure 3 It is a structural schematic diagram of a comparative example.

[0019] Figure 4 This is a comparison diagram of the light effects of the present invention and the comparative example.

[0020] In the figure: 1. first semiconductor layer, 2. second semiconductor layer, 3. active layer, 4. first conductive layer, 5. first reflective layer, 6. second reflective layer, 7. third conductive layer, 8. second conductive layer, 9. first pad, 10. first insulating layer, 11. second insulating layer, 12. third insulating layer, 13. first recess, 14. second recess, 15. first region, 16. second region, 17. second pad. DETAILED DESCRIPTION

[0021] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0022] Reference Figure 1-2 A chip structure for improving light efficiency includes a light-emitting device composed of a first semiconductor layer 1, a second semiconductor layer 2 and an active layer 3; the active layer 3 is located between the first semiconductor layer 1 and the second semiconductor layer 2; and the first semiconductor layer 1 is arranged on a substrate.

[0023] A first conductive layer 4 forming an ohmic contact with the second semiconductor layer 2, a first reflective layer 5 forming an electrical connection with the first conductive layer 4, a second conductive layer 8 forming an electrical connection with the first reflective layer 5, and a third conductive layer 7 forming an electrical connection with the second conductive layer 8, wherein the third conductive layer 7 is covered with a third insulating layer 12, wherein the third conductive layer 7 is blocked by the third insulating layer 12 to form three sections, namely, the third conductive layer 7 on the left, the third conductive layer 7 in the middle, and the third conductive layer 7 on the right; A second pad 17 electrically connected to the third conductive layer 7 in the middle, the first conductive layer 4, the first reflective layer 5, the second conductive layer 8, the third conductive layer 7, and the second pad 17 together constitute a first electrical connection layer; the first reflective layer 5 is a multi-layer structure, and the second pad 17 and the second conductive layer 8 are a multi-layer metal structure; A first recess 13 that penetrates the second semiconductor layer 2 and the active layer 3 and extends to the inside of the first semiconductor layer 1 and second recesses 14 on both sides, wherein the first recess 13 is located in a first region 15 and the second recess 14 is located in a second region 16; the first region 15 is a light-emitting region and the second region 16 is a non-light-emitting region; Figure 2 In the figure, the two red dotted boxes in the middle are the first recess 13, the red dotted boxes on both sides are the second recess 14, the blue solid box in the middle is the first area 15, and the purple solid boxes on both sides are the second area 16.

[0024] A first insulating layer 10 covering a portion of the surface of the second semiconductor layer 2, a portion of the surface of the first conductive layer 4, a sidewall of the first recess 13 and a sidewall of the second recess 14; and a second insulating layer 11 covering a portion of the surface of the second conductive layer 8, a portion of the surface of the first insulating layer 10 and one side of the first electrical connection layer; A second reflective layer 6 that is mostly in contact with the surface of the second insulating layer 11 and is electrically connected to the first semiconductor layer, the second reflective layer 6 fills the first recess 13 and partially covers the second recess 14; the area not covered by the first reflective layer 5 in the first region 15 is covered by the second reflective layer 6; and the second reflective layer 6 covers the surface of the second insulating layer 11 in the second region 16; A third conductive layer 7 on the left side that covers the surface of the second reflective layer 6 and partially contacts the surface of the second insulating layer 11 and is electrically connected to the first semiconductor layer 1. The third conductive layer 7 on the left side and the first pad 9 together form a second electrical connection layer. The first pad 9 and the third conductive layer 7 are a multi-layer metal structure. A third insulating layer 12 covering most of the surface of the third conductive layer 7 and isolating the first electrical connection layer from the second electrical connection layer for direct conduction; The light emitting device is packaged by using a packaging structure to form an LED chip.

[0025] In the present invention, the reflectivity of the first reflective layer 5 is higher than that of the second reflective layer 6, and the reflectivity of the second reflective layer 6 is higher than that of the third conductive layer 7. The second reflective layer 6 is a multi-metal structural material with high reflectivity and high activity; the third conductive layer 7 is a multi-metal structural material with low activity; the reflectivity of the second reflective layer 6 is higher than that of the third conductive layer 7, the reflectivity of the second reflective layer 6 is higher than 90%, and the reflectivity of the third conductive layer 7 is about 85% to 88%.

[0026] In the present invention, the second reflective layer 6 and the third conductive layer 7 have different potentials, wherein the potential difference between the second reflective layer 6 and the first semiconductor layer 1 is smaller than the potential difference between the third conductive layer 7 and the first semiconductor layer 1, which can reduce the chip resistance and improve the electrical performance of the chip.

[0027] The present invention introduces the second reflective layer 6 in both the first region 15 and the second region 16, which not only improves the reflectivity of the light-emitting region, but also increases the reflective effect of the second region, thereby improving the light efficiency of the entire chip structure.

[0028] Figure 3 The second reflective layer 6 is removed on the basis of the present invention, as a comparative example of the present invention, Figure 4The light efficiency comparison diagram of the present invention and the comparative example, four groups of light efficiency diagrams of the present invention and multiple groups of comparative examples, where the horizontal axis is the average value of all measured wavelengths, the vertical axis is the light efficiency, the blue points are the present invention, the red points are the comparative example, and the lines in the figure are the average trend lines. At present, the flip-chip structure process has become saturated, and it is difficult to improve the light efficiency. The present invention introduces a new second reflective layer in the non-luminous area. Figure 4 According to the average trend line, the maximum increase in luminous efficiency is 2%.

[0029] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A chip structure for improving light efficiency, comprising a light-emitting device composed of a first semiconductor layer (1), a second semiconductor layer (2) and an active layer (3); the active layer (3) is located between the first semiconductor layer (1) and the second semiconductor layer (2); characterized in that: A first recess (13) and second recesses (14) on both sides of the first semiconductor layer (1) that penetrate the second semiconductor layer (2) and the active layer (3), wherein the first recess (13) is located in the first region (15) and the second recess (14) is located in the second region (16); the first region (15) is a light-emitting region and the second region (16) is a non-light-emitting region; A second reflective layer (6) which is mostly in contact with the surface of the second insulating layer (11) and forms an electrical connection with the first semiconductor layer; the second reflective layer (6) fills the first recess (13) and partially covers the second recess (14); in the first region (15), the region not covered by the first reflective layer (5) is covered by the second reflective layer (6); and in the second region (16), the second reflective layer (6) covers the surface of the second insulating layer (11).

2. A chip structure for improving light efficiency according to claim 1, characterized in that: A first conductive layer (4) forming an ohmic contact with the second semiconductor layer (2), a first reflective layer (5) forming an electrical connection with the first conductive layer (4), a second conductive layer (8) forming an electrical connection with the first reflective layer (5), a third conductive layer (7) forming an electrical connection with the second conductive layer (8), the third conductive layer (7) being covered with a third insulating layer (12), the third conductive layer (7) being blocked by the third insulating layer (12) and divided into a third conductive layer (7) on the left, a third conductive layer (7) in the middle and a third conductive layer (7) on the right, a second pad (17) forming an electrical connection with the third conductive layer (7) in the middle, and the first conductive layer (4), the first reflective layer (5), the second conductive layer (8), the third conductive layer (7) and the second pad (17) together forming a first electrical connection layer.

3. A chip structure for improving light efficiency according to claim 1, characterized in that: A third conductive layer (7) on the left side covers the surface of the second reflective layer (6) and partially contacts the surface of the second insulating layer (11), and forms an electrical connection with the first semiconductor layer (1); the third conductive layer (7) on the left side and the first pad (9) together form a second electrical connection layer.

4. The chip structure for improving light efficiency according to claim 1, characterized in that: A first insulating layer (10) covering a portion of the surface of the second semiconductor layer (2), a portion of the surface of the first conductive layer (4), a side wall of the first recess (13) and a side wall of the second recess (14); and a second insulating layer (11) covering a portion of the surface of the second conductive layer (8), a portion of the surface of the first insulating layer (10) and one side of the first electrical connection layer.

5. The chip structure for improving light efficiency according to claim 2, characterized in that: The third insulating layer (12) covers most of the surface of the third conductive layer (7) and isolates the first electrical connection layer and the second electrical connection layer from direct conduction.

6. The chip structure for improving light efficiency according to claim 1, characterized in that: The reflectivity of the first reflective layer (5) is higher than that of the second reflective layer (6), and the reflectivity of the second reflective layer (6) is higher than that of the third conductive layer (7).

7. The chip structure for improving light efficiency according to claim 5, characterized in that: The second reflective layer (6) is a multi-metal structural material with high reflectivity and high activity; the third conductive layer (7) is a multi-metal structural material with low activity; the reflectivity of the second reflective layer (6) is higher than that of the third conductive layer (7), the reflectivity of the second reflective layer (6) is higher than 90%, and the reflectivity of the third conductive layer (7) is 85%-88%.

8. The chip structure for improving light efficiency according to claim 6, characterized in that: The second reflective layer (6) and the third conductive layer (7) have different potentials, wherein the potential difference between the second reflective layer (6) and the first semiconductor layer (1) is smaller than the potential difference between the third conductive layer (7) and the first semiconductor layer (1).

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