Via contacts for micro light emitting diodes and methods of forming same

Abstract

The present invention provides a via contact for a micro light emitting diode, where the via contact is configured to electrically connect a first conductive structure with a second conductive structure, where the first conductive structure is located below the via contact and the second conductive structure is located above the via contact, where the via contact comprises: a via through which the first conductive structure is electrically connected to the second conductive structure; the substrate is formed in the insulating layer and is provided with a cavity; a filler metal disposed in the cavity of the via for electrical conduction; and a first metal barrier layer disposed between the bottom of the via and the first conductive structure and / or between the top of the via and the second conductive structure to block diffusion of the filler metal. In addition, the invention also provides a method for forming the through hole contact part. According to the invention, the metal diffusion of the contact part of the through hole can be well inhibited.

Description

Technical Field

[0001] The present invention generally relates to the field of micro light emitting diodes, and more specifically, to a through hole contact portion of a micro light emitting diode and a method for forming the same. In addition, the present invention also relates to a micro light emitting diode chip having the through hole contact portion. Background Art

[0002] Micro Light Emitting Diode is a new type of LED structure obtained by thin-filming, miniaturizing and arraying the original LED structure. It integrates arrayed micron-level LED units on an active addressing drive panel to realize the lighting and individual control of the LED units, thereby outputting the desired display image. The core structure of the micro light emitting diode is a PN junction diode, which is composed of direct bandgap semiconductor materials. When the upper and lower electrodes apply a forward bias to the micro light emitting diode to cause current to pass through, electrons and holes recombine in the active region and emit single color light photons at the same time.

[0003] The through-hole contact is an important conductive structure in a micro-LED chip, which is used, for example, to electrically connect the light-emitting surface of the micro-LED through an insulating layer to a driving circuit under the insulating layer. A metal used for conduction, such as copper, is deposited in the through-hole contact, but the metal may diffuse in the chip, for example, into semiconductor structures such as active areas and insulating layers, thereby affecting the performance of related semiconductor structures. Metal is generally deposited on the sidewalls of the through-hole contact, but metal diffusion may still occur at its two ends, for example, diffusing into other structures through the conductive structures at both ends. In particular, when the through-hole contact is not well aligned with the conductive structure underneath, the consequences of metal diffusion are particularly serious.

[0004] There is a need for a through-hole contact that can suppress metal expansion. Summary of the invention

[0005] Based on the prior art, the task of the present invention is to provide a through-hole contact portion of a micro light emitting diode and a micro light emitting diode chip having the through-hole contact portion, through which the metal diffusion of the through-hole contact portion can be better suppressed.

[0006] In a first aspect of the invention, the aforementioned object is solved by a through-hole contact for a micro light emitting diode, wherein the through-hole contact is configured to electrically connect a first conductive structure to a second conductive structure, wherein the first conductive structure is located below the through-hole contact and the second conductive structure is located above the through-hole contact, wherein the through-hole contact comprises:

[0007] a through hole formed in the insulating layer having a cavity;

[0008] a fill metal disposed in the cavity of the via for conducting electricity; and

[0009] A first metal barrier layer is arranged between the bottom of the via and the first conductive structure and / or between the top of the via and the second conductive structure to block the filling metal from diffusing.

[0010] In one embodiment of the present invention, the width of the first metal barrier layer is greater than the bottom width of the through hole.

[0011] In another embodiment of the present invention, the through hole contact portion further comprises:

[0012] A second metal barrier layer is arranged between the inner wall of the through hole and the filling metal.

[0013] In another embodiment of the present invention, the diameter of the through hole is 0.2 to 1 μm, and the height is 2 to 5 μm.

[0014] In another embodiment of the present invention, the filler metal is selected from one or more of the following:

[0015] Copper, gold, silver, and tin.

[0016] In another embodiment of the present invention, the first metal barrier layer and / or the second metal barrier layer comprises:

[0017] a first metal layer including a plurality of multilayer stacks consisting of titanium layers and platinum layers, wherein the titanium layers and the platinum layers are alternately arranged with each other; and

[0018] The second metal layer is made of titanium.

[0019] In another embodiment of the present invention, the number of the stacked layers is 1 to 5.

[0020] In another embodiment of the present invention, it is provided that:

[0021] The titanium layer has a thickness of 100 to 300 angstroms; and / or

[0022] The platinum layer has a thickness of 100 to 300 angstroms; and / or

[0023] The second metal layer has a thickness of 200 to 400 angstroms.

[0024] In another embodiment of the present invention, the through-hole contact portion further comprises:

[0025] A passivation layer is arranged between the through hole and the first conductive structure and / or the second conductive structure and exposes the first metal barrier layer.

[0026] In another embodiment of the present invention, it is provided that:

[0027] The breakdown field strength of the passivation layer is not less than 1x10 7 V / cm; or

[0028] The breakdown field strength of the passivation layer is not less than 6x10 8 V / cm.

[0029] In another embodiment of the present invention, the material of the passivation layer is selected from the group consisting of:

[0030] Silicon nitride, aluminum oxide, silicon dioxide, and a combination of silicon nitride and aluminum oxide.

[0031] In another embodiment of the present invention, the passivation layer is deposited at a temperature T, wherein the temperature T=100°C to 300°C.

[0032] In another embodiment of the present invention, a ratio of a cross-sectional length of the first metal barrier layer to a diameter of the through hole is 1.2 to 1.8.

[0033] In another embodiment of the present invention, the offset between the center line of the through hole and the center line of the first conductive structure is 0.1 to 0.3 μm.

[0034] In another embodiment of the present invention, the through-hole contact is configured to electrically connect the light-emitting mesa with a driving circuit.

[0035] In a second aspect of the present invention, the aforementioned object is solved by a micro light emitting diode chip, the chip comprising:

[0036] A plurality of micro light emitting diodes, wherein the micro light emitting diodes include a light emitting mesa, which is arranged on a driving circuit and configured to emit a first light:

[0037] a driving circuit; and

[0038] The through-hole contact portion according to the present invention is configured to electrically connect the light-emitting mesa with the driving circuit.

[0039] In one embodiment of the present invention, it is provided that:

[0040] A metal layer is disposed on the surface of the driving circuit, a plurality of through-hole contacts are disposed on the driving circuit, the through-hole contacts are electrically connected to the metal layer, the micro light-emitting diode is bonded to the driving circuit through a bottom conductive bonding layer, and each light-emitting mesa corresponds to one of the through-hole contacts, and the light-emitting mesa includes a first epitaxial layer, a light-emitting layer, and a second epitaxial layer deposited in sequence; and

[0041] The micro light emitting diode further comprises:

[0042] a first electrode electrically connected to the through-hole contact portion;

[0043] A passivation isolation layer covering the surface of the light-emitting mesa but exposing at least a portion of the second epitaxial layer;

[0044] a transparent conductive layer, which is disposed on a surface of the passivation insulating layer and is in electrical contact with the first epitaxial layer; and

[0045] The second electrode is disposed on the surface of the transparent conductive layer.

[0046] In another embodiment of the present invention, the second electrode is a ring-shaped reflective electrode, which is arranged around the light-emitting mesa.

[0047] In another embodiment of the present invention, the polarity of the second electrode is opposite to that of the first electrode.

[0048] In another embodiment of the present invention, the material of the second epitaxial layer is a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer is a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, wherein the first conductivity type is different from the second conductivity type.

[0049] In another embodiment of the present invention, the light emitting layer comprises a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, an InGaAs / AlGaAs multi-quantum well layer, or an AlGaInP multi-quantum well layer.

[0050] In another embodiment of the present invention, an electron blocking layer is disposed on a first side of the light-emitting layer, wherein the first side refers to a side along which electrons migrate out of the light-emitting layer.

[0051] In another embodiment of the present invention, the material of the metal layer is an alloy of one or more of the following metals: Ni, Al, Ti, Ni, Pt, Au.

[0052] In another embodiment of the present invention, the material of the passivation isolation layer is Si3N4 film, SiO2 film or Al2O3 film.

[0053] In a third aspect of the present invention, the aforementioned object is solved by a micro light emitting diode chip, the micro light emitting diode chip comprising:

[0054] The upper stack comprises:

[0055] a first insulating layer configured to accommodate the light emitting mesa and the first via contact;

[0056] a light emitting mesa configured to emit light, wherein a top surface area of ​​the light emitting mesa is greater than a bottom surface area of ​​the light emitting mesa; and

[0057] A first through-hole contact portion, which is constructed according to any one of claims 1 to 15 and is electrically connected to the bottom of the light-emitting mesa and passes through the first insulating layer; and

[0058] The lower stack comprises:

[0059] a second insulating layer configured to accommodate a second through-hole contact;

[0060] a second via, which is configured according to one of claims 1 to 15 and penetrates the second insulating layer; and

[0061] The driving back plate is electrically connected to the second via contact, wherein the lower stack is bonded to the upper stack by hybrid bonding, so that the first via contact is bonded to the second via contact, and the first insulating layer is bonded to the second insulating layer.

[0062] In a fourth aspect of the present invention, the aforementioned object is solved by a method for forming a through-hole contact, the method comprising the following steps:

[0063] providing a first conductive structure;

[0064] forming a passivation layer on the first conductive structure;

[0065] removing a portion of the passivation layer to expose the first conductive structure;

[0066] forming a first metal barrier layer on the exposed first conductive structure;

[0067] forming an insulating layer on the passivation layer and the first metal barrier layer;

[0068] etching the insulating layer to form a through hole, wherein a bottom of the through hole is opposite to the first metal barrier layer; and

[0069] Fill metal is deposited in the via.

[0070] In one embodiment of the present invention, the method further comprises the following steps:

[0071] Before depositing metal in the via hole, a second metal barrier layer is formed on the inner wall of the via hole.

[0072] In another embodiment of the present invention, the method further comprises the steps of:

[0073] forming a first metal barrier layer on top of the via; and

[0074] A third conductive structure is formed on the first metal barrier layer.

[0075] The present invention has at least the following beneficial effects:

[0076] (1) The present invention arranges a metal barrier layer between the bottom and / or top of the through-hole contact and the conductive structure electrically connected thereto, thereby substantially preventing the metal in the through-hole contact from diffusing into the corresponding conductive structure, and in particular, better preventing the metal in the through-hole contact from first diffusing into the conductive structure electrically connected thereto and then diffusing from the conductive structure into other structures;

[0077] (2) The present invention forms a metal barrier layer on the conductive structure electrically connected to the through-hole contact portion first and then forms the through-hole contact portion on the metal barrier layer, and the area of ​​the metal barrier layer is larger than the area of ​​the bottom of the through-hole. Thus, compared with first forming the through-hole and then forming the metal barrier layer at the bottom thereof, the metal barrier layer can completely cover the bottom of the through-hole without the situation where the metal barrier layer does not cover the bottom of the through-hole (which is possible when the through-hole is first formed and then the metal barrier layer is formed at the bottom thereof), thereby completely avoiding metal diffusion. Moreover, even if the through-hole contact portion is not aligned with the conductive structure, as long as the through-hole is still within the range of the metal barrier layer, metal diffusion can still be completely prevented.

[0078] (3) The present invention improves the material and structure of the metal barrier layer, that is, a combination of multiple titanium-platinum stacks + titanium layers is used to better prevent metal diffusion in the through-hole contact portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0079] The present invention will be further described below in conjunction with specific embodiments with reference to the accompanying drawings.

[0080] Figure 1 A schematic diagram showing a first embodiment of a through-hole contact for a micro light emitting diode according to the present invention;

[0081] Figure 2 A schematic diagram showing a second embodiment of a through-hole contact for a micro light emitting diode according to the present invention;

[0082] Figure 3 A schematic diagram showing a third embodiment of a through-hole contact for a micro light emitting diode according to the present invention;

[0083] Figures 4A-4E A first embodiment of a method for forming a through-hole contact according to the present invention is shown; and

[0084] Figures 5A-5D A second embodiment of the method for forming a through-hole contact according to the present invention is shown. DETAILED DESCRIPTION DETAILED DESCRIPTION

[0086] It should be noted that the components in the figures may be shown exaggeratedly for the sake of illustration and are not necessarily true to scale. In the figures, identical or functionally identical components are provided with the same reference numerals.

[0087] In the present invention, unless otherwise specified, "arranged on...", "arranged above..." and "arranged above..." do not exclude the existence of an intermediate between the two. In addition, "arranged on or above..." merely indicates the relative positional relationship between two components, and in certain cases, such as after reversing the product direction, it can also be converted into "arranged below or below...", and vice versa.

[0088] In the present invention, each embodiment is only intended to illustrate the aspects of the present invention and should not be construed as limiting.

[0089] In the present invention, unless otherwise specified, the quantifiers "a", "an" and "an" do not exclude the presence of a plurality of elements.

[0090] In the present invention, the term “connected” may refer to both being directly connected or being indirectly connected via an intermediate element.

[0091] In the present invention, the term "configuration" refers to the setting of the shape, structure, material and / or function of the target object to achieve the desired technical effect, wherein "configuration" includes a variety of alternative technical means for achieving the technical effect, which become obvious under the teaching of the present invention.

[0092] It should also be noted that in the embodiments of the present invention, for the sake of clarity and simplicity, only a portion of the parts or components may be shown, but those of ordinary skill in the art will understand that under the teachings of the present invention, the required parts or components may be added according to the needs of the specific scenario. In addition, unless otherwise specified, the features in different embodiments of the present invention may be combined with each other. For example, a feature in the second embodiment may be used to replace a corresponding or functionally identical or similar feature in the first embodiment, and the resulting embodiment also falls within the disclosure scope or recorded scope of the present application.

[0093] It should also be noted that within the scope of the present invention, the terms "same", "equal", "equal to" and the like do not mean that the values ​​of the two are absolutely equal, but allow a certain reasonable error, that is, the terms also cover "substantially the same", "substantially equal", "substantially equal to". By analogy, in the present invention, the terms "perpendicular to", "parallel to" and the like indicating directions also cover the meanings of "substantially perpendicular to" and "substantially parallel to".

[0094] In the present invention, the term "configuration" refers to the setting of the shape, structure, material and / or function of the target object to achieve the desired technical effect, wherein "configuration" includes a variety of alternative technical means for achieving the technical effect, which become obvious under the teaching of the present invention.

[0095] Figure 1 A schematic diagram of a first embodiment of a through-hole contact 100 for a micro light emitting diode according to the present invention is shown.

[0096] like Figure 1 As shown, the through-hole contact 100 for a micro light emitting diode according to the present invention is located above the first conductive structure 101 and below the second conductive structure 102, wherein the through-hole contact is configured to electrically connect the first conductive structure 101 to the second conductive structure 102. The first conductive structure 101 and the second conductive structure 102 can be, for example, another through-hole contact, a conductive layer (such as a metal layer, a transparent conductive layer, etc.), a metal electrode, etc. The through-hole contact 100 includes: a through hole 108, a filling metal 105, a first metal barrier layer 106, a second metal barrier layer 104, and a passivation layer 107. These components are described in detail below. Note that in different embodiments, some components, such as the passivation layer 107 and the second metal barrier layer 104, are optional as needed.

[0097] A through hole 108 is formed in the insulating layer 103 and has a cavity. The through hole 108 is an important component for connecting metal or semiconductor structures at different levels. When a conductive metal is deposited in the cavity of the through hole 108, it is called a through hole contact. The through hole can be formed in the following ways:

[0098] Photolithography and etching: First, photoresist is applied to the surface to be drilled, and then the desired through-hole pattern is transferred to the photoresist using photolithography. Next, the part not covered by the photoresist is removed by etching to form a through-hole on the semiconductor surface.

[0099] Laser drilling: using a laser beam to drill holes on the surface to be drilled (here, the insulating layer 103) to form through holes.

[0100] Chemical vapor deposition (CVD): The CVD method can deposit a layer of material on the surface to be drilled, and then remove the material by etching or other methods to form a through hole.

[0101] Ion implantation: Ions are implanted into the material to be drilled to change its electrical properties. The ion implanted area is then removed by etching or other methods to form a through hole.

[0102] Reactive ion etching (RIE): Utilizes the principle of chemical reaction and ion bombardment to etch through holes on the surface to be drilled. RIE can achieve high-resolution and high-precision etching.

[0103] Deep Reactive Ion Etching (DRIE): DRIE is a technique specifically used for etching high aspect ratio structures. It can etch deep and narrow through holes in the material to be drilled.

[0104] The diameter of the through hole 108 may be, for example, 0.2 to 1 μm, and the height may be, for example, 2 to 5 μm.

[0105] Filling metal 105, which is arranged in the cavity of the through hole 108 for conducting electricity. The material of the filling metal 105 is, for example, a metal with good conductivity, such as copper, gold, silver, and tin. The filling metal 105 can, for example, at least partially fill the through hole 108, preferably completely fill the through hole 108. In the case of partially filling the through hole 108, the filling metal 105 should ensure that the first conductive structure 101 and the second conductive structure 102 are electrically connected to each other.

[0106] A first metal barrier layer 106 is arranged between the bottom of the through hole 108 and the first conductive structure 101 to block the diffusion of the filling metal 105 and prevent the first conductive structure 101 from being exposed to air and oxidized. Here, the area of ​​the first metal barrier layer 106 is larger than the bottom area of ​​the through hole 108, so that even if the through hole 108 and the original alignment position of the first conductive structure 101 are offset by a certain distance, the first metal barrier layer 106 can still completely cover the bottom of the through hole 108, thereby better preventing the filling metal 105 at the bottom of the through hole from diffusing or oxidizing. For example, the cross-sectional length of the first metal barrier layer 106 is X microns or 10% to 50% larger than the bottom diameter of the through hole 108, where X is 0.5 to 1 μm, and the first metal barrier layer 106 is centrally disposed at the alignment position between the through hole 108 and the first conductive structure 101, so that the through hole 106 is allowed to be offset to the left or right by X / 2 microns from the alignment position, and the first metal barrier layer 106 can still completely cover the bottom of the through hole 108 to prevent the filling metal 105 from diffusing or oxidizing.

[0107] The first metal barrier layer 106 may include, for example, a layered structure, such as a first metal layer and a second metal layer. The first metal layer includes a plurality of stacks of titanium layers and platinum layers, wherein the titanium layers and the platinum layers are arranged alternately with each other. The number of the stacks is 1 to 5, preferably 3. The thickness of the titanium layer is 100 to 300 angstroms, preferably 200 angstroms. The thickness of the platinum layer is 100 to 300 angstroms, preferably 200 angstroms. The second metal layer is made of titanium. The thickness of the second metal layer is 200 to 400 angstroms, preferably 300 angstroms. 1 angstrom = 1x10^(-10) meters. The present invention improves the material and structure of the metal barrier layer, that is, a combination of a plurality of titanium-platinum stacks + titanium layers is used to better prevent metal diffusion in the through-hole contact portion. The ratio of the cross-sectional length of the first metal barrier layer 106 to the diameter of the through-hole may be, for example, 1.2 to 1.8. In addition, the offset between the center line of the through hole 108 and the center line of the first conductive structure can be, for example, 0.1 to 0.3 μm, wherein as long as the cross-sectional length of the first metal barrier layer 106 is larger than the diameter of the through hole 108 by the offset, the offset will not cause the filling metal in the through hole 108 to diffuse, but will still be completely blocked by the first metal barrier layer 106.

[0108] A second metal barrier layer 104 is arranged between the inner wall of the through hole 108 and the filling metal 105 to block the diffusion of the filling metal 105, for example, to prevent the filling metal 105 from diffusing into the insulating layer 103. The second metal barrier layer 104 may have the same material and structure as the first metal barrier layer 106, but may also have other materials and structures, such as tantalum (Ta) and tantalum nitride (TaN) (which can block the diffusion of copper atoms), titanium (Ti) and titanium nitride (TiN), etc.

[0109] A passivation layer 107 is arranged between the through hole 108 and the first conductive structure 101 and / or the second conductive structure 102 and exposes the first metal barrier layer 106. The function of the passivation layer 107 is to prevent the interface of the first conductive structure 101 from being oxidized during the process of forming the through hole contact 100. The breakdown field strength of the passivation layer is not less than 1×10 7 V / cm, or the breakdown field strength of the passivation layer is not less than 6x10 8V / cm. The material of the passivation layer 107 may include, for example, silicon nitride, aluminum oxide, silicon dioxide, and a combination of silicon nitride and aluminum oxide, or other combinations of the above components. The passivation layer 107 is formed by coating the passivation layer 107 (for example, a silicon nitride or aluminum oxide layer) on the interface after cleaning the interface of the first conductive structure 101 with hydrochloric acid, and then etching a portion of the passivation layer 107 to expose the position where the first conductor structure 101 is to be electrically connected to the through-hole contact portion 100, and depositing the first metal barrier layer 106 in the portion. The area of ​​the etched portion may preferably be larger than the bottom area of ​​the through-hole 108, so that the first metal barrier layer 106 larger than the bottom area may be deposited. In addition, the deposition range of the passivation layer 107 may be within a certain radius area of ​​the through-hole deposition position, and the radius is, for example, 1 to 5 μm.

[0110] As can be seen from the above, the present invention can substantially prevent the metal in the through-hole contact 100 from diffusing into the first conductive structure 101 (the driving circuit or metal layer of the light-emitting diode) by arranging the first metal barrier layer 106 between the bottom of the through-hole contact 100 and the first conductive structure 101 electrically connected thereto. Moreover, by appropriately enlarging the first metal barrier layer 106 in design, for example, enlarging it to be larger than the bottom area of ​​the through-hole, the metal barrier effect can still be achieved even if the through-hole contact deviates from the alignment position on the first conductive structure.

[0111] Figure 2 A schematic diagram of a second embodiment of a through-hole contact 100 for a micro light emitting diode according to the present invention is shown.

[0112] Figure 2 The second embodiment of Figure 1The first embodiment of the present invention is basically the same as the first embodiment of the present invention, and the main difference is that in the second embodiment, the first metal barrier layer 106 and the passivation layer 107 are both arranged between the top of the through hole 100 and the second conductive structure 102. Here, the material and structure of the first metal barrier layer 106 can be the same as the first metal barrier layer 106 in the first embodiment. Here, the function of the first metal barrier layer 106 is to prevent the filling metal 105 in the through hole contact 100 from diffusing into the second conductive structure 102. In the case of a micro light emitting diode, the second conductive structure 102 can be a light-emitting mesa of the micro light emitting diode. Here, the function of the passivation layer 107 is to prevent the top filling metal of the through hole contact 100 from being oxidized during the formation of the electrical connection between the second conductive structure 102 and the through hole contact 100. Here, the passivation layer 102 also has a notch to expose the first metal barrier layer 106. The first metal barrier layer 106 is formed, for example, as follows: first, the insulating layer and the top surface of the through-hole contact 100 are cleaned with a cleaning agent such as hydrochloric acid; then, a passivation layer is formed thereon; next, the passivation layer is etched to expose at least a portion of the top surface of the through-hole contact 100, preferably to expose the entire through-hole contact 100 and a portion of the insulating layer 103; then, the first metal barrier layer 106 is formed on the etched passivation layer; finally, the second conductive structure 102 is formed on the first metal barrier layer 106.

[0113] As can be seen from the above, the present invention can substantially prevent the metal in the through-hole contact 100 from diffusing into the second conductive structure 102 (e.g., the light-emitting mesa of a micro-LED) by arranging the first metal barrier layer 106 between the top of the through-hole contact 100 and the second conductive structure 102 electrically connected thereto. Moreover, by appropriately enlarging the first metal barrier layer 106 in design, for example, enlarging it to be larger than the area of ​​the through-hole top, the metal barrier effect can still be achieved even if the through-hole contact deviates from the alignment position on the second conductive structure.

[0114] Figure 3 A schematic diagram of a third embodiment of a through-hole contact 100 for a micro light emitting diode according to the present invention is shown.

[0115] like Figure 3 As shown, in the third embodiment, the through-hole contact 602 according to the present invention is applied to a micro-LED chip 600. Specifically, the first through-hole contact 602 and the second through-hole contact 603 according to the present invention are used to electrically connect the epitaxial layer 601 (or the light-emitting mesa) and the driving circuit 606, and the metal in the first and second through-hole contacts 602 and 603 can be prevented from diffusing into the epitaxial layer 601 and the driving circuit 606 and can be prevented from oxidizing. The micro-LED chip 600 using the first and second through-hole contacts 602 and 603 according to the present invention is described in detail below.

[0116] like Figure 3 As shown, the micro-LED chip 600 according to the present invention comprises an upper laminate 600A and a lower laminate 600B, wherein the upper laminate 600A and the upper laminate 600B are hybrid-bonded to each other at an interface A to form a complete micro-LED chip 600. The structures and components of the upper laminate 600A and the lower laminate 600B are described in detail below.

[0117] Upper layer

[0118] The upper stack 600A includes a first insulating layer 611A, a light emitting mesa 601, a transparent conductive layer 608, a first electrode 604 (cathode), a first via contact 602, a second electrode 610 (anode), a first bonding mark 609A, and a microlens 605. Each component is described below.

[0119] A first insulating layer 611A, which is configured to accommodate at least a portion of the light-emitting mesa 601 and provide electrical insulation therefor. Here, the first electrical insulating layer 611A has a recess 607, which is configured to accommodate the light-emitting layer and the second epitaxial layer of the light-emitting mesa 601 and the auxiliary structure of the light-emitting mesa 601. For a detailed description of the light-emitting mesa 601 and its auxiliary structures (such as the passivation layer, the reflector layer, etc.), reference can be made to the light-emitting mesa 601 and its description. Here, it should be noted that the recess 607 can be formed after the light-emitting mesa 601, that is, the light-emitting mesa 601 and its auxiliary structures are first formed on the temporary substrate, and then the first insulating layer 611A surrounding them is formed on the light-emitting mesa 601 and its auxiliary structures. The material of the first insulating layer 611A can be, for example, silicon dioxide, silicon nitride, a high dielectric constant material (such as hafnium oxide, aluminum oxide, etc.), etc. The first insulating layer 611A can be formed by thermal oxidation, chemical vapor deposition (CVD), etc. The thickness of the first insulating layer 611A is, for example, 1 to 3 μm, preferably 2 μm, and more preferably 0.6 to 1.4 μm. In addition, the first insulating layer 611A may be planarized at the interface A (eg, by chemical mechanical polishing (CMP)) to facilitate hybrid bonding with the second insulating layer 611B.

[0120] The first insulating layer 611A may be transparent to the light emitted from the light emitting mesa 601. In some embodiments, the first insulating layer 611A is made of a dielectric material such as a solid inorganic material or a plastic material. In some embodiments, the solid inorganic material includes silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon nitride (Si3N4), silicon carbonitride (SiCN), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), titanium dioxide (TiO2), zirconium oxide (ZrO2), lanthanum oxide (La2O3), magnesium oxide (MgO), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), or any combination thereof. In some embodiments, the plastic material includes a polymer such as SU-8, PermiNex, benzocyclobutene (BCB), or a transparent plastic (resin) including spin-on glass (SOG), or an adhesive microresist BCL-1200, or any combination thereof. In some embodiments, the first insulating layer 611A can facilitate the passage of light emitted from the light-emitting mesa 601. In some embodiments, the first insulating layer 611A can include multiple parts, such as three embedded dielectric parts and two bonding dielectric parts. The embedded dielectric part refers to the dielectric layer surrounding each light-emitting diode structure; and the bonding dielectric part refers to the dielectric layer between two light-emitting diode structures. The embedded dielectric part and the bonding dielectric part may have the same or different compositions.

[0121] A light-emitting mesa 601 configured to emit light, wherein the top surface area of ​​the light-emitting mesa 601 is larger than the bottom surface area of ​​the light-emitting mesa. The tilt angle of the light-emitting mesa 601 can be, for example, 10° to 85°, preferably 30° to 70°, and especially 35° to 50°. The light-emitting mesa 601 includes a first epitaxial layer 601A, a light-emitting layer 601B, and a second epitaxial layer 601C, wherein the first epitaxial layer 601A is arranged on the top of the light-emitting mesa, that is, on the side facing the light-emitting surface, the light-emitting layer 601B is arranged in the recess 607 and arranged between the first epitaxial layer 601A and the second epitaxial layer 601C, and the second epitaxial layer 601C is arranged on the bottom of the light-emitting mesa 601, that is, on the side facing the driving circuit 606. The light-emitting layer 601B, for example, includes a multi-quantum well layer and an electron blocking layer. In one embodiment of the present invention, the first epitaxial layer 601A is an N-type GaN layer or an N-type AlGaN layer, and the second epitaxial layer 601C is a P-type GaN layer or a P-type AlGaN layer, that is, the material of the second epitaxial layer 601C can be a material layer of the second conductivity type including at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer 601A can be a material layer of the first conductivity type including at least two or more elements of Ga, N, As, Al, In, and P. The multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. The electron blocking side is arranged on the first side of the light-emitting layer, and the first side refers to the side along which the electrons migrate out of the light-emitting layer. In another embodiment of the present invention, the first epitaxial layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second epitaxial layer can be an N-type GaN layer or an N-type AlGaN layer. The top width of the light-emitting mesa 601 is, for example, 0.5 to 3 μm, preferably 1.0 to 2.0 μm. The thickness of the first epitaxial layer 601A is, for example, 4000 to 5000 angstroms, the thickness of the light-emitting layer 601B is, for example, 3500 to 4000 angstroms, and the thickness of the second epitaxial layer 601C is, for example, 2500 to 3500 angstroms. 1 angstrom = 10^(-10) meters. Figure 3It can be seen that the first epitaxial layer 601A is located outside the recess 607, while the light-emitting layer 601B and the second epitaxial layer 601C are located inside the recess 607. In this way, the surface area of ​​the first epitaxial layer 601A is not limited by the opening area of ​​the recess 607, but can be significantly larger than the opening area of ​​the recess 607, thereby significantly increasing the area and thickness of the first epitaxial layer 601A; in addition, since the recess 607 only needs to accommodate the light-emitting layer 601B and the second epitaxial layer 601C, these two layers have a larger area and thickness compared with the structure of the prior art that needs to accommodate three layers, thereby better increasing the area and thickness of the epitaxial layer 601 and improving the light emission. It can also be seen here that the first epitaxial layer 601A passes through the first electrode 604 from below the first electrode 604 (here, the cathode), so that the first epitaxial layers 601A of adjacent light-emitting mesas 601 can be connected to each other, so that in the case of a common cathode structure (i.e., the first epitaxial layers of all micro-LEDs in the same array are connected to a common cathode), the conductivity between the cathode 604 and the first epitaxial layer 601A can be significantly enhanced compared to the case where the cathode 604 is connected only by the transparent conductive layer 608 covering it, thereby increasing its power supply. In addition, the contact cross section between the first epitaxial layer 601A and the cathode 604 at the edge is partially flat and partially inclined. Compared with the vertical surface, the inclined surface increases the contact area between the first epitaxial layer 601A and the cathode 604, thereby increasing the conductivity.

[0122] In one embodiment of the present invention, the first epitaxial layer (or the first type epitaxial layer) is a semiconductor material having a first conductivity type and includes a plurality of semiconductor layers. The main matrix material of the first epitaxial layer may be, but is not limited to, Ga, N, As, P, In, and includes, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; in addition, an ohmic contact layer may be formed below the window layer. In some embodiments, the second epitaxial layer (or the second type epitaxial layer for short) is a semiconductor material having a second conductivity type and includes a plurality of semiconductor layers. The main matrix material of the second epitaxial layer may be, but is not limited to, at least two or more elements of Ga, N, As, P, In, and Al. In addition, the first epitaxial layer may include, from top to bottom, but is not limited to, a confinement layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer may be formed on the confinement layer. In one embodiment of the present invention, the first epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second epitaxial layer is a P-type GaN layer or a P-type AlGaN layer, that is, the material of the second epitaxial layer can be a material layer of the second conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer can be a material layer of the first conductivity type containing at least two or more elements of Ga, N, As, Al, In, and P. In another embodiment of the present invention, the first epitaxial layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second epitaxial layer can be an N-type GaN layer or an N-type AlGaN layer. In an embodiment of the present invention, the light-emitting mesa is stepped or trapezoidal.

[0123] The light-emitting mesa 601 further includes auxiliary structures such as passivation layers 612 and 613, a reflector layer 615, etc. The passivation layer 612 is arranged between the light-emitting mesa 601 and the reflector layer 615, and optionally extends on the upper surface of the first insulating layer 611A, while the passivation layer 613 is arranged between the inner wall of the recess 607 and the reflector layer 615, and optionally extends on the upper surface of the first insulating layer 611A. In another embodiment, only one of the passivation layers 612 and 613 extends on the upper surface of the first insulating layer 611A, or both of them do not extend on the upper surface of the first insulating layer 611A, instead, they only extend to the upper surface of the first insulating layer 611A, and the upper surface of the first insulating layer 611A is covered by another insulating layer or a dielectric layer. The role of the passivation layers 612 and 613 is not only to reduce the current leakage at the sidewall, but also to passivate the sidewall defects, and prevent water, oxygen, etc. from damaging the light-emitting mesa during operation, and to prevent the metal in the reflector layer 615, cathode 604, etc. from diffusing to the first insulating layer 611 or the light-emitting mesa 601. The passivation layers 612 and 613 can be formed by depositing SiO2 material using a CVD process, or by depositing Al2O3 material using an ALD process. The reflector layer 615 is configured to reflect light from the light-emitting mesa 601 upward. To this end, the reflector layer 615 has an inclined surface on the side facing the light-emitting mesa 601. The material of the reflector layer 615 is, for example, silver, or a combination of multiple metal layers of nickel, silver, platinum, etc., and its thickness is 2000 to 4000 angstroms, preferably 3000 to 3500 angstroms. The reflector layer 615 can be formed, for example, by evaporation, sputtering, chemical vapor deposition (CVD), etc. The thickness of the passivation layer 612 between the reflector layer 612 and the light-emitting mesa 601 is 800 to 2000 angstroms, preferably 6000 to 1600 angstroms. The thickness of the passivation layer 613 between the reflector layer 615 and the recess inner wall 607 is 200 to 800 angstroms, preferably 300 to 600 angstroms.

[0124] A transparent conductive layer 608 is arranged on the first epitaxial layer 601A and electrically connects the first electrode 604 (cathode) to the first epitaxial layer 601A. Here, the transparent conductive layer 608 extends on the first epitaxial layer 601A and completely covers the first epitaxial layer 601A, thereby providing a more uniform power supply for the first epitaxial layer 601A. In other embodiments, the transparent conductive layer 608 may also only partially cover the first epitaxial layer 601A. In addition, the transparent conductive layer 608 also extends under the first electrode 604, which is the cathode, so that the transparent conductive layer 608 extends continuously on the first epitaxial layer 601A of the adjacent light-emitting mesa 601A, thereby increasing the coverage area of ​​the first epitaxial layer 601A. The material of the transparent conductive layer 608 is, for example, a metal oxide, such as indium tin oxide ITO, zinc oxide ZnO, etc., and its formation method includes, for example, physical vapor deposition (PVD), chemical vapor deposition (CVD), sol-gel method, solution coating method, etc.

[0125] The first electrode 604, here a cathode, is arranged to surround the light-emitting mesa 604. The cathode 604 and its connecting parts can be made of materials such as metal (such as copper, silver or aluminum), graphene, ITO, aluminum-doped zinc oxide (AZO) or fluorine-doped tin oxide (FTO) or any combination of the above materials. In another embodiment of the present invention, the cathode 604 and its connecting parts can be made of non-transparent or transparent conductive materials, such as indium tin oxide (ITO). In a preferred embodiment, the cathode 604 is made of a reflective metal (such as copper, silver or aluminum), so that the cathode 604 can reflect light from the light-emitting mesa 601 while optically isolating adjacent light-emitting mesas 601 from each other, for example, reflecting the light upward to the microlens 605, thereby increasing the light output. In another embodiment, a reflective layer, such as a silver layer, can be coated on the surface of the cathode 604 to provide a reflective capability. Here, the surface of the cathode 604 facing the light-emitting mesa 601A is an inclined surface, and is inclined toward both sides (i.e., inclined toward both sides starting from the bottom surface), thereby reflecting the light falling thereon upward, i.e., toward the light-emitting side. In addition, the cathode 604 can be divided into an edge cathode 604A and a middle cathode 604B, wherein the edge cathode 604A is arranged between the second electrode 610 (here, the anode) and the edgemost light-emitting mesa 601, wherein a portion of the edge cathode 604A is arranged on the passivation layer 612, and another portion is arranged on the transparent conductive layer 608, and the middle cathode 604B is arranged between adjacent light-emitting mesas 601, wherein the middle cathode 604B is arranged on the transparent conductive layer 608. In this way, the edge cathode 604A can completely cover the side of the first epitaxial layer 601A and be in electrical contact with it, thereby increasing the electrical contact area between the cathode 604 and the first epitaxial layer 601A.

[0126] A first through-hole contact 602, which is electrically connected to the bottom of the light-emitting mesa 601 and passes through the first insulating layer 611A. The first through-hole contact 602 is used for hybrid bonding with the second through-hole contact 603, and thereby electrically connects the bottom of the light-emitting mesa 601, especially the second epitaxial layer 601C, to the second electrode 610 (here, the anode). The first through-hole contact 602 is preferably a cylindrical through-hole, and the inner wall and / or the middle space are filled with a conductor, such as metal copper. The diameter of the first through-hole contact 602 is 0.3 to 2 μm, preferably 0.6 to 1.4 μm. The first through-hole contact 602 can be planarized at the interface A (for example, by chemical mechanical polishing CMP) to facilitate hybrid bonding with the second through-hole contact 603. In addition, in order to promote the bonding strength between the first through-hole contact 602 and the second through-hole contact 603 and improve the conductivity, a first interface metal layer may be arranged at the first opening of the first through-hole contact 602, and the area of ​​the first interface metal layer is larger than the area of ​​the first opening 203. Similarly, a second interface metal layer may be arranged at the second opening of the second through-hole contact 603, and the area of ​​the second interface metal layer is larger than the area of ​​the second opening. The areas of the first interface metal layer and the second interface metal layer may be equal, or the area of ​​the first interface metal layer may be larger than or smaller than the area of ​​the second interface metal layer. After the first interface metal layer and the second interface metal layer are bonded to each other, the bonding surface formed is larger than the bonding surface formed by directly bonding the first opening of the first through-hole contact 602 and the second opening of the second through-hole contact 603, thereby increasing the bonding strength and improving the conductivity between the first through-hole contact 602 and the second through-hole contact 603. The first interface metal layer and the second interface metal layer 202 are made of, for example, a conductive metal, such as copper. The formation method thereof may include, for example, physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, chemical plating, etc. The formation method of the first through-hole contact portion 603 may be, for example, as follows: a light-emitting mesa 601 and a first insulating layer 611A are formed on a temporary substrate, and then the first insulating layer 611A is etched to form a through hole leading to the bottom of the light-emitting mesa 601, and then a metal is deposited in the through hole, and finally the opening of the through hole is planarized to form a bonding surface.

[0127] In addition, the first through-hole contact 602 is a structure according to the present invention, wherein the first through-hole contact 602 is used to electrically connect the driving circuit 606 to the bottom (here, the reflector layer 607) of the epitaxial layer 601 (or the light-emitting mesa) of the micro-LED array after bonding with the second through-hole contact 603, thereby connecting the epitaxial layer 601 to the anode 610. Here, a first metal barrier layer 617 is provided between the through-hole contact 602 and the reflector layer 607. The first metal barrier layer 617 can prevent the metal in the first through-hole contact 602 from diffusing into the epitaxial layer 601 or the insulating layer 611A through the reflector layer 607 and other layers (such as the bottom transparent electrode layer) that may be arranged therebetween, or prevent it from being oxidized. If the metal in the first through-hole contact 602 diffuses into the epitaxial layer 601, the light-emitting performance of the epitaxial layer 601 will be affected; if it diffuses into the insulating layer 611A, it will affect the insulating effect of the insulating layer 611A, thereby causing leakage current or even short circuit; if the metal in the through-hole contact 602 is oxidized, it may cause poor contact between the first through-hole contact 602 and the reflector layer 607, or even cause the electrical circuit to the epitaxial layer 601 to be broken. It can be seen that by providing the first through-hole contact 602 according to the present invention, the diffusion of the metal in the first through-hole contact 602 can be better avoided, thereby effectively preventing the risks of reduced light-emitting performance, short circuit, and open circuit of the micro-LED.

[0128] The second electrode 610, which is an anode in this case, is electrically connected to the driving circuit 606 through a third through-hole contact 614 that passes through the first insulating layer 611A and the second insulating layer 611B. The anode 610 can be connected to an external power source or a control source, for example, to power or control the micro-LED chip 600. Here, the third through-hole contact 614 can include a plurality of through-hole contacts, so as to connect the second epitaxial layer 601C of the plurality of light-emitting mesas to the anode 610. Here, it is exemplarily shown that the third through-hole contact 614 includes two through-hole contacts, but this is only exemplary, and other numbers of through-hole contacts 614 are also conceivable. The third through-hole contact 614 can be formed either before or after hybrid bonding. If the third through-hole contact 614 is formed before hybrid bonding, the upper and lower parts of the third through-hole contact 614 are first formed in the upper stack 600A and the lower stack 600B, respectively, and then the two are connected through the through-hole contact after hybrid bonding, and then the first insulating layer 611A is etched from above to form the anode 610 on the third through-hole contact 614. If the third through-hole contact 614 is formed after hybrid bonding, the first insulating layer 611A is etched from above to form a through hole leading to the driving circuit 606, and then metal is deposited in the through hole, and then the third through-hole contact 614 is etched to form a recess, and then metal is deposited in the recess to form the anode 610. The anode 610 and its connecting parts can be made of materials such as metal (such as copper, silver or aluminum), graphene, ITO, aluminum-doped zinc oxide (AZO) or fluorine-doped tin oxide (FTO) or any combination of the above materials.

[0129] · A first bonding mark 609A, which is disposed in the first insulating layer 611A and exposes a first mark surface, i.e., an opening of the first bonding mark. The first bonding mark 609A in the upper stack 600A serves as a mark for alignment with the second bonding mark 609B in the lower stack 600B, thereby achieving precise hybrid bonding, wherein the second bonding mark 609B is disposed in the second insulating layer 600B and exposes a second mark surface, i.e., an opening of the second bonding mark. The first bonding mark 609A and the second bonding mark 609B are aligned in such a way that, during hybrid bonding, the first mark surface is aligned and attached to the second mark surface, at which point the upper stack 600A and the lower stack 600B are aligned, and then hybrid bonding can be performed. The first bonding mark 609A and the second bonding mark 609B can be metal vias, and the two can be bonded at the interface. In addition, the first bonding mark 609A and the second bonding mark 609B may have enlarged openings and / or the openings may be coated with a metal layer to facilitate identification of their positions and increase bonding strength.

[0130] A microlens 605 is disposed above the light-emitting mesa 601 to shape the light emitted therefrom, such as converging or collimating. The microlens includes a lens portion 605A and a spacer portion 605B. The lens portion 605A is disposed at the outermost side, i.e., the uppermost side, and is configured to shape the light from the light-emitting mesa 601. The spacer portion 605B is disposed between the lens portion 605A and the light-emitting mesa 601 to adjust the focal position of the lens portion 605A. For example, the focal point of the lens portion 605A can be exactly located in the light-emitting mesa 601 of the micro-LED by adjusting the thickness of the spacer portion 605B and the curvature of the lens portion 605A. The width of the microlens 605 is, for example, 0.8 to 4 μm, preferably 1 to 3 μm. The distance between the lens portion 605A and the cathode 604 is, for example, 0.05 to 4 μm, preferably 0.1 to 0.3 μm. The microlens 605 corresponds to the light-emitting mesa 601 one by one. Meanwhile, in this embodiment, there is a gap between adjacent microlenses 605 and the bottoms thereof are connected to each other. The bottom of the gap is higher than the top of the light-emitting mesa 601, or higher than the bottom of the light-emitting layer 601B of the light-emitting mesa 601, and the lens portion 604A is located above the cathode 604. The microlenses 605 can be formed by multiple depositions. In the process of forming the microlenses, a SiO2 film layer needs to be deposited first, and then ion etching is performed. The microlenses are formed on the surface of the transparent conductive layer 608 at positions corresponding to each light-emitting mesa 601.

[0131] The microlens can be made of a variety of materials that are transparent at the wavelength emitted by a single micro-LED pixel. Examples of transparent materials used for microlenses include polymers, dielectrics, and semiconductors. In some embodiments, the dielectric material includes one or more materials, such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 260 is made of photoresist. In some embodiments, the shape of the microlens is generally hemispherical. In some embodiments, the central axis of the microlens is aligned with the central axis of a single micro-LED pixel without a lens or the two are the same. It should be understood that a complete display panel includes an array consisting of many single pixels and many microlenses. In addition, there is not necessarily a one-to-one correspondence between the microlens and the pixel light source, and there is not necessarily a one-to-one correspondence between the drive circuit (not shown) and the pixel light source. The pixel light source can also be composed of multiple separate light-emitting elements, for example, a single pixel light-emitting diode connected in parallel. In some embodiments, one microlens can cover several single light-emitting diode pixels without a lens. A single microlens has a positive optical focal length, and its position can reduce the divergence or viewing angle of the light emitted by the corresponding pixel light source. For example, the light beam emitted by the pixel light source originally has a fairly wide divergence angle. In one embodiment, the initial angle of the edge ray of the light beam relative to the vertical axis perpendicular to the substrate is greater than 60°. After the light is refracted by the microlens, the divergence angle of the new edge ray is now reduced. In one embodiment, the reduced angle is less than 30°. The microlenses in the microlens array are generally identical. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnel microlenses, and cylindrical microlenses.

[0132] Lower stack

[0133] The lower stack 600B includes a second insulating layer 611B, a second through-hole contact 603, a driving circuit 606, and a second bonding mark 609B. Each component will be described below.

[0134] A second insulating layer 611B is arranged on the driving circuit 606 and is configured to accommodate the second through-hole contact 603. The material of the second insulating layer 611B can be, for example, silicon dioxide, silicon nitride, a high dielectric constant material (such as hafnium oxide, aluminum oxide, etc.), etc. The second insulating layer 611B can be formed on the driving circuit 606 by, for example, thermal oxidation, chemical vapor deposition (CVD), etc. The thickness of the second insulating layer 611B is, for example, 1 to 3 μm, preferably 2 μm, and more preferably 0.6 to 1.4 μm. In addition, the second insulating layer 611B can be planarized at the interface A (for example, by chemical mechanical polishing CMP) to promote hybrid bonding with the first insulating layer 611A.

[0135] The second insulating layer 611B may be transparent to the light emitted from the light emitting mesa 601. In some embodiments, the second insulating layer 611B is made of a dielectric material such as a solid inorganic material or a plastic material. In some embodiments, the solid inorganic material includes silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon nitride (Si3N4), silicon carbonitride (SiCN), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), titanium dioxide (TiO2), zirconium oxide (ZrO2), lanthanum oxide (La2O3), magnesium oxide (MgO), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), or any combination thereof. In some embodiments, the plastic material includes a polymer such as SU-8, PermiNex, benzocyclobutene (BCB), or a transparent plastic (resin) including spin-on glass (SOG), or an adhesive microresist BCL-1200, or any combination thereof. In some embodiments, the second insulating layer 611B can facilitate the passage of light emitted from the light-emitting mesa 601. In some embodiments, the second insulating layer 611B can include multiple parts, such as three embedded dielectric parts and two bonding dielectric parts. The embedded dielectric part refers to the dielectric layer surrounding each light-emitting diode structure; and the bonding dielectric part refers to the dielectric layer between two light-emitting diode structures. The embedded dielectric part and the bonding dielectric part may have the same or different compositions.

[0136] A second via contact 603, which passes through the second insulating layer 611B. The second via contact 603 is configured to be hybrid bonded with the first via contact 602 at the interface A, and thereby electrically connects the bottom of the light-emitting mesa 601, especially the second epitaxial layer 601C, to the second electrode 610 (here, the anode). The second via contact 603 is preferably a cylindrical through-hole, and the inner wall and / or the intermediate space are filled with a conductor, such as metal copper. The diameter of the second via contact 603 is 0.5 to 2.2 μm, preferably 0.8 to 1.6 μm. The second via contact 603 can be planarized at the interface A (for example, by chemical mechanical polishing CMP) to promote hybrid bonding with the first via contact 602. In addition, in order to promote the bonding strength between the second via contact 603 and the first via contact 602 and improve the conductivity, a second interface metal layer can be arranged at the second opening of the second via contact 603, and the area of ​​the second interface metal layer is larger than the area of ​​the second opening. Similarly, a first interface metal layer may be arranged at the first opening of the first through-hole contact 602, and the area of ​​the first interface metal layer is larger than the area of ​​the first opening. The areas of the first interface metal layer and the second interface metal layer may be equal, or the area of ​​the first interface metal layer may be larger than or smaller than the area of ​​the second interface metal layer. After the first interface metal layer and the second interface metal layer are bonded to each other, the bonding surface formed is larger than the bonding surface formed by directly bonding the first opening of the first through-hole contact 602 and the second opening of the second through-hole contact 603, thereby increasing the bonding strength and improving the conductivity between the first through-hole contact 602 and the second through-hole contact 603. The first interface metal layer and the second interface metal layer are, for example, made of a conductive metal, such as copper. The formation method thereof may, for example, include physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, chemical plating, and the like. The second through-hole contact portion 603 may be formed, for example, as follows: providing a driving circuit 606, then forming a second insulating layer 611B on the driving circuit 606, then etching the second insulating layer 611B to form a through hole leading to the top of the driving circuit 606, then depositing metal in the through hole, and finally flattening the opening of the through hole to form a bonding surface.

[0137] In addition, the second through-hole contact 603 is constructed according to the present invention, wherein the second through-hole contact 603 is used to electrically connect the driving circuit 606 to the bottom (here, the reflector layer 607) of the epitaxial layer 601 (or the light-emitting mesa) of the micro-LED array after bonding with the first through-hole contact 603, thereby connecting the epitaxial layer 601 to the anode 610. Here, a first metal barrier layer 617 is provided between the second through-hole contact 603 and the driving circuit 607. The first metal barrier layer 617 can prevent the metal in the second through-hole contact 603 from diffusing into the driving circuit 606 or the insulating layer 611B or preventing it from being oxidized. If the metal in the second through-hole contact 602 diffuses into the driving circuit 606, the electrical performance of the driving circuit will be affected, such as a short circuit; if it diffuses into the insulating layer 611B, it will affect the insulating effect of the insulating layer 611B, thereby causing leakage current or even a short circuit; if the metal in the second through-hole contact 603 is oxidized, it may cause poor contact between the second through-hole contact 603 and the driving circuit 606, or even cause a disconnection of the electrical line to the driving circuit 606. It can be seen that by providing the second through-hole contact 603 according to the present invention, the diffusion of the metal in the second through-hole contact 603 can be better avoided, thereby effectively preventing the risks of a short circuit, disconnection, etc. of the driving circuit 606.

[0138] A driving circuit 606, which is electrically connected to the second through-hole contact 603 so as to electrically connect the second epitaxial layer 601C of the light-emitting mesa 601 to the anode 610. To this end, the driving circuit 606 has a conductive wiring layer for interconnecting each second through-hole contact 603 to the corresponding anode 610. The driving circuit 606 can be, for example, a thin film transistor TFT driving circuit, and can include a 2T1C driving circuit, a 3T1C driving circuit, and a 5T2C driving circuit. The driving circuit 606 is configured to drive the micro light-emitting diode, for example, to control the connection, disconnection and brightness of the micro light-emitting diode. The driving circuit 606 can include, for example, a transistor, a capacitor, a conductive wiring layer, an insulating layer, and a metal layer. The conductive wiring layer is formed on the substrate and is configured to supply power to the micro light-emitting diode array. The insulating layer is formed on the conductive wiring layer, wherein the insulating layer is provided with a through hole, and the through hole is provided with a through hole contact (such as an IC copper column) for electrically connecting the conductive wiring layer to the micro light-emitting diode array. The metal layer is used for bonding and electrically contacting the micro light-emitting diode. The conductive line layer, the metal layer and the insulating layer may have been formed on the substrate 601 by deposition, such as physical vapor deposition (PVD) and chemical vapor deposition (CVD).

[0139] In one embodiment of the present invention, the drive circuit may be electrically connected to each micro-LED in the micro-LED array via a separate metal interconnect. In some embodiments, each micro-LED may be electrically controlled individually by the drive circuit. In some embodiments, the drive circuit may be electrically connected to electrodes of a micro-LED chip via a metal interconnect. In some embodiments, a dielectric layer may be formed in the gaps between the micro-LEDs. In some embodiments, a dielectric layer may also be formed in the gaps between the interconnects.

[0140] The micro-LED chip includes a plurality of micro-LED arrays, each of which includes a plurality of micro-LEDs. The driving mode of the micro-LEDs is, for example, passive matrix (PM) driving, in which the cathodes of all the micro-LEDs in each array are connected to the cathode in common, and the micro-LEDs with the same number in each array are connected to the corresponding anodes respectively. Thus, the on-off and the light emitting brightness of each LED can be individually controlled by controlling the model numbers on the corresponding cathode and anode.

[0141] A second bonding mark 609B, which is disposed in the second insulating layer 611B and exposes a second mark surface, i.e., an opening of the second bonding mark. The second bonding mark 609B in the lower stack 600B serves as a mark for alignment with the first bonding mark 609A in the upper stack 600A, thereby achieving precise hybrid bonding. The alignment method of the first bonding mark 609A and the second bonding mark 609B is that during hybrid bonding, the first mark surface is aligned and attached to the second mark surface. At this time, the upper stack 600A and the lower stack 600B have been aligned, and then hybrid bonding can be performed. The first bonding mark 609A and the second bonding mark 609B can be metal through holes, and the two can be bonded at the interface. In addition, the first bonding mark 609A and the second bonding mark 609B can have an enlarged opening and / or a metal layer can be coated at the opening to facilitate identification of their positions and increase bonding strength.

[0142] After the lower stack 600A and the upper stack 600B are formed, the lower stack 600A is bonded to the upper stack 600A by hybrid bonding, so that the first through hole contact 602 is bonded to the second through hole contact 603, and the first insulating layer 611A is bonded to the second insulating layer 611B, and optionally the first bonding mark 609A is bonded to the second bonding mark 609B, and the upper and lower parts of the third through hole between the preliminary 614 are bonded to each other. The present invention solves the technical problem encountered when manufacturing an inverted trapezoidal light-emitting mesa with a large upper surface and a small lower surface, that is, the problem of electrical connection between the light-emitting mesa and the driving circuit, by separately manufacturing the upper stack 600A and the lower stack 600B and then bonding the two to each other by hybrid bonding. The present invention realizes the electrical connection from the light-emitting table 601 to the driving circuit 606 through hybrid bonding, so that both the upper stack 600A and the lower stack 600B can be manufactured from the surface opposite to the hybrid bonding surface, that is, the interface A, toward the hybrid bonding surface, thereby realizing a high-quality conductive structure, such as the first to third through-hole contacts (such as IC copper pillars), and the length of the conductive structure can also be flexibly selected.

[0143] An example of a hybrid bond may include the following two parts:

[0144] (1) Dielectric-to-dielectric bonding (i.e., bonding between the first insulating layer 611A and the second insulating layer 611B): At room temperature, extremely flat and smooth dielectric surfaces obtained by chemical mechanical polishing (CMP) are activated by plasma treatment or other methods and then brought into close contact at room temperature to achieve preliminary bonding.

[0145] (2) Metal-to-metal bonding (i.e., bonding between through-hole contacts): After completing dielectric-to-dielectric bonding, the upper and lower layers are heated to 200-400°C for annealing to strengthen the dielectric bonding and promote metal-to-metal bonding, thereby achieving hybrid bonding.

[0146] A plurality of micro-LEDs constitute a micro-LED array, and a plurality of micro-LED arrays constitute a micro-LED chip. The size of each micro-LED chip does not exceed 1 cm, and the micro-LED preferably does not exceed 2050 microns. The micro-LED structure is formed in the micro-LED chip in an array form to achieve a printing resolution of, for example, 1200 DPI, 600 DPI, and a resolution of, for example, 720*480, 640*480, 1920*1080, 1280*720, 2K or 4K. The diameter of the micro-LED structure is at the nano-micron level, for example, 20 nm microns to 100 to 50 nm microns, etc.

[0147] Figures 4A-4E A first embodiment of a method for forming a through-hole contact according to the present invention is shown.

[0148] like Figure 4A As shown, in step S1, a first conductive structure 101 is provided. The first conductive structure 101 may be, for example, another through-hole contact, a conductive layer (such as a metal layer, a transparent conductive layer, etc.), a metal electrode, etc.

[0149] In step S2, a passivation layer 107 is formed on the first conductive structure 101. The passivation layer 107 may be formed by, for example, thermal oxidation, chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and the like.

[0150] like Figure 4B As shown, in step S2, a portion of the passivation layer 107 is removed to expose the first conductive structure 101. The removal step may include, for example, photolithography, wet etching and dry etching, wherein dry etching may include physical etching, chemical etching and reactive ion etching.

[0151] In step S3, a first metal barrier layer 106 is formed on the exposed first conductive structure 101. The first metal barrier layer 106 may include, for example, a layered structure, such as a first metal layer and a second metal layer. The first metal layer includes a plurality of stacks consisting of titanium layers and platinum layers, wherein the titanium layers and the platinum layers are arranged alternately with each other. The number of the stacks is 1 to 5, preferably 3. The thickness of the titanium layer is 100 to 300 angstroms, preferably 200 angstroms. The thickness of the platinum layer is 100 to 300 angstroms, preferably 200 angstroms. The second metal layer is made of titanium. The thickness of the second metal layer is 200 to 400 angstroms, preferably 300 angstroms. 1 angstrom = 1x10^(-10) meters. The formation method of the first metal barrier layer 106 includes, for example, chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), electroplating, chemical plating, and the like. When the first metal barrier layer 106 is a multi-layer structure, the above method may be performed multiple times, such as multiple depositions, multiple platings, and the like.

[0152] like Figure 4C As shown, in step S4, an insulating layer 103 is formed on the passivation layer 101 and the first metal barrier layer 106. The insulating layer 103 may be formed by, for example, coating, chemical vapor deposition (CVD), physical vapor deposition (PVD), thermal oxidation, sol-gel, electrodeposition, printing, and the like.

[0153] like Figure 4D As shown, in step S5, the insulating layer 103 is etched to form a through hole, wherein the bottom of the through hole 108 is aligned with the first metal barrier layer 106. Methods for forming the through hole 108 include, for example, laser drilling, chemical vapor deposition (CVD), ion implantation, reactive ion etching (RIE), and deep reactive ion etching (DRIE).

[0154] like Figure 4E As shown, in step S6, a filling metal 105 is deposited in the through hole 108. The deposition method of the filling metal 105 includes, for example, electroplating, chemical plating, chemical vapor deposition (CVD), physical vapor deposition (PVD), and the like.

[0155] Figures 5A-5D A second embodiment of the method for forming a through-hole contact according to the present invention is shown.

[0156] like Figure 5A As shown, in step S1 , a through hole 108 is provided. The through hole 108 is formed in the insulating layer 103 and has a filling metal 105 .

[0157] like Figure 5B As shown, in step S2 , a passivation layer 107 is formed on the top of the through hole 108 .

[0158] like Figure 5C As shown, in step S3 , a portion of the passivation layer 107 is removed to expose the filling metal 105 in the through hole 108 .

[0159] like Figure 5D As shown, in step S4, a first metal barrier layer 106 is formed on the exposed filling metal 105 and a third conductive structure 102 is formed on the first metal barrier layer. The first metal barrier layer 106 may include, for example, a layered structure, such as a first metal layer and a second metal layer. The first metal layer includes a plurality of stacks consisting of titanium layers and platinum layers, wherein the titanium layers and the platinum layers are alternately arranged with each other. The number of the stacks is 1 to 5, preferably 3. The thickness of the titanium layer is 100 to 300 angstroms, preferably 200 angstroms. The thickness of the platinum layer is 100 to 300 angstroms, preferably 200 angstroms. The second metal layer is made of titanium. The thickness of the second metal layer is 200 to 400 angstroms, preferably 300 angstroms. 1 angstrom = 1x10^(-10) meters. When the first metal barrier layer 106 is a multilayer structure, the above method may be performed multiple times, such as multiple depositions, multiple platings, and the like.

[0160] Although some embodiments of the present invention have been described in this application document, it will be appreciated by those skilled in the art that these embodiments are merely shown as examples. Those skilled in the art may conceive of numerous variations, alternatives, and improvements under the teachings of the present invention without departing from the scope of the present invention. The appended claims are intended to define the scope of the present invention and thus cover methods and structures within the scope of these claims themselves and their equivalents.

Claims

1. A through-hole contact for a micro light emitting diode, wherein the through-hole contact is configured to electrically connect a first conductive structure to a second conductive structure, wherein the first conductive structure is located below the through-hole contact and the second conductive structure is located above the through-hole contact, wherein the through-hole contact comprises: a through hole formed in the insulating layer having a cavity; A fill metal disposed in the cavity of the via for conducting electricity; as well as A first metal barrier layer is arranged between the bottom of the via and the first conductive structure and / or between the top of the via and the second conductive structure to block the filling metal from diffusing. 2 . The via contact according to claim 1 , wherein a width of the first metal barrier layer is greater than a bottom width of the via.

3. The through hole contact according to claim 1, further comprising: A second metal barrier layer is arranged between the inner wall of the through hole and the filling metal. 4 . The through-hole contact according to claim 1 , wherein the through-hole has a diameter of 0.2 to 1 μm and a height of 2 to 5 μm.

5. The through-hole contact according to claim 1, wherein the filling metal is selected from one or more of the following: Copper, gold, silver, and tin.

6. The through-hole contact according to any one of claims 1 to 5, wherein the first metal barrier layer and / or the second metal barrier layer comprises: A first metal layer comprising a plurality of multilayer stacks consisting of titanium layers and platinum layers, wherein the titanium layers and the platinum layers are arranged alternately with each other; as well as The second metal layer is made of titanium. The through-hole contact according to claim 6 , wherein the number of the stacked layers is 1 to 5.

8. The through hole contact according to claim 7, wherein: The titanium layer has a thickness of 100 to 300 angstroms; and / or The platinum layer has a thickness of 100 to 300 angstroms; and / or The second metal layer has a thickness of 200 to 400 angstroms.

9. The through-hole contact according to any one of claims 1 to 5, further comprising: A passivation layer is arranged between the through hole and the first conductive structure and / or the second conductive structure and exposes the first metal barrier layer.

10. The through-hole contact according to claim 9, wherein: The breakdown field strength of the passivation layer is not less than 1x10 7 V / cm; or The breakdown field strength of the passivation layer is not less than 6x10 8 V / cm.

11. The through-hole contact according to claim 9, wherein a material of the passivation layer is selected from the group consisting of: Silicon nitride, aluminum oxide, silicon dioxide, and a combination of silicon nitride and aluminum oxide. 12 . The via contact according to claim 9 , wherein the passivation layer is deposited at a temperature T, wherein the temperature T=100° C. to 300° C. 13 . The via contact according to claim 1 , wherein a ratio of a cross-sectional length of the first metal barrier layer to a diameter of the via is 1.2 to 1.

8. 14 . The through-hole contact according to claim 1 , wherein an offset between a center line of the through-hole and a center line of the first conductive structure is 0.1 to 0.3 μm. 15 . The via contact according to claim 1 , wherein the via contact is configured to electrically connect a light emitting mesa with a driving circuit.

16. A micro light emitting diode chip, comprising: A plurality of micro light emitting diodes, wherein the micro light emitting diodes include a light emitting mesa, which is arranged on a driving circuit and configured to emit a first light: Driving circuit; as well as The through-hole contact according to any one of claims 1 to 15, configured to electrically connect the light-emitting mesa to the driving circuit.

17. The micro light emitting diode chip according to claim 16, wherein: A metal layer is provided on the surface of the driving circuit, a plurality of through-hole contacts are provided on the driving circuit, the through-hole contacts are electrically connected to the metal layer, the micro light-emitting diode is bonded to the driving circuit through a bottom conductive bonding layer, and each light-emitting mesa corresponds to one of the through-hole contacts, and the light-emitting mesa includes a first epitaxial layer, a light-emitting layer, and a second epitaxial layer deposited in sequence; as well as The micro light emitting diode further comprises: a first electrode electrically connected to the through-hole contact portion; A passivation isolation layer covering the surface of the light-emitting mesa but exposing at least a portion of the second epitaxial layer; a transparent conductive layer, which is disposed on a surface of the passivation insulating layer and is in electrical contact with the first epitaxial layer; and The second electrode is disposed on the surface of the transparent conductive layer. 18 . The micro light emitting diode chip according to claim 17 , wherein the second electrode is a ring-shaped reflective electrode, which is disposed around the light emitting mesa.

19. The micro light emitting diode chip according to claim 17, wherein the polarity of the second electrode is opposite to that of the first electrode.

20. The micro-light emitting diode chip according to claim 17, wherein the material of the second epitaxial layer is a material layer of a second conductivity type comprising two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer is a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, wherein the first conductivity type is different from the second conductivity type.

21. The micro-LED chip according to claim 17, wherein the light-emitting layer comprises a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, an InGaAs / AlGaAs multi-quantum well layer, or an AlGaInP multi-quantum well layer. 22 . The micro light emitting diode chip according to claim 17 , wherein an electron blocking layer is disposed on a first side of the light emitting layer, wherein the first side refers to a side along which electrons migrate out of the light emitting layer.

23. The micro light emitting diode chip according to claim 17, wherein the material of the metal layer is an alloy of one or more of the following metals: Ni, Al, Ti, Ni, Pt, Au. 24 . The micro light emitting diode chip according to claim 17 , wherein the material of the passivation isolation layer is Si 3 N 4 film, SiO 2 film or Al 2 O 3 film.

25. A micro light emitting diode chip, comprising: The upper stack comprises: a first insulating layer configured to accommodate the light emitting mesa and the first via contact; a light emitting mesa configured to emit light, wherein a top surface area of ​​the light emitting mesa is greater than a bottom surface area of ​​the light emitting mesa; and A first through-hole contact portion, which is constructed according to any one of claims 1 to 15 and is electrically connected to the bottom of the light-emitting mesa and passes through the first insulating layer; and The lower stack comprises: a second insulating layer configured to accommodate a second through-hole contact; a second via, which is configured according to one of claims 1 to 15 and penetrates the second insulating layer; and The driving back plate is electrically connected to the second via contact, wherein the lower stack is bonded to the upper stack by hybrid bonding, so that the first via contact is bonded to the second via contact, and the first insulating layer is bonded to the second insulating layer.

26. A method for forming a through-hole contact, comprising the steps of: providing a first conductive structure; forming a passivation layer on the first conductive structure; removing a portion of the passivation layer to expose the first conductive structure; forming a first metal barrier layer on the exposed first conductive structure; forming an insulating layer on the passivation layer and the first metal barrier layer; Etching the insulating layer to form a through hole, wherein the bottom of the through hole is opposite to the first metal barrier layer; as well as Fill metal is deposited in the via.

27. The method according to claim 26, further comprising the steps of: Before depositing metal in the via hole, a second metal barrier layer is formed on the inner wall of the via hole.

28. The method according to claim 26, further comprising the steps of: forming a first metal barrier layer on top of the via; and A third conductive structure is formed on the first metal barrier layer.

Images