Preparation method of chiral laminated cell

Abstract

The invention discloses a preparation method of a chiral laminated cell, and belongs to the technical field of solar cells, the chiral laminated cell comprises a perovskite top cell and a crystalline silicon bottom cell, and the perovskite top cell and the crystalline silicon bottom cell are connected in series through a composite layer. The chiral laminated cell sequentially comprises a metal electrode, an antireflection layer, a transparent conductive film layer, a hole barrier layer, an electron transport layer, a chiral molecular layer, a perovskite absorption layer, a hole transport layer, a surface modification layer, a composite layer and a crystalline silicon bottom cell from top to bottom, the spiral stacked chiral structure material is adopted, the stacked arrangement is similar to a mechanical spring, the spiral stacked chiral structure material can deflect or deform when pressed, the spiral stacked chiral structure material can recover after pressure is released, and the spiral stacked chiral structure material shows excellent deformation tolerance and dynamic adaptability; a chiral material is introduced between the perovskite absorption layer and the electron transport layer to serve as a middle layer, and the effect of improving the mechanical performance and the photoelectric performance of the interface of the perovskite absorption layer and the electron transport layer is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and more specifically, to a method for preparing a chiral stacked cell. Background Art

[0002] With the continuous advancement of solar cell technology, in order to improve the efficiency of photoelectric conversion, researchers have begun to explore tandem cell technology. Tandem solar cells are a type of solar cell, which is characterized by stacking different types of solar cells together, taking advantage of their respective advantages to form an overall cell structure to achieve higher photoelectric conversion efficiency. Crystalline silicon perovskite tandem cells are the product of this technology. It stacks crystalline silicon solar cells with perovskite solar cells, making full use of the ideal band gap and mature industrial chain of crystalline silicon, as well as the high photoelectric conversion efficiency and spectral absorption capacity of perovskite. This combination not only breaks through the efficiency limit of crystalline silicon cells, but is also suitable for mainstream photovoltaic power station scenarios and is regarded as an upgraded version of crystalline silicon cells. In response to problems such as interface defects of perovskites in tandem cells, the study used a variety of passivation materials to passivate their defects, thereby improving the efficiency of tandem cells.

[0003] The crystalline silicon bottom cell of the stacked cell has a velvet structure. This surface structure makes the perovskite cell face an important challenge of relatively low mechanical reliability of key interfaces, especially the interface between two layers with different thermal expansion coefficients. These interfaces may cause interface sliding, delamination and the formation of voids due to different thermal expansion coefficients, ultimately leading to mechanical failure of the device and material degradation. Interface passivation materials are often used to solve problems between interfaces, and most passivation materials do not have much effect on the mechanical properties of the interface.

[0004] To this end, a method for preparing a chiral stacked battery is proposed. Summary of the invention

[0005] In view of the problems existing in the prior art, the purpose of the present invention is to provide a method for preparing a chiral stacked battery, which can significantly improve the mechanical properties and photoelectric properties of the interface between the perovskite absorption layer and the electron transport layer.

[0006] To solve the above problems, the present invention adopts the following technical solutions.

[0007] A method for preparing a chiral stacked cell, comprising a perovskite top cell and a crystalline silicon bottom cell, wherein the perovskite top cell and the crystalline silicon bottom cell are connected in series via a composite layer, comprising the following steps:

[0008] S1, magnetron sputtering composite layer on crystalline silicon bottom cell;

[0009] S2, spin coating a surface modification layer on the composite layer;

[0010] S3, spin coating a hole transport layer on the surface modification layer;

[0011] S4, spin coating a perovskite hole transport layer on the hole transport layer;

[0012] S5, preparing a chiral molecular layer by spin coating on the perovskite hole transport layer;

[0013] S6, evaporating an electron transport layer on the chiral molecular layer;

[0014] S7, atomically depositing a hole blocking layer on the electron transport layer;

[0015] S8, magnetron sputtering a transparent conductive thin film layer on the hole blocking layer;

[0016] S9, evaporating an anti-reflection layer on the transparent conductive film layer;

[0017] S10, preparing a metal electrode Ag by evaporation on the anti-reflection layer to obtain a chiral stacked battery.

[0018] Therefore, the chiral stacked cell includes from top to bottom: a metal electrode, an anti-reflection layer, a transparent conductive film layer, a hole blocking layer, an electron transport layer, a chiral molecule layer, a perovskite absorption layer, a hole transport layer, a surface modification layer, a composite layer, and a crystalline silicon bottom cell.

[0019] Furthermore, the band gap of perovskite is 1.6eV-1.75eV.

[0020] Further, the thickness of the composite layer is 5nm-40nm;

[0021] The thickness of the surface modification layer is 5-20 nm;

[0022] The hole transport layer has a thickness of 5nm-30nm.

[0023] Further, the thickness of the perovskite absorption layer is 400nm-2μm;

[0024] The thickness of the chiral molecule layer is 1-20 nm.

[0025] Further, the thickness of the electron transport layer is 5-30 nm;

[0026] The thickness of the hole blocking layer is 5-20 nm;

[0027] The thickness of the transparent conductive film layer is 40nm-200nm;

[0028] The thickness of the anti-reflection layer is 50-200 nm;

[0029] The thickness of the metal electrode is 80-500nm.

[0030] Further, the crystalline silicon bottom cell is any one of HJT, Topcon or PERC;

[0031] The metal electrode is any one of Au, Ag, Cu or Al;

[0032] The anti-reflection layer is any one of PMMA, MgF2 or LiF;

[0033] The transparent conductive film layer is any one of IZO, ITO, AZO or FTO.

[0034] Further, the hole blocking layer is any one of SnO2 and BCP;

[0035] The surface modification layer is any one of NiO and Al2O3;

[0036] The electron transport layer is SnO2, C 60 Or any one of PCBM;

[0037] The chiral molecular layer is any one of R(S)-MBAI, (R(S)-LIPF)2PbI4 or R(S)-CF3;

[0038] The perovskite hole transport layer Meo-2PACz, Me-4PAC, 4PADCB contains any one of the phosphoric acid group SAM;

[0039] The composite layer is any one of ITO, IZO or VTTO.

[0040] Compared with the prior art, the present invention has the following beneficial effects:

[0041] This scheme proposes a chiral stacked battery. To address the mechanical performance issues of the key perovskite interface in the stacked battery, a chiral structural material with a spiral stack is used. This stacking arrangement is similar to a mechanical spring, which can deflect or deform when under pressure and return to its original shape after the pressure is released, showing excellent deformation tolerance and dynamic adaptability. The chiral material is introduced as an intermediate layer between the perovskite absorption layer and the electron transport layer, which plays a role in improving the mechanical and photoelectric properties of the interface between the perovskite absorption layer and the electron transport layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 The flowchart of the preparation of chiral stacked batteries of the present invention. DETAILED DESCRIPTION

[0043] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention; it is obvious that the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments, and all other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making creative work are within the scope of protection of the present invention.

[0044] Embodiment 1:

[0045] See also Figure 1 A method for preparing a chiral stacked cell, comprising a perovskite top cell and a crystalline silicon bottom cell, wherein the perovskite top cell and the crystalline silicon bottom cell are connected in series through a composite layer, comprising the following steps:

[0046] S1, magnetron sputtering composite layer on crystalline silicon bottom cell;

[0047] S2, spin coating a surface modification layer on the composite layer;

[0048] S3, spin coating a hole transport layer on the surface modification layer;

[0049] S4, spin coating a perovskite hole transport layer on the hole transport layer;

[0050] S5, preparing a chiral molecular layer by spin coating on the perovskite hole transport layer;

[0051] S6, evaporating an electron transport layer on the chiral molecular layer;

[0052] S7, atomically depositing a hole blocking layer on the electron transport layer;

[0053] S8, magnetron sputtering a transparent conductive thin film layer on the hole blocking layer;

[0054] S9, evaporating an anti-reflection layer on the transparent conductive film layer;

[0055] S10, preparing a metal electrode Ag by evaporation on the anti-reflection layer to obtain a chiral stacked battery.

[0056] Therefore, the chiral stacked cell includes from top to bottom: a metal electrode, an anti-reflection layer, a transparent conductive film layer, a hole blocking layer, an electron transport layer, a chiral molecule layer, a perovskite absorption layer, a hole transport layer, a surface modification layer, a composite layer, and a crystalline silicon bottom cell.

[0057] like Figure 1 As shown, the band gap of perovskite is 1.6eV-1.75eV.

[0058] like Figure 1 As shown, the thickness of the composite layer is 5nm-40nm;

[0059] The thickness of the surface modification layer is 5-20 nm;

[0060] The hole transport layer has a thickness of 5nm-30nm.

[0061] like Figure 1 As shown, the thickness of the perovskite absorption layer is 400nm-2μm;

[0062] The thickness of the chiral molecule layer is 1-20 nm.

[0063] like Figure 1 As shown, the thickness of the electron transport layer is 5-30 nm;

[0064] The thickness of the hole blocking layer is 5-20 nm;

[0065] The thickness of the transparent conductive film layer is 40nm-200nm;

[0066] The thickness of the anti-reflection layer is 50-200 nm;

[0067] The thickness of the metal electrode is 80-500nm.

[0068] like Figure 1 As shown, the crystalline silicon bottom cell is any one of HJT, Topcon or PERC;

[0069] The metal electrode is any one of Au, Ag, Cu or Al;

[0070] The anti-reflection layer is any one of PMMA, MgF2 or LiF;

[0071] The transparent conductive film layer is any one of IZO, ITO, AZO or FTO.

[0072] like Figure 1 As shown, the hole blocking layer is any one of SnO2 and BCP;

[0073] The surface modification layer is any one of NiO and Al2O3;

[0074] The electron transport layer is SnO2, C 60 Or any one of PCBM;

[0075] The chiral molecular layer is any one of R(S)-MBAI, (R(S)-LIPF)2PbI4 or R(S)-CF3;

[0076] The perovskite hole transport layer Meo-2PACz, Me-4PAC, 4PADCB contains any one of the phosphoric acid group SAM;

[0077] The composite layer is any one of ITO, IZO or VTTO.

[0078] In order to address the mechanical property issues of the key interfaces of perovskites in stacked cells, chiral structural materials with spiral stacking are used. This stacking arrangement is similar to a mechanical spring, which can deflect or deform when under pressure and return to its original shape after the pressure is released, showing excellent deformation tolerance and dynamic adaptability. The chiral material is introduced as an intermediate layer between the perovskite absorption layer and the electron transport layer, which plays a role in improving the mechanical and photoelectric properties of the interface between the perovskite absorption layer and the electron transport layer.

[0079] The above is only a preferred specific implementation of the present invention; however, the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical solution and its improved conception within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for preparing a chiral stacked cell, comprising a perovskite top cell and a crystalline silicon bottom cell, wherein the perovskite top cell and the crystalline silicon bottom cell are connected in series via a composite layer, characterized in that: The steps include: S1, magnetron sputtering composite layer on crystalline silicon bottom cell; S2, spin coating a surface modification layer on the composite layer; S3, spin coating a hole transport layer on the surface modification layer; S4, spin coating a perovskite hole transport layer on the hole transport layer; S5, preparing a chiral molecular layer by spin coating on the perovskite hole transport layer; S6, evaporating an electron transport layer on the chiral molecular layer; S7, atomically depositing a hole blocking layer on the electron transport layer; S8, magnetron sputtering a transparent conductive thin film layer on the hole blocking layer; S9, evaporating an anti-reflection layer on the transparent conductive film layer; S10, preparing a metal electrode Ag by evaporation on the anti-reflection layer to obtain a chiral stacked battery.

2. The method for preparing a chiral stacked battery according to claim 1, characterized in that: The band gap of the perovskite is 1.6eV-1.75eV.

3. The method for preparing a chiral stacked battery according to claim 1, characterized in that: The thickness of the composite layer is 5nm-40nm; The thickness of the surface modification layer is 5-20 nm; The hole transport layer has a thickness of 5nm-30nm.

4. The method for preparing a chiral stacked battery according to claim 1, characterized in that: The thickness of the perovskite absorption layer is 400nm-2μm; The thickness of the chiral molecule layer is 1-20 nm.

5. The method for preparing a chiral stacked battery according to claim 1, characterized in that: The thickness of the electron transport layer is 5-30 nm; The thickness of the hole blocking layer is 5-20 nm; The thickness of the transparent conductive film layer is 40nm-200nm; The thickness of the anti-reflection layer is 50-200 nm; The thickness of the metal electrode is 80-500nm.

6. The method for preparing a chiral stacked battery according to claim 1, characterized in that: The crystalline silicon bottom cell is any one of HJT, Topcon or PERC; The metal electrode is any one of Au, Ag, Cu or Al; The anti-reflection layer is any one of PMMA, MgF2 or LiF; The transparent conductive film layer is any one of IZO, ITO, AZO or FTO.

7. The method for preparing a chiral stacked battery according to claim 1, characterized in that: The hole blocking layer is any one of SnO2 and BCP; The surface modification layer is any one of NiO and Al2O3; The electron transport layer is SnO2, C 60 Or any one of PCBM; The chiral molecular layer is any one of R(S)-MBAI, (R(S)-LIPF)2PbI4 or R(S)-CF3; The perovskite hole transport layer Meo-2PACz, Me-4PAC, 4PADCB contains any one of the phosphoric acid group SAM; The composite layer is any one of ITO, IZO or VTTO.

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