Display device

Abstract

Disclosed is a display device including: a first area and a second area adjacent to the first area; a first pixel in the first region; and a second pixel in the second region, where the first pixel includes at least one second emission region, and where the second pixel includes at least one first emission region and at least one second emission region. A hemispherical lens is disposed in the first emission region, and a semi-cylindrical lens is disposed in the second emission region. Thus, the second region is configured such that the viewing angle control function is activated.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2023-0156233, filed on November 13, 2023, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] The present disclosure relates to a display device, and more particularly, to a display device capable of controlling a viewing angle. Background Art

[0004] With the advancement of technology in modern society, display devices are used to provide information to users in various forms. Display devices are included not only in electronic display boards that transmit visual information unidirectionally, but also in various electronic devices that use advanced technology to check user input and provide information in response to the checked input.

[0005] For example, a display device may be included in a vehicle to provide a variety of information to a driver and passengers of the vehicle. However, the display device of the vehicle needs to appropriately display content so as not to interfere with the driving of the vehicle. For example, the display device of the vehicle needs to limit the display of content that may distract the driver from driving during the driving of the vehicle. Summary of the invention

[0006] Accordingly, the present disclosure is directed to a display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.

[0007] An object of embodiments of the present disclosure is to provide a display device capable of selectively controlling a viewing angle.

[0008] Another object of an embodiment of the present disclosure is to provide a display device exhibiting improved light emitting efficiency.

[0009] Still another object of an embodiment of the present disclosure is to provide a display device capable of extending the life of a light emitting device.

[0010] Still another object of an embodiment of the present disclosure is to provide a display device capable of minimizing recognition of a boundary between a viewing angle control area and a general area.

[0011] The objects to be achieved by the present disclosure are not limited to the above-mentioned objects, and other objects not mentioned herein will be clearly understood by those skilled in the art from the following description.

[0012] Additional advantages, purposes and features of the present disclosure will be described in part in the following description, and in part will become apparent to those skilled in the art after reviewing the following, or may be understood from the practice of the present disclosure. The purposes and other advantages of the present disclosure may be realized and obtained through the structures specifically indicated in the written description and claims and the drawings.

[0013] To achieve these objectives and other advantages, and in accordance with the purposes of the present disclosure, as embodied and broadly described herein, a display device includes: a first region and a second region adjacent to the first region; a first pixel located in the first region; and a second pixel located in the second region. The first pixel includes at least one second emission region, and the second pixel includes at least one first emission region and at least one second emission region. A hemispherical lens is disposed in the first emission region, and a semi-cylindrical lens is disposed in the second emission region.

[0014] In another aspect of the present disclosure, a display device includes: a substrate in which a first area and a second area adjacent to the first area are defined; a first pixel located in the first area; and a second pixel located in the second area. The first pixel and the second pixel are pixels having the same color. Each of the first pixel and the second pixel includes one or more emission areas, and the number of emission areas of the second pixel is greater than the number of emission areas of the first pixel.

[0015] In another aspect of the present disclosure, a display device includes: a substrate in which a first area and a second area adjacent to the first area are defined; a first pixel located in the first area; a second pixel located in the second area; and a lens corresponding to the first pixel and a lens corresponding to the second pixel, respectively. The first pixel and the second pixel have the same color. The number of lenses corresponding to the second pixel is greater than the number of lenses corresponding to the first pixel.

[0016] Details of other aspects are included in the following detailed description and accompanying drawings.

[0017] It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application, illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0019] Figure 1is a diagram showing an example of a display device according to an embodiment of the present disclosure;

[0020] Figure 2 is a cross-sectional view of a display device according to an embodiment of the present disclosure;

[0021] Figure 3 is a cross-sectional view of an emission region of a display device according to an embodiment of the present disclosure;

[0022] Figure 4 is a driving circuit diagram of a pixel according to an embodiment of the present disclosure;

[0023] Figure 5 and Figure 6 is a perspective view of a lens according to an embodiment of the present disclosure;

[0024] Figure 7 and Figure 8 It is shown Figure 5 and Figure 6 a graph of the optical curves of the lens shown;

[0025] Fig. 9 is an enlarged plan view of a display device according to an embodiment of the present disclosure;

[0026] Fig.10 yes Fig. 9 An enlarged plan view of area B is shown;

[0027] Fig.11 yes Fig. 9 An enlarged plan view of area C is shown;

[0028] Fig.12 yes Fig. 9 An enlarged plan view of another embodiment of region C is shown; and

[0029] Fig.13 and Fig.14 is an enlarged plan view of a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0030] From the embodiments described in detail below with reference to the accompanying drawings, the advantages and features of the present disclosure and the methods for achieving these advantages and features will become clear. However, the present disclosure can be implemented in many different forms and should not be interpreted as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that the present disclosure will be comprehensive and complete and the scope of the present disclosure will be fully conveyed to those skilled in the art.

[0031] In the accompanying drawings for illustrating exemplary embodiments of the present disclosure, for example, the shapes, sizes, ratios, angles and numbers shown are given by way of example and are therefore not limited to the present disclosure. Throughout this specification, the same reference numerals represent the same constituent elements. In addition, in the following description of the present disclosure, when the detailed description of the known functions and configurations incorporated herein may make the subject matter of the present disclosure quite unclear, the detailed description will be omitted. Unless used with the term "only", the terms "including", "including" and / or "having" used in this specification do not exclude the presence or addition of other elements. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form.

[0032] In the description of constituent elements, even if there is no explicit description thereof, the constituent elements are construed as including an error range.

[0033] In the description of various embodiments, when describing a positional relationship, for example, when using "on", "above", "below", "near", etc. to describe the positional relationship between two parts, unless the terms "directly" or "closely" are used, one or more other parts may be located between the two parts.

[0034] When an element or layer is referred to as being “on” another element or layer, it can be directly on the other element or layer, or intervening elements or layers may be present.

[0035] It is understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements are not limited by these terms. These terms are only used to distinguish one element from another element. Therefore, in this specification, unless otherwise mentioned, the element indicated by "first" may be the same as the element indicated by "second" without exceeding the technical scope of the present disclosure.

[0036] Throughout the specification, the same reference numerals refer to the same elements.

[0037] Since the size and thickness of each component shown in the drawings are represented for convenience of description, the present disclosure is not necessarily limited to the shown size and thickness of each component.

[0038] The corresponding features of the various embodiments of the present disclosure may be coupled and combined with each other in part or in whole, and various technical connections and operation modes thereof are possible. These various embodiments may be performed independently of each other, or may be performed in association with each other.

[0039] Hereinafter, the present disclosure will be described with reference to the accompanying drawings.

[0040] Figure 1is a diagram illustrating an example of a display device according to an embodiment of the present disclosure.

[0041] The display device 100 may be provided on at least a portion of a dashboard of the vehicle. The dashboard of the vehicle may include components provided in front of the front seats of the vehicle (e.g., the driver's seat and the front passenger seat). For example, input components for operating various systems provided in the vehicle (e.g., an air conditioning system, an audio system, and a navigation system) may be provided on the dashboard of the vehicle.

[0042] In an embodiment, the display device 100 may be provided on a dashboard of a vehicle and may be used as an input unit to operate at least some of the various systems provided in the vehicle. The display device 100 may provide various types of information related to the vehicle, such as vehicle driving information (e.g., the current speed of the vehicle, the remaining fuel, and the driving distance) and information about components of the vehicle (e.g., the degree of damage to the tire).

[0043] In an embodiment, the display device 100 may be arranged to extend over the front seats of the vehicle, i.e., the driver's seat and the front passenger seat. Users of the display device 100 may include the driver of the vehicle and the passenger in the front passenger seat. Both the driver and the passenger of the vehicle may use the display device 100.

[0044] In an embodiment, Figure 1 The illustrated display device 100 may represent a portion of the display device 100 . Figure 1 The display device 100 shown may represent a display panel among the multiple components included in the display device 100. For example, specifically, Figure 1 The display device 100 shown may represent at least a portion of an active area of ​​a display panel and at least a portion of an inactive area of ​​a display panel. Figure 1 Components other than those shown may be installed in the interior (or at least a portion of the interior) of the vehicle.

[0045] In an embodiment, Figure 1 The display device 100 shown may be divided into a cluster area, a central information display (CID) area, and a co-driver display (CDD) area. A separate display device may be installed for each area. Alternatively, one display device may be installed to extend from the cluster area to the CDD area. Figure 1 1 shows that one display device 100 is installed to extend from the cluster area to the CDD area, but the present disclosure is not limited thereto. One or more display devices may be installed to cover the cluster area, the CID area, and the CDD area.

[0046] In order to prevent an image displayed in a portion of the CID region or the CDD region from attracting the attention of the driver of the vehicle, the viewing angles of some regions of the display device 100 may be controlled to restrict the driver of the vehicle from viewing the image.

[0047] Therefore, a predetermined area of ​​the display device 100 installed in the vehicle may have a function of controlling a viewing angle to restrict a driver from viewing the area.

[0048] Figure 2 is a cross-sectional view of a display device according to an embodiment of the present disclosure. Figure 2 A pixel configuration for controlling a viewing angle in the above-described display device 100 is described.

[0049] like Figure 2 As shown, the display device 100 according to an embodiment of the present disclosure may include a substrate 110, a plurality of first light-emitting devices De1, a plurality of second light-emitting devices De2, an encapsulation layer 190, a light blocking pattern 210, an optical gap layer 220, a lens layer 230, a planarization layer 240 and a polarization layer 250.

[0050] A plurality of sub-pixels SP1, SP2, and SP3 are defined on the substrate 110. For example, a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3 are defined on the substrate 110. Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 includes a first emission area EA1 and a second emission area EA2.

[0051] The first light emitting device De1 is disposed in the first emission area EA1, and the second light emitting device De2 is disposed in the second emission area EA2.

[0052] The first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may be a red subpixel, a green subpixel, and a blue subpixel, respectively. For example, the first light-emitting device De1 and the second light-emitting device De2 of the first subpixel SP1 may emit red light, the first light-emitting device De1 and the second light-emitting device De2 of the second subpixel SP2 may emit green light, and the first light-emitting device De1 and the second light-emitting device De2 of the third subpixel SP3 may emit blue light.

[0053] An encapsulation layer 190 is disposed on the first light emitting device De1 and the second light emitting device De2. The encapsulation layer 190 has a flat upper surface. The encapsulation layer 190 may protect the first light emitting device De1 and the second light emitting device De2 from moisture and oxygen.

[0054] A light blocking pattern 210 is disposed on the encapsulation layer 190. The light blocking pattern 210 is formed to correspond to a region between adjacent sub-pixels SP1, SP2, and SP3 and / or a region between the first emission area EA1 and the second emission area EA2 of each sub-pixel SP1, SP2, and SP3.

[0055] The light blocking pattern 210 may be a black matrix. For example, the light blocking pattern 210 may be made of black resin, chrome oxide, etc. Alternatively, the light blocking pattern 210 may be a touch electrode. For example, the light blocking pattern 210 may be made of metal. In this case, the touch electrode may include a plurality of transmitting electrodes and a plurality of receiving electrodes intersecting each other, and a touch may be detected by a change in capacitance between the plurality of transmitting electrodes and the plurality of receiving electrodes.

[0056] An optical gap layer 220 is disposed on the light blocking pattern 210. The optical gap layer 220 ensures an optical gap between the first light emitting device De1 and the second light emitting device De2 and the lenses 232 and 234 of the lens layer 230 to improve the efficiency of the lenses 232 and 234. For example, light from the first light emitting device De1 and the second light emitting device De2 can be refracted in a specific direction by the lenses 232 and 234. The thickness of the optical gap layer 220 may be in a range from several micrometers (μm) to tens of micrometers. The optical gap layer 220 may be made of an organic insulating material. For example, the optical gap layer 220 may be made of photopropylene, benzocyclobutene (BCB), polyimide (PI) or polyamide (PA). However, the present disclosure is not limited thereto.

[0057] A lens layer 230 is disposed on the optical gap layer 220. The lens layer 230 includes a first lens 232 and a second lens 234. The first lens 232 is disposed on the first emission area EA1 to refract light from the first light emitting device De1 in a specific direction. The second lens 234 is disposed on the second emission area EA2 to refract light from the second light emitting device De2 in a specific direction. A portion of each of the first lens 232 and the second lens 234 may overlap with the light blocking pattern 210.

[0058] The first lens 232 is a hemispherical lens, and the second lens 234 is a semi-cylindrical lens. For example, the first light L1 emitted from the first light emitting device De1 of each of the sub-pixels SP1, SP2, and SP3 is refracted by the first lens 232 and output at a specific angle, and the second light L2 emitted from the second light emitting device De2 of each of the sub-pixels SP1, SP2, and SP3 is refracted by the second lens 234 and output at a specific angle. In this way, the viewing angle of each of the sub-pixels SP1, SP2, and SP3 can be limited.

[0059] A planarization layer 240 is provided on the lens layer 230 to protect the first lens 232 and the second lens 234. The planarization layer 240 is made of an organic insulating material. For example, the planarization layer 240 may be made of photopropylene, benzocyclobutene (BCB), polyimide (PI) or polyamide (PA). However, the present disclosure is not limited thereto. The planarization layer 240 has a flat upper surface. The refractive index of the planarization layer 240 is less than the refractive index of the first lens 232 and the refractive index of the second lens 234.

[0060] A polarization layer 250 is disposed on the planarization layer 240. The polarization layer 250 may include a linear polarization layer and a retardation layer. The polarization layer 250 may convert a polarization state of external light incident on the display device 100, thereby preventing the external light from being reflected from the display device 100 and then emitted back to the outside.

[0061] Will refer to Figure 3 An emission region of a display device according to an embodiment of the present disclosure is described.

[0062] Figure 3 is a cross-sectional view of an emission region of a display device according to an embodiment of the present disclosure.

[0063] like Figure 3 As shown, the display device 100 according to an embodiment of the present disclosure includes a substrate 110 , a plurality of transistors T1 and T2 , a plurality of light emitting devices De1 and De2 , and an encapsulation layer 190 .

[0064] Specifically, each of the sub-pixels SP1, SP2, and SP3 on the substrate 110 includes a first emission area EA1 and a second emission area EA2. The substrate 110 may be a glass substrate or a plastic substrate. For example, polyimide (PI) may be used for the plastic substrate. However, the present disclosure is not limited thereto.

[0065] A buffer layer 120 is formed on the substrate 110. The buffer layer 120 is substantially located on the entire surface of the substrate 110. The buffer layer 120 prevents moisture or foreign matter from moving from the substrate 110 to the transistors T1 and T2. The buffer layer 120 may be made of a material such as silicon oxide (SiO 2 The buffer layer 120 may be formed of an inorganic material such as SiO2 and silicon nitride (SiNx).

[0066] Patterned first and second semiconductor layers 122 and 124 are formed on the buffer layer 120 of the first and second emission regions EA1 and EA2, respectively. Each of the first and second semiconductor layers 122 and 124 may be independently made of an oxide semiconductor material or polysilicon.

[0067] If the first and second semiconductor layers 122 and 124 are made of an oxide semiconductor material, a shielding pattern may be additionally formed under the first and second semiconductor layers 122 and 124. The shielding pattern blocks the incidence of light on the first and second semiconductor layers 122 and 124, thereby preventing the first and second semiconductor layers 122 and 124 from being degraded by light.

[0068] On the other hand, if the first semiconductor layer 122 and the second semiconductor layer 124 are made of polysilicon, both edges of each of the first semiconductor layer 122 and the second semiconductor layer 124 may be doped with impurities.

[0069] A gate insulating layer 130 made of an insulating material is disposed on the first semiconductor layer 122 and the second semiconductor layer 124. Figure 2 In the embodiment, the gate insulating layer 130 is formed on substantially the entire surface of the substrate 110. However, in another example, the gate insulating layer 130 may be patterned into the same shape as the first gate electrode 132 and the second gate electrode 134.

[0070] The gate insulating layer 130 may be made of, for example, silicon oxide (SiO 2 ) and silicon nitride (SiNx). If the first semiconductor layer 122 and the second semiconductor layer 124 are made of an oxide semiconductor material, the gate insulating layer 130 may be made of silicon oxide SiO 2 On the other hand, if the first semiconductor layer 122 and the second semiconductor layer 124 are made of polysilicon, the gate insulating layer 130 may be made of silicon oxide (SiO 2 ) or silicon nitride (SiNx).

[0071] The first gate electrode 132 and the second gate electrode 134 are formed on the gate insulating layer 130 so as to correspond to the first semiconductor layer 122 and the second semiconductor layer 124, respectively. The first gate electrode 132 and the second gate electrode 134 are made of a conductive material such as metal. In addition, a gate line may be formed on the gate insulating layer 130. The gate line may extend in one direction.

[0072] An interlayer insulating layer 140 is formed on substantially the entire surface of the substrate 110 on the first gate electrode 132 and the second gate electrode 134. The interlayer insulating layer is made of an insulating material. The interlayer insulating layer 140 may be made of, for example, silicon oxide (SiO 2 ) and silicon nitride (SiNx), or can be formed of an inorganic insulating material such as photopropylene and benzocyclobutene.

[0073] The interlayer insulating layer 140 includes a contact hole that exposes both sides of the upper surface of each of the first semiconductor layer 122 and the second semiconductor layer 124. A contact hole may also be formed in the gate insulating layer 130. In the first emission area EA1, a first source electrode 142 and a first drain electrode 144 are formed on the interlayer insulating layer 140; and in the second emission area EA2, a second source electrode 146 and a second drain electrode 148 are formed on the interlayer insulating layer 140. The first source electrode 142, the first drain electrode 144, the second source electrode 146 and the second drain electrode 148 are made of a conductive material such as a metal. In addition, a data line and a power line may be formed on the interlayer insulating layer 140 so as to extend in a direction perpendicular to the direction in which the gate line extends.

[0074] The first source electrode 142 and the first drain electrode 144 contact both sides of the first semiconductor layer 122 through the contact holes in the interlayer insulating layer 140, and the second source electrode 146 and the second drain electrode 148 contact both sides of the second semiconductor layer 124 through the contact holes in the interlayer insulating layer 140. The data line extends in a direction perpendicular to the direction in which the gate line extends to intersect the gate line, thereby defining a pixel area corresponding to each sub-pixel, and a power line supplying a high potential voltage is positioned to be spaced apart from the data line.

[0075] The first semiconductor layer 122 , the first gate electrode 132 , the first source electrode 142 , and the first drain electrode 144 form a first transistor T1 , and the second semiconductor layer 124 , the second gate electrode 134 , the second source electrode 146 , and the second drain electrode 148 form a second transistor T2 .

[0076] At least one transistor having the same structure as the first transistor T1 and the second transistor T2 may be additionally formed on the substrate 110 of each sub-pixel. However, the present disclosure is not limited thereto.

[0077] A protective layer 150 is formed on the first source electrode 142, the first drain electrode 144, the second source electrode 146, and the second drain electrode 148 on substantially the entire surface of the substrate 110. The protective layer 150 is made of an insulating material. The protective layer 150 may be formed of an organic insulating material such as photopropylene and benzocyclobutene. The protective layer 150 includes a flat upper surface.

[0078] A layer made of, for example, silicon oxide (SiO 2 ) and silicon nitride (SiNx). For example, at least one insulating layer including an inorganic insulating material may be provided between the first transistor T1 and the protective layer 150 and between the second transistor T2 and the protective layer 150.

[0079] The protective layer 150 includes a first drain contact hole 150 a and a second drain contact hole 150 b exposing the first drain electrode 144 and the second drain electrode 148 , respectively.

[0080] A first anode electrode 162 and a second anode electrode 164 are formed on the protective layer 150. The first anode electrode 162 and the second anode electrode 164 are made of a material having a relatively high work function. The first anode electrode 162 is located in the first emission area EA1 and contacts the first drain electrode 144 through the first drain contact hole 150a. The second anode electrode 164 is located in the second emission area EA2 and contacts the second drain electrode 148 through the second drain contact hole 150b.

[0081] For example, each of the first anode electrode 162 and the second anode electrode 164 may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). However, the present disclosure is not limited thereto.

[0082] The display device 100 according to an embodiment of the present disclosure may be a top-emission type display device, in which light from a plurality of light-emitting devices De1 and De2 is output in a direction opposite to the substrate 110. Therefore, each of the first anode electrode 162 and the second anode electrode 164 may further include a reflective electrode or a reflective layer made of a highly reflective metal material under a layer made of a transparent conductive material. For example, the reflective electrode or the reflective layer may be made of an aluminum-palladium-copper (APC) alloy, silver (Ag) or aluminum (Al). In this case, each of the first anode electrode 162 and the second anode electrode 164 may have a three-layer structure of ITO / APC / ITO, ITO / Ag / ITO or ITO / Al / ITO. However, the present disclosure is not limited thereto.

[0083] A bank layer 165 is formed on the first anode electrode 162 and the second anode electrode 164. The bank layer 165 is made of an insulating material. For example, the bank layer 165 may be made of a polyimide resin, an acrylic resin, or a benzocyclobutene resin. However, the present disclosure is not limited thereto. In the present disclosure, the bank layer 165 may have a single-layer structure or a double-layer structure. For example, the bank layer 165 may have a double-layer structure including a lower hydrophilic bank layer and an upper hydrophobic bank layer.

[0084] The bank layer 165 overlaps the edges of the first and second anode electrodes 162 and 164. The bank layer 165 covers the edge of each of the first and second anode electrodes 162 and 164. The bank layer 165 includes first and second openings 165a and 165b to expose a portion of each of the first and second anode electrodes 162 and 164.

[0085] The bank layer 165 included in at least one of the first, second, and third subpixels SP1, SP2, and SP3 may further include a third opening that additionally exposes at least one of the first and second anode electrodes 162 and 164. The bank layer including the third opening will be described in more detail later.

[0086] An emission unit 170 is formed on the first and second anode electrodes 162 and 164 exposed through the first and second openings 165a and 165b in the bank layer 165. The emission unit 170 may include an organic layer 172 and an emission layer 174 between the first and second anode electrodes 162 and 164.

[0087] The organic layer 172 is a functional layer for improving the light emitting efficiency of the emission layer 174. For example, the organic layer 172 may include at least one of a hole injection layer (HIL) that promotes hole injection, a hole transport layer (HTL) that promotes hole transport, an electron injection layer (EIL) that promotes electron injection from the cathode electrode 180, and an electron transport layer (ETL) that promotes electron transport. The organic layer 172 may be formed as a layer in each of the sub-pixels SP1, SP2, and SP3. The organic layer 172 may be formed as a layer over the entirety of each of the sub-pixels SP1, SP2, and SP3. That is, the organic layers 172 of the sub-pixels SP1, SP2, and SP3 may be connected to each other to form an integrated common layer. As Figure 3 As shown, the organic layer 172 is disposed below the emission layer 174. However, depending on the type of the emission layer 174, the organic layer 172 may be disposed above the emission layer 174. For example, a hole injection layer (HIL) and a hole transport layer (HTL) may be disposed below the emission layer 174, and an electron injection layer (EIL) and an electron transport layer (ETL) may be disposed above the emission layer 174.

[0088] The emission layer 174 may be made of one of a red light emitting material, a green light emitting material, and a blue light emitting material. However, the present disclosure is not limited thereto. The light emitting material may be an organic light emitting material such as a phosphorescent compound or a fluorescent compound. However, the present disclosure is not limited thereto. For example, an inorganic light emitting material such as a quantum dot may be used.

[0089] The emission layer 174 on the first anode electrode 162 and the emission layer 174 on the second anode electrode 164 are connected to each other to be integrated. However, the present disclosure is not limited thereto. The emission layer 174 on the first anode electrode 162 and the emission layer 174 on the second anode electrode 164 may be separated from each other.

[0090] The emission layer 174 may be formed by an evaporation process. In this case, a fine metal mask (FMM) may be used to pattern the emission layer 174 in each sub-pixel. Alternatively, the emission layer 174 may be formed by a solution process. In this case, the emission layer 174 may be disposed only within the first opening 165a and the second opening 165b. At a position close to the embankment layer 165, the height of the emission layer 174 may gradually increase in a direction close to the embankment layer 165.

[0091] A cathode electrode 180 is formed on the emission unit 170 on substantially the entire surface of the substrate 110. The cathode electrode 180 is made of a conductive material having a relatively low work function. For example, the cathode electrode 180 may be formed of aluminum, magnesium, silver, or an alloy thereof. In this case, the cathode electrode 180 has a relatively small thickness to allow light from the emission unit 170 to pass through the cathode electrode 180. Alternatively, the cathode electrode 180 may be formed of a transparent conductive material such as indium gallium oxide (IGO). However, the present disclosure is not limited thereto.

[0092] The first anode electrode 162, the emission unit 170, and the cathode electrode 180 in the first emission area EA1 form a first light emitting device De1, and the second anode electrode 164, the emission unit 170, and the cathode electrode 180 in the second emission area EA2 form a second light emitting device De2.

[0093] The display device 100 according to an embodiment of the present disclosure may be a top emission type display device in which light from the emission unit 170 of the first light emitting device De1 and the emission unit 170 of the second light emitting device De2 is output in a direction opposite to the substrate 110. For example, light from the emission unit 170 of the first light emitting device De1 and the emission unit 170 of the second light emitting device De2 may be emitted to the outside through the cathode electrode 180. The top emission type may have a wider emission area than a bottom emission type having the same size. Therefore, the display device 100 according to an embodiment of the present disclosure may exhibit improved brightness and reduced power consumption.

[0094] On substantially the entire surface of the substrate 110, an encapsulation layer 190 is formed on the cathode electrode 180. The encapsulation layer 190 prevents external moisture and / or oxygen from entering the first light emitting device De1 and the second light emitting device De2. The encapsulation layer 190 may be formed of a single layer or a plurality of layers. For example, the encapsulation layer 190 may have a stacked structure of a first inorganic layer 192, an organic layer 194, and a second inorganic layer 196. The organic layer 194 may be a layer that blocks foreign substances generated during the manufacturing process.

[0095] As described above, in the display device 100 according to the embodiment of the present disclosure, each of the sub-pixels SP1, SP2, and SP3 includes a first emission area EA1 and a second emission area EA2, a hemispherical first lens 232 is disposed on the first emission area EA1 of each of the sub-pixels SP1, SP2, and SP3, and a semi-cylindrical second lens 234 is disposed on the second emission area EA2 of each of the sub-pixels SP1, SP2, and SP3. Therefore, in the display device 100 according to the embodiment of the present disclosure, the viewing angle may be limited.

[0096] Figure 4 is a driving circuit diagram of a pixel according to an embodiment of the present disclosure. Figure 4 , the pixel circuit PC may include nine transistors and one capacitor.

[0097] The pixel circuit PC may include a first transistor T1, a second transistor T2, a third transistor T3, a 4-1st transistor T41, a 4-2nd transistor T42, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, a driving transistor DT, and a capacitor Cst.

[0098] At least some of the nine transistors included in the pixel circuit PC may be n-type transistors or p-type transistors. In the case of p-type transistors, the low level voltage of each drive signal may be a voltage for turning on the TFT, and the high level voltage of each drive signal may be a voltage for turning off the TFT.

[0099] Here, the low level voltage may correspond to a predetermined voltage lower than the high level voltage. For example, the low level voltage may include a voltage in the range of -8V to -12V. The high level voltage may correspond to a predetermined voltage higher than the low level voltage. For example, the high level voltage may include a voltage in the range of 12V to 16V. In some embodiments, the low level voltage may be referred to as a first voltage, and the high level voltage may be referred to as a second voltage. In this case, the first voltage may have a value lower than the second voltage. However, the above ranges of the low level voltage and the high level voltage are given only by way of example, and the present disclosure is not limited thereto.

[0100] The first electrode or the second electrode of the transistor described below may be a source electrode or a drain electrode. However, the terms "first electrode" and "second electrode" are only used to distinguish one electrode from another electrode, and do not limit the content corresponding to each electrode. In addition, the first electrodes of each transistor may not be the same electrode. For example, the first electrode of the first transistor T1 may be the source electrode of the first transistor T1, and the first electrode of the sixth transistor T6 may be the drain electrode of the sixth transistor T6.

[0101] In an embodiment, the driving transistor DT may be connected to the first transistor T1 connected to the first light emitting device De1 and the second transistor T2 connected to the second light emitting device De2. For example, the second electrode of the driving transistor DT may be connected to the first transistor T1 and the second transistor T2.

[0102] In an embodiment, the driving transistor DT may be connected to a first power line L17 that provides a high potential power voltage ELVDD. For example, a first electrode of the driving transistor DT may be connected to the first power line L17. When the driving transistor DT is turned on, the high potential power voltage ELVDD supplied through the first power line L17 may be transmitted from the first electrode of the driving transistor DT to the second electrode of the driving transistor DT.

[0103] In an implementation, the first transistor T1 may be connected to at least one of the first light emitting device De1, the second transistor T2, the 4-1st transistor T41, or the seventh transistor T7.

[0104] For example, the first electrode of the first transistor T1 may be connected to at least one of the second transistor T2 or the seventh transistor T7. The seventh transistor T7 may be connected to the driving transistor DT and the fifth transistor T5. The second electrode of the first transistor T1 may be connected to at least one of the first light emitting device De1 or the 4-1 transistor T41. The gate electrode of the first transistor T1 may be connected to the first control line L10. The first transistor T1 may be turned on or off in response to the first control signal P(k) provided through the first control line L10. When the first transistor T1 is turned on, the voltage provided by the driving transistor DT and the seventh transistor T7 may be input to the first light emitting device De1 (e.g., the anode electrode of the first light emitting device De1).

[0105] For example, in the case where the pixel circuit PC is disposed in the kth (where k is a positive integer) column, the first control signal P(k) may include a kth first control signal supplied to the kth column. The first control signal P(k) may be provided by a mode control unit (or a mode control circuit), and the driving (or emission) of the first light emitting device De1 having the first lens disposed thereon may be controlled in response to the first control signal P(k).

[0106] In an implementation, the second transistor T2 may be connected to at least one of the second light emitting device De2, the first transistor T1, the 4-2nd transistor T42, or the seventh transistor T7.

[0107] For example, the first electrode of the second transistor T2 may be connected to at least one of the first transistor T1 or the seventh transistor T7. The second electrode of the second transistor T2 may be connected to at least one of the 4-2 transistor T42 or the second light emitting device De2. The seventh transistor T7 may be connected to the driving transistor DT and the fifth transistor T5. The gate electrode of the second transistor T2 may be connected to the second control line L20. The second transistor T2 may be turned on or off in response to the second control signal S(k) provided by the second control line L20. When the second transistor T2 is turned on, the voltage provided by the driving transistor DT and the seventh transistor T7 may be input to the second light emitting device De2 (e.g., the anode electrode of the second light emitting device De2).

[0108] For example, in the case where the pixel circuit PC is disposed in the kth (where k is a positive integer) column, the second control signal S(k) may include a kth second control signal supplied to the kth column. The second control signal S(k) may be provided by a mode control unit (or a mode control circuit), and the driving (or emission) of the second light emitting device De2 having the second lens disposed thereon may be controlled in response to the second control signal S(k).

[0109] In an embodiment, a first lens may be disposed on the first light emitting device De1. Due to the first lens, a viewing angle of a region in which the first light emitting device De1 is disposed may correspond to a first value. For example, a viewing angle of a region in which the first light emitting device De1 is disposed may be equal to or less than the first value. A second lens may be disposed on the second light emitting device De2. Due to the second lens, a viewing angle of a region in which the second light emitting device De2 is disposed may correspond to a second value. The second value may be greater than the first value. For example, a viewing angle of a region in which the second light emitting device De2 is disposed may be equal to or greater than the second value.

[0110] In an embodiment, the area where the first light emitting device De1 of the pixel circuit PC is disposed may have a viewing angle corresponding to a first value within which light is provided on an area corresponding to the front passenger seat. The area where the second light emitting device De2 is disposed may have a viewing angle corresponding to a second value within which light is provided on an area corresponding to the front passenger seat and an area corresponding to a driver's seat disposed next to the front passenger seat.

[0111] In an implementation, the third transistor T3 may be connected to at least one of the 4-1 th transistor T41 , the 4-2 th transistor T42 , the sixth transistor T6 , or the capacitor Cst.

[0112] For example, the first electrode of the third transistor T3 may be connected to the sixth transistor T6 and the capacitor Cst. The second electrode of the third transistor T3 may be connected to the 4-1 transistor T41 and the 4-2 transistor T42. The gate electrode of the third transistor T3 may be connected to the emission signal line L15 for supplying the emission signal EM(n). In the case where the pixel circuit PC is arranged in the nth (wherein n is a positive integer) pixel row, the emission signal EM(n) may correspond to the nth emission signal EM(n) supplied to the nth row. The third transistor T3 may be turned on or off in response to the emission signal EM(n). The second electrode of the third transistor T3 may be connected to a reference voltage line L11 for supplying a reference voltage Vref, such as a second power line.

[0113] In an implementation, the 4-1th transistor T41 may be connected to at least one of the first transistor T1 , the third transistor T3 , or the first light emitting device De1 .

[0114] For example, a first electrode of the 4-1st transistor T41 may be connected to the third transistor T3. A second electrode of the 4-1st transistor T41 may be connected to the first transistor T1 and the first light emitting device De1. A gate electrode of the 4-1st transistor T41 may be connected to the n-th second scan line L13. Therefore, the 4-1st transistor T41 may receive the n-th second scan signal Scan2(n), and may be turned on or off in response to the n-th second scan signal Scan2(n).

[0115] In an implementation, the 4-2 th transistor T42 may be connected to at least one of the second transistor T2 , the third transistor T3 , and the second light emitting device De2 .

[0116] For example, a first electrode of the 4-2 transistor T42 may be connected to the third transistor T3. A second electrode of the 4-2 transistor T42 may be connected to the second transistor T2 and the second light emitting device De2. A gate electrode of the 4-2 transistor T42 may be connected to the n-th second scan line L13. Therefore, the 4-2 transistor T42 may receive the n-th second scan signal Scan2(n), and may be turned on or off in response to the n-th second scan signal Scan2(n).

[0117] In an embodiment, the fifth transistor T5 may be connected to at least one of the driving transistor DT, the 4-1 th transistor T41 , the 4-2 th transistor T42 , the capacitor Cst, or the seventh transistor T7 .

[0118] For example, a first electrode of the fifth transistor T5 may be connected to the driving transistor DT and the capacitor Cst. A second electrode of the fifth transistor T5 may be connected to the driving transistor DT and the seventh transistor T7. A gate electrode of the fifth transistor T5 may be connected to an nth second scan line L13 in the nth row supplying the second scan signal Scan2(n). The fifth transistor T5 may receive the nth second scan signal Scan2(n) and may be turned on or off in response to the nth second scan signal Scan2(n).

[0119] In some embodiments, the nth first scan line L18 may provide the nth first scan signal. In this case, the nth first scan signal may be provided to the gate electrode of the sixth transistor T6. The nth second scan line L13 may provide the nth second scan signal. In this case, the nth second scan signal may be provided to the gate electrode of each of the 4-1 transistor T41, the 4-2 transistor T42, and the fifth transistor T5.

[0120] In an implementation, the sixth transistor T6 may be connected to at least one of the third transistor T3 or the capacitor Cst.

[0121] For example, a first electrode of the sixth transistor T6 may be connected to the third transistor T3 and the capacitor Cst. A second electrode of the sixth transistor T6 may be connected to a data line L16 supplying a data voltage Vdata. A gate electrode of the sixth transistor T6 may be connected to an nth first scan line L18 supplying an nth first scan signal Scan1(n). The sixth transistor T6 may receive the nth first scan signal Scan1(n) and may be turned on or off in response to the nth first scan signal Scan1(n). When the sixth transistor T6 is turned on, the data voltage Vdata may be transmitted from the second electrode of the sixth transistor T6 to the first electrode of the sixth transistor T6.

[0122] In an implementation, the seventh transistor T7 may be connected to at least one of the first transistor T1 , the second transistor T2 , the fifth transistor T5 , or the driving transistor DT.

[0123] For example, the first electrode of the seventh transistor T7 may be connected to at least one of the fifth transistor T5 or the driving transistor DT. The second electrode of the seventh transistor T7 may be connected to at least one of the first transistor T1 or the second transistor T2. The gate electrode of the seventh transistor T7 may be connected to the emission signal line L30 providing the emission signal EM(n). The seventh transistor T7 may be turned on or off in response to the emission signal EM(n). When the seventh transistor T7 is turned on, a voltage (or current) may be provided from the first electrode of the seventh transistor T7 to the second electrode of the seventh transistor T7.

[0124] In an embodiment, the first light emitting device De1 and / or the second light emitting device De2 may be connected to a third power line L19 supplying a low potential power voltage ELVSS. For example, a cathode electrode of the first light emitting device De1 and a cathode electrode of the second light emitting device De2 may be connected to the third power line L19 to receive the low potential power voltage ELVSS.

[0125] In some embodiments, the low potential power voltage may be a ground voltage (eg, 0 volts (V)). For example, the cathode electrode of the first light emitting device De1 and the cathode electrode of the second light emitting device De2 may receive a voltage corresponding to the ground. However, the present disclosure is not limited thereto.

[0126] In the following, reference will be made to Figure 5 and Figure 6 A device for selectively implementing a sharing mode as a wide viewing angle mode and a private mode as a narrow viewing angle mode is described.

[0127] Figure 5 and Figure 6 is a perspective view of a lens according to an embodiment of the present disclosure. Figure 5 The first lens 232 of the display device according to the embodiment of the present disclosure is schematically shown, and Figure 6 The second lens 234 of the display device according to an embodiment of the present disclosure is schematically illustrated.

[0128] like Figure 5 As shown, the first lens 232 is a hemispherical lens having a semicircular cross-section in the X direction and the Y direction. Therefore, the first lens 232 limits the viewing angle in the X direction and the Y direction. For example, the first emission area EA1 provided with the hemispherical first lens 232 can have a narrow viewing angle of 30 degrees or less in both the up-down direction and the left-right direction.

[0129] On the other hand, Figure 6 As shown, the second lens 234 is a semi-cylindrical lens having a rectangular cross section in the X direction and a semi-circular cross section in the Y direction. Therefore, the second lens 234 limits the viewing angle in the Y direction, but does not limit the viewing angle in the longitudinal direction (i.e., the X direction) of the second lens 234. For example, the second emission area EA2 provided with the semi-cylindrical second lens 234 can have a narrow viewing angle of 30 degrees or less in the up-down direction and a wide viewing angle of 60 degrees or more in the left-right direction.

[0130] like Figure 5 and Figure 6As shown, both the first lens 232 and the second lens 234 limit the viewing angle in the Y direction (achieving an up / down narrow field of view mode at all times). The reason for this is that when the display device 100 is applied to a vehicle, it is necessary to limit the viewing angle in the up and down directions in order to prevent the image from being reflected onto the front windshield of the vehicle and thereby interfering with the driver's forward field of view.

[0131] In this way, the up / down narrow field mode and the left / right narrow field mode may be realized by driving the first emission area EA1 , and the up / down narrow field mode and the left / right wide field mode may be realized by driving the second emission area EA2 .

[0132] That is, the light-emitting display device according to the embodiment of the present disclosure can always implement the narrow field mode in the up and down directions, and can selectively implement the wide field mode and the narrow field mode in the left and right directions using the first lens 232 and the second lens 234.

[0133] Regarding this implementation of the wide field of view mode and the narrow field of view mode, reference will be made to Figure 7 and Figure 8 The viewing angle characteristics of the first lens 232 and the second lens 234 are described in detail.

[0134] Figure 7 is a diagram showing an optical curve of a viewing angle of a first lens of a display device according to an embodiment of the present disclosure, and Figure 8 is a diagram of an optical curve showing a viewing angle of a second lens of a display device according to an embodiment of the present disclosure.

[0135] like Figure 7 and Figure 8 As shown, the first emission area EA1 provided with a hemispherical first lens 232 has a narrow viewing angle of 30 degrees or less in the up and down directions and in the left and right directions, while the second emission area EA2 provided with a semi-cylindrical second lens 234 has a narrow viewing angle of 30 degrees or less in the up and down directions and a wide viewing angle of 60 degrees or more in the left and right directions.

[0136] Therefore, the up / down narrow field of view mode and the left / right narrow field of view mode may be realized by driving the first emission area EA1 , and the up / down narrow field of view mode and the left / right wide field of view mode may be realized by driving the second emission area EA2 .

[0137] That is, the display device according to an embodiment of the present disclosure can always implement a narrow field of view mode in the up and down directions, and can selectively implement a wide field of view mode and a narrow field of view mode in the left and right directions using the first lens 232 and the second lens 234 .

[0138] Fig. 9is an enlarged plan view of a display device according to an embodiment of the present disclosure, and Figures 10 to 12 yes Fig. 9 Enlarged plan views of regions B and C are shown.

[0139] In order to prevent images displayed on some areas of the display device 100 from being viewed from a specific direction, the viewing angles of the corresponding areas of the display device 100 may be controlled by the above configuration. Figures 9 to 12 A configuration for preventing recognition of a boundary between an area where a viewing angle control function is implemented and an area where the viewing angle control function is not implemented is described.

[0140] The display device 100 may include a first area S1 and a second area S2. As will be described later, the first area S1 and the second area S2 may be areas adjacent to each other with a boundary BD therebetween, the first area S1 may be a CID area or a cluster area in which the viewing angle control function is not implemented, and the second area S2 may be a CDD area in which the viewing angle control function is implemented.

[0141] The first area S1 and the second area S2 may be distinguished from each other based on whether a viewing angle control function exists. Both the first area and the second area may be included in the CDD area.

[0142] As described above, each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may include at least one first emission area EA1 and at least one second emission area EA2, and a first lens 232 or a second lens 234 may be provided on each emission area so that a shared mode or a private mode may be realized by controlling the emission areas individually.

[0143] To this end, each of the sub-pixels is divided into a plurality of emission areas. However, if the above configuration is applied to the first area S1 where the viewing angle does not need to be controlled, the light emitting area and brightness may be reduced compared to a pixel consisting of one emission area.

[0144] To solve this problem, refer to Fig. 9 , the display device 100 may include a first area S1 in which viewing angle control is not required and a second area S2 in which viewing angle control is required, and the first area S1 and the second area S2 may include sub-pixels having different configurations about a boundary BD therebetween.

[0145] The sub-pixels in the first region S1 where viewing angle control is not required include only the second lens 234 and are therefore more advantageous in terms of viewing angle and brightness.

[0146] First, refer to Fig.10The pixel configuration of the region B included in the second region S2 in which the viewing angle control function is implemented is described in detail.

[0147] like Fig.10 As shown, a pixel of the display device according to the embodiment may include a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3, and the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may be a red subpixel, a green subpixel, and a blue subpixel, respectively.

[0148] Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 includes at least a first emission area EA1 and a second emission area EA2. The first emission area EA1 of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may include at least one sub-emission area EA1a. The sub-emission area EA1a corresponds to the first lens 232, and the second emission area EA2 corresponds to the second lens 234.

[0149] The first sub-pixel SP1 and the second sub-pixel SP2 are arranged along the Y direction, and the third sub-pixel SP3 is arranged along the X direction relative to the first sub-pixel SP1 and the second sub-pixel SP2. In this case, the first emission area EA1 of the first sub-pixel SP1 and the second sub-pixel SP2 may be located between the second emission area EA2 of the first sub-pixel SP1 and the second emission area EA2 of the second sub-pixel SP2. The above configuration may be reversed in the sub-pixel adjacent thereto in the Y direction, or the above configuration and the reverse configuration may be repeated.

[0150] The first emission area EA1 of the third subpixel SP3 may be disposed adjacent to the first emission area EA1 of the first subpixel SP1 and the first emission area EA1 of the second subpixel SP2 in the X direction, and the second emission area EA2 of the third subpixel SP3 may be disposed adjacent to the second emission area EA2 of the first subpixel SP1 in the X direction.

[0151] In this manner, the sub-pixels are arranged such that the first emission areas EA1 thereof are adjacent to each other or the second emission areas EA2 thereof are adjacent to each other, thereby minimizing the occurrence of image distortion or moire when displaying an image.

[0152] Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may have a polygonal shape. In this case, the shapes of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be different from each other. However, the present disclosure is not limited thereto. The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may have various shapes.

[0153] The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 have different areas. The areas of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be determined in consideration of the life span and luminous efficiency of the light-emitting device provided in each sub-pixel. Since light having a shorter wavelength has higher energy, under the condition that the light-emitting devices have the same area, the life span of the blue light-emitting device is the shortest, while the life span of the red light-emitting device is the longest. Therefore, in order to make the life span of the light-emitting devices uniform, the area of ​​the second sub-pixel SP2 is larger than the area of ​​the first sub-pixel SP1 and smaller than the area of ​​the third sub-pixel SP3.

[0154] For example, the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may have an area ratio of 1:2.5:3. The first emission area EA1 of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may also have an area ratio of 1:2.5:3, and the second emission area EA2 of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may also have an area ratio of 1:2.5:3. Therefore, the number of sub-emission areas EA1a of the first emission area EA1 of the second subpixel SP2 may be greater than the number of sub-emission areas EA1a of the first emission area EA1 of the first subpixel SP1, and may be less than the number of sub-emission areas EA1a of the first emission area EA1 of the third subpixel SP3. Specifically, the first emission area EA1 of the first subpixel SP1 may include two sub-emission areas EA1a, the first emission area EA1 of the second subpixel SP2 may include five sub-emission areas EA1a, and the first emission area EA1 of the third subpixel SP3 may include six sub-emission areas EA1a.

[0155] The plurality of sub-emission areas EA1a may be a pixel group EG that shares one pixel electrode. In this case, the two sub-emission areas EA1a of the first sub-pixel SP1 and the three sub-emission areas EA1a of the second sub-pixel SP2 may be disposed substantially parallel to each other in the X direction, the four sub-emission areas EA1a of the third sub-pixel SP3 and the one sub-emission area EA1a of the second sub-pixel SP2 may be disposed substantially parallel to each other in the X direction, and the two sub-emission areas EA1a of the third sub-pixel SP3 and the one sub-emission area EA1a of the second sub-pixel SP2 may be disposed substantially parallel to each other in the X direction.

[0156] However, the present disclosure is not limited thereto. An area ratio of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 and the number of sub-emission areas EA1a may vary.

[0157] On the other hand, Fig.11As shown, a second lens 234 may be provided on each emission region of the sub-pixel corresponding to the first region S1 in which the viewing angle control function does not need to be implemented. Alternatively, one second lens 234 may be provided on at least one emission region. For example, the second lens 234 may be provided on a plurality of sub-emission regions EA1a of the second sub-pixel SP2 and the third sub-pixel SP3, so that each second lens 234 covers at least one sub-emission region EA1a.

[0158] Alternatively, if Fig.12 As shown, in another embodiment of the present disclosure, each of the first emission area EA1 and the second emission area EA2 constituting a sub-pixel may be implemented as a single emission area corresponding to a single second lens 234 .

[0159] In one example, Fig.11 The first emission area EA1 of the third sub-pixel SP3 shown in FIG. 1 may include a plurality of sub-emission areas EA1a. Fig.12 As shown, the first emission area EA1 of the third sub-pixel SP3 may be implemented as a single emission area corresponding to one second lens 234 .

[0160] Fig.13 and Fig.14 is an enlarged plan view of a display device according to an embodiment of the present disclosure. Fig.13 and Fig.14 , the first emission area EA1 and the second emission area EA2 are schematically shown, and the illustration of the lens is omitted. The first emission area EA1 and the second emission area EA2 may be as shown in FIG. Figures 9 to 12 Configure as shown.

[0161] Will refer to Fig.13 and Fig.14 Configurations for minimizing identification of boundaries between regions are described.

[0162] As described above, in the pixels located in the first area S1 and the second area S2, lenses or emission areas may be configured differently from each other in order to implement the viewing angle control function.

[0163] In the display device configured as described above, due to the difference in configuration between pixels or lenses located in the first area S1 and pixels or lenses located in the second area S2, the boundary between the two areas of the display device may be recognized by the driver or the co-driver, and the image quality may be reduced.

[0164] Hereinafter, a configuration for minimizing the recognition of the above-mentioned boundary will be described. Fig.13 and Fig.14 Describes the view control mode and sharing mode from the driver's perspective.

[0165] Fig.13 The display device is shown in a shared mode from the perspective of the driver and the front passenger. Fig.13 , the first area S1 may further include a third area S3 positioned adjacent to the second area S2.

[0166] The first area S1 displays an image using both the first emission area EA1 and the second emission area EA2, while the second area S2 displays an image using only the second emission area EA2.

[0167] When the direction from the third region S3 toward the second region S2 is defined as the first direction D1 and the opposite direction is defined as the second direction D2, the first emission region in the third region S3 is driven so that the brightness gradually increases in the second direction D2, and the second emission region in the third region S3 is driven so that the brightness gradually increases in the first direction D1. In the first region S1, both the first emission region EA1 and the second emission region EA2 emit light. Therefore, the first emission region EA1 and the second emission region EA2 in the first region S1 can emit light, the brightness of which is lower than the brightness of the light from the second emission region EA2 in the second region S2.

[0168] In a display device configured in this manner, from the perspective of the driver and the co-driver, the average brightness of the first zone L1 in the first area S1, the third zone L3 in the second area S2, and the second zone L2 in the third area S3 becomes uniform, thereby minimizing the recognition of the boundary between the first area S1 and the second area S2.

[0169] Will refer to Fig.14 A configuration of a display device for minimizing recognition of boundaries between regions from a passenger's perspective in a viewing angle control mode is described.

[0170] Reference Fig.14 , the first area S1 may further include a third area S3 positioned adjacent to the second area S2.

[0171] The first region S1 displays an image using both the first emission area EA1 and the second emission area EA2, while the second region S2 displays an image using only the first emission area EA1.

[0172] When the direction from the first region S1 toward the second region S2 is defined as the first direction D1 and the opposite direction is defined as the second direction D2, the first emission region in the third region S3 is driven so that the brightness gradually decreases in the second direction D2, and the second emission region in the third region S3 is driven so that the brightness gradually decreases in the first direction D1. In the first region S1, both the first emission region EA1 and the second emission region EA2 emit light. Therefore, the first emission region EA1 and the second emission region EA2 in the first region S1 can emit light, the brightness of which is lower than the brightness of the light from the first emission region EA1 in the second region S2.

[0173] In a display device configured in this manner, from the perspective of the co-pilot, the average brightness of the first zone L1 in the first area S1, the third zone L3 in the second area S2, and the second zone L2 in the third area S3 becomes uniform, thereby minimizing the recognition of the boundary between the first area S1 and the second area S2.

[0174] As is apparent from the above description, a display device according to the present disclosure may include pixels capable of controlling viewing angles in some areas, thereby selectively controlling viewing angles.

[0175] The display device according to the present disclosure may use emission pixels for controlling viewing angles as general emission pixels in some areas, thereby improving the lifetime reliability of the display device.

[0176] The display device according to the present disclosure can minimize recognition of a boundary between a viewing angle control area and a general area due to a brightness difference between the two areas, thereby improving display quality.

[0177] Effects achievable by the present disclosure are not limited to the above-mentioned effects, and other various effects may be directly or implicitly disclosed in the above detailed description of the present disclosure.

[0178] Although the exemplary embodiments of the present disclosure have been described for illustrative purposes, it will be understood by those skilled in the art that various modifications, additions and substitutions may be made without departing from the scope and spirit of the present disclosure disclosed in the appended claims. Therefore, the embodiments disclosed in the present disclosure are intended to illustrate the scope of the technical concept of the present disclosure, and the scope of the present disclosure is not limited by the embodiments. Therefore, the above embodiments should be interpreted as illustrative rather than restrictive in all aspects. The scope of the present disclosure should be interpreted based on the appended claims, and it should be interpreted as all technical concepts included in the scope equivalent to the claims belong to the present disclosure.

Claims

1. A display device, comprising: a first area and a second area adjacent to the first area; a first pixel in the first region, the first pixel comprising at least one second emission region; as well as a second pixel in the second area, the second pixel comprising at least one first emission area and at least one second emission area, Wherein, a hemispherical lens is arranged in the first emitting area, and Wherein, a semi-cylindrical lens is arranged in the second emitting area.

2. The display device according to claim 1, wherein: In the first mode, a first emission region among the second regions is turned on, and a second emission region among the second regions is turned off.

3. The display device according to claim 2, wherein: In the second mode, the first emission region in the second region is turned off, and the second emission region in the second region is turned on.

4. The display device according to claim 3, wherein: The first mode is a private mode, and the second mode is a shared mode.

5. The display device according to claim 4, wherein: The first region further includes a third region positioned adjacent to the second region, the first pixel in the third region including at least one first emission region in addition to at least one second emission region, and Wherein, in the first mode, the first emission area in the third area is configured to emit light so that the brightness gradually increases in a direction approaching the second area.

6. The display device according to claim 5, wherein: In the second mode, the first emission region in the third region is configured to emit light such that brightness gradually decreases in a direction approaching the second region.

7. The display device according to claim 6, wherein: In the second mode, the second emission area in the third area is configured to emit light such that brightness gradually increases in a direction approaching the second area.

8. A display device, comprising: a first region on a substrate and a second region adjacent to the first region; a first pixel in the first area; as well as a second pixel in the second area, wherein the first pixel and the second pixel are pixels having the same color, wherein each of the first pixel and the second pixel comprises at least one emission region, and The number of emission regions in the second pixel is greater than the number of emission regions in the first pixel.

9. The display device according to claim 8, wherein: The first pixel and the second pixel are green pixels or blue pixels.

10. The display device according to claim 8, wherein: Each of the first pixel and the second pixel includes a first emission region and a second emission region, Wherein, a semi-cylindrical lens is arranged on the first emission area of ​​the first pixel, and Wherein, a hemispherical lens is arranged on the first emission area of ​​the second pixel.

11. The display device according to claim 10, wherein: In the private mode, the first emission region of the second pixel is turned on, and the second emission region of the second pixel is turned off, and Wherein, in the sharing mode, the first emission region of the second pixel is turned off, and the second emission region of the second pixel is turned on.

12. A display device, comprising: a first region on a substrate and a second region adjacent to the first region; a first pixel in the first area; a second pixel in the second area; as well as a lens corresponding to the first pixel and a lens corresponding to the second pixel respectively, wherein the first pixel and the second pixel have the same color, and The number of lenses corresponding to the second pixel is greater than the number of lenses corresponding to the first pixel.

13. The display device according to claim 12, wherein: The first pixel includes a plurality of first emission regions, and The lens corresponding to the first pixel is configured to cover the plurality of first emission areas.

14. The display device according to claim 12, wherein: The lens corresponding to the first pixel is a semi-cylindrical lens, and The lens corresponding to the second pixel includes a semi-cylindrical lens and a hemispherical lens.

Images