Display panel and display device

Abstract

The invention discloses a display panel and a display device, and the display panel comprises an array substrate which comprises a display area and a non-display area; the non-display area surrounds at least part of the display area; the display area of the array substrate is provided with a light-emitting structure layer; the non-display area of the array substrate comprises a shielding ring, and the shielding ring surrounds at least part of the display area. Static electricity outside the screen body can be shielded, and the reliability of the display panel is improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of display technology, people have higher and higher requirements on display panels. However, the reliability of existing display panels is relatively poor. Summary of the invention

[0003] The present invention provides a display panel and a display device, which can shield static electricity outside a screen body and improve the reliability of the display panel.

[0004] According to one aspect of the present invention, there is provided a display panel, comprising:

[0005] An array substrate, the array substrate comprising a display area and a non-display area; the non-display area surrounds at least a portion of the display area;

[0006] The display area of ​​the array substrate is provided with a light emitting structure layer; the non-display area of ​​the array substrate comprises a shielding ring, which surrounds at least a part of the display area.

[0007] Optionally, there are at least two shielding rings.

[0008] Optionally, at least two shielding rings are arranged at intervals in a direction from the display area to the non-display area.

[0009] Along the direction from the display area to the non-display area, the spacing between adjacent shielding rings is greater than or equal to 1 μm;

[0010] Optionally, along the direction from the display area to the non-display area, the width of each shielding ring is greater than or equal to 2 μm and less than or equal to 3 μm;

[0011] Optionally, at least some of the shielding rings are arranged in different layers;

[0012] Optionally, the shielding ring includes a first shielding ring and a second shielding ring, and the first shielding ring and the second shielding ring are alternately arranged in sequence along a direction from the display area to the non-display area, and the first shielding ring and the second shielding ring are arranged in different layers.

[0013] Optionally, the shielding ring is connected to a DC voltage or a power supply voltage;

[0014] Optionally, the material of the shielding ring includes metal;

[0015] Optionally, the array substrate includes a circuit layer, the circuit layer includes a plurality of metal layers, and the shielding ring is disposed on the same layer as at least one metal layer among the plurality of metal layers;

[0016] Optionally, the material of the shielding ring includes at least one of molybdenum, titanium and aluminum.

[0017] Optionally, the array substrate includes a first circuit layer and a second circuit layer, the first circuit layer is arranged on a side of the second circuit layer away from the light-emitting structure layer, the first circuit layer includes a shift register circuit and / or an auxiliary circuit, the second circuit layer includes a pixel driving circuit, and the auxiliary circuit includes at least one of a multi-way selection circuit, a test circuit, a crack detection circuit and an electrostatic protection circuit;

[0018] The shift register circuit and / or the auxiliary circuit are located in the display area;

[0019] Optionally, the non-display area of ​​the array substrate further includes at least three dams, the dams are located on a side of the second circuit layer away from the first circuit layer; along a direction from the display area to the non-display area, the at least three dams are arranged in sequence and are arranged at intervals;

[0020] Optionally, the light emitting structure layer includes a plurality of light emitting structures, the pixel driving circuit is electrically connected to the light emitting structure, and the pixel driving circuit is used to drive the light emitting structure to emit light; the shift register circuit is electrically connected to the pixel driving circuit through a via hole;

[0021] Optionally, the array substrate includes a substrate, and the first circuit layer, the second circuit layer, and the light-emitting structure layer are located on the substrate and are stacked in sequence in a direction away from the substrate;

[0022] Optionally, the orthographic projection of the auxiliary circuit on the substrate overlaps with the orthographic projection of the light-emitting structure layer on the substrate;

[0023] Optionally, the test circuit includes a dot screen test circuit;

[0024] Optionally, the second circuit layer includes a data line, and the auxiliary circuit is connected to the data line;

[0025] Optionally, the auxiliary circuit is connected to the pixel driving circuit via a data line.

[0026] Optionally, at least part of the film layer where the dam is located is located on a side of the film layer where the shielding ring is located away from the substrate;

[0027] Optionally, the orthographic projection of the shielding ring on the substrate overlaps with the orthographic projection of the dam on the substrate, and / or at least a portion of the orthographic projection of the shielding ring on the substrate is located in a gap between orthographic projections of adjacent dams on the substrate.

[0028] Optionally, the height of each levee is the same;

[0029] and / or, adjacent levees are equally spaced;

[0030] Optionally, a spacing between adjacent dams is greater than or equal to 10 μm.

[0031] Optionally, the display panel further includes:

[0032] An encapsulation layer, the encapsulation layer is arranged on a side of the light emitting structure layer away from the first circuit layer;

[0033] The encapsulation layer includes at least two inorganic layers and at least one organic layer stacked in layers, and an organic layer is disposed between each two adjacent inorganic layers;

[0034] At least two inorganic layers extend from the display area to the non-display area, and at least two inorganic layers are located on a side of the dam away from the substrate, and are arranged in contact in a preset area, wherein the preset area is a non-display area located on a side of the dam away from the display area, and along a direction from the display area to the non-display area, a width of the preset area is greater than or equal to 90 μm and less than or equal to 130 μm;

[0035] Optionally, a boundary of the organic layer is located between a side of the dam away from the display area and a side close to the display area.

[0036] Optionally, the first circuit layer includes a first conductive layer, a second conductive layer and a third conductive layer stacked in sequence; wherein the first conductive layer is arranged on a side of the second conductive layer away from the third conductive layer;

[0037] Optionally, the first conductive layer is a first gate conductive layer, the second conductive layer is a capacitor plate layer, and the third conductive layer is a signal line layer;

[0038] Optionally, the shielding ring is provided on the same layer as at least one conductive layer of the first circuit layer and the second circuit layer.

[0039] Optionally, the display area includes a first edge area, a second edge area and a third edge area;

[0040] The first edge region and the second edge region are arranged opposite to each other along a first direction, the third edge region is adjacent to the first edge region, and the third edge region is adjacent to the second edge region;

[0041] The shift register circuit is arranged in the first edge region and the second edge region;

[0042] The auxiliary circuit is arranged in the third edge area;

[0043] Optionally, the second circuit layer includes a gate line, the shift register circuit is connected to the pixel driving circuit via the gate line, and the gate line extends along the first direction;

[0044] Optionally, the shielding ring is electrically connected to the electrostatic protection circuit, or the second circuit layer includes a power line, the power line is electrically connected to the light-emitting structure layer, and the shielding ring is electrically connected to the power line.

[0045] According to another aspect of the present invention, there is provided a display panel, comprising:

[0046] An array substrate, the array substrate comprising a display area and a non-display area; the array substrate comprising a first circuit layer, the first circuit layer comprising an auxiliary circuit, the auxiliary circuit comprising at least one of a multi-way selection circuit, a point screen test circuit, a crack detection circuit and an electrostatic protection circuit; the auxiliary circuits are all located in the display area;

[0047] The display area of ​​the array substrate is provided with a light emitting structure layer. According to another aspect of the present invention, a display device is provided, comprising the display panel provided by any embodiment of the present invention.

[0048] The display panel provided by the technical solution of the embodiment of the present invention includes an array substrate; the array substrate includes a display area and a non-display area; the non-display area surrounds at least part of the display area; the display area of ​​the array substrate is provided with a light-emitting structure layer; the non-display area of ​​the array substrate includes a shielding ring, and the shielding ring surrounds at least part of the display area. In the embodiment of the present invention, by providing a shielding ring in the non-display area, when static electricity is generated at the edge of the display panel, the shielding ring can be used to shield the static electricity outside the screen body, thereby improving the static electricity protection capability of the display panel, thereby improving the reliability of the display panel.

[0049] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0051] Figure 1 is a schematic diagram of a display panel provided by an embodiment of the present invention.

[0052] Figure 2 yes Figure 1 Schematic diagram of the cross-sectional structure along section line BB.

[0053] Figure 3 It is a schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention.

[0054] Figure 4 It is a schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention.

[0055] Figure 5 is a schematic diagram of another display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0056] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0057] It should be noted that the terms "first", "second", etc. in the present invention are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0058] An embodiment of the present invention provides a display panel. Figure 1 is a schematic structural diagram of a display panel provided by an embodiment of the present invention, Figure 2 yes Figure 1 Schematic diagram of the cross-section structure along the section line BB, refer to Figure 1-Figure 2 The display panel includes an array substrate 10, the array substrate 10 includes a display area AA and a non-display area NA; the non-display area NA surrounds at least part of the display area AA; for example, the non-display area NA surrounds the display area AA; the display area AA of the array substrate 10 is provided with a light-emitting structure layer 40; the non-display area NA of the array substrate 10 includes a shielding ring 60, and the shielding ring 60 surrounds at least part of the display area, for example, the shielding ring 60 surrounds the display area.

[0059] Among them, the display area AA is used to display the picture. The array substrate 10 may include a circuit layer, and the circuit layer includes a plurality of pixel driving circuits. The light-emitting structure layer 40 includes a plurality of light-emitting structures, for example, each pixel driving circuit corresponds to a light-emitting structure, and the pixel driving circuit is used to send a driving signal to the light-emitting structure to drive the light-emitting structure to emit light. The shielding ring 60 can be used for electrostatic discharge, and / or, can shield static electricity to improve the electrostatic protection capability of the display panel. For example, there are at least two shielding rings 60, and at least two shielding rings 60 are arranged at intervals along the direction from the display area AA to the non-display area NA.

[0060] The non-display area NA of the array substrate 10 includes at least two shielding rings 60. The material of the shielding rings 60 can be a conductive material, such as a metal material or a metal oxide material. The materials of the at least two shielding rings 60 can be the same or different. The at least two shielding rings 60 can be arranged in the same layer or in different layers. Two adjacent shielding rings 60 can form a capacitor. The two adjacent shielding rings 60 are equivalent to the two plates of the capacitor. The electric field strength generated by the two plates under the action of static electricity is equal in magnitude and opposite in direction to the electric field strength generated by static electricity. The electric field strength inside the capacitor is zero, which is equivalent to shielding external static electricity, and can improve the electrostatic protection capability of the display panel. The shielding ring 60 is arranged in the non-display area NA. When static electricity is generated at the edge of the display panel, the external static electricity of the screen body can be shielded by the shielding ring 60, which can improve the electrostatic protection capability of the display panel, thereby improving the reliability of the display panel. The shielding ring 60 can be a closed ring or a non-closed ring. The shielding ring 60 can be a ring, such as a rectangular ring or a circular ring. A closed ring is equivalent to not setting a gap. A non-closed ring is equivalent to setting a gap.

[0061] The display panel provided by the technical solution of the embodiment of the present invention includes an array substrate 10; the array substrate 10 includes a display area AA and a non-display area NA; the non-display area NA surrounds at least a portion of the display area AA; the display area of ​​the array substrate 10 is provided with a light emitting structure layer 40; the non-display area NA of the array substrate 10 includes a shielding ring 60, and the shielding ring 60 surrounds at least a portion of the display area. In the embodiment of the present invention, by providing the shielding ring 60 in the non-display area NA, when static electricity is generated at the edge of the display panel, the shielding ring 60 can shield the static electricity outside the screen body, thereby improving the static electricity protection capability of the display panel, thereby improving the reliability of the display panel.

[0062] Optional, reference Figure 2 , along the direction from the display area AA to the non-display area NA, the spacing between adjacent shielding rings 60 is greater than or equal to 1 μm.

[0063] The spacing between adjacent shielding rings 60 may be 1 μm, 1.5 μm or 2 μm, etc. If the spacing between adjacent shielding rings 60 is less than 1 μm along the direction from the display area AA to the non-display area NA, the process is difficult and the device is easily broken down, which affects the protection capability of the device. If the spacing between adjacent shielding rings 60 is greater than or equal to 1 μm along the direction from the display area AA to the non-display area NA, the process is simple and the shielding capability is strong, thereby improving the reliability of the display panel.

[0064] Optional, reference Figure 2 , along the direction from the display area AA to the non-display area NA, the width of each shielding ring 60 is greater than or equal to 2 μm and less than or equal to 3 μm.

[0065] The width of each shielding ring 60 may be 2 μm, 2.2 μm, 2.5 μm, 2.7 μm or 3 μm, etc. The width of each shielding ring 60 is 2-3 μm in the direction from the display area AA to the non-display area NA, so that the width of the non-display area NA occupied by each shielding ring is reduced. Therefore, multiple shielding rings 60 may be arranged in the non-display area NV, and two adjacent shielding rings 60 may form a capacitor, thereby forming multiple capacitors, improving the electrostatic shielding capability, and thus improving the reliability of the display panel.

[0066] Optional, reference Figure 2 , at least some of the shielding rings 60 are arranged in different layers.

[0067] Among them, at least part of the shielding rings 60 are arranged in different layers. For example, part of the shielding rings 60 can be arranged in the first film layer, and part of the shielding rings 60 can be arranged in the second film layer; the vertical projection of the shielding ring 60 of the first film layer on the second film layer at least partially overlaps with the vertical projection of the shielding ring 60 of the second film layer, or the vertical projection of the shielding ring 60 of the first film layer on the second film layer does not overlap with the vertical projection of the shielding ring 60 of the second film layer; the spacing between the shielding rings 60 of different layers can be set smaller, or the facing area of ​​the shielding rings 60 of different layers can be designed to be larger, so as to form a larger capacitor, improve the electrostatic shielding ability of the shielding ring 60, while ensuring the electrostatic shielding ability, reduce the width of the occupied non-display area NA, so that multiple shielding rings 60 can be set in the non-display area NA to form multiple capacitors, improve the electrostatic shielding ability of the display panel, and improve the reliability of the display panel.

[0068] Optional, reference Figure 2 The shielding ring 60 includes a first shielding ring 61 and a second shielding ring 62. The first shielding ring 61 and the second shielding ring 62 are arranged alternately in the direction from the display area AA to the non-display area NA. The first shielding ring 61 and the second shielding ring 62 are arranged in different layers. There can be one or more first shielding rings 61. There can be one or more second shielding rings 62.

[0069] Among them, the first shielding ring 61 and the second shielding ring 62 can form two plates of a capacitor. The electric field strength generated by the two plates under the action of static electricity is equal to the electric field strength generated by static electricity and opposite in direction. The electric field strength inside the capacitor is zero, which is equivalent to shielding external static electricity, thereby improving the electrostatic protection capability of the display panel; the first shielding ring 61 and the second shielding ring 62 are arranged in different layers, and the spacing between the shielding rings 60 of different layers is set smaller, or the facing area of ​​the shielding rings 60 of different layers is designed to be larger, thereby forming a larger capacitor, improving the electrical shielding capability of the shielding ring 60, and while ensuring the electrostatic shielding capability, reducing the width of the occupied non-display area NA, so that multiple shielding rings 60 can be set in the non-display area NA to form multiple capacitors, thereby improving the reliability of the display panel.

[0070] Optional, reference Figure 2 , the shielding ring 60 is connected to a DC voltage or a power supply voltage.

[0071] Among them, the shielding ring 60 is connected to a DC voltage or a power supply voltage, and the DC voltage or the power supply voltage can make the shielding ring 60 in a relatively stable potential state, so that it has a higher electrostatic withstand voltage. When subjected to a strong electrostatic shock, the shielding ring 60 can withstand a higher electrostatic voltage without being broken down, providing a release path for static electricity, thereby improving the electrostatic protection capability of the display panel. The shielding ring 60 can be connected to a power line or an initialization signal line. The power line or the initialization signal line can be connected to a pixel drive circuit.

[0072] Optional, reference Figure 2 , the material of the shielding ring 60 includes metal.

[0073] The material of the shielding ring 60 includes metal. The metal material has a strong conductivity and can easily form an electric field in the opposite direction to the electrostatic electric field, thereby achieving an electrostatic shielding effect.

[0074] Optional, reference Figure 2 The array substrate 10 includes a circuit layer, the circuit layer includes a plurality of conductive layers, and the shielding ring 60 is disposed on the same layer as at least one of the plurality of conductive layers.

[0075] For example, the circuit layer includes multiple metal layers, and the shielding ring 60 is disposed on the same layer as at least one metal layer among the multiple metal layers.

[0076] Among them, the shielding ring 60 is set on the same layer as at least one metal layer among the multiple metal layers. There is no need to add a film layer for the shielding ring 60, and there is no need to change the thickness of the display panel, thereby ensuring that the display panel has a smaller thickness. The shielding ring 60 can be prepared in the same process as the metal layer, reducing the process cost.

[0077] Optional, reference Figure 2The material of the shielding ring 60 includes at least one of molybdenum, titanium and aluminum.

[0078] Among them, molybdenum, titanium and aluminum materials have good electrical conductivity, and the process is mature and the preparation is simple. Exemplarily, the material of the shielding ring 60 can be molybdenum or titanium aluminum titanium.

[0079] Optional, Figure 3 is a schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention, referring to Figure 3 The array substrate 10 includes a first circuit layer 20 and / or a second circuit layer 30, the first circuit layer 20 is arranged on a side of the second circuit layer 30 away from the light-emitting structure layer 40, the first circuit layer 20 includes a shift register circuit 201 and / or an auxiliary circuit, and / or the second circuit layer 30 includes a pixel driving circuit 31, and the auxiliary circuit includes at least one of a multi-way selection circuit, a test circuit, a crack detection circuit and an electrostatic protection circuit; the shift register circuit 201 and / or the auxiliary circuit are both located in the display area AA.

[0080] For example, the non-display area NA of the array substrate 10 further includes a dam 70. Optionally, at least part of the film layer where the dam 70 is located is located on a side of the film layer where the shielding ring 60 is located away from the substrate 80. For example, the dam 70 is located on a side of the first circuit layer 20 away from the substrate 80.

[0081] For example, the non-display area NA of the array substrate 10 further includes a plurality of or at least three dams 70, and the dams 70 are located on a side of the second circuit layer 30 away from the first circuit layer 20; along the direction from the display area AA to the non-display area NA, at least three dams 70 are arranged in sequence and spaced apart.

[0082] Among them, the shift register circuit 201 is used to send a scan signal and a light-emitting control signal to the pixel driving circuit; the auxiliary circuit includes one or more of a multiplexer circuit (Demux circuit), a test circuit (CT circuit), a crack detection circuit (PCD circuit) and an electrostatic protection circuit (ESD circuit); the multiplexer circuit can reduce the number of fanout lines, reduce the width of the frame, and increase the screen-to-body ratio of the display panel; and / or, can reduce the number of data output ports of the driver chip and reduce the cost of the driver chip; the test circuit is used to test the display panel before the display panel is bound to the driver chip after leaving the factory; the crack detection circuit is used to detect whether cracks appear on the edge of the display panel; the electrostatic protection circuit is used for electrostatic discharge to improve the resistance of the display panel. For example, the auxiliary circuit is connected to the driver chip.

[0083] For example, the dam 70 is located in the non-display area NA and on a side of the second circuit layer 30 away from the first circuit layer 20 .

[0084] For example, the orthographic projection of the dam 70 on the substrate 80 overlaps with the orthographic projection of the shielding ring 60 on the substrate 80, or the orthographic projection of the dam 70 on the substrate 80 partially overlaps with the orthographic projection of the shielding ring 60 on the substrate 80, and / or at least a portion of the orthographic projection of the shielding ring 60 on the substrate 80 is located in the gap between the orthographic projections of adjacent dams 70 on the substrate 80.

[0085] In some other embodiments, the auxiliary circuit and the pixel driving circuit 31 are located in the same circuit layer, such as the first circuit layer.

[0086] In some other embodiments, the shift register circuit 201, the auxiliary circuit and the pixel driving circuit 31 are located in the same circuit layer, such as the first circuit layer.

[0087] In the related technical solutions, the shift register circuit 21 is often designed in the non-display area on the left and right sides of the display area AA, occupying a large screen space; the fan-out line of the auxiliary circuit occupies a large wiring space, and the shift register circuit 201 is mainly designed to be connected to the display area AA through the metal layer of the pixel driving circuit; the auxiliary circuit is mainly designed to be connected to the driver chip IC through the metal layer of the pixel driving circuit. In the embodiment of the present invention, the shift register circuit 201 and the auxiliary circuit are arranged in the first circuit layer 20, so that the shift register circuit 201 and the auxiliary circuit are both located in the display area AA, and at least three dams 70 can be arranged in the area of ​​the vacant non-display area NA. The dam 70 effectively reduces the risk of ink overflow when the display area AA is encapsulated in the organic layer. At least three dams 70 can reduce the flow rate of ink during the organic layer encapsulation to avoid affecting the encapsulation effect, and can further improve the reliability of the encapsulation.

[0088] Optional, reference Figure 3 The light emitting structure layer 40 includes a plurality of light emitting structures, the pixel driving circuit is electrically connected to the light emitting structure, and the pixel driving circuit is used to drive the light emitting structure to emit light; the shift register circuit 201 is electrically connected to the pixel driving circuit 31 through a via.

[0089] Among them, the light-emitting structure may include light-emitting structures of multiple colors, and the light-emitting structure may be a red light-emitting structure, a green light-emitting structure, or a blue light-emitting structure. The pixel driving circuit is electrically connected to the light-emitting structure, and the pixel driving circuit is used to drive the light-emitting structure to emit light. The shift register circuit 201 is electrically connected to the pixel driving circuit 31 through a via, which can reduce the wiring space. The light-emitting structure layer 40 may include an anode layer, a light-emitting layer, and a cathode layer stacked in sequence along the thickness direction of the substrate.

[0090] Optional, reference Figure 3The array substrate 10 includes a substrate 80 , and the first circuit layer 20 , the second circuit layer 30 , and the light emitting structure layer 40 are located on the substrate 80 and are stacked in sequence in a direction away from the substrate 80 .

[0091] The substrate 80 may play a supporting role, and is used to enable the first circuit layer 20 , the second circuit layer 30 , and the light emitting structure layer 40 to be stacked in sequence.

[0092] Optional, reference Figure 3 , the orthographic projection of the auxiliary circuit on the substrate 80 overlaps with the orthographic projection of the light emitting structure layer 40 on the substrate 80. For example, the orthographic projection of the auxiliary circuit on the substrate 80 overlaps with the orthographic projection of the light emitting structure on the substrate 80. For example, the orthographic projection of the auxiliary circuit on the substrate 80 overlaps with the orthographic projection of at least one of the anode layer, the light emitting layer, and the cathode layer on the substrate 80.

[0093] Among them, the orthographic projection of the auxiliary circuit on the substrate 80 overlaps with the orthographic projection of the light-emitting structure layer 40 on the substrate 80, which means that the auxiliary circuit is located in the display area AA and will not occupy the area of ​​the non-display area NA. At least three dams 70 can be set in the vacant area of ​​the non-display area NA. The dams 70 effectively reduce the risk of ink overflow when the organic layer is packaged in the display area AA. At least three dams 70 can reduce the flow rate of the ink during the organic layer packaging to avoid affecting the packaging effect, which can further improve the reliability of the packaging.

[0094] Optional, reference Figure 3 , the test circuit includes a dot screen test circuit.

[0095] Among them, the dot screen test circuit can be used to test the pixels in the display area. By sending test signals to the pixels, it can detect the pixel's luminescence, whether the color display is normal, whether the brightness is uniform, etc., to determine whether the pixels can work normally and promptly discover problems such as bad pixels, bright spots, and dark spots.

[0096] Optional, reference Figure 3 The second circuit layer 30 includes data lines, and the auxiliary circuits are connected to the data lines.

[0097] Optional, reference Figure 3 , the auxiliary circuit is connected to the pixel driving circuit through the data line.

[0098] The auxiliary circuit is connected to the pixel driving circuit via a data line and is used to transmit a data signal to the pixel driving circuit.

[0099] Optionally, the orthographic projection of the shielding ring 60 on the substrate 80 overlaps with the orthographic projection of the dam 70 on the substrate 80 , and / or at least a portion of the orthographic projection of the shielding ring 60 on the substrate 80 is located in a gap between orthographic projections of adjacent dams 70 on the substrate 80 .

[0100] Optional, reference Figure 3 , the height of each dam 70 is the same, and / or the spacing between adjacent dams 70 is equal.

[0101] The height of each dam 70 is the same, which can reduce the flow rate of ink during organic layer encapsulation, avoid affecting the encapsulation effect, and further improve the reliability of encapsulation.

[0102] The spacing between adjacent dams 70 is equal, which can stabilize the flow rate of the organic layer encapsulation ink, simplify the process difficulty, and improve the process efficiency.

[0103] The same height of each dam 70 and the same spacing between adjacent dams 70 can reduce the flow rate of ink during organic layer encapsulation, avoid affecting the encapsulation effect, and further improve the reliability of encapsulation; it can also simplify the process difficulty and improve the process efficiency.

[0104] Optional, reference Figure 3 , the spacing between adjacent dams 70 is greater than or equal to 10 μm.

[0105] The width of the dam can be greater than or equal to 25 μm. If the spacing between adjacent dams 70 is less than 10 μm, the flow rate of the organic layer encapsulation ink will be poor. Therefore, setting the spacing between adjacent dams 70 to be greater than or equal to 10 μm can slow down the flow rate of the organic layer encapsulation ink and ensure the reliability of the encapsulation. For example, the spacing between adjacent dams 70 can be 10 μm, 11 μm, 12 μm, or 15 μm.

[0106] Optional, reference Figure 3 The display panel also includes: an encapsulation layer 50, which is arranged on a side of the light emitting structure layer 40 away from the first circuit layer 20; for example, the encapsulation layer 50 includes at least two inorganic layers and at least one organic layer stacked, and an organic layer is arranged between each two adjacent inorganic layers; at least two inorganic layers extend from the display area AA to the non-display area NA, and at least two inorganic layers are located on a side of the dam 70 away from the substrate 80, and are contacted in a preset area, wherein the preset area is the non-display area NA located on the side of the dam away from the display area AA, and along the direction from the display area AA to the non-display area NA, the width C of the preset area is greater than or equal to 90μm and less than or equal to 130μm.

[0107] There is an organic layer between every two adjacent inorganic layers, and the encapsulation layer 50 closest to the light emitting structure layer 40 and the film layer farthest from the light emitting structure layer 40 are both inorganic layers; Figure 3The encapsulation layer 50 in the display panel includes a first inorganic layer 51, an organic layer 52, and a second inorganic layer 53. The organic layer 52 has fluidity. When the organic layer 52 is encapsulated, it will flow from the display area AA to the non-display area NA. The dam 70 can reduce the flow rate of the organic layer 52 to prevent the organic layer 52 from spreading too large, affecting the width of the non-display area NA, and affecting the encapsulation effect. The first inorganic layer 51 and the second inorganic layer 53 prevent water vapor and oxygen from entering. The organic layer 52 can be used to relieve the stress between the first inorganic layer 51 and the second inorganic layer 53, thereby improving the reliability of the display panel. Since the shift register circuit and the auxiliary circuit are both located in the display area AA, the non-display area NA can have a large free space, so that the area of ​​the preset area can be larger, and the width C of the preset area is greater than or equal to 90μm and less than or equal to 130μm, so that the area covered by the inorganic layer is larger, which can better block water and oxygen, increase the water and oxygen path, and the contact area between the inorganic layer and the substrate is larger, which can prevent the inorganic layer from peeling off and improve the reliability of the display panel encapsulation.

[0108] Among them, since the shift register circuit and the auxiliary circuit are both located in the display area AA, the area of ​​the preset area can be larger, and the width C of the preset area is greater than or equal to 90μm-130μm. Exemplarily, the width C of the preset area can be 90μm, 100μm, 110μm, 120μm or 130μm, etc.; it is three times larger than the preset area of ​​the display panel in the prior art, which can block water and oxygen and increase the water and oxygen path. The contact area between the preset area and the substrate is larger, which can avoid inorganic layer peeling and improve the packaging reliability of the display panel.

[0109] Optional, reference Figure 3 , the boundary of the organic layer 52 is located on a side of the dam 70 away from the display area AA and a side close to the display area AA.

[0110] Among them, the boundary of the organic layer 52 refers to the direction along the display area AA pointing to the non-display area NA, and the boundary of the organic layer 52 is farthest from the display area AA; the boundary of the organic layer 52 is located on the side of the dam 70 away from the display area AA and close to the display area AA, that is, along the direction along the display area AA pointing to the non-display area NA, the boundary of the organic layer 52 is located within the boundary of the side of the dam 70 farthest from the display area AA and away from the display area AA.

[0111] Optional, Figure 4 is a schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention, referring to Figure 4, the first circuit layer 20 includes a first conductive layer 21, a second conductive layer 22, and a third conductive layer 23 which are sequentially stacked; wherein the first conductive layer 21 is disposed on a side of the second conductive layer 22 away from the third conductive layer 23. For example, an insulating layer 202 is disposed between two adjacent ones of the first conductive layer 21, the second conductive layer 22, and the third conductive layer 23. The first conductive layer 21 may include a metal layer. The second conductive layer 22 may include a metal layer. The third conductive layer 23 may include a metal layer. The first conductive layer 21, the second conductive layer 22, and the third conductive layer 23 may be located on the substrate 80, and are sequentially stacked in a direction away from the substrate 80.

[0112] Among them, the first conductive layer 21, the second conductive layer 22 and the third conductive layer 23 are used to form a shift register circuit and an auxiliary circuit. The first conductive layer 21 can be used to form a gate of a transistor, the second conductive layer 22 can be a capacitor plate layer, and the third conductive layer 23 can be used to form a source metal and a drain metal of a transistor; and a portion of the first conductive layer 21 and a portion of the second conductive layer 22 can be used as two plates of a capacitor; the third conductive layer can be used to form a signal line layer; a substrate can be provided on a side of the first conductive layer 21 away from the second conductive layer 22, and a pad can be provided on one side of the substrate for bonding a driver chip. The pad can be located in at least one of the first conductive layer 21, the second conductive layer 22 and the third conductive layer 23. The pad can be connected to the auxiliary circuit. The pad can be located in a non-display area. The shift register circuit can include a transistor. The auxiliary circuit can include a transistor. The pixel drive circuit can include a transistor and a capacitor.

[0113] Optionally, the first conductive layer is a first gate conductive layer, the second conductive layer is a capacitor plate layer, and the third conductive layer is a signal line layer.

[0114] Among them, the first conductive layer is the first gate conductive layer, the second conductive layer is the capacitor plate layer, and the third conductive layer is the signal line layer. While not increasing the lateral size of the device, the packaging reliability can be ensured, so that the display panel has a better appearance effect.

[0115] Optional, reference Figure 4 The shielding ring 60 is disposed on the same layer as at least one conductive layer in the first circuit layer 20 and the second circuit layer 30. For example, at least a portion of the shielding ring 60 is disposed on the same layer as at least one conductive layer in the first circuit layer 20. For example, at least a portion of the shielding ring 60 is disposed on the same layer as at least one conductive layer in the second circuit layer 30.

[0116] Optionally, the second circuit layer 30 includes a second gate conductive layer, a second capacitor plate layer, and a second signal line layer which may be located on the substrate 80 and are sequentially stacked in a direction away from the substrate 80 .

[0117] The shielding ring 60 is disposed on the same layer as at least one conductive layer of the first circuit layer 20 and the second circuit layer 30 . There is no need to add a film layer to the shielding ring 60 , and there is no need to change the thickness of the display panel, thereby ensuring that the display panel has a smaller thickness.

[0118] Optional, Figure 5 is a schematic diagram of another display panel provided by an embodiment of the present invention, referring to Figure 5 The display area AA includes a first edge area D1, a second edge area D2 and a third edge area D3; the first edge area D1 and the second edge area D2 are arranged relatively to each other along the first direction X, the third edge area D3 is adjacent to the first edge area D1, and the third edge area D3 is adjacent to the second edge area D2; the shift register circuit 201 is arranged in the first edge area D1 and / or the second edge area D2; and / or the auxiliary circuit 203 is arranged in the third edge area D3.

[0119] Among them, the shift register circuit is connected to the driving circuit through the via 204; and / or the auxiliary circuit is connected to the pixel driving circuit through the via 204. By setting the shift register circuit and the auxiliary circuit in the display area AA, the area of ​​the vacated non-display area NA can be used to set a dam and increase the area of ​​the preset area of ​​the non-display area NA, so as to improve the reliability of the display panel. The first edge area D1 can correspond to the left frame area. The second edge area D2 can correspond to the right frame area. The third edge area D3 can correspond to the bottom frame area.

[0120] Optional, reference Figure 3 and Figure 5 The second circuit layer 30 includes gate lines. The shift register circuit 201 is connected to the pixel driving circuit 31 through the gate lines 301. The gate lines 301 extend along the first direction X.

[0121] The second circuit layer 30 includes data lines 302 and gate lines 301, the gate lines include scan lines and / or light-emitting control lines, the gate lines extend along a first direction X, the data lines extend along a second direction Y, and the first direction X and the second direction Y intersect each other. The scan lines 301 and / or the light-emitting control lines work synchronously with the signals of the data lines, and when a row or column of pixels is selected by the scan lines, the data lines transmit the corresponding data to these pixel driving circuits, ensuring that the data is accurately transmitted to the corresponding pixel driving circuits.

[0122] Optional, reference Figure 3 The shielding ring 60 is electrically connected to the electrostatic protection circuit, or the second circuit layer 30 includes a power line, the power line is electrically connected to the light emitting structure layer 40, and the shielding ring 60 is electrically connected to the power line.

[0123] The shielding ring 60 is electrically connected to the electrostatic protection circuit, and the electrostatic protection circuit can be used to release static electricity, thereby improving the electrostatic protection capability of the display panel. The second circuit layer 30 includes a power line, which is electrically connected to the light-emitting structure layer 40, and the shielding ring 60 is electrically connected to the power line. The power line has good conductivity and current carrying capacity, and can provide a release path for static electricity, thereby improving the electrostatic protection capability of the display panel.

[0124] The embodiment of the present invention provides another display panel, referring to Figure 3 , the display panel includes:

[0125] An array substrate 10, the array substrate 10 includes a display area AA and a non-display area NA; the array substrate 10 includes a first circuit layer 20, the first circuit layer 20 includes auxiliary circuits, the auxiliary circuits include at least one of a multi-way selection circuit, a point screen test circuit, a crack detection circuit and an electrostatic protection circuit; the auxiliary circuits are all located in the display area AA; the display area AA of the array substrate 10 is provided with a light-emitting structure layer.

[0126] In the embodiment of the present invention, the auxiliary circuits are all located in the display area AA and will not occupy the area of ​​the non-display area NA. The vacant area of ​​the non-display area NA can be used to set at least three dams 70, for example. The dams 70 effectively reduce the risk of ink overflow when the organic layer is packaged in the display area AA. At least three dams 70 can reduce the flow rate of the ink during organic layer packaging to avoid affecting the packaging effect, which can further improve the reliability of the packaging and enhance the customer experience; and / or reduce the border width.

[0127] This embodiment can be combined with some or all of the features of the above embodiments, which will not be described in detail here.

[0128] The embodiment of the present invention further includes a display device based on the above embodiment, including the display panel described in any embodiment of the present invention. The display device may include a mobile phone, a tablet computer, a notebook computer, a wearable device or a vehicle-mounted display device.

[0129] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0130] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A display panel, characterized in that: include: An array substrate, the array substrate comprising a display area and a non-display area; the non-display area surrounds at least a portion of the display area; The display area of ​​the array substrate is provided with a light emitting structure layer; The non-display area of ​​the array substrate includes a shielding ring, and the shielding ring surrounds at least a portion of the display area.

2. The display panel according to claim 1, characterized in that: There are at least two shielding rings. At least two of the shielding rings are arranged at intervals in a direction from the display area to the non-display area. Preferably, along the direction from the display area to the non-display area, the spacing between adjacent shielding rings is greater than or equal to 1 μm; Preferably, along the direction from the display area to the non-display area, the width of each shielding ring is greater than or equal to 2 μm and less than or equal to 3 μm; Preferably, at least some of the shielding rings are arranged in different layers; Preferably, the shielding ring includes a first shielding ring and a second shielding ring, and the first shielding ring and the second shielding ring are alternately arranged in sequence along a direction from the display area to the non-display area, and the first shielding ring and the second shielding ring are arranged in different layers.

3. The display panel according to claim 1, wherein: The shielding ring is connected to a DC voltage or a power supply voltage; Preferably, the material of the shielding ring includes metal; Preferably, the array substrate comprises a circuit layer, the circuit layer comprises a plurality of metal layers, and the shielding ring is disposed on the same layer as at least one metal layer among the plurality of metal layers; Preferably, the material of the shielding ring includes at least one of molybdenum, titanium and aluminum.

4. The display panel according to claim 1, wherein: The array substrate comprises a first circuit layer and a second circuit layer, the first circuit layer is arranged on a side of the second circuit layer away from the light emitting structure layer, the first circuit layer comprises a shift register circuit and / or an auxiliary circuit, the second circuit layer comprises a pixel driving circuit, and the auxiliary circuit comprises at least one of a multi-way selection circuit, a test circuit, a crack detection circuit and an electrostatic protection circuit; The shift register circuit and / or the auxiliary circuit are located in the display area; Preferably, the non-display area of ​​the array substrate further comprises at least three dams, and the dams are located on a side of the second circuit layer away from the first circuit layer; along the direction from the display area to the non-display area, the at least three dams are arranged in sequence and arranged at intervals; Preferably, the light emitting structure layer includes a plurality of light emitting structures, the pixel driving circuit is electrically connected to the light emitting structure, and the pixel driving circuit is used to drive the light emitting structure to emit light; The shift register circuit is electrically connected to the pixel driving circuit through a via; Preferably, the array substrate comprises a substrate, and the first circuit layer, the second circuit layer, and the light emitting structure layer are located on the substrate and are stacked in sequence in a direction away from the substrate; Preferably, the orthographic projection of the auxiliary circuit on the substrate overlaps with the orthographic projection of the light-emitting structure layer on the substrate; Preferably, the test circuit includes a dot screen test circuit; Preferably, the second circuit layer includes a data line, and the auxiliary circuit is connected to the data line; Preferably, the auxiliary circuit is connected to the pixel driving circuit via the data line; Preferably, at least part of the film layer where the dam is located is located on a side of the film layer where the shielding ring is located away from the substrate; Preferably, the orthographic projection of the shielding ring on the substrate overlaps with the orthographic projection of the dam on the substrate, and / or at least part of the orthographic projection of the shielding ring on the substrate is located in the gap between the orthographic projections of adjacent dams on the substrate.

5. The display panel according to claim 4, characterized in that: The non-display area of ​​the array substrate further comprises a dam, and at least a portion of the film layer where the dam is located is located on a side of the film layer where the shielding ring is located away from the substrate; Preferably, the orthographic projection of the shielding ring on the substrate overlaps with the orthographic projection of the dam on the substrate, and / or, there are multiple dams, and at least part of the orthographic projection of the shielding ring on the substrate is located in the gap between the orthographic projections of adjacent dams on the substrate; Preferably, each of the dams has the same height; and / or, the spacings between adjacent dams are equal; Preferably, the spacing between adjacent dams is greater than or equal to 10 μm.

6. The display panel according to claim 4, characterized in that: Also includes: an encapsulation layer, the encapsulation layer being arranged on a side of the light-emitting structure layer away from the first circuit layer; The encapsulation layer comprises at least two inorganic layers and at least one organic layer stacked in layers, with an organic layer disposed between each two adjacent inorganic layers; The at least two inorganic layers extend from the display area to the non-display area, and the at least two inorganic layers are located on a side of the dam away from the substrate, and are contacted in a preset area, wherein the preset area is a non-display area located on a side of the dam away from the display area, and along a direction from the display area to the non-display area, a width of the preset area is greater than or equal to 90 μm and less than or equal to 130 μm; Preferably, the boundary of the organic layer is located on a side of the dam away from the display area and close to the display area.

7. The display panel according to claim 4, characterized in that: The first circuit layer comprises a first conductive layer, a second conductive layer and a third conductive layer which are stacked in sequence; wherein the first conductive layer is arranged on a side of the second conductive layer away from the third conductive layer; Preferably, the first conductive layer is a first gate conductive layer, the second conductive layer is a capacitor plate layer, and the third conductive layer is a signal line layer; Preferably, the shielding ring is provided on the same layer as at least one conductive layer of the first circuit layer and the second circuit layer.

8. The display panel according to claim 4, characterized in that: The display area includes a first edge area, a second edge area and a third edge area; The first edge region and the second edge region are arranged opposite to each other along a first direction, the third edge region is adjacent to the first edge region, and the third edge region is adjacent to the second edge region; The shift register circuit is arranged in the first edge region and the second edge region; The auxiliary circuit is arranged in the third edge area; Preferably, the second circuit layer includes a gate line, the shift register circuit is connected to the pixel driving circuit via the gate line, and the gate line extends along the first direction; Preferably, the shielding ring is electrically connected to the electrostatic protection circuit, or the second circuit layer includes a power line, the power line is electrically connected to the light-emitting structure layer, and the shielding ring is electrically connected to the power line.

9. A display panel, characterized in that: include: An array substrate, the array substrate comprising a display area and a non-display area; the array substrate comprising a first circuit layer, the first circuit layer comprising an auxiliary circuit, the auxiliary circuit comprising at least one of a multi-way selection circuit, a point screen test circuit, a crack detection circuit and an electrostatic protection circuit; the auxiliary circuits are all located in the display area; The display area of ​​the array substrate is provided with a light emitting structure layer.

10. A display device, characterized in that: A display panel comprising any one of claims 1 to 9.

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