Task scheduler device, computing system, task scheduling method, and program

Abstract

A task scheduler device (100, 100A) is provided with: a dedicated command execution detection unit (110) that detects execution of a dedicated command; a dedicated command execution influence core specifying unit (120) that specifies a logical core that operates on the same physical core as the dedicated command execution core due to the execution of the dedicated command and that has a reduced operation frequency; a low-frequency permitted process allocation determination unit (140) that performs a determination for specifying a process that satisfies a prescribed performance requirement even when operating at a low frequency with respect to the logical core in which the operation frequency specified by the dedicated command execution influence core specification unit (120) is reduced; and a process core allocation unit (150) that allocates the process specified by the low-frequency permitted process allocation determination unit (140) to a logic core having a reduced operation frequency.

Description

Technical Field

[0001] The invention relates to a task scheduler device, a computing system, a task scheduling method and a program. Background Art

[0002] In applications that perform signal / media processing using the CPU (e.g., vRAN (virtual Radio Access Network) L1 signal processing, Deep-Learning), the CPU's SIMD (Single Instruction Multiple Data) extended instruction set (e.g., Intel SSE / AVX512) is often used for high-throughput computing.

[0003] The SIMD extended instruction set in recent years consumes large power and generates large amounts of heat, and the frequency of a core executing SIMD instructions temporarily decreases (see Non-Patent Document 1).

[0004] The following describes the technical trends surrounding the SIMD operation / (in the following description, " / " means "or") command. On the academic level, there are the following situations.

[0005] Since 2019, scheduling techniques that take into account the reduction of execution frequency have been proposed at the academic level.

[0006] The technology described in Non-Patent Document 2 identifies processes that are affected by frequency reduction due to SIMD operations, and ensures fairness by performing long-term scheduling compensation ("fairness assurance").

[0007] The technology described in Non-Patent Document 3 eliminates interference ("elimination of interference") by performing specialized scheduling on cores that execute SIMD instructions.

[0008] In addition, there are the following actual use cases in the market.

[0009] Generally, the effective utilization of SIMD units is limited and limited to offloading a portion of processing, so it does not cause a big problem. For example, there are reports of a certain degree of performance degradation in SSL (Secure Sockets Layer) encryption processing.

[0010] On the other hand, if vRAN (vDU) improves core efficiency in order to fully and effectively utilize SIMD operations, there is a high possibility that this will become a problem. Here, the above-mentioned vRAN (vDU) refers to the DU when the base station function is divided into RU (Radio Unit) / DU (Distributed Unit) / CU (Centralized Unit) in the vRAN that uses a general-purpose server to implement a base station (BBU: Broad Band Unit) that performs wireless signal processing.

[0011] In addition, there is the FlexRAN software reference platform developed by Intel (registered trademark). FlexRAN is the main building block for building the layer 1 (L1) function of the RAN of the wireless base station based on software. The current FlexRAN has prepared a CPU that can operate all cores at low frequencies and meet performance requirements even at low frequencies.

[0012] Prior art literature

[0013] Non-patent literature

[0014] Non-patent document 1: Intel-avx-512-instruction-set, [online], [retrieved on September 6, 2019], Internet 〈URL: https: / / builders.intel.com / docs / networkbuilders / intel-avx-512-instruction-set-for-packet-processing-technology-guide-1617440657.pdf (p15)〉

[0015] Non-patent document 2: Fair Scheduling for AVX2 and AVX-512 Workloads, Mathias Gottschlag, usenix ATC 2021, [online], [retrieved on September 6, 2021], Internet 〈URL: https: / / www.usenix.org / conference / atc21 / presentation / gottschlag〉

[0016] Non-patent document 3: Automatic Core Specialization for AVX-512 Applications, Mathias Gottschlag SYSTOR'20: Proceedings of the 13th ACM International Systems and Storage Conference, [online], [retrieved on September 6, 2019], Internet 〈URL: https: / / dl.acm.org / doi / 10.1145 / 3383669.3398282〉 Summary of the invention

[0017] Problems to be solved by the invention

[0018] In a computer system, the CPU on a computer (hereinafter referred to as a server) has a structure that supports general commands and special commands dedicated to specific operations (SIMD operation commands, special commands for encryption). Special commands for encryption are shown in, for example, https: / / www.isus.jp / hpc / intel-advanced-encryption-standard-instructions-aes-ni / . In this structure, when the special command is executed, the frequency of the CPU physical core changes.

[0019] [Core operating frequency reduction due to SIMD operations]

[0020] Reference Fig.14 and Fig.15 , explaining the phenomenon of core operation frequency reduction caused by SIMD operations.

[0021] Fig.14 This is a diagram showing the configuration of a CPU including a SIMD unit for executing SIMD instructions.

[0022] like Fig.14 As shown, the CPU 10 includes four physical cores (CPU cores) 11 and SIMD units 12 that are provided in the four physical cores 11 and execute SIMD commands. In this specification, the physical core 11 is a single CPU core that executes two or more processes simultaneously.

[0023] like Fig.14 As shown in the enlarged diagram, each of the physical cores 11 has a logical core 1 and a logical core 2 that execute two threads. Fig.14The four physical cores 11 shown have eight logical cores because each core executes two threads. That is, the logical core is the number of physical cores 11 multiplied by the number of threads that each core can execute using hardware multithreading technology (e.g., Intel HyperThreading). Through this hyperthreading, a single physical core 11 can act like two logical cores.

[0024] Fig.15 Yes means Fig.14 A graph showing the execution commands and action frequencies of the logical cores shown. Fig.15 The upper diagram shows Fig.14 The execution commands of the logical core shown are: Fig.15 The lower graph shows the core operation frequency when the execution command of the logical core is executed.

[0025] like Fig.15 As shown in the upper figure, logical core 1 commands execute normal commands, SIMD commands, and normal commands. While logical core 2 commands execute SIMD commands, they execute normal commands ( Fig.15 The figure mark a) in the upper figure.

[0026] In the case of using hyperthreading to make one physical core appear virtually as two, the SIMD expansion command execution core (here, logical core 1) and the operation frequency of the logical core (here, logical core 2) operating on the same physical core are reduced ( Fig.15 ). For example, Fig.15 As shown in the lower figure, the core operating frequency decreases from high (about 3.5Ghz) to low (about 1.9Ghz). In addition, after SIMD execution, the core operating frequency continues to decrease for a certain period of time (for example, 2ms) until the core operating frequency returns to the original state. Fig.15 Figure numeral c in the upper figure) (<frequency of logical core 2 is reduced>).

[0027] Since the operating frequency of the logical core (here, logical core 2) operating on the same physical core as the SIMD expansion command execution core is reduced and the operating frequency of the logical core 2 is reduced for a certain period of time, an "operation frequency reduction period" ( Fig.15 d in the lower figure of FIG. 1). Therefore, the number of instructions executed per unit time decreases, resulting in performance fluctuations and reduced responsiveness (<degradation of overall core performance>).

[0028] Thus, when using hyperthreading, when executing SIMD instructions (special instructions), the power consumption of the core increases, and sometimes the operating frequency of the logical core operating on the same physical core decreases. In this case, the processing performance of the core executing the special instructions and the process scheduled to the same physical core decreases.

[0029] Reference Figure 16 to Figure 18 , the problems of the prior art are explained in more detail.

[0030] <Prior art 1: ensuring equality>

[0031] There is a technique for ensuring equality by allocating a certain amount of CPU time to each process (<Prior Art 1>). Prior Art 1 is implemented by, for example, Linux CFS (Completely Fair Scheduler).

[0032] Fig.16 and Fig.17 This is a diagram for explaining the prior art 1. Fig.16 This is a diagram showing a core allocation state when a CPU has a plurality of physical cores and each of the plurality of physical cores is operated as two logical cores. Fig.17 Yes means through Fig.16 A graph showing the cumulative allocated CPU time of process groups allocated to each physical core.

[0033] like Fig.16 As shown, the CPU 10 has two physical cores (physical core 1, physical core 2) 11. Hyperthreading allows the single physical core (physical core 1, physical core 2) 11 to operate like two logical cores (logical core 1, logical core 2).

[0034] Fig.16 The logical core 1 of the physical core (physical core 1) 11 shown by the thick hatching line is a core that executes a dedicated instruction process (SIMD), and the logical core 2 is a core that executes a group of processes 1 as normal instructions. Fig.16 The logical core 1 of the physical core (physical core 2) 11 shown by the thin hatched line is a core that executes the process group 2 as a normal command, and the logical core 2 is a core that executes the process group 3 as a normal command.

[0035] When the CPU time is allocated to the physical cores (physical core 1, physical core 2) 11, the fluctuation of the operating frequency is not considered. Fig.16 In the example, the operation frequency of physical core 1 is low, and the operation frequency of physical core 2 is high.

[0036] In the prior art 1, equality is ensured by allocating a certain amount of CPU time to each process. However, since the fluctuation of the operation frequency is not considered, "Requirement 1: each process is allocated the required CPU processing time" is not satisfied.

[0037] That is, Fig.17 As shown in the figure, since the priority of process group 1 and process group 2 is the same "medium", the same length of CPU time is allocated to them. However, the frequency of process group 1 and process group 2 is different. Since the same length of CPU time is allocated to process group 1 and process group 2, the processing performance may not be satisfied depending on the performance characteristics of each process to the frequency.

[0038] In the prior art 1, there is a problem that the number of execution cores cannot be minimized due to process allocation taking into account the fluctuation of the operating frequency.

[0039] <Prior Art 2: Static Core Allocation>

[0040] Fig.18 This is a diagram for explaining the prior art 2. Fig.18 This is a diagram showing a core allocation state when a CPU has a plurality of physical cores and each of the plurality of physical cores is made to operate as two logical cores.

[0041] like Fig.18 As shown, CPU 10 has three physical cores (physical core 1, physical core 2, physical core 3) 11. Through hyperthreading, a single physical core (physical core 1, physical core 2, physical core 3) 11 acts like two logical cores (logical core 1, logical core 2). Among them, the physical core (physical core 1) 11 is used for special command allocation. As described above, the special command is a SIMD operation command and a special command for encryption. The logical core 1 of the physical core 1 for special command allocation is a core that executes a special command process (SIMD). The logical core 2 of the physical core 1 for special command allocation is a core that executes a special command, but is not allocated here. That is, the logical core 1 and logical core 2 of the physical core 1 for special command allocation are only allocated processes that execute special commands.

[0042] In addition, logical core 1 of physical core 2 is a core that executes process group 1 as a normal command, and logical core 2 is a core that executes process group 2 as a normal command. Similarly, logical core 1 of physical core 3 is a core that executes process group 3 as a normal command, and logical core 2 is not assigned a process group.

[0043] In the prior art 2, the cores of the process that executes the dedicated command and other processes are distinguished and specialized. Fig.18In the example, in the physical core 1 used for dedicated command allocation, an unused logical core 2 is generated ( Fig.18 The reference symbol e) of the embodiment deteriorates the efficiency of the number of execution cores. The unused logical core 2 causes the number of running cores to increase, so there is a problem that "Requirement 2: Minimization of the number of execution cores" is not satisfied.

[0044] The present invention is proposed in view of such a background, and the problem to be solved by the present invention is to improve the core utilization rate and reduce the number of CPU operating cores.

[0045] Solutions for solving problems

[0046] In order to solve the above-mentioned problems, a task scheduler device is provided, which, in a computing system that executes special commands dedicated to specific operations, uses hardware multithreading that makes one physical core virtually look like multiple logical cores, and allocates the execution process of the special command to the logical core, and is characterized in that it comprises: a special command execution detection unit, which detects the execution of the special command; a special command execution affecting core determination unit, which determines the logical core with a reduced operating frequency that operates on the same physical core as the execution core of the special command due to the execution of the special command; a low-frequency allowed process allocation judgment unit, which determines the process that meets the specified performance requirements even if it operates at a low frequency for the logical core determined by the special command execution affecting core determination unit; and a process core allocation unit, which allocates the process determined by the low-frequency allowed process allocation judgment unit to the logical core with a reduced operating frequency.

[0047] Effects of the Invention

[0048] According to the present invention, the core utilization rate can be improved and the number of CPU operating cores can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 It is a schematic diagram of the configuration of a computing system including a task scheduler device according to an embodiment of the present invention.

[0050] Figure 2 This is a configuration example in which the task scheduler device of the computing system according to the embodiment of the present invention is arranged in the user space.

[0051] Figure 3 This is a configuration example in which the task scheduler device of the computing system according to the embodiment of the present invention is arranged in the OS.

[0052] Figure 4 This is a diagram showing an example in which the computing system according to the embodiment of the present invention is applied to a task scheduler device in a server virtualization environment composed of a general-purpose Linux kernel (registered trademark) and VMs.

[0053] Figure 5 The diagram shows, in a table format, a structure of a management database included in a dedicated command execution detection unit of a task scheduler device of a computing system according to an embodiment of the present invention.

[0054] Figure 6 The diagram shows, in a table format, a structure of a database held by a running process operation frequency performance impact determination unit of a task scheduler device of a computing system according to an embodiment of the present invention.

[0055] Figure 7 This is a diagram showing an operation mode of the task scheduler device in the computing system according to the embodiment of the present invention when the task scheduler device moves the core of a running process.

[0056] Figure 8 This is a flowchart of an operation mode of the task scheduler device in a case where the task scheduler device of the computing system according to the embodiment of the present invention moves the core of a running process.

[0057] Fig. 9 This is a diagram showing an operation mode of the task scheduler device in the case where the task scheduler device of the computing system according to the embodiment of the present invention schedules a newly started process.

[0058] Fig.10 This is a flowchart of an operation mode of the task scheduler device in the case where the task scheduler device of the computing system according to the embodiment of the present invention schedules a newly started process.

[0059] Fig.11 This is a diagram showing an operation mode of the task scheduler device of the computing system according to the embodiment of the present invention, which collects (periodically executes) information on the frequency influence of each process of the task scheduler device.

[0060] Fig.12 This is a flowchart of an operation mode of the task scheduler device of the computing system according to the embodiment of the present invention, which collects (periodically executes) information on the frequency influence of each process.

[0061] Fig.13 A diagram showing a hardware configuration of an example of a computer that realizes the function of a task scheduler device of a computing system according to an embodiment of the present invention.

[0062] Fig.14 This is a diagram showing the configuration of a CPU including a SIMD unit for executing SIMD instructions.

[0063] Fig.15 Yes means Fig.14 A graph showing the execution commands and action frequencies of the logical cores shown.

[0064] Fig.16 This is a diagram showing a core allocation state when a CPU has a plurality of physical cores and each of the plurality of physical cores is made to operate as two logical cores in the prior art 1.

[0065] Fig.17 This is a diagram showing the cumulative allocated CPU time of a process group allocated according to a core allocation state when a CPU has a plurality of physical cores and each of the plurality of physical cores is operated as two logical cores in the prior art 1.

[0066] Fig.18 This is a diagram showing a core allocation state when a CPU has a plurality of physical cores and each of the plurality of physical cores is made to operate as two logical cores in the prior art 2. DETAILED DESCRIPTION

[0067] Hereinafter, a task scheduler device and the like according to a specific embodiment of the present invention (hereinafter referred to as “this embodiment”) will be described with reference to the drawings.

[0068] [summary]

[0069] Figure 1 It is a schematic diagram of the configuration of a computing system including a task scheduler device according to an embodiment of the present invention.

[0070] This embodiment is an example of application to a CPU as a computing system. In addition to the CPU, it can also be applied to processors such as GPU (Graphic Processing Unit), FPGA (Field Programmable Gate Array), and ASIC (Application Specific Integrated Circuit).

[0071] like Figure 1 As shown, the computing system 1000 comprises: a CPU 10 as hardware (HW), a physical core (physical core 1, physical core 2, ..., physical core N) 11 (processor) on the CPU 10, an OS 20, a userland (user space) 30, and a task scheduler device 100 as a server.

[0072] The computing system 1000 executes special commands dedicated to specific operations including SIMD commands or special commands for encryption. The computing system 1000 includes a task scheduler device 100 that uses hardware multithreading that makes one physical core virtually look like multiple logical cores and allocates execution processes of special commands to logical cores.

[0073] In the computing system 1000, the premise configuration is summarized as follows.

[0074] server

[0075] The server (task scheduler device 100) is equipped with a CPU (processor). The CPU has more than one physical core. The CPU supports hardware multithreading technology, which can make a single physical core look like multiple logical cores.

[0076] process

[0077] There are the following three types of processes running on the server (task scheduler device 100).

[0078] 1. Execution process of special commands

[0079] 2. Suitable for low-frequency processes. This process has the characteristics of high I / O (input and output), long CPU waiting time, and loose real-time requirements.

[0080] 3. Not suitable for low-frequency processes. This process has many CPU operations and strict real-time requirements.

[0081] Scheduler

[0082] There are many kinds of processes running on the server (task scheduler device 100 ), and each of them has different characteristics such as the ratio of execution of dedicated commands, the amount of input and output processing, and the processing priority.

[0083] <cpu10>

[0084] CPU 10 includes physical cores (physical core 1, physical core 2, ..., physical core N) 11. Physical cores (physical core 1, physical core 2, ..., physical core N) 11 are specifically CPU cores (CPUcore #0, CPUcore #1, ...) (not shown). Physical core 11 uses hyperthreading that makes one physical core look like two virtually, so that each core has logical core 1 and logical core 2 that execute two threads.

[0085] <os20>

[0086] The OS 20 includes a process execution priority management unit 21 and a process IO amount recording unit 22 .

[0087] The process execution priority management unit 21 acquires a list of processes running on the server and the execution priority of each process. Specifically, the process execution priority management unit 21 acquires the execution priority (for example, nice value) of each process through a nice command.

[0088] The process IO amount recording unit 22 obtains a list of processes running on the server (task scheduler device 100) and the input / output amount of each process. Specifically, the process IO amount recording unit 22 obtains the IO amount of each process using an IOStat command (for example, IOStat).

[0089] [Task Scheduler Device 100]

[0090] The task scheduler device 100 includes: a dedicated command execution detection unit 110 (dedicated command detection unit), a dedicated command execution impact core determination unit 120 (core determination unit), a running process action frequency performance impact judgment unit 130 (performance impact judgment unit), a low-frequency allowed process allocation judgment unit 140 (allowed process judgment unit), a process core allocation unit 150 and a new process start / low-frequency action possibility judgment unit 160.

[0091] [Task Scheduler Device Configuration]

[0092] Figure 2 and Figure 3 Yes Description Figure 1 FIG. 1 is a diagram of a configuration of a task scheduler device 100 .

[0093] Configuration of the task scheduler device to the user space

[0094] Figure 2 Yes Figure 1 An example of a configuration in which the task scheduler device 100 is configured in the user space.

[0095] exist Figure 2 In the computing system 1000 shown, a task scheduler device 100 is arranged in the User space 40. The computing system 1000 executes an application program (APL) 1 arranged in the User space 40. The computing system 1000 executes the APL 1 on a server having an OS.

[0096] The present invention can be applied to a case where threads are provided in the user space 40, such as Intel DPDK (Intel Data Plane Development Kit) (DPDK) (registered trademark).

[0097] Configuration of the task scheduler device to the OS

[0098] Figure 3 Yes Figure 1 This is a configuration example in which the task scheduler device 100 is configured in the OS 20 .

[0099] exist Figure 3 In the computing system 1000 shown, a task scheduler device 100 is arranged in the OS 20. The computing system 1000 executes APL 1 on a server having the OS 20.

[0100] The present invention can be applied to a case where threads are included in the kernel, such as New API (NAPI) (registered trademark).

[0101] [Variation of VM Configuration of Task Scheduler Device]

[0102] Reference Figure 2 As described above, the present invention can be applied to a configuration example in which the task scheduler device 100 is arranged in the user space 40. In this case, the OS is not limited. Furthermore, the present invention is not limited to the case of a server virtualization environment.

[0103] <Application example to VM configuration>

[0104] With the development of virtualization technology based on NFV (Network Functions Virtualization), systems are built and operated for each service. In addition, according to the above-mentioned system-based system construction method, the service function is divided into reusable module units and operated on an independent virtual machine (VM: Virtual Machine, container, etc.) environment. As a result, the method called SFC (Service Function Chaining) is becoming mainstream, which uses it as needed like a component and improves operability.

[0105] Figure 4 FIG. 1 is a diagram showing an example in which a computing system 1000A is applied to a task scheduler device in a server virtualization environment composed of a general-purpose Linux kernel (registered trademark) and VMs. Figure 1 The same components are given the same reference numerals.

[0106] The computing system 1000A includes: CPU 10, physical cores (physical core 1, physical core 2, ..., physical core N) 11 (processor) on CPU 10, VM 50, virtual machine monitor (VMM: Virtual Machine Monitor) 51 on VM 50, OS 20, userland (user space) 30 and task scheduler device 100A.

[0107] The virtual machine monitoring unit (VMM) 51 virtualizes the computer and allows multiple different OS to operate in parallel without interfering with each other. The virtual machine monitoring unit (VMM) 51 can create a virtual machine (VM) that appears like a physical computer to software and can run various OS on it.

[0108] In each of the plurality of VMs ( VM1 , VM2 ), the OS 20 includes a process execution priority management unit 21 and a process IO amount recording unit 22 , and the userland 30 includes a dedicated command execution detection unit 110 and a dedicated command execution affecting core identification unit 120 .

[0109] The task scheduler device 100A includes: a running process operation frequency performance impact determination unit 130, a low frequency allowed process allocation determination unit 140, a process core allocation unit 150, and a new process start / low frequency operation possibility determination unit 160. The task scheduler device 100A is not configured in the userland 30 of the single OS 20 but is independently configured outside and operates as a so-called controller function unit.

[0110] The task scheduler device 100A performs core allocation based on information on processes spanning multiple VMs in the VM configuration.

[0111] [Configuration of each functional unit of the task scheduler device]

[0112] <Dedicated Instruction Execution Detection Unit 110>

[0113] The dedicated command execution detection unit 110 detects (determines) whether a dedicated command has been executed in the currently executing process. Specifically, the dedicated command execution detection unit 110 receives an identifier (PID: Process IDentifier, etc.) of a process to be determined whether a dedicated command has been executed, and outputs whether the process has executed a dedicated command.

[0114] There are two methods for determining whether a dedicated command has been executed in the currently executing process.

[0115] 1: Static detection method

[0116] The dedicated command execution detection unit 110 determines whether the process is a process using a dedicated command based on information such as the process name.

[0117] Figure 5 2 is a diagram showing the structure of the management database included in the dedicated instruction execution detection unit 110 in a table format. Figure 5 This is an example of a management database for a process that executes a dedicated command.

[0118] like Figure 5 As shown in FIG. 1 , a process name (signal_p, fec_dec, fec_enc, fft_process) is registered for each ID. The process names (signal_p, fec_dec, fec_enc, fft_process) are all processes that execute dedicated commands.

[0119] The dedicated command execution detection unit 110 lists the processes that use the dedicated command that have been registered in advance ( Figure 5 ) is compared with the name of the executing process to determine whether the dedicated command has been executed.

[0120] 2: Dynamic detection method

[0121] A special register of the CPU (for example, the XCR0 register indicating the changed data area of ​​SIMD in an x86 processor) is used to determine whether a dedicated instruction has been executed. In this case, when the execution of the process to be detected is switched, the scheduler of the OS kernel confirms the change of the value of the register.

[0122] It should be noted that the special registers of the CPU are described in "Chapter 13, Managing State Using The Xsave Feature Set" (PDF). Intel (R) 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture. Intel Corporation (2019). Retrieved 23 March 2019.

[0123] <Dedicated Instruction Execution Affecting Core Determination Unit 120>

[0124] The dedicated command execution-affected core determination unit 120 determines a logical core whose operation frequency is reduced and which operates on the same physical core as the dedicated command execution core due to the execution of the dedicated command. In this embodiment, the dedicated command execution-affected core determination unit 120 determines a core that is executing an input process ID and a core that is affected by the process ID. Specifically, the dedicated command execution-affected core determination unit 120 receives the number of the process that is executing the dedicated command and outputs the number of the CPU core affected by the dedicated command.

[0125] For example, the pidstat command in Linux is used to identify the core of the operation of the process based on the process ID (PID). References to the pidstat command include pidstat(1) Linux manual page, [online], [retrieved on September 6, 2015], Internet 〈URL: https: / / man7.org / linux / man-pages / man1 / pidstat.1.html〉.

[0126] The dedicated command execution-affected core identification unit 120 extracts the number of the operating core information from the command output, identifies the number of the CPU core operating on the same physical core as the core as CPU core information (eg, Linux cpuinfo), and outputs it.

[0127] <Running Process Operation Frequency Performance Impact Determination Unit 130>

[0128] The running process operation frequency performance impact determination unit 130 determines the performance impact of the running process operation frequency.

[0129] In this embodiment, the running process operation frequency performance impact determination unit 130 determines the performance impact of the operation frequency for all processes running in the server (task scheduler device 100). Specifically, the running process operation frequency performance impact determination unit 130 is activated at a certain interval (for example, 10 seconds) and when a process is newly started / ended, and determines the performance impact of the CPU operation frequency on each process.

[0130] There are two methods for determining the impact of the operating frequency performance of the running process.

[0131] 1: Static method

[0132] The static method is a method of determining the influence of the operation frequency based on information such as the process name.

[0133] Figure 6 This is a diagram showing the structure of a database of the running process operation frequency performance impact determination unit 130 in a table format. Figure 6 This is an example of a process database used for determining the frequency influence of a process.

[0134] like Figure 6 As shown in FIG. 1 , the process name (nic_io, calc_crc, packet_process) and the performance impact of the frequency are registered for each ID. The process names (nic_io, calc_crc, packet_process) are all processes for determining the frequency impact of the process.

[0135] The running process operation frequency performance impact determination unit 130 registers a process list (process ID list) running on the server (task scheduler device 100) in advance ( Figure 6 ) is compared with the name of the executing process to determine the performance impact of the running process action frequency.

[0136] 2: Dynamic method

[0137] The dynamic method is a method for determining the influence of frequency changes of each process based on the execution priority (eg, nice value) of each process by the process execution priority management unit 21 and the IO volume (eg, iostat) of the process IO volume recording unit 22 .

[0138] The running process action frequency performance impact determination unit 130 obtains the execution priority (nice value) and IO volume (iostat) of each process from the process execution priority management unit 21 and the process IO volume recording unit 22, integrates the two values ​​as the impact degree, and determines the impact of the running process action frequency performance based on the impact degree.

[0139] A specific example of influence calculation will be described below.

[0140] The running process action frequency performance impact determination unit 130 obtains the priority N (e.g., -20 to 20) of each process from the process execution priority management unit 21, and obtains the IO volume (XMbytes / s) from the process IO volume recording unit 22. The IO volume is divided by a specified value (e.g., "5") and set to M (0-20) (if it is greater than 21, it is set to 20). The two values ​​are summed (K=N-M) and set as the impact degree.

[0141] <Low Frequency Permitted Process Allocation Determination Unit 140>

[0142] The low-frequency allowed process allocation determination unit 140 determines to determine a process that satisfies a predetermined performance requirement even when operating at a low frequency, for the logical core whose operating frequency is reduced as determined by the dedicated instruction execution affecting core determination unit 120 .

[0143] For example, the low frequency allowed process allocation determination unit 140 selects a pair of a process having little impact even when operating at a low frequency and a core affected by a dedicated command based on information on the number of the core affected by the dedicated command and information on the performance impact of the operating frequency on each process.

[0144] Specifically, the low frequency allowed process allocation determination unit 140 selects processes that can operate at low frequency from the input process ID list, selects CPU cores affected by the dedicated command, and outputs them as pairs. The process ID selection logic at this time is to start from the process with the highest degree of permission to operate at low frequency.

[0145] (Input and Output of Low Frequency Permission Process Allocation Judgment Unit 140)

[0146] The following describes the input and output of the low frequency permission process allocation determination unit 140. First, the input of the low frequency permission process allocation determination unit 140 is as follows.

[0147] Input 1: The number of the CPU core affected by the dedicated instruction is input from the dedicated instruction execution-affected core determination unit 120 .

[0148] Input 2: The ID list of processes running on the server and the impact of the operating frequency on each process are input from the running process operating frequency performance impact determination unit 130 .

[0149] Next, the output of the low frequency permission process allocation determination unit 140 is as follows.

[0150] Output: Outputs a pair of the process ID that can be operated at a low frequency and the ID of the core affected by the dedicated command.

[0151] (Operation of the Low-Frequency Permitted Process Allocation Judgment Unit 140)

[0152] The operation of the low-frequency permitted process allocation determination unit 140 will be described.

[0153] Figure 1 The physical cores 11 on the CPU 10 shown are 10 cores (No. 1 to No. 10), and it is assumed that 6 processes (A, B, C, D, E, and F) are operated. In this situation, the low-frequency allowed process allocation determination unit 140 performs the following determination.

[0154] The low-frequency permission process allocation determination unit 140 receives the following two inputs 1 and 2.

[0155] Input 1: "Information of the number of the core affected by the dedicated command"

[0156] Showing influence (frequency decreases): No.1, No.2, No.3, No.4, No.5, No.6

[0157] No impact was shown: No.7, No.8, No.9, No.10

[0158] Input 2: "A list of process IDs running on this server and the characteristics of each process (how much it is affected by the frequency of operation)"

[0159] Affected (degraded performance): A, B, C, D

[0160] Not affected: E, F

[0161] The low-frequency allowed process allocation determination unit 140 selects processes E and F from the process ID list as “processes that can operate at a low frequency”.

[0162] As the core for making these processes operate, select "No.1" and "No.2" from "No.1, No.2, No.3, No.4, No.5, No.6".

[0163] Finally, two pairs (core No. 1 and process E) and (core No. 2 and process F) are output.

[0164] <Process Core Allocation Unit 150>

[0165] The process core allocation unit 150 allocates the process determined by the low frequency allowed process allocation determination unit 140 to the logical core whose operating frequency is reduced. For example, the process core allocation unit 150 allocates the process having the input process ID to the core of the process that operates on the input CPU core. It should be noted that, for the input core affected by performance, information is stored as a list of cores (not shown).

[0166] The process core allocation unit 150 performs the following input and output.

[0167] Input (when changing the core allocation of an existing process): a pair of process ID and CPU core ID

[0168] Input (when the process is newly started): command name

[0169] Output: None

[0170] The method of allocating cores to processes by the process core allocation unit 150 will be described.

[0171] Mode 1: OS scheduler mode

[0172] One of them is Figure 2 and Figure 3 As shown, the OS scheduler method changes the task scheduler of the OS kernel to schedule tasks to a specific CPU core.

[0173] The second is to change the scheduling method to a specific CPU core by changing the CPU allocation of the task being started, such as the sched_setaffinity() function, [online], [retrieved on September 6, 2015], Internet〈URL:https: / / linuxjm.osdn.jp / html / LDP_man-pages / man2 / sched_setaffinity.2.html〉.

[0174] Mode 2: Through the implementation of the task scheduler in the application

[0175] like Figure 2 and Figure 3 As shown, the implementation method of the task scheduler in the application is the method of allocating CPU cores by the task scheduler when the application has its own task scheduler. Specifically, a mechanism for dynamically specifying the CPU core of the destination for scheduling tasks, such as the pthread_setaffinity function (), [online], [retrieved on September 6, 2015], Internet 〈URL: https: / / linuxjm.osdn.jp / html / LDP_man-pages / man3 / pthread_setaffinity_np.3.html〉, is used to specify the corresponding process and CPU core.

[0176] Mode 3: Apply to a newly started process

[0177] Use a method such as taskset, [online], [retrieved on September 6, 2015], Internet 〈URL: https: / / www.man7.org / linux / man-pages / man1 / taskset.1.html〉command to specify the CPU core to operate when a certain process is started so that it operates on a specific core.

[0178] In the above-mentioned operation example of the low frequency allowed process allocation determination unit 140 , the case where the low frequency allowed process allocation determination unit 140 outputs two pairs (core No. 1 and process E) and (core No. 2 and process F) to the process core allocation unit 150 will be described.

[0179] The process core allocation unit 150 receives two pairs (core No. 1 and process E) and (core No. 2 and process F) from the low frequency allowed process allocation determination unit 140, and sets process E to operate on core No. 1 and process F to operate on core No. 2.

[0180] <New Process Start / Low Frequency Operation Permission Determination Unit 160>

[0181] The input and output of the new process start / low-frequency operation possibility determination unit 160 are both command names.

[0182] The new process start / low frequency operation possibility determination unit 160 determines whether the input command can be operated at a low frequency, and if it is, in order to operate the CPU core affected by the dedicated command, outputs the command name to the process core allocation unit 150. Specifically, the new process start / low frequency operation possibility determination unit 160 compares the input command name with the command name in the internal database to determine whether it can be operated at a low frequency. The new process start / low frequency operation possibility determination unit 160 outputs the command name to the process core allocation unit 150 if it is determined that it can be operated at a low frequency.

[0183] The operation of the computing system 1000 configured as described above will be described below.

[0184] [Operation of the task scheduler device]

[0185] The operation of the task scheduler device when the core of a running process is moved will be described. It should be noted that in the following operation description, the physical core is referred to as the CPU core.

[0186] <Case of moving the core of a running process>

[0187] Figure 7 is a diagram showing an operation mode of a task scheduler device when the core of a running process is moved. Figure 8 is its flow chart. Figure 7 In the figure, the functional part of the corresponding action is indicated by a thick frame.

[0188] In step S11, the dedicated command execution detection unit 110 receives an identifier (PID, etc.) of a process that is a target for determining whether or not the dedicated command is executed, and outputs whether or not the process is executing the dedicated command.

[0189] In step S12, the dedicated instruction execution detection unit 110 determines whether the execution of the dedicated instruction is detected. If the execution of the dedicated instruction is not detected (S12: No), the process returns to step S11.

[0190] When the execution of the dedicated command is detected (S12: Yes) Figure 7 In step S13, the dedicated command execution-affected core determination unit 120 determines the core that is executing the input process ID and the core affected by it. Specifically, the dedicated command execution-affected core determination unit 120 receives the number of the process that executes the dedicated command, and outputs the number of the CPU core affected by the dedicated command ( Figure 7 bb).

[0191] In step S14, the low frequency allowed process allocation determination unit 140 refers to the process frequency performance impact determination unit 130 in the running process. Fig.12 The information collection process receives the determination result of the impact of the running process's operation frequency performance from the running process's operation frequency performance impact determination unit 130 ( Figure 7 Figure numeral cc).

[0192] In step S15, the low frequency allowed process allocation determination unit 140 determines allocation of processes having little impact even when operating at a low frequency to cores affected by the dedicated command based on information on the numbers of the cores affected by the dedicated command and information on the performance impact of the operating frequency on each process.

[0193] In step S16, the low frequency allowed process allocation determination unit 140 determines whether the allocation core of the low frequency process has been changed. If the allocation core of the low frequency process has not been changed (S16: No), the process returns to step S11.

[0194] In the case where there is a change in the allocation core of the low-frequency process (S: Yes) Figure 7 In step S17, the process core allocation unit 150 causes the process with the input process ID to operate on the input CPU core. The process core allocation unit 150 changes the core allocation for the input core affected by performance ( Figure 7 ee), a list (omitted in the figure) serving as the core saves the information and ends the processing of this flow.

[0195] <Scheduling a newly started process>

[0196] Fig. 9 is a diagram showing an operation mode of a task scheduler device when scheduling a newly started process. Fig.10 is its flow chart. Fig. 9 The functional part of the corresponding action is indicated by a thick frame.

[0197] In step S21, the new process start / low frequency operation possibility determination unit 160 determines whether the input command can be operated at a low frequency. If it is true, the command name ( Fig. 9 ff).

[0198] In step S22, the process core allocation unit 150 causes the process having the input process ID to operate on the input CPU core. The process core allocation unit 150 changes the core allocation for the input core affected by performance ( Fig. 9 ee), which is the core list that saves the information and ends the processing of this process.

[0199] <Information collection on frequency impact of each process (periodically executed)>

[0200] Fig.11 1 is a diagram showing an operation mode of a task scheduler device that collects information on the frequency influence of each process (performed periodically). Fig.12 is its flow chart. Fig.11 The functional part of the corresponding action is indicated by a thick frame.

[0201] In step S31, the running process operation frequency performance impact determination unit 130 determines the performance impact of the operation frequency for all processes running in the server (task scheduler device 100). Specifically, the running process operation frequency performance impact determination unit 130 is activated at a certain interval (for example, 10 seconds) and when a process is newly started / ended, and determines the performance impact of the CPU operation frequency on each process.

[0202] In step S32, the process execution priority management unit 21 obtains the ID list of the processes running in the server (task scheduler device 100) and the execution priority of each process based on the instruction of the running process action frequency performance impact determination unit 130, and sends it to the running process action frequency performance impact determination unit 130 ( Fig.11 Specifically, the process execution priority management unit 21 obtains the execution priority of each process through the nice command.

[0203] In step S33 , the running process operating frequency performance influence determination unit 130 is activated at a certain interval (for example, 10 seconds) or when a process is newly started or terminated, and determines the influence of the CPU operating frequency on the performance of each process.

[0204] In step S34, the process IO volume recording unit 22 obtains a list of processes running in the server (task scheduler device 100) and the input / output volume of each process based on the instruction of the running process action frequency performance impact determination unit 130, and sends it to the running process action frequency performance impact determination unit 130 ( Fig.11 Specifically, the process IO amount recording unit 22 obtains the IO amount of each process through the iostat command and ends the processing of this flow.

[0205] [Hardware Configuration]

[0206] The task scheduler devices 100 and 100A ( Figure 1 to Figure 4 ) by, for example Fig.13 The computer 900 constructed as shown is implemented.

[0207] Fig.13 is a device that implements the task scheduler 100, 100A ( Figure 1 to Figure 4 )'s function as a computer 900 of an example of a hardware configuration diagram.

[0208] The computer 900 includes a CPU 901 , a ROM 902 , a RAM 903 , a HDD 904 , a communication interface (I / F) 906 , an input / output interface (I / F) 905 , and a media interface (I / F) 907 .

[0209] The CPU 901 operates based on the program stored in the ROM 902 or the HDD 904 to execute the task scheduler device 100, 100A ( Figure 1 to Figure 4 ) The ROM 902 stores a boot program executed by the CPU 901 when the computer 900 is started, a program depending on the hardware of the computer 900, and the like.

[0210] The CPU 901 controls an input device 910 such as a mouse and a keyboard and an output device 911 such as a display via an input / output I / F 905. The CPU 901 obtains data from the input device 910 via the input / output I / F 905, and outputs the generated data to the output device 911. It should be noted that the CPU 901 can be used as a processor, and a GPU (Graphics Processing Unit) or the like can also be used.

[0211] HDD 904 stores programs executed by CPU 901 and data used by the programs, etc. Communication I / F 906 receives data from other devices via a communication network (eg, NW (Network) 920) and outputs it to CPU 901. In addition, CPU 901 sends generated data to other devices via the communication network.

[0212] The media I / F 907 reads the program or data stored in the recording medium 912 and outputs it to the CPU 901 via the RAM 903. The CPU 901 loads the target processing program from the recording medium 912 to the RAM 903 via the media I / F 907, and executes the loaded program. The recording medium 912 is an optical recording medium such as a DVD (Digital Versatile Disc) or a PD (Phase change rewritable disk), an optical magnetic recording medium such as an MO (Magneto Optical disk), a magnetic recording medium, a conductive memory tape medium, or a semiconductor memory.

[0213] For example, in the task scheduler device 100, 100A ( Figure 1 to Figure 4 ) functions, the CPU 901 of the computer 900 implements the functions of the task scheduler device 100, 100A by executing the program loaded on the RAM 903. In addition, the HDD 904 stores the data in the RAM 903. The CPU 901 reads the program of the target process from the recording medium 912 and executes it. In addition, the CPU 901 can also read the program of the target process from other devices via the communication network (NW 920).

[0214] [Effect]

[0215] As described above, the task scheduler devices 100 and 100A ( Figure 1 to Figure 4 ) in a computing system 1000, 1000A ( Figure 1 to Figure 4 ), using hardware multithreading that makes one physical core virtually look like multiple logical cores, and assigning dedicated command execution processes to the logical cores, wherein the task scheduler device 100, 100A ( Figure 1 to Figure 4 ) comprises: a dedicated command execution detection unit 110 (dedicated command detection unit) for detecting the execution of a dedicated command; a dedicated command execution affecting core determination unit 120 (core determination unit) for determining a logical core with a reduced operating frequency that operates on the same physical core as the dedicated command execution core due to the execution of the dedicated command; a low-frequency allowed process allocation judgment unit 140 (allowed process judgment unit) for determining a process that satisfies specified performance requirements even when operating at a low frequency, with respect to the logical core with a reduced operating frequency determined by the dedicated command execution affecting core determination unit 120; and a process core allocation unit 150 for allocating the process determined by the low-frequency allowed process allocation judgment unit 140 to the logical core with a reduced operating frequency.

[0216] In this way, the task scheduler device 100, 100A can allocate the required CPU time to each process for a process group including a dedicated command for executing a specific operation, such as a SIMD command or a dedicated command for encryption, and reduce the number of physical cores for execution. Then, by reducing the number of physical cores for execution, power consumption can be reduced.

[0217] That is, a core whose operating frequency is reduced is determined, and for the logical core whose operating frequency is reduced, a process that satisfies the specified performance requirements even when operating at a low frequency (a process that has a small impact even when operating at a low frequency) is scheduled to the same physical core as the SIMD execution, thereby improving the core utilization. In this way, the core utilization can be improved, the number of CPU operating cores can be reduced, and power consumption can be reduced. In particular, if the vRAN (vDU) improves the core efficiency in order to fully and effectively utilize SIMD operations, there is a high possibility that this will become a problem, but the task scheduler device 100A ( Figure 4 ) In vRAN, it is possible to achieve a balance between improving core utilization and reducing the number of CPU operating cores.

[0218] The requirements for achievement are summarized as follows.

[0219] Requirement 1: The CPU processing time required for each process (performance improvement effect)

[0220] Requirement 2: Reduction in the number of execution cores (minimizing the number of execution cores required to execute each process) (power saving effect)

[0221] The above requirements 1 and 2 can be achieved.

[0222] In the task scheduler device 100, 100A ( Figure 1 to Figure 4 ), the dedicated command execution detection unit 110 stores a pre-registered list of processes using dedicated commands, compares the process list with the name of the executing process, and detects whether the dedicated command is executed.

[0223] In this way, the task scheduler device 100, 100A can improve core utilization, reduce the number of CPU operating cores, and reduce power consumption.

[0224] In the task scheduler device 100, 100A ( Figure 1 to Figure 4 ), the low-frequency allowed process allocation judgment unit 140 selects the processes that can operate at a low frequency and the cores affected by the dedicated command as a pair based on the information of the numbers of the cores affected by the dedicated command and the information of the performance impact of the operation frequency on each process.

[0225] In this way, the task scheduler device 100, 100A selects processes that can operate at low frequencies and CPU cores affected by the dedicated command, and outputs them as pairs, thereby enabling various combinations to be selected, such as starting with the process with the highest degree of permission to operate at low frequencies. In addition, the task scheduler device 100, 100A enables the selection of a priority order corresponding to the degree of permission.

[0226] In the task scheduler device 100, 100A ( Figure 1 to Figure 4 ) is provided with a running process action frequency performance impact determination unit 130 (performance impact determination unit), which determines the performance impact of the action frequency of the running process. The running process action frequency performance impact determination unit 130 compares a pre-registered process list (process ID list) with the name of the executing process to determine the impact of the action frequency of the running process on performance.

[0227] Thus, the task scheduler device 100, 100A can determine the performance impact of the operation frequency by a static method of determining the impact of the operation frequency based on information such as process name, etc. Since the static method is a comparison determination between a pre-registered process list and the name of the executing process, the amount of calculation is small and the determination can be made quickly.

[0228] In the task scheduler device 100, 100A ( Figure 1 to Figure 4 ) is provided with a running process action frequency performance impact determination unit 130 (performance impact determination unit), which determines the performance impact of the action frequency of the running process. The running process action frequency performance impact determination unit 130 obtains the execution priority and process input and output of each process, integrates the execution priority and process input and output as an impact degree, and determines the impact of the action frequency performance of the running process based on the impact degree.

[0229] In this way, the task scheduler device 100, 100A can determine the performance impact of the action frequency by a dynamic method of determining the performance impact of the action frequency of the running process. The performance impact of the action frequency can be dynamically determined by the dynamic method of calculation. Even in the case that the static method cannot fully cope with it, the performance impact of the action frequency can be adaptively determined.

[0230] In addition, the computing system 1000, 1000A ( Figure 1 to Figure 4 ) has a task scheduler device 100, 100A (which uses hardware multithreading to make one physical core appear virtually like a plurality of logical cores and allocates the dedicated command execution process to the logical cores. Figure 1 to Figure 4 ), task scheduler device 100, 100A ( Figure 1 to Figure 4 ) comprises: a dedicated command execution detection unit 110, which detects the execution of a dedicated command; a dedicated command execution affecting core determination unit 120, which determines a logical core with a reduced operating frequency that operates on the same physical core as the dedicated command execution core due to the execution of the dedicated command; a low-frequency allowed process allocation judgment unit 140, which determines a process that meets specified performance requirements even when operating at a low frequency for the logical core with a reduced operating frequency determined by the dedicated command execution affecting core determination unit 120; and a process core allocation unit 150, which allocates the process determined by the low-frequency allowed process allocation judgment unit 140 to the logical core with a reduced operating frequency.

[0231] Computing system 1000, 1000A ( Figure 1 to Figure 4 ) is a computer system in which the CPU (processor) on the server supports general commands and special commands dedicated to specific operations (SIMD operation commands, special commands for encryption).

[0232] In addition to CPU, the above processor can also be applied to GPU / FPGA / ASIC and other processors with SIMD operation execution core specific functions.

[0233] It should be noted that the dedicated command can be any command as long as it is a command dedicated to a specific operation. In the present embodiment, as an example, a SIMD command or a dedicated command for encryption is used, but SIMD / encryption is only an example and can also be applied to dedicated commands other than SIMD / encryption.

[0234] It should be noted that, among the various processes described in the above embodiments, all or part of the processes described as being automatically executed can also be manually executed, or all or part of the processes described as being manually executed can also be automatically executed using a known method. In addition, the processing sequence, control sequence, specific names, and information including various data and parameters shown in the above documents and drawings can be arbitrarily changed except for special records.

[0235] In addition, the components of each device shown in the figure are conceptual functions and do not necessarily need to be physically configured as shown in the figure. That is, the specific method of distributing / integrating each device is not limited to the method shown in the figure, and all or part of them can be functionally or physically distributed / integrated in arbitrary units according to various loads, usage conditions, etc.

[0236] In addition, part or all of the above-mentioned components, functions, processing parts, processing units, etc. may also be implemented in hardware, such as integrated circuit design. In addition, the above-mentioned components, functions, etc. may also be implemented by software for a processor to interpret and execute programs that implement each function. Information such as programs, tables, files, etc. that implement each function can be stored in a recording device such as a memory, a hard disk, or an SSD (Solid State Drive), or in a recording medium such as an IC (Integrated Circuit) card, an SD (Secure Digital) card, or an optical disk.

[0237] Description of Reference Numerals

[0238] 10: CPU (processor); 11: physical core; 20: OS; 21: process execution priority management unit; 22: process IO volume recording unit; 30: userland (user space); 100, 100A: task scheduler device; 110: dedicated command execution detection unit (dedicated command detection unit); 120: dedicated command execution impact core determination unit (core determination unit); 130: running process action frequency performance impact judgment unit (performance impact judgment unit); 140: low-frequency allowed process allocation judgment unit (allowed process judgment unit); 150: process core allocation unit; 160: new process start / low-frequency action possibility judgment unit; 1000, 1000A: computing system.

Claims

1. A task scheduler device, in a computing system that executes a dedicated command dedicated to a specific operation, uses hardware multithreading that makes one physical core virtually look like multiple logical cores, and allocates the execution process of the dedicated command to the logical core, characterized in that: have: A dedicated command detection unit, detecting the execution of the dedicated command; a core determination unit that determines the logical core whose operation frequency is reduced due to execution of the dedicated command and which operates on the same physical core as the execution core of the dedicated command; an enabling process determination unit for determining, for the logic core whose operating frequency is reduced as determined by the core determination unit, a process that satisfies a predetermined performance requirement even when operating at a low frequency; as well as The process core allocation unit allocates the process determined by the allowed process determination unit to the logical core whose operating frequency is reduced.

2. The task scheduler device according to claim 1, characterized in that: The dedicated command detection unit stores a pre-registered process list using dedicated commands, compares the process list with the name of the process being executed, and detects whether the dedicated command is executed.

3. The task scheduler device according to claim 1, characterized in that: The allowed process determination unit selects a process that can operate at a low frequency and a core affected by the dedicated command as a pair based on information on the number of the core affected by the dedicated command and information on the performance impact of the operating frequency on each process.

4. The task scheduler device according to claim 1, characterized in that: A performance impact determination unit is provided, wherein the performance impact determination unit determines the performance impact of the operation frequency of the running process, The performance impact determination unit compares a pre-registered process list with the name of the process being executed, and determines the impact of the operating frequency performance of the running process.

5. The task scheduler device according to claim 1, characterized in that: A performance impact determination unit is provided, the performance impact determination unit determining the performance impact of the operation frequency of the running process, The performance impact determination unit obtains the execution priority and process input / output volume of each process, integrates the execution priority and the process input / output volume as an impact degree, and determines the impact of the operation frequency performance of the running process based on the impact degree.

6. A computing system that executes special commands dedicated to a specific operation, characterized in that: A task scheduler device is provided which uses hardware multithreading to make one physical core appear virtually like a plurality of logical cores and allocates the execution process of the dedicated command to the logical core. The task scheduler device comprises: A dedicated command detection unit, detecting the execution of the dedicated command; a core determination unit that determines the logical core whose operation frequency is reduced due to execution of a dedicated instruction and which operates on the same physical core as the execution core of the dedicated instruction; an enabling process determination unit for determining, for the logic core whose operating frequency is reduced as determined by the core determination unit, a process that satisfies a predetermined performance requirement even when operating at a low frequency; as well as The process core allocation unit allocates the process determined by the allowed process determination unit to the logical core whose operating frequency is reduced.

7. A task scheduling method, which is a task scheduling method of a task scheduler device that allocates an execution process of a dedicated command dedicated to a specific operation, characterized in that: Perform the following steps: Detecting the execution of the dedicated command; determining a logical core whose operating frequency is reduced and which operates on the same physical core as the core executing the dedicated command due to the execution of the dedicated command; For the determined logic core whose operating frequency is reduced, a determination is made as to whether a process satisfies the specified performance requirements even when operating at a low frequency; as well as The determined process is allocated to the logical core whose operation frequency is reduced. 8 . A program for causing a computer to function as the task scheduler device according to claim 1 .

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