Band gap circuit

Abstract

A bandgap circuit includes: a first resistor receiving a voltage proportional to a temperature; a second resistor receiving a voltage complementary to the absolute temperature; and a third resistor, wherein the sum of the currents in the first resistor and the second resistor flows through the third resistor. Each of the second resistor and the third resistor includes a fixed resistance portion and N controllable resistance portions, where N is greater than or equal to 2. Each controllable resistance portion of the second resistor is associated with a corresponding controllable resistance portion of the third resistor. For each controllable resistance portion, the control circuit supplies the same control signal to that controllable resistance portion and its associated controllable resistance portion.

Description

[0001] Priority claim

[0002] This application claims the benefit of priority of French patent application No. 2312506, filed on November 15, 2023, the contents of which are hereby incorporated by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] The present disclosure relates generally to electronic circuits, and more particularly to bandgap circuits configured to deliver a temperature-stabilized voltage. Background Art

[0004] Many known electronic devices include bandgap circuits configured to generate a temperature-stabilized voltage.

[0005] Known bandgap circuits are configured to generate a first voltage that is equal to or proportional to the difference between the base-emitter voltage of a first bipolar transistor and the base-emitter voltage of a second bipolar transistor that is n times larger than the first bipolar transistor. The first voltage is then proportional to absolute temperature (PTAT). These known circuits are also configured to generate a second voltage that is equal to or proportional to the base-emitter voltage of a bipolar transistor that may or may not be one of the first bipolar transistor and the second bipolar transistor. The second voltage is then complementary to absolute temperature (CTAT) type. A third voltage is then generated from the first and second voltages, and the known circuits are sized so that the third voltage has a value that is independent of temperature.

[0006] However, known bandgap circuits suffer from various disadvantages.

[0007] There is a need to overcome all or some of the disadvantages of known bandgap circuits of the type described above. Summary of the invention

[0008] An embodiment provides a bandgap circuit, comprising: a first resistor configured to receive a voltage proportional to an absolute temperature across its terminals; a second resistor configured to receive a voltage complementary to an absolute temperature across its terminals; a third resistor, a current through the third resistor being equal to the sum of a current through the first resistor and a current through the second resistor; and a control circuit. Each of the second resistor and the third resistor comprises a fixed portion and N controllable portions, where N is an integer greater than or equal to 2. Each controllable portion is equal to the product of a setting value of the controllable portion and an integer determined by a control signal of the controllable portion. Each of the N controllable portions of the second resistor is associated with a corresponding controllable portion of the third resistor. The control circuit is configured to supply the same control signal to the controllable portion and the controllable portion associated therewith for each controllable portion. The setting value of at least one controllable portion is different from the setting value of the controllable portion associated therewith.

[0009] According to an embodiment: the pairing of the controllable part of the third resistor and the associated controllable part of the second resistor satisfies one of the following relationships: the setting value of the controllable part of the third resistor is equal to Gain times the setting value of the associated controllable part of the second resistor; the setting value of the controllable part of the second resistor is empty; and the setting value of the controllable part of the third resistor is equal to Gain*Vbe(Tr) / EG times the setting value of the associated controllable part of the second resistor, where Gain is equal to the ratio of the resistance value of the fixed part of the third resistor to the resistance value of the fixed part of the second resistor, Vbe(Tr) is the value of the voltage complementary to the absolute temperature obtained at temperature Tr, Tr is a reference temperature equal to 300°K, for example, and EG is a constant equal to 1.181V.

[0010] According to an embodiment: another pairing of a controllable portion of the third resistor and an associated controllable portion of the second resistor verifies another one of the relationships.

[0011] According to an embodiment: N is greater than or equal to 3; and a further pairing of a controllable portion of the third resistor and an associated controllable portion of the second resistor verifies a further one of the relationships.

[0012] According to an embodiment, the fixed parts of the second resistor and the third resistor have the same resistance value.

[0013] According to an embodiment, the resistance value of the fixed part of the second resistor is equal to (EG-Vbe(Tr)) / (Utr*ln(n)) times the resistance value of the first resistor, where: EG is a constant equal to 1.181V; Vbe(Tr) is the value of a voltage complementary to the absolute temperature obtained at a reference temperature Tr, for example equal to 300°K; Utr is equal to (k*Tr) / q, where k is the Boltzmann constant and q is the basic charge; and n is the size ratio between two bipolar transistors, which are configured so that the difference between the base-emitter voltages of the two transistors determines and is equal to a voltage proportional to the absolute temperature.

[0014] According to an embodiment: the bandgap circuit includes two bipolar transistors of the first type among NPN and PNP, whose bases are connected to each other; the emitter of the first bipolar transistor of the two bipolar transistors is connected to a node for applying a reference potential, and its base and collector are coupled to each other, preferably connected to each other; the second bipolar transistor of the two bipolar transistors is n times larger than the first bipolar transistor of the two bipolar transistors, and its emitter is coupled to the node for applying a reference potential via a first resistor; the bandgap circuit includes a third bipolar transistor of the first type, whose base and collector are coupled to each other through a buffer circuit; the emitter of the third bipolar transistor is connected to the node for applying a reference potential; and the base of the third bipolar transistor is coupled to the node for applying a reference potential via a second resistor.

[0015] According to an embodiment: the circuit includes a first current mirror configured to supply a copy of the current flowing through the first resistor to a current summing node and bias a first bipolar transistor of the two bipolar transistors; the bandgap circuit includes a second current mirror configured to provide a copy of the current flowing through the second resistor at the current summing node; and a third resistor couples the current summing node with a node for applying a reference potential.

[0016] According to an embodiment, an additional buffer circuit is connected to the current summing node and is configured to provide an output voltage equal to the voltage across the third resistor.

[0017] According to an embodiment: the collectors of the two bipolar transistors are coupled to a node for applying a power supply potential via a first current mirror; and a buffer circuit that couples the base and collector of a third bipolar transistor to each other couples the base of the third transistor to a second current mirror, and the second current mirror couples the buffer circuit to a node for applying a power supply potential. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The foregoing features and advantages, as well as other features and advantages, will be described in detail in the remainder of the disclosure of specific embodiments given by way of illustration and not limitation, with reference to the accompanying drawings, in which:

[0019] Figure 1 An example of a bandgap circuit is schematically shown;

[0020] Figure 2 Further details are shown Figure 1 An example of a bandgap circuit of the type shown in;

[0021] Figure 3 Schematically shows Figure 1 and Figure 2 Examples of calibration or setup of circuits; and

[0022] Figure 4 Schematically shows Figure 1 and Figure 2 Examples of embodiments of calibration or setup of these types of bandgap circuits. DETAILED DESCRIPTION

[0023] The same features in the various figures are represented by the same reference numerals. In particular, common structural and / or functional features in the various embodiments may have the same reference numerals and may have the same structure, dimensions, and material properties.

[0024] For clarity, only those steps and elements that are useful for understanding the described embodiments are shown and described in detail.

[0025] Unless otherwise specified, when referring to two elements being connected together, this means a direct connection without any intermediate elements except conductors, and when referring to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0026] In the following description, when absolute position qualifiers such as "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers such as "top", "bottom", "up", "down", etc., or orientation qualifiers such as "horizontal", "vertical", etc. are mentioned, unless otherwise specified, they refer to the orientation of the drawing.

[0027] Unless otherwise indicated, the expressions "about," "approximately," "substantially," and "approximately" mean plus or minus 10%, preferably plus or minus 5%.

[0028] Figure 1 An example of a bandgap circuit 1 is schematically shown. More particularly, Figure 1 The principle of a bandgap circuit configured to deliver a temperature stabilized voltage Vout(T) is illustrated.

[0029] The circuit 1 comprises a resistor R1 across which a voltage Vptat(T) of the PTAT type is available. In other words, the circuit 1 is configured such that a voltage Vptat(T) is available between the terminals of the resistor R1. Thus, a current Iptat(T) flows through the resistor R1.

[0030] The circuit 1 comprises a resistor R2 across which a voltage Vbe(T) of the CTAT type is available. In other words, the circuit 1 is configured such that a voltage Vbe(T) is available between the terminals of the resistor R2. Therefore, a current Iveb(T) flows through the resistor R2.

[0031] Therefore, in Circuit 1:

[0032]

[0033] Iptat(T)=Vptat(T) / R1 (Equation 2)

[0034] Circuit 1 also includes a resistor R3, which is configured to allow a current Icst(T) equal to the sum of currents Iveb(T) and Iptat(T) to flow therethrough. A voltage Vout(T) is then available across resistor R3, and:

[0035]

[0036] As an example, the resistor R3 is connected between the node 100 receiving the currents Iveb(T) and Iptat(T) and the node 102 configured to receive a power supply potential (eg, a low power supply potential corresponding to a reference potential (eg, ground GND)).

[0037] As an example, to illustrate the operation of circuit 1, Figure 1 Resistors R1 and R2 are shown connected in parallel between node 100 and node 104, which is configured to receive a power supply potential, such as a high power supply potential Vcc. This representation is purely functional, and resistors R1 and R2 are not necessarily connected as described above in practice.

[0038] As an example, circuit 1 may include circuit BUF, which is an analog buffer circuit. Circuit BUF is connected to node 100 and is configured to deliver a voltage Voutb(T) equal to voltage Vout(T) at node 106 by isolating nodes 100 and 106 from each other. Voltage Voutb(T) is then the output voltage of circuit 1. As an alternative example, circuit BUF is omitted, and voltage Vout(T) is then the output voltage of circuit 1.

[0039] As an example, although Figure 1 Not shown in the figure, but the circuit 1 includes two bipolar transistors, which are configured to deliver a voltage Vptat(T) based on the difference between the two base-emitter voltages of the two bipolar transistors or to deliver Vptat(T) equal to the difference between the two base-emitter voltages of the two bipolar transistors. For example, the two transistors are of the same PNP or NPN type, receive the same collector current, and their bases are connected together. In addition, one of the two bipolar transistors is n times larger than the other, where n is a positive number greater than 1. In addition, the collector and base of the smallest of the two bipolar transistors are connected to each other.

[0040] in this case:

[0041] Vptat(T)=Ut*ln(n) (Equation 4)

[0042] Where Ut = (k*T) / q, T is the Kelvin temperature, k is Boltzmann's constant, and q is equal to 1.6x10 -19 Coulomb's elementary charge.

[0043] As an example, although Figure 1 1 , but the circuit 1 includes a bipolar transistor configured to deliver a voltage Vbe(T) based on its base-emitter voltage or to deliver a voltage Vbe(T) equal to its base-emitter voltage. The bipolar transistor is, for example, one of the two bipolar transistors configured to generate a voltage Vptat(T) or the other bipolar transistor.

[0044] in this case:

[0045]

[0046] Where Tr is a reference temperature equal to 300°K, EG is a constant equal to 1.181V, and Vbe(Tr) is the value of the base-emitter voltage of the bipolar transistor at temperature Tr.

[0047] Using Equation 4 and Equation 5 in Equation 3 yields the result:

[0048]

[0049] Assumptions:

[0050] as well as

[0051]

[0052] get:

[0053]

[0054] Therefore, Vout(T) is the sum of a constant term, Vout0, and a term that varies with temperature, Vslope(T), where:

[0055] and

[0056]

[0057] When the temperature T is equal to the reference temperature Tr, this term is zero.

[0058] The circuit 1 is configured such that the voltage Vout(T) is independent of the temperature T and therefore such that:

[0059]

[0060] In the case where the two resistors R2 and R3 are fixed (not adjustable) and correspond to two resistance values ​​R20 and R30 respectively, Equation 12 is valid if the following conditions are met:

[0061]

[0062] Equation 13 can also be written as:

[0063] Or it can also be

[0064]

[0065] The size of resistor R2 is determined to have a fixed value R20 that satisfies equation 13 above.

[0066] The voltage Vout(T) is then expected to be constant and independent of temperature, and:

[0067] in

[0068]

[0069] Therefore, the value of R30 is selected such that R30=Gain*R20, Gain being a factor determined by the target value of Vout(T).

[0070] Taking equations 14 and 17, we obtain:

[0071]

[0072] Furthermore, using Equation 15, Equations 10 and 11 can be written as:

[0073] as well as

[0074]

[0075] Figure 2 An example of a bandgap circuit 1 is shown in more detail.

[0076] Circuit 1 includes a resistor R1, a bipolar transistor T1, and a bipolar transistor T2, which is of the same type as transistor T1, NPN or PNP type, and is n times larger than transistor T1. Transistors T1 and T2 are configured to deliver a voltage Vptat(T) across resistor R1, which is equal to the difference between their base-emitter voltages and is defined by equation 5. Then, a current Iptat(T) flows through resistor R1.

[0077] For example, transistors T1 and T2 are of NPN type. For example, the base of transistor T1 is coupled (e.g., connected) to its collector, and its emitter is connected to node 102, the base of transistor T2 is connected to the base of transistor T1, and its emitter is coupled to node 102 through resistor R1. For example, the collectors of the two transistors T1 and T2 are coupled to node 104 through MOS transistors M1 and M2, respectively, in this example, MOS transistors M1 and M2 have P channels, and transistors M1 and M2 are assembled into a current mirror. For example, transistors M1 and M2 are identical.

[0078] Circuit 1 includes a resistor R2 and a bipolar transistor T3, which is of the same type as transistors T1 and T2, both of NPN or PNP type. Transistor T3 is configured to deliver its base-emitter voltage Vbe(T) across resistor R2, such as defined by the equation for Vbe(T). Current Ivbe(T) then flows through resistor R2.

[0079] For example, the base of transistor T3 is coupled to its collector through a buffer circuit, and the buffer circuit is, for example, a MOS transistor M4, for example, in this example, transistor M4 has an N channel and is assembled into a source follower. In addition, for example, the emitter of transistor T3 is connected to node 102, and its collector is coupled to the node through MOS transistor M3, which has a P channel in this example, and transistor M3 is assembled into a current mirror with transistors M1 and M2, for example. In addition, the base of transistor T3 is coupled to node 104 via MOS transistor M5, and transistor M5 has a P channel in this example. For example, the drain of transistor M5 is connected to the drain of transistor M4.

[0080] The circuit 1 further comprises a node 100 and a resistor R3 connected between the node 100 and a node 102 .

[0081] Circuit 1 includes a current mirror configured to supply a current Iptat(T) to node 100. For example, the current mirror includes a transistor M2 and a MOS transistor M6 having a channel of the same type as transistor M2, and transistor M6 is assembled with transistor M2 to form a current mirror. In other words, transistors M1, M2, and M6 form a current mirror configured to bias transistor T1 and supply a copy of the current Iptat(T) flowing through resistor R3 to node 100.

[0082] The circuit 1 also includes a current mirror configured to supply a current Ivbe(T) to the node 100, or, in other words, to supply a copy of the current Iveb(T) flowing through the resistor R2 to the node 100. For example, the current mirror includes a transistor M5 and a MOS transistor M7 having a channel of the same type as the transistor M5, and the transistor M7 is assembled with the transistor M5 to form a current mirror.

[0083] Therefore, the current Icst(T) flows through the resistor R3, and the voltage Vout(T) is available across the resistor R3.

[0084] In the case where resistors R2 and R3 are fixed and have respective values ​​R20 and R30, the value R20 is selected to satisfy equation 13, and the value R30 is selected to satisfy equation 17. However, in practice, manufacturing variations may cause errors in the above equations, such as errors in the resistance values ​​R20 and R30. Therefore, for example, at temperature Tr, the voltage Vout(T) may not be equal to the target value EG*Gain.

[0085] Therefore, it is usually provided that the values ​​of the resistors R2 and R3 can be set to compensate for the effects of manufacturing variations at least at the temperature Tr.

[0086] Figure 3 Schematically shows Figure 1 and Figure 2 An example of calibration or setup of a circuit.

[0087] More specifically, Figure 3 An example is illustrated in which resistors R2 and R3 are each implemented by a series connection of a constant resistor and a single controllable resistor. In other words, each of resistors R2 and R3 includes a fixed portion and a single controllable portion.

[0088] Thus, resistor R2 includes a fixed portion (or fixed resistor) 300 and a controllable portion (or controllable resistor) 302. Resistors 300 and 302 are connected in series between the terminals of resistor R2. Similarly, resistor R3 includes a fixed portion (or fixed resistor) 304 and a controllable portion (or controllable resistor) 306. Resistors 304 and 306 are connected in series between the terminals of resistor R3.

[0089] The fixed portion 300 of the resistor R2 has a resistance value R20. The fixed portion 304 of the resistor R3 has a resistance value R30.

[0090] The value of the controllable portion 302 of the resistor R2 is equal to the product of the setting value R2T1 and the integer Trim. The integer Trim is determined by the control signal sTrim. In other words, the resistance value of the portion 302 of the resistor R2 is equal to R2T1*Trim.

[0091] The value of the controllable portion 306 of the resistor R3 is equal to the product of the setting value R3T1 and the integer Trim. Again, the integer Trim is determined by the control signal sTrim. In other words, the resistance value of the portion 306 of the resistor R3 is equal to R3T1*Trim.

[0092] As an example, the number Trim is between -8 and +8.

[0093] Therefore, resistors R2 and R3 are both controlled by the same signal sTrim. Figure 3 The control circuit CTRL (not shown in detail) is configured to supply a signal sTrim to control the resistors R2 and R3.

[0094] Therefore, the values ​​of resistors R2 and R3 can be written as:

[0095] R2=R20+R2T1*Trim (Equation 21)

[0096] R3=R30+R3T1*Trim (Equation 22)

[0097] The values ​​R20 and R30 are chosen so that R20 satisfies Equation 13 and R30 satisfies Equation 17. Therefore, in the absence of a bias, if Trim is zero, then Equations 13 and 14 are valid, so it is logical if resistors R2 and R3 are not set.

[0098] Equation 13 can be written as:

[0099] R20 = R1* / EG-Vbe(Tr)2 / (Utr*ln(n)) (Equation 23)

[0100] As an example, to simplify Figure 3 , set the values ​​R2T1 and R3T1 to be equal to the value R0T1, and select the factor Gain to be equal to 1, so that:

[0101]

[0102] Using Equation 24, Equations 19 and 20 can be written as:

[0103] as well as

[0104]

[0105] Therefore, if the voltage Vout(Tr) is not equal to EG at temperature Tr, in this example, where the factor Gain is equal to 1, the voltage Vout(Tr) can be returned to the value EG by modifying the value of the number Trim. However, the value of the number Trim causes a change in the value of the factor R20 / R1*(1+(R0T1 / R20)*Trim)*Utr*ln(n)-(Eg-Vbe(T)), which causes a change in the slope of the portion Vslope(T) of the voltage Vout(T).

[0106] Symmetrically, changing the number Trim to modify the slope of the portion Vslope(T) of the voltage Vout(T) necessarily results in a change in the absolute value of the portion Vout0 of the voltage Vout(T).

[0107] This interdependence of the setting of the value Vout0 and the slope of the portion Vslope(T) also exists when the factor G is chosen to be different from 1, but is not described in detail herein.

[0108] The interdependence of the setting of the constant value Vout0 of the voltage Vout(T) and the setting of the slope of the fraction Vslope(T) of the voltage Vout(T) is undesirable, for example in applications where the voltage Vout(T) must have a value as constant as possible over the entire temperature range.

[0109] It is further preferred for the signal sTrim that the resistors R2 and R3 are controlled simultaneously and in the same way in order to avoid a complicated setting process.

[0110] In order to overcome the above shortcomings, it is provided here that: each of the resistors R2 and R3 includes a fixed part and N controllable parts, where N is an integer greater than or equal to 2; each controllable part is equal to the product of a setting value of the controllable part and an integer determined by a signal used to control the controllable part; each of the N controllable parts of the resistor R2 is associated with a corresponding controllable part of the resistor R3; the control circuit is configured to transmit the same control signal to the controllable part and the controllable part associated with it for each controllable part; and the setting value of at least one controllable part is different from the setting value of the controllable part associated with it.

[0111] In fact, as will be explained in detail in the example below, for each pair of associated controllable parts comprising a controllable part of resistor R2 and a part of resistor R3, this enables the effect of a change in the control signal of the associated pair of controllable parts to be independent of the effect of a change in the control signal of the controllable parts associated with another pair.

[0112] More specifically, the setting value of each controllable part in a pair of associated controllable parts can be determined so that a change in the control signal of the pair of associated controllable parts causes: the value Vout0 and the slope of the voltage Vslope(T) to change simultaneously; or the value Vout0 changes without changing the slope of the voltage Vslope(T) for this purpose; or the slope of the voltage Vslope(T) changes without changing the value Vout0.

[0113] Thus, N pairs of associated controllable parts can be controlled with N signals to perform N settings independently of each other.

[0114] Figure 4An example of a mode of calibration or setting of the bandgap circuit 1 is schematically shown, in the case where the resistors R2 and R3 are as defined above, i.e. each resistor has N controllable portions, the controllable portions of the resistors R2 and R3 being associated in pairs, comprising a controllable portion of the resistor R2 and a controllable portion of the resistor R3, both being controlled by the same signal.

[0115] exist Figure 4 In the example, N is equal to 2.

[0116] Figure 4 Only the resistors R2 and R3 of the circuit 1 and the circuit CTRL1 for controlling the resistors R2 and R3 are described in detail.

[0117] The resistor R2 includes a fixed portion (or resistor) R20 and N controllable portions (or resistors) R2i, where i is an integer from 1 to N. The resistors R20 and R2i are connected in series between the terminals of the resistor R2. Figure 4 In the example of , where N is equal to 2, the resistor R2 thus includes two controllable parts R21 and R22.

[0118] Similarly, resistor R3 includes a fixed portion (or resistor) R30 and N controllable portions (or resistors) R3i. Resistors R30 and R3i are connected in series between the terminals of resistor R3. Figure 4 In the example of , where N is equal to 2, the resistor R3 thus includes two controllable parts R31 and R32.

[0119] Each section R2i of resistor R2 is associated with a corresponding section R3i of resistor R3. Figure 4 In the example of , where N equals 2, portion R21 of resistor R2 is associated with corresponding portion R31 of resistor R3, and portion R22 of resistor R2 is associated with corresponding portion R32 of resistor R3.

[0120] The resistance value of each section R2i of the resistor R2 is equal to the product of the setting value R2Ti of the section R2i and an integer Trimi, the value of which is determined by the signal STrimi used to control the section R2i. Figure 4 In the example of , where N is equal to 2, part R21 is equal to R2T1*Trim1, and part R22 is equal to R2T2*Trim2. As an example, each number Trimi can take all integer values ​​from integer value -A to integer value +A, where A is a positive integer value, for example equal to 8.

[0121] Symmetrically, the resistance value of each section R3i of the resistor R3 is equal to the product of the setting value R3Ti of the section R3i and the corresponding integer Trimi. Figure 4In the example where N is equal to 2, portion R31 is equal to R3T1*Trim1, and portion R32 is equal to R3T2*Trim2.

[0122] In the resistors R2 and R3, for each pair of associated controllable portions R2i and R3i, the two controllable portions R2i and R3i of the pair are controlled by the same signal STrimi which determines the value of the number Trimi. Figure 4 , where N equals 4, the associated controllable portions R21 and R31 are controlled by the same signal STrim1 determining the value of the number Trim1, and the associated controllable portions R22 and R32 are controlled by the same signal STrim2 determining the value of the number Trim2.

[0123] The signal STrimi is delivered by the circuit CTRL1.

[0124] The numbers Trimi are determined independently of one another, or, in other words, the signals STrimi are independent of one another.

[0125] The resistance values ​​of the fixed portions R20 and R30 of the resistors R2 and R3 are selected to satisfy Equations 13 and 17.

[0126] Therefore, in Figure 4 middle:

[0127] R2=R20+R2T1*Trim1+R2T2*Trim2

[0128] and

[0129] R3=R30+R3T1*Trim1+R3T2*Trim2

[0130]

[0131] In Equation 27, it is assumed that:

[0132]

[0133] Since x is actually small compared to 1, the following series expansion is used:

[0134]

[0135] thereby:

[0136]

[0137] And therefore:

[0138]

[0139] In equation 19: R3 / R2 is replaced by the expression according to equation 32, and in the term R3 / R20 R3 is replaced by the expression according to equation 32, thus obtaining:

[0140]

[0141]

[0142] Ignore all terms in Trim1*Trim2, Trim1*Trim1, and Trim2*Trim2 in the expression of equation 34 above, and then obtain:

[0143]

[0144] By expanding expression 35, we obtain:

[0145]

[0146] And therefore:

[0147]

[0148] Similarly, in Equation 20: by replacing R3 / R2 with the expression according to Equation 32, and replacing R3 in the R3 / R20 term with the expression according to Equation 28, then we obtain:

[0149]

[0150] For Vout0, ignoring the terms in Trim1*Trim1, Trim1*Trim2, and Trim2*Trim2, we obtain:

[0151]

[0152] thereby:

[0153]

[0154] In equations 37 and 40 above, the effects of changes in the number Trimi are added together in the expressions for Vout0 and Vslope(T) without the effects of changes in one number Trimi affecting the effects of changes in the other number Trimi. In particular, equation 40 shows that the slope of the term Vslope(T) does not depend on the setting of R3.

[0155] Therefore, as already indicated above, the setting value of each controllable part R2i and R3i in a pair of associated controllable parts can be determined so that the change of the signal STrimi corresponding to the pair of controllable parts R2i and R3i, and therefore the change of the number Trimi, results in: the value Vout0 and the slope of the voltage Vslope(T) changing simultaneously; or the value Vout0 changing without changing the slope of the voltage Vslope(T) for this purpose; or the slope of the voltage Vslope(T) changing without changing the value Vout0.

[0156] Thus, the first number Trimi can be modified (or used) to implement one of the three modifications listed above, while the second number Trimi can be modified (or used) to implement another of the three modifications listed above.

[0157] For example, considering a factor Gain (R30 = R20) equal to 1 and a pair R2i, R3i of a given index i, by providing R2Ti = R3Ti for this index i, a change in the number Trimi corresponding to this index causes a simultaneous change in the slope of the voltage Vout0 and the voltage Vslope(T). For example, by applying this to the pair R21, R31 of index i equal to 1, i.e. by choosing R2T1 = R3T1 = R0T1, we obtain:

[0158]

[0159] Then, the right side of the equal sign of Equation 25 is found in the expression of Vout0 according to Equation 41, where Trim=Trim1, and the right side of the equal sign of Equation 26 is found in the expression of Vslope(T) according to Equation 42, where Trim=Trim1.

[0160] In other words, by taking the setting values ​​R2Ti and R3Ti equal to each other for a pair of R2i, R3i of a given index i, the value of the voltage Vout0 and the slope of the voltage Vslope(T) can be modified simultaneously using the number Trimi, as shown in Figure 3 However, Figure 3 In contrast, another setting can then be performed using a pair of R2i, R3i with a different index i, for example to modify the value of the voltage Vout0 without modifying the value of the slope of the voltage Vslope(T), or to modify the value of the slope without modifying the value of the voltage Vout0.

[0161] As another example, considering the unity factor Gain and a pair of R2i, R3i of a given index i, the corresponding setting values ​​R2Ti and R3Ti can be determined so that a change in the number Trimi corresponding to the given index i results in a change in the slope of the voltage Vslope(T) without modifying the value Vout0 for this purpose. As an example, in order to achieve this, the setting values ​​R2Ti and R3Ti of the pair of R2i, R3i of the given index i are selected so that R2Ti*Vbe(Tr)=R3Ti*EG. For example, by applying this to the pair R21, R31 of the index i equal to 1, that is, by selecting R2T1*Vbe(Tr)=R3T1*EG in the above equations 37 and 40, we obtain:

[0162] as well as

[0163]

[0164] Therefore, in equations 43 and 44, a change in the value Trim1 only changes the value of the slope of the voltage Vslope(T), while the value Vout0 does not change.

[0165] As another example, considering the unity factor Gain and a pair of R2i, R3i of a given index i, the corresponding setting values ​​R2Ti and R3Ti can be determined so that a change in the number Trimi corresponding to the given index i results in a change in the value Vout0 without modifying the slope of the voltage Vslope(T) for this purpose. As an example, in order to achieve this, the setting values ​​R2Ti and R3Ti of the pair of R2i, R3i of the given index i are selected so that R2Ti is zero. For example, by applying this to the pair R21, R31 of the index i equal to 1, that is, by selecting R2T1=0 in the above equations 37 and 40, we obtain:

[0166] as well as

[0168]

[0169] Therefore, in equations 45 and 46, a change in the value Trim1 changes only the value Vout0, while the value of the slope of the voltage Vslope(T) does not change.

[0170] Combination of the above Figure 4 An example is described where N is equal to 2. However, in other examples, N may be equal to 3. Equations 37 and 40 then become:

[0171]

[0172] as well as

[0173]

[0174] In the case of N=3, as an example, the first number Trimi (e.g., Trim1) is used to set the slope of the voltage Vslope (T) and the value of the voltage Vout0 at the same time, the second number Trimi (e.g., Trim2) is used to set the voltage Vout0 without changing the slope of the voltage Vslope (T), and the third number Trimi (e.g., Trim3) is used to set the slope of the voltage Vslope (T) without modifying the value of the voltage Vout0. For example, to this end, in the case of the unit factor Gain, the setting value is selected as follows:

[0175] -R2T1=R3T1;

[0176] - R2T2 = 0; and

[0177] -R2T3*Vbe(Tr)=R3T3*EG.

[0178] By applying this to equations 47 and 48 (where Gain=1), we obtain:

[0179]

[0180] as well as

[0181]

[0182] These equations 49 and 50 effectively show that:

[0183] - The change of the number Trim1 causes the slope of the voltage Vout0 and the voltage Vslope(T) to change simultaneously;

[0184] - a change in the value Trim2 only results in a change in the voltage Vout0; and

[0185] - A change in the value Trim3 only results in a change in the slope of the voltage Vslope(Tr).

[0186] More generally, Equations 37, 40, 47, and 48 can be generalized to any N greater than or equal to 2, where the voltage Vout0 and the voltage Vslope(T) can then be written as:

[0187] as well as

[0188]

[0189] In the example described above, the factor Gain has been taken equal to 1. However, in other examples, the circuit 1 may be dimensioned so that, at the temperature Tr, the voltage Vout(T) is equal to the value EG multiplied by a factor Gain (whose value is not 1).

[0190] For example, taking the example above, where N is equal to 3 and where Trim1 enables setting the value Vout0 and the slope of Vslope(T) simultaneously, Trim2 enables setting the voltage Vout0 without modifying the slope of the voltage Vslope(T), and Trim3 enables setting the slope of the voltage Vslope(T) without modifying the value of the voltage Vout0, then the setting values ​​are selected as follows:

[0191] -R3T1=Gain*R2T1;

[0192] - R2T2 = 0; and

[0193] -Gain*R2T3*Vbe(Tr)=R3T3*EG.

[0194] By applying this to equations 51 and 52 above for the case of N=3, we obtain:

[0195]

[0196]

[0197] It can be effectively observed in equations 53 and 54 that a change in Trim1 changes the slope of Vslope(T) and the value Vout0, a change in Trim2 only changes the value Vout0 without changing the slope of Vslope(T), and a change in Trim3 only changes the slope of Vslope(T) without changing the value of Vout0.

[0198] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these various embodiments and variations may be combined, and that other variations will occur to those skilled in the art. In particular, those skilled in the art will be able to adjust the above description to the case where N is greater than 3, but preferably, N is equal to 2 or 3, and even more preferably equal to 3.

[0199] Finally, based on the functional indications given above, the practical implementation of the described embodiments and variants is within the capabilities of a person skilled in the art. In particular, a person skilled in the art can replace all NPN type bipolar transistors with PNP type bipolar transistors, for example, replace all P channel MOS transistors with N channel MOS transistors, and vice versa. Figure 2The example of circuit 1 (in which the potential Vcc is positive with respect to the reference potential GND) is adjusted to the case where the potential Vcc is negative with respect to the reference potential.

Claims

1. A bandgap circuit, comprising: a first resistor configured to receive a voltage proportional to absolute temperature across its terminals; a second resistor configured to receive a voltage complementary to the absolute temperature across its terminals; a third resistor, wherein a current flowing through the third resistor is equal to a sum of a current flowing through the first resistor and a current flowing through the second resistor; wherein each of the second resistor and the third resistor includes a fixed portion and N controllable portions, wherein N is an integer greater than or equal to 2; wherein each controllable portion is equal to the product of a setting value of the controllable portion and an integer determined by a control signal of the controllable portion; wherein each of the N controllable portions of the second resistor is associated with a corresponding one of the N controllable portions of the third resistor; as well as a control circuit configured to supply, for each controllable portion, a same control signal to a controllable portion of one of the first resistor and the second resistor and a controllable portion of the other of the first resistor and the second resistor associated therewith; and The setting value of at least one of the controllable parts is different from the setting value of the controllable part associated with it.

2. The bandgap circuit of claim 1 , wherein a pairing of the controllable portion of the third resistor and the associated controllable portion of the second resistor satisfies one of the following relationships: The setting value of the controllable portion of the third resistor is equal to Gain times the setting value of the associated controllable portion of the second resistor; The setting value of the controllable portion of the second resistor is null; or The setting value of the controllable portion of the third resistor is equal to Gain*Vbe(Tr) / EG times the setting value of the associated controllable portion of the second resistor, where Gain is equal to the ratio of the resistance value of the fixed portion of the third resistor to the resistance value of the fixed portion of the second resistor, Vbe(Tr) is the value of the voltage complementary to the absolute temperature obtained at temperature Tr, Tr is the reference temperature, and EG is a constant equal to 1.181V.

3. The bandgap circuit of claim 2, wherein another pairing of a controllable portion of the third resistor and an associated controllable portion of the second resistor verifies another of the relationships.

4. The bandgap circuit of claim 3, wherein: N is greater than or equal to 3; and A further pairing of a controllable portion of the third resistor and an associated controllable portion of the second resistor verifies a further one of the relationships. 5 . The bandgap circuit of claim 1 , wherein the fixed portions of the second resistor and the third resistor have the same resistance value.

6. The bandgap circuit of claim 1 , wherein the resistance value of the fixed portion of the second resistor is equal to (EG-Vbe(Tr)) / (Utr*ln(n)) times the resistance value of the first resistor, wherein: EG is a constant equal to 1.181V; Vbe(Tr) is the value of the voltage complementary to the absolute temperature obtained at a reference temperature Tr; Utr is equal to (k*Tr) / q, where k is the Boltzmann constant and q is the basic charge; and n is the size ratio between two bipolar transistors, which are configured so that the difference between the base-emitter voltages of the two bipolar transistors determines and is equal to a voltage proportional to the absolute temperature.

7. The bandgap circuit of claim 1 , further comprising: Two bipolar transistors of the first type, NPN and PNP, have their bases connected to each other; The emitter of the first bipolar transistor of the two bipolar transistors is connected to the node for applying the reference potential, and the base and collector thereof are coupled to each other, preferably connected to each other; A second bipolar transistor of the two bipolar transistors is n times larger than a first bipolar transistor of the two bipolar transistors and has an emitter coupled in series to a node for applying a reference potential through a first resistor; a third bipolar transistor of the first type, the base and the collector of which are coupled to each other via the buffer circuit; An emitter of the third bipolar transistor is connected to a node for applying a reference potential; as well as The base of the third bipolar transistor is coupled to a node for applying a reference potential via a second resistor.

8. The bandgap circuit of claim 7, further comprising: a first current mirror configured to supply a copy of the current flowing through the first resistor to the current summing node and to bias a first bipolar transistor of the two bipolar transistors; a second current mirror configured to provide a copy of the current flowing through the second resistor to the current summing node; as well as The third resistor couples the current summing node and the node for applying a reference potential.

9. The bandgap circuit of claim 8, wherein an additional buffer circuit is connected to the current summing node and is configured to provide an output voltage equal to the voltage across the third resistor.

10. The circuit of claim 8, wherein: The collectors of the two bipolar transistors are coupled to a node for applying a power supply potential via a first current mirror; and The buffer circuit coupling the base and collector of the third bipolar transistor to each other couples the base of the third transistor to a second current mirror, and the second current mirror couples the buffer circuit to a node for applying a power supply potential.

11. A bandgap circuit, comprising: a first resistor configured to receive a voltage proportional to absolute temperature across its terminals; a second resistor configured to receive a voltage complementary to the absolute temperature across its terminals; a third resistor, wherein a current flowing through the third resistor is equal to a sum of a current flowing through the first resistor and a current flowing through the second resistor; wherein the second resistor comprises a first fixed resistance portion, a first controllable resistance portion and a second controllable resistance portion connected in series; wherein the third resistor comprises a second fixed resistance portion, a third controllable resistance portion and a fourth controllable resistance portion connected in series; as well as The control circuit is configured to generate: a first trim signal applied to the first controllable resistance portion and the third controllable resistance portion; as well as A second trim signal is applied to the second controllable resistance portion and the fourth controllable resistance portion.

12. The bandgap circuit of claim 11, wherein each controllable resistance portion is equal to the product of a setting value of the controllable resistance portion and an integer set by a trim signal.

13. The bandgap circuit of claim 12, wherein a setting value of the first controllable resistance portion is different from a setting value of the third controllable resistance portion.

14. The bandgap circuit of claim 12, wherein a setting value of the second controllable resistance portion is different from a setting value of the fourth controllable resistance portion.

15. The bandgap circuit of claim 12, wherein the setting value of the third controllable portion or the fourth controllable portion of the third resistor is equal to the Gain value times the setting value of the associated first controllable portion or the second controllable portion of the second resistor, respectively. 16 . The bandgap circuit of claim 12 , wherein a setting value of the first controllable portion or the second controllable portion of the second resistor is null. 17 . The bandgap circuit of claim 11 , wherein the first fixed resistance portion and the second fixed resistance portion of the second resistor and the third resistor have the same resistance value.

18. The bandgap circuit of claim 11, wherein a resistance value of the second fixed resistance portion of the second resistor is equal to a multiple of a resistance value of the first resistor.

19. The bandgap circuit of claim 11, further comprising: a first bipolar transistor; a second bipolar transistor; as well as a third bipolar transistor; wherein the bases of the first bipolar transistor and the second bipolar transistor are connected to each other and to the collector of the first bipolar transistor; wherein the first resistor is coupled in series between the emitter of the second bipolar transistor and a node for applying a reference potential; The second resistor is connected between the base of the third bipolar transistor and a node for applying a reference potential.

20. The bandgap circuit of claim 19, further comprising: A current mirror circuit system is coupled to the first bipolar transistor, the second bipolar transistor and the third bipolar transistor and is configured to mirror a current flowing through the first resistor and the second resistor to a current summing node for generating a current flowing through the third resistor.

Images