Dynamic random access memory system and operating method thereof

Abstract

The invention relates to a dynamic random access memory system and an operating method thereof. The dynamic random access memory system may store a plurality of first operation requests in memory cells corresponding to each of a plurality of memory banks included in a dynamic random access memory medium, respectively, divide the plurality of first operation requests into a plurality of types based on a reference first operation request, a score is determined based on a number of first operation requests corresponding to each of the plurality of types, whether a switching condition is satisfied is determined based on the score, and processing of the plurality of first operation requests is suspended and switched to processing of the plurality of second operation requests when the switching condition is satisfied.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0159418 filed in the Korean Intellectual Property Office on November 16, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Various embodiments of the present disclosure generally relate to a dynamic random access memory system that switches execution operation requests based on a score and a method of operating the dynamic random access memory system. Background Art

[0004] A volatile memory (eg, SRAM, DRAM) loses stored data when power supply is cut off, whereas a nonvolatile memory (eg, NAND flash memory, PRAM, MRAM) retains stored data even when power supply is cut off.

[0005] Dynamic random access memory (DRAM) can perform read operations or write operations continuously, usually without delay. However, when the dynamic random access memory performs a write operation after performing a read operation or performs a read operation after performing a write operation, a delay may occur.

[0006] In order to reduce latency, the dynamic random access memory needs to schedule read operations and write operations to perform read operations or write operations by minimizing switching between read operations and write operations so that the operations can be performed as continuously as possible. Summary of the invention

[0007] Various embodiments of the present disclosure relate to a dynamic random access memory system and an operating method thereof capable of improving read and write performance by efficiently scheduling read operations and write operations.

[0008] In an embodiment of the present disclosure, a dynamic random access memory system may include: a dynamic random access memory medium, including multiple storage bodies; and a controller, configured to, when processing multiple first operation requests to the dynamic random access memory medium, store the multiple first operation requests in storage units corresponding to each of the multiple storage bodies, respectively, classify the multiple first operation requests into multiple types based on a reference to the first operation request, determine a score based on the number of first operation requests corresponding to each of the multiple types, determine whether a switching condition is met based on the score, and suspend processing of the multiple first operation requests and switch to processing multiple second operation requests when the switching condition is met.

[0009] In another embodiment of the present disclosure, an operating method of a dynamic random access memory system may include: when processing multiple first operation requests for a dynamic random access memory medium including multiple storage bodies, storing the multiple first operation requests in storage units corresponding to each of the multiple storage bodies respectively; dividing the multiple first operation requests stored in the storage unit into multiple types based on a reference to the first operation request; determining a score based on the number of first operation requests corresponding to each of the multiple types; determining whether a switching condition is met based on the score; and when the switching condition is met, suspending the processing of the multiple first operation requests for the dynamic random access memory medium and instead processing multiple second operation requests for the dynamic random access memory medium.

[0010] According to an embodiment of the present disclosure, read and write performance may be improved by efficiently scheduling read operations and write operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a schematic configuration diagram of a dynamic random access memory system according to an embodiment of the present disclosure.

[0012] Figure 2 is a diagram illustrating an operation of a controller processing a plurality of operation requests according to an embodiment of the present disclosure.

[0013] Figure 3 is a diagram illustrating an example of the operation of a controller according to an embodiment of the present disclosure.

[0014] Figure 4 is a diagram illustrating an operation of a controller determining a score according to an embodiment of the present disclosure.

[0015] Figure 5 is a diagram illustrating an example of a structure of a dynamic random access memory medium according to an embodiment of the present disclosure.

[0016] Figure 6 are diagrams illustrating various types of examples according to an embodiment of the present disclosure.

[0017] Figure 7 is a flowchart illustrating an example in which a controller determines whether a switching condition is satisfied according to an embodiment of the present disclosure.

[0018] Figure 8 is a flowchart illustrating another example in which the controller determines whether a switching condition is satisfied according to an embodiment of the present disclosure.

[0019] Fig. 9 is a flowchart illustrating an example of an operation in which a controller determines whether to process a plurality of second operation requests according to an embodiment of the present disclosure.

[0020] Fig.10is a flowchart illustrating an example of another operation in which the controller determines whether to process a plurality of second operation requests according to an embodiment of the present disclosure.

[0021] Fig.11 is a flowchart illustrating an example of another operation in which the controller determines whether to process a plurality of second operation requests according to an embodiment of the present disclosure.

[0022] Fig.12 is a flowchart illustrating an operating method of a dynamic random access memory system according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0023] Hereinafter, embodiments of the present disclosure are described in detail with reference to the accompanying drawings. Throughout the specification, references to "an embodiment," "another embodiment," etc. do not necessarily refer to only one embodiment, and different references to any such phrases are not necessarily limited to the same embodiment. When the term "embodiment" is used herein, it does not necessarily refer to all embodiments.

[0024] Various embodiments of the present invention are described in more detail below with reference to the accompanying drawings. However, the present invention may be implemented in different forms and variations, and the present disclosure should not be construed as being limited to the embodiments set forth herein. Rather, the described embodiments are provided to make the present disclosure thorough and complete and to fully convey the present invention to those skilled in the art to which the present invention belongs. Throughout the disclosure, the same reference numerals refer to the same components throughout the various drawings and embodiments of the present invention.

[0025] The methods, processes and / or operations described herein can be performed by codes or instructions executed by computers, processors, controllers or other signal processing devices.Computers, processors, controllers or other signal processing devices can be those described herein or elements except the elements described herein.Because the algorithm forming the basis of the method (or the operation of computers, processors, controllers or other signal processing devices) is described in detail, the code or instructions for implementing the operation of the embodiments of the method can convert computers, processors, controllers or other signal processing devices into dedicated processors for performing the method herein.

[0026] When implemented at least partially in software, controllers, processors, devices, modules, units, multiplexers, logic, interfaces, decoders, drivers, generators, and other signal generation and signal processing components may include, for example, a memory or other storage device for storing code or instructions to be executed by, for example, a computer, processor, microprocessor, controller or other signal processing device.

[0027] Figure 1 is a schematic configuration diagram of a dynamic random access memory system according to an embodiment of the present disclosure.

[0028] Reference Figure 1 , the dynamic random access memory system 100 may include a dynamic random access memory medium 110 and a controller 120 .

[0029] The DRAM medium 110 may include a plurality of memory banks BNK.

[0030] The dynamic random access memory medium 110 may store data in a plurality of memory banks BNK and read data stored in the plurality of memory banks BNK. The dynamic random access memory medium 110 may perform a periodic refresh operation to retain the stored data. If the power supply of the dynamic random access memory medium 110 is cut off, the data stored in the dynamic random access memory medium 110 may be lost.

[0031] The controller 120 may process a plurality of operation requests for the dynamic random access memory medium 110 in order to execute requests from the external device 200. The external device 200 may be a host using the dynamic random access memory system 100. The external device 200 and the controller 120 may communicate through a predetermined interface, such as a computing high-speed link (CXL).

[0032] The controller 120 may send multiple operation requests to the DRAM medium 110 to process the multiple operation requests. When the DRAM medium 110 executes the received multiple operation requests and sends responses to the controller 120, the processing of the multiple operation requests may be completed.

[0033] For example, the DRAM medium 110 may perform a plurality of read requests and transmit the read data to the controller 120 .

[0034] As another example, the DRAM medium 110 may perform a plurality of write requests and respond to the controller 120 with information on whether data is normally written.

[0035] The controller 120 may be implemented in various ways.

[0036] For example, the controller 120 may be implemented as an integrated circuit including logic gates for performing the above-described operations. The controller 120 may be implemented using an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or the like.

[0037] As another example, the controller 120 may include a processor that performs operations to control operations for processing a plurality of operation requests and a working memory that stores data required for processing the plurality of operation requests.

[0038] The processor may control the operation of the controller 120 by executing the firmware. The processor may execute the firmware to control the overall operation of the controller 120 and perform logical operations. The firmware is a program executed within the controller 120 to drive the controller 120, and may include binary data defining a code for performing the overall operation and logical operations described above.

[0039] The firmware may be stored in a storage space (eg, a working memory, a ROM, a flash memory) located inside or outside the controller 120. The processor may load all or part of the firmware stored in the storage space.

[0040] The working memory may store data (eg, a plurality of operation requests or firmware) required for the controller 120 to process a plurality of operation requests. The working memory may include a volatile memory (eg, an SRAM).

[0041] Hereinafter, the operation of the controller 120 will be described in detail.

[0042] Figure 2 is a diagram illustrating an operation of a controller processing a plurality of operation requests according to an embodiment of the present disclosure.

[0043] Reference Figure 2 , the controller 120 may store a plurality of first operation requests RQ1 and a plurality of second operation requests RQ2. The controller 120 may generate a plurality of first operation requests RQ1 and a plurality of second operation requests RQ2 based on a request from the external device 200. The plurality of first operation requests RQ1 and a plurality of second operation requests RQ2 may be stored in the controller 120 before being processed.

[0044] For example, each of the plurality of first operation requests RQ1 may be a read request, and each of the plurality of second operation requests RQ2 may be a write request. Alternatively, each of the plurality of first operation requests RQ1 may be a write request, and each of the plurality of second operation requests RQ2 may be a read request.

[0045] exist Figure 2 In the embodiment, the controller 120 may process a plurality of first operation requests RQ1 for the dynamic random access memory medium 110 .

[0046] The controller 120 may continuously process the plurality of first operation requests RQ1. When the controller 120 continuously processes the plurality of first operation requests RQ1, the controller 120 may not process the plurality of second operation requests RQ2 waiting to be processed in the controller 120. The operation of continuously processing the plurality of first operation requests RQ1 may be referred to as draining.

[0047] When the controller 120 processes a plurality of first operation requests RQ1 , the controller 120 may store the plurality of first operation requests in a plurality of storage units BNK_SU corresponding to a plurality of memory banks BNK, respectively.

[0048] A storage unit is a unit that stores operation requests for corresponding storage bodies. A storage unit may include multiple modules (e.g., registers, memory units) capable of storing data in order to store operation requests. A storage unit may be managed in various types of data structures such as queues, lists, and maps.

[0049] To process the first operation request stored in the specific storage unit, the controller 120 may read the first operation request from the specific storage unit and then send it to the DRAM medium 110. The DRAM medium 110 may access a memory bank corresponding to the specific storage unit to execute the received first operation request.

[0050] Figure 3 is a diagram illustrating an example of the operation of a controller according to an embodiment of the present disclosure.

[0051] Reference Figure 3 , the controller 120 may determine or select a reference first operation request (S310). The reference first operation request may be a first operation request stored in the controller 120, or a first operation request that the controller 120 has sent to the DRAM medium 110.

[0052] The controller 120 may classify the plurality of first operation requests RQ1 stored in the storage unit BNK_SU into a plurality of types based on the reference first operation request (S320). The types of the first operation requests RQ1 stored in the storage unit BANK_SU may be classified into one or more of a plurality of types.

[0053] The controller 120 may determine a score based on the number of first operation requests corresponding to each of the plurality of types ( S330 ).

[0054] The controller 120 may determine whether a switching condition is satisfied ( S340 ).

[0055] When the switching condition is met (S340-Yes), the controller 120 may suspend processing of the plurality of first operation requests RQ1 (S350), and switch to processing the plurality of second operation requests RQ2 (S360) for the dynamic random access memory medium 110. That is, the controller 120 may switch the type of the operation request currently being processed from the first operation request to the second operation request.

[0056] Therefore, the controller 120 can efficiently schedule read operations and write operations by switching operation requests currently being processed based on the scores, thereby improving read and write performance.

[0057] On the other hand, when the switching condition is not satisfied (S340-No), the controller 120 may continue to process the first operation request RQ1 (S370). That is, the controller 120 may not switch the type of the operation request currently being processed.

[0058] Figure 4 is a diagram illustrating an operation of a controller determining a score according to an embodiment of the present disclosure.

[0059] Reference Figure 4 , the controller 120 may classify the plurality of first operation requests RQ1 stored in the storage unit BNK_SU into K types (TYPE_1, TYPE_2, . . . , TYPE_K, where K is a natural number of 2 or greater).

[0060] The controller 120 may count the number of first operation requests RQ1, and each counted number is Figure 4 Represented as N1, N2, ..., NK, which corresponds to each of a plurality of K types TYPE1, TYPE_2, ..., TYPE_K.

[0061] The controller 120 may determine the score S using the number N1, N2, ..., NK of first operation requests corresponding to each of the plurality of types TYPE_1, TYPE_2, ..., TYPE_K, and using the plurality of weights W1, W2, ..., WK corresponding to each of the plurality of types TYPE_1, TYPE_2, ..., TYPE_K, respectively.

[0062] For example, the controller 120 may determine the score S as the sum of the products of each of the plurality of first operation requests N1, N2, ..., NK and a plurality of weights W1, W2, ..., WK, wherein each multiplied first operation request and weight corresponds to K types TYPE_1, TYPE_2, ..., TYPE_K, respectively:

[0063] S=(N1*W1)+(N2*W2)+……+(NK*WK).

[0064] In an embodiment of the present disclosure, the controller 120 may perform the operation of determining the score S in various ways.

[0065] For example, the controller 120 may include a separate calculation circuit (not shown) to calculate the score S. The calculation circuit may include an adding circuit for respectively adding the product of the first operation request N1, N2, ..., NK for each of the K types TYPE_1, TYPE_2, ..., TYPE_K and the weight W1, W2, ..., WK for each of the K types TYPE_1, TYPE_2, ..., TYPE_K.

[0066] The K types TYPE_1, TYPE_2, ..., TYPE_K and their corresponding weights W1, W2, ..., WK may be determined in a variety of ways.

[0067] The K types TYPE_1, TYPE_2, ..., TYPE_K may be determined according to the structure of the dynamic random access memory medium 110. For example, the K types TYPE_1, TYPE_2, ..., TYPE_K may be predetermined, or may be set by the external device 200 when the dynamic random access memory system 100 is started. The dynamic random access memory system 100 may store information about the K types TYPE_1, TYPE_2, ..., TYPE_K set by the external device 200 in a separate storage space (e.g., a register).

[0068] The weights W1, W2, ..., WK corresponding to each of the K types TYPE_1, TYPE_2, ..., TYPE_K may be predetermined or may be set by the external device 200 when the dynamic random access memory system 100 is started. The dynamic random access memory system 100 may store information about the weights W1, W2, ..., WK set by the external device 200 in a separate storage space (e.g., a register).

[0069] Figure 5 is a diagram illustrating an example of a structure of a dynamic random access memory medium according to an embodiment of the present disclosure.

[0070] Reference Figure 5 , the dynamic random access memory medium 110 may include at least one of a first layer L1, a second layer L2, and a third layer L3.

[0071] Each of the first layers L1 may include one or more of a plurality of memory banks BNK.

[0072] Each of the second layers L2 may include one or more of the first layers L1 .

[0073] Each of the third layers L3 may include one or more of the second layers L2.

[0074] Figure 6 are diagrams illustrating various types of examples according to an embodiment of the present disclosure.

[0075] Reference Figure 6 , the reference first operation request RQ1_REF may correspond to one of a plurality of memory banks BNK included in the dynamic random access memory medium 110. Therefore, the reference first operation request RQ1_REF may also correspond to the first layer, the second layer, and the third layer, and each of the first layer, the second layer, and the third layer includes one of the plurality of memory banks BNK.

[0076] The reference first operation request may be determined in a variety of ways.

[0077] For example, the reference first operation request may be the first operation request last executed by the dynamic random access memory medium 110. Whenever the dynamic random access memory medium 110 executes a new first operation request, the reference first operation request may be newly determined.

[0078] The controller 120 may classify the plurality of first operation requests RQ1 into a plurality of types based on the reference first operation request RQ1_REF.

[0079] exist Figure 6 In the embodiment, at least one of the first type, the second type, the third type, and the fourth type may be included in the plurality of types.

[0080] The first layer L1 corresponding to the first operation request of the first type TYPE_1 is the same as the first layer L1 corresponding to the reference first operation request RQ1_REF.

[0081] exist Figure 6 , the second layer L2 corresponding to the first operation request of the second type TYPE_2 and the second layer L2 corresponding to the reference first operation request RQ1_REF are the same. However, even if the two first layers L1 are in the same second layer L2, the first layer L1 corresponding to the first operation request of the second type TYPE_2 and the first layer L1 corresponding to the reference first operation request RQ1_REF are different.

[0082] exist Figure 6 , the third layer L3 corresponding to the first operation request of the third type TYPE_3 is the same as the third layer L3 corresponding to the reference first operation request RQ1_REF. However, the second layer L2 corresponding to the first operation request of the third type TYPE_3 is different from the second layer L2 corresponding to the reference first operation request RQ1_REF.

[0083] The third layer L3 corresponding to the first operation request of the fourth type TYPE_4 is different from the third layer L3 corresponding to the reference first operation request RQ1_REF.

[0084] The weights of the first type TYPE_1 , the second type TYPE_2 , the third type TYPE_3 , and the fourth type TYPE_4 may be determined based on a time interval of a time when a first operation request of each type is performed.

[0085] For example, the weight of the first type TYPE_1 may be a time interval from the time when the dynamic random access memory medium 110 executes the reference first operation request RQ1_REF to the time when the first operation request of the first type TYPE_1 is executed.

[0086] For example, the weight of the second type TYPE_2 may be a time interval from the time when the dynamic random access memory medium 110 executes the reference first operation request RQ1_REF to the time when the first operation request of the second type TYPE_2 is executed.

[0087] For example, the weight of the third type TYPE_3 may be a time interval from the time when the dynamic random access memory medium 110 executes the reference first operation request RQ1_REF to the time when the first operation request of the third type TYPE_3 is executed.

[0088] For example, the weight of the fourth type TYPE_4 may be a time interval from the time when the dynamic random access memory medium 110 executes the reference first operation request RQ1_REF to the time when the first operation request of the fourth type TYPE_4 is executed.

[0089] Hereinabove, the embodiment in which the controller 120 determines the score has been described.

[0090] Hereinafter, an operation of the controller 120 to determine whether the switching condition is satisfied based on the determined score will be described.

[0091] In an embodiment of the present disclosure, the controller 120 may determine whether the switching condition is satisfied based on a comparison result of the score with the threshold score.

[0092] In an embodiment of the present disclosure, the controller 120 may perform the calculation of comparing the score with the threshold score in various ways.

[0093] For example, the controller 120 may perform calculations via a processor to compare the score to a threshold score.

[0094] As another example, the controller 120 may perform calculation using a comparator included in the above-mentioned calculation circuit (not shown) to compare the score with the threshold score.

[0095] In the following, Figures 7 and 8 This is described in detail in .

[0096] Figure 7 is a flowchart illustrating an example in which a controller determines whether a switching condition is satisfied according to an embodiment of the present disclosure.

[0097] Reference Figure 7 , the controller 120 may determine a score (S710).

[0098] Then, the controller 120 determines whether the score is greater than a threshold score (S720).

[0099] When the score is greater than the threshold score (S720-Y), the controller 120 determines that the switching condition is satisfied (S730). On the other hand, when the score is less than the threshold score (S720-N), the controller 120 determines that the switching condition is not satisfied (S740).

[0100] Figure 8 is a flowchart illustrating another example in which the controller determines whether a switching condition is satisfied according to an embodiment of the present disclosure.

[0101] Reference Figure 8 , the controller 120 may determine a score (S810).

[0102] Then, the controller 120 determines whether the score is less than a threshold score (S820).

[0103] When the score is less than the threshold score (S820-Yes), the controller 120 may determine that the switching condition is satisfied (S830). On the other hand, when the score is greater than the threshold score (S820-No), the controller 120 may determine that the switching condition is not satisfied (S840).

[0104] Hereinabove, an embodiment has been described in which the controller 120 suspends processing of the plurality of first operation requests RQ1 and processes the plurality of second operation requests RQ2 based on the scores.

[0105] Hereinafter, an embodiment will be described in which the controller 120 suspends the processing of the plurality of first operation requests RQ1 and processes the plurality of second operation requests RQ2 by additionally considering a criterion other than a score.

[0106] Fig. 9 is a flowchart illustrating an example of an operation in which a controller determines whether to process a plurality of second operation requests according to an embodiment of the present disclosure.

[0107] Reference Fig. 9 , when the above switching conditions are met ( Figure 8 When the controller 120 performs the operation of counting the number of second operation requests RQ2 (S830), the controller 120 may count the number of second operation requests RQ2 (S910).

[0108] The controller 120 determines whether the number of the plurality of second operation requests RQ2 is greater than or equal to a preset threshold count ( S920 ).

[0109] When the number of the plurality of second operation requests RQ2 is greater than or equal to the threshold count ( S920 -Y), the controller 120 may suspend processing of the plurality of first operation requests RQ1 ( S930 ) and process the plurality of second operation requests RQ2 instead ( S940 ).

[0110] On the other hand, when the number of the plurality of second operation requests RQ2 is less than the threshold count (S920-No), the controller 120 may continue to process the plurality of first operation requests RQ1 (S950). That is, even if the switching condition is met, when the number of the plurality of second operation requests RQ2 is less than the threshold count, the controller 120 may not immediately switch the type of the operation request being processed.

[0111] Fig.10 is a flowchart illustrating an example of another operation in which the controller determines whether to process a plurality of second operation requests RQ2 according to an embodiment of the present disclosure.

[0112] Reference Fig.10 , the controller 120 may count the number of first operation requests executed by the dynamic random access memory medium 110 during a set reference time period (S1010).

[0113] Then, the controller 120 determines whether the total count number of the first operation requests is less than or equal to the threshold count ( S1020 ).

[0114] When the count number of the first operation requests is less than or equal to the threshold count ( S1020 -Y), the controller 120 may suspend processing of the plurality of first operation requests RQ1 ( S1030 ) and switch to processing of the plurality of second operation requests RQ2 ( S1040 ).

[0115] On the other hand, when the count number of the first operation requests is greater than the threshold count ( S1020 —No), the controller 120 may continue to process the plurality of first operation requests RQ1 ( S1050 ).

[0116] Fig.11 is a flowchart illustrating an example of another operation in which the controller determines whether to process a plurality of second operation requests according to an embodiment of the present disclosure.

[0117] Reference Fig.11 , the controller 120 may monitor whether the DRAM medium 110 has executed a first operation request during a set reference time period ( S1110 ).

[0118] The controller 120 may determine whether the dynamic random access memory medium 110 performs a first operation request during a reference period (S1120).

[0119] When the DRAM medium 110 does not execute the first operation request during the reference period ( S1120 -Y), the controller 120 may process a plurality of second operation requests RQ2 ( S1130 ).

[0120] On the other hand, when the DRAM medium 110 performs the first operation request during the reference period ( S1120 -N), the controller 120 may process all of the plurality of first operation requests RQ1 ( S1140 ).

[0121] Fig.12 is a flowchart illustrating an operating method of a dynamic random access memory system according to an embodiment of the present disclosure.

[0122] Reference Fig.12 , the operating method of the dynamic random access memory system 100 may include: when processing a plurality of first operation requests RQ1 for a dynamic random access memory medium 110 including a plurality of memory banks BNK, storing the plurality of first operation requests RQ1 in a plurality of memory units BNK_SU corresponding to each of the plurality of memory banks BNK, respectively (S1210).

[0123] The operating method of the dynamic random access memory system 100 may include classifying a plurality of first operation requests RQ1 stored in the storage unit BNK_SU into a plurality of types based on a reference first operation RQ1_REF request ( S1220 ).

[0124] In an example, the reference first operation request RQ1_REF may be a first operation request last executed by the dynamic random access memory medium 110 .

[0125] The dynamic random access memory medium 110 may include at least one of multiple first layers L1, multiple second layers L2, and multiple third layers L3, each first layer L1 includes one or more of the multiple storage bodies, each second layer L2 includes one or more of the multiple first layers L1, and each third layer L3 includes one or more of the multiple second layers L2.

[0126] At least one of the first type TYPE_1, the second type TYPE_2, the third type TYPE_3 and the fourth type TYPE_4 may be included in the plurality of types. The first layer corresponding to the first operation request of the first type TYPE_1 and the first layer corresponding to the reference first operation request RQ1_REF may be the same. The second layer corresponding to the first operation request of the second type TYPE_2 and the second layer corresponding to the reference first operation request RQ1_REF may be the same. The first layer corresponding to the first operation request of the second type TYPE_2 and the first layer corresponding to the reference first operation request RQ1_REF may be different. The third layer corresponding to the first operation request of the third type TYPE_3 and the third layer corresponding to the reference first operation request RQ1_REF may be the same. The second layer corresponding to the first operation request of the third type TYPE_3 and the second layer corresponding to the reference first operation request RQ1_REF may be different. The third layer corresponding to the first operation request of the fourth type TYPE_4 and the third layer corresponding to the reference first operation request RQ1_REF may be different.

[0127] The operating method of the dynamic random access memory system 100 may include determining a score based on the number of first operation requests corresponding to each of the plurality of types ( S1230 ).

[0128] For example, operation S1230 may determine a score based on the number and weight of first operation requests corresponding to each of the plurality of types.

[0129] The operating method of the dynamic random access memory system 100 may include determining whether a switching condition (ie, a condition for a switching operation) is satisfied based on the score ( S1240 ).

[0130] For example, operation S1240 may determine whether the switching condition is satisfied based on a result of comparing the score with a threshold score.

[0131] The operating method of the dynamic random access memory system 100 may include: when a switching condition is met, suspending processing of the plurality of first operation requests RQ1 , and processing the plurality of second operation requests RQ2 instead ( S1250 ).

[0132] The operating method of the dynamic random access memory system 100 may further include: when a switching condition is met, determining whether the number of multiple second operation requests RQ2 is greater than or equal to a threshold count, and when the number of multiple second operation requests RQ2 is greater than or equal to the threshold count, suspending processing of multiple first operation requests RQ1 and switching to processing multiple second operation requests RQ2.

[0133] The operating method of the dynamic random access memory system 100 may further include: determining whether the number of multiple second operation requests RQ2 during a reference time period is less than or equal to a threshold count, and when the number of multiple first operation requests RQ1 is less than or equal to the threshold count, suspending processing of the multiple first operation requests RQ1 and switching to processing the multiple second operation requests RQ2.

[0134] On the other hand, the operating method of the dynamic random access memory system 100 may further include: determining whether the dynamic random access memory medium 110 executes any one of the multiple first operation requests during the reference time period, and when the dynamic random access memory medium 110 does not execute any one of the multiple first operation requests during the reference time period, switching to processing multiple second operation requests RQ2.

[0135] Although exemplary embodiments of the present disclosure are described for illustrative purposes, it will be understood by those skilled in the art that various modifications, additions and substitutions may be made without departing from the scope and concept of the present disclosure. Therefore, the embodiments disclosed above and in the accompanying drawings should be considered to be merely descriptive, rather than limiting the technical scope. The technical scope of the present disclosure is not limited by the embodiments and the accompanying drawings. The idea and scope of the present disclosure should be interpreted in conjunction with the attached claims, and all equivalent schemes falling within the scope of the attached claims are covered.

Claims

1. A dynamic random access memory system, comprising: A dynamic random access memory medium comprising a plurality of memory banks; as well as Controller: When processing a plurality of first operation requests for the dynamic random access memory medium, the plurality of first operation requests are stored in a plurality of storage units corresponding to each of the plurality of storage banks, respectively; classifying the plurality of first operation requests into a plurality of types based on the reference first operation request, determining a score based on the number of first operation requests corresponding to each of the plurality of types, determining whether a switching condition is met based on the score, and When the switching condition is met, the processing of the multiple first operation requests is suspended and the processing of the multiple second operation requests is switched.

2. The dynamic random access memory system according to claim 1, wherein: Each of the plurality of first operation requests is a read request and each of the plurality of second operation requests is a write request, or each of the plurality of first operation requests is a write request and each of the plurality of second operation requests is a read request.

3. The dynamic random access memory system according to claim 1, wherein: The controller determines the score based on the number and weight of first operation requests corresponding to each of the plurality of types.

4. The dynamic random access memory system according to claim 1, wherein: The reference first operation request is a first operation request last executed by the dynamic random access memory medium.

5. The dynamic random access memory system according to claim 1, wherein: The dynamic random access memory medium includes at least one of a plurality of first layers, a plurality of second layers, and a plurality of third layers, each of the first layers includes one or more of the plurality of storage bodies, each of the second layers includes one or more of the plurality of first layers, and each of the third layers includes one or more of the plurality of second layers.

6. The dynamic random access memory system according to claim 5, wherein: At least one of the first type, the second type, the third type, and the fourth type is included in the plurality of types, The first layer corresponding to the first operation request of the first type is the same as the first layer corresponding to the reference first operation request, the second layer corresponding to the first operation request of the second type is the same as the second layer corresponding to the reference first operation request, and the first layer corresponding to the first operation request of the second type is different from the first layer corresponding to the reference first operation request, The third layer corresponding to the first operation request of the third type is the same as the third layer corresponding to the reference first operation request, and the second layer corresponding to the first operation request of the third type is different from the second layer corresponding to the reference first operation request, and The third layer corresponding to the first operation request of the fourth type is different from the third layer corresponding to the reference first operation request.

7. The dynamic random access memory system according to claim 6, wherein: The weights of the first type, the second type, the third type, and the fourth type are determined based on a time interval of time when a first operation request of each type is executed.

8. The dynamic random access memory system according to claim 7, wherein: The first type of weight is a time interval from the time when the dynamic random access memory medium executes the reference first operation request to the time when the dynamic random access memory medium executes the first type of first operation request, The second type of weight is a time interval from the time when the dynamic random access memory medium executes the reference first operation request to the time when the dynamic random access memory medium executes the second type of first operation request, The third type of weight is a time interval from the time when the dynamic random access memory medium executes the reference first operation request to the time when the dynamic random access memory medium executes the third type of first operation request, and The fourth type of weight is a time interval from the time when the dynamic random access memory medium executes the reference first operation request to the time when the first operation request of the fourth type is executed.

9. The dynamic random access memory system according to claim 1, wherein: The controller determines whether the switching condition is satisfied based on a result of comparing the score with a threshold score.

10. The dynamic random access memory system according to claim 1, wherein: After the switching condition is met, when the number of the plurality of second operation requests is greater than or equal to a preset threshold count, the controller suspends processing the plurality of first operation requests and switches to processing the plurality of second operation requests.

11. The dynamic random access memory system according to claim 1, wherein: When the number of the plurality of first operation requests is less than or equal to a set threshold count during a reference time period, the controller suspends processing of the plurality of first operation requests and switches to processing the plurality of second operation requests.

12. The dynamic random access memory system according to claim 1, wherein: When the dynamic random access memory medium does not execute any one of the plurality of first operation requests during a set reference time period, the controller processes the plurality of second operation requests.

13. A method of operating a dynamic random access memory system, comprising: When processing a plurality of first operation requests for a dynamic random access memory medium including a plurality of memory banks, storing the plurality of first operation requests in a plurality of storage units corresponding to each of the plurality of memory banks, respectively; classifying the plurality of first operation requests stored in the storage unit into a plurality of types based on the reference first operation request; determining a score based on a number of first operation requests corresponding to each of the plurality of types; Determining whether a switching condition is met based on the score; as well as When the switching condition is met, the processing of the plurality of first operation requests to the dynamic random access memory medium is suspended and the plurality of second operation requests to the dynamic random access memory medium is processed instead.

14. The method according to claim 13, wherein: The score is determined based on the number and weight of the first operation requests corresponding to each of the plurality of types.

15. The method according to claim 14, wherein: The reference first operation request is a first operation request last executed by the dynamic random access memory medium.

16. The method according to claim 13, wherein: The dynamic random access memory medium includes at least one of a plurality of first layers, a plurality of second layers, and a plurality of third layers, each of the first layers includes one or more of the plurality of storage bodies, each of the second layers includes one or more of the plurality of first layers, and each of the third layers includes one or more of the plurality of second layers.

17. The method according to claim 16, wherein: At least one of the first type, the second type, the third type, and the fourth type is included in the plurality of types, The first layer corresponding to the first operation request of the first type is the same as the first layer corresponding to the reference first operation request, the second layer corresponding to the first operation request of the second type is the same as the second layer corresponding to the reference first operation request, and the first layer corresponding to the first operation request of the second type is different from the first layer corresponding to the reference first operation request, The third layer corresponding to the first operation request of the third type is the same as the third layer corresponding to the reference first operation request, and the second layer corresponding to the first operation request of the third type is different from the second layer corresponding to the reference first operation request, and The third layer corresponding to the first operation request of the fourth type is different from the third layer corresponding to the reference first operation request.

18. The method according to claim 17, wherein: The weights of the first type, the second type, the third type, and the fourth type are determined based on a time interval of time when a first operation request of each type is executed.

19. The method according to claim 18, wherein: The first type of weight is a time interval from the time when the dynamic random access memory medium executes the reference first operation request to the time when the dynamic random access memory medium executes the first type of first operation request, The second type of weight is a time interval from the time when the dynamic random access memory medium executes the reference first operation request to the time when the dynamic random access memory medium executes the second type of first operation request, The third type of weight is a time interval from the time when the dynamic random access memory medium executes the reference first operation request to the time when the dynamic random access memory medium executes the third type of first operation request, and The fourth type of weight is a time interval from the time when the dynamic random access memory medium executes the reference first operation request to the time when the first operation request of the fourth type is executed.

20. The method according to claim 18, wherein: Whether the switching condition is satisfied is determined based on a result of comparing the score with a threshold score.

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