Storage device and control method thereof

By designing instruction scheduling modules, acceleration modules and optimization modules in storage devices, dynamically allocating tasks and enabling acceleration modules when processing units are busy, the problems of multi-core processor overload and storage resources are not maximized, and efficient task processing and performance improvement are achieved.

CN120010790AActive Publication Date: 2025-05-16合肥康芯威存储技术有限公司
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Patent Information

Application Number
CN202510473021.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-16
Publication Date
2025-05-16
Estimated Expiration
2045-04-16

AI Technical Summary

Technical Problem

In embedded storage products, due to the large number of tasks, multi-core processors may be overloaded, resulting in system efficiency degradation and difficulty in maximizing call storage resources, affecting performance.

Method used

A storage device is designed, including an instruction scheduling module, an acceleration module and an optimization module. The instruction scheduling module dynamically assigns tasks through multiple processing units, the acceleration module enables the preset type of tasks when the processing unit is busy, and the optimization module allocates the task execution unit based on task information and task process information of the execution unit.

Benefits of technology

By dynamically allocating tasks, overloading the instruction scheduling module is avoided, processing specific tasks efficiently, improving task processing efficiency, ensuring priority execution of critical tasks, taking into account the processing of medium and low-priority tasks, and improving the stability and life of the equipment.

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Abstract

The invention provides a storage device and a control method thereof. The storage device comprises a flash memory chip; the instruction scheduling module is electrically connected with the host and the flash memory chip, the instruction scheduling module comprises a plurality of processing units, the processing units establish work tasks according to host instructions and internal maintenance conditions of the storage device, and the work tasks are divided into a plurality of levels according to priorities; the at least one acceleration module is electrically connected with the instruction scheduling module, and when all the processing units are busy, the acceleration module is started, and the acceleration module is allowed to execute a preset type of work task; and the optimization module is electrically connected to the instruction scheduling module and the acceleration module, the optimization module allocates an execution unit of the work task according to the task information of the work task, the task process information of the execution unit and the task type executed by the execution unit, and the execution unit is a processing unit or the acceleration module. According to the method, storage resources can be called to the maximum extent, and the performance of the storage device is improved.
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Description

Technical Field

[0001] The present invention relates to the field of storage technology, and in particular to a storage device and a control method thereof. Background Art

[0002] In the application scenarios of embedded storage products, the central processing unit (CPU) inside the storage particles is responsible for executing system operations such as calculations and logical processing. However, due to the large number of task types, multi-core processors may still be overloaded, resulting in reduced system efficiency. And the task management inside the storage product is difficult, so even with a multi-core processor, it is still difficult to maximize the storage resource call, which in turn affects the performance of the storage product. Summary of the invention

[0003] The object of the present invention is to provide a storage device and a control method thereof, which can maximize the use of storage resources and improve the performance of the storage device.

[0004] In order to solve the above technical problems, the present invention is achieved through the following technical solutions: The present invention provides a storage device, comprising: Flash memory chips; An instruction scheduling module is electrically connected to the host and the flash memory chip, the instruction scheduling module includes a plurality of processing units, the processing units establish work tasks according to host instructions and internal maintenance conditions of the storage device, wherein the work tasks are divided into a plurality of levels according to priorities; at least one acceleration module electrically connected to the instruction scheduling module, wherein when all the processing units are busy, the acceleration module is enabled and is allowed to execute the work tasks of a preset type; and An optimization module is electrically connected to the instruction scheduling module and the acceleration module, and the optimization module allocates the execution unit of the work task according to the task information of the work task, the task process information of the execution unit, and the type of task previously executed by the execution unit, wherein the execution unit is the processing unit or the acceleration module.

[0005] In one embodiment of the present invention, the optimization module includes: a collecting unit, electrically connected to the instruction scheduling module, wherein the task information acquired by the collecting unit includes a task number, a task type, a task priority, a task status, a task parameter and a task result; and The monitoring unit is electrically connected to the collecting unit and obtains the task process information of the executing unit, wherein the task process information includes monitoring task process status, module status, device idle resources, and maximum task load information.

[0006] In one embodiment of the present invention, the optimization module stores multiple preset ratio ranges, the preset ratio range is the limit value of the number of tasks of the same level that the execution unit continuously executes, or the preset ratio range is the limit value of the ratio of the number of tasks of adjacent levels.

[0007] In one embodiment of the present invention, the optimization module includes an allocation unit, the allocation unit is electrically connected to the collection unit and the supervision unit, and the allocation unit at least includes: The first conditional branch is triggered when the work task is in a waiting state and at least one available execution unit is in a standby state; The second conditional branch is triggered when the number of tasks executed by the execution unit for the level to which the work task belongs is within the preset ratio range; and The third conditional branch is triggered when the number of tasks at any level is reset to zero; When the task information and the task progress information satisfy the first conditional branch and the second conditional branch or the third conditional branch, the allocation unit associates the work task with the execution unit.

[0008] In one embodiment of the present invention, an additional trigger statement is stored in the allocation unit, and the additional trigger statement is enabled when the work task and the execution unit do not trigger the second conditional branch and the third conditional branch, and the allocation priority of the low-priority work task is higher than that of the high-priority work task. When the additional trigger statement is enabled, the execution unit preferentially executes the high-priority work task.

[0009] In one embodiment of the present invention, the optimization module includes a priority adjustment unit, which is electrically connected to the instruction scheduling module and the allocation unit. When the additional trigger statement is enabled, the priority adjustment unit corrects the level ratio range until the enabled state of the additional trigger statement ends.

[0010] In one embodiment of the present invention, the optimization module includes a reset unit, which is electrically connected to the priority adjustment unit. When the closing duration of the additional trigger statement reaches a preset duration, the reset unit outputs a reset signal to the priority adjustment unit, and the priority adjustment unit resets the level ratio range to an initial value.

[0011] In one embodiment of the present invention, the storage device includes a cache component, which is electrically connected to the flash memory chip, and the cache component temporarily stores data of the storage device. When the acceleration module is enabled, the acceleration module is allowed to call the cache component and the flash memory chip.

[0012] In one embodiment of the present invention, the flash memory chip, the instruction scheduling module, the acceleration module and the optimization module are integrated in the same package, and the instruction scheduling module, the acceleration module and the optimization module are integrated into the main controller of the storage device.

[0013] The present invention provides a method for controlling a storage device. Based on the storage device as described above, the method comprises the following steps: In a power-on state, the instruction scheduling module, the acceleration module and the optimization module are initialized, wherein the processing unit establishes a work task according to the host instruction and the internal maintenance condition of the storage device; Collecting a plurality of the work tasks in the task queue of the instruction scheduling module and distinguishing the priorities of the work tasks; monitoring the execution unit and the task queue, and enabling the acceleration module when all the processing units are busy; and The execution unit of the work task is allocated according to the task information of the work task, the task process information of the execution unit, and the type of task that the execution unit has executed, wherein the execution unit is the processing unit or the acceleration module.

[0014] As described above, the present invention provides a storage device and a control method thereof, which dynamically allocates tasks to an acceleration module or a processing unit, which not only avoids overloading of the instruction scheduling module, but also efficiently processes specific tasks, thereby improving the efficiency of task processing. In addition, the present invention monitors task progress information and task information in real time, which can ensure reasonable allocation of tasks and avoid idle or overloaded resources. At the same time, the present invention can ensure that key tasks are executed first, while taking into account the processing of medium and low priority tasks. The dynamic allocation of tasks of the present invention is not only efficient, but also has high fault tolerance, high dynamics, and high stability. It ensures the stability of the system itself while optimizing, which is not only highly flexible, but also conducive to improving the life of the equipment.

[0015] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0017] Figure 1 FIG. 4 is a schematic diagram of the structure of a storage device in an embodiment of the present invention.

[0018] Figure 2FIG. 4 is a schematic diagram of the structure of an instruction scheduling module in one embodiment of the present invention.

[0019] Figure 3 It is a schematic diagram of the structure of an optimization module in one embodiment of the present invention.

[0020] Figure 4 The figure is a schematic diagram of task allocation in one embodiment of the present invention.

[0021] Figure 5 It is a schematic diagram of the structure of a distribution unit in one embodiment of the present invention.

[0022] Figure 6 The flowchart of the control method of the storage device in one embodiment of the present invention.

[0023] Figure 7 FIG. 4 is a flow chart of step S40 in an embodiment of the present invention.

[0024] In the figure: A, main controller; B, flash memory chip; W, work task; 100, instruction scheduling module; 200, optimization module; 201, collection unit; 202, supervision unit; 203, allocation unit; 2031, first conditional branch; 2032, second conditional branch; 2033, third conditional branch; 204, execution unit; 205, state generation unit; 206, feedback unit; 207, coordination unit; 208, termination unit; 300, acceleration module; 400, power supply module; 510, buffer module; 520, read buffer; 530, write buffer; 610, data input module; 620, data output module; 630, logic processing module; 710, log output module; 720, first storage module; 730, second storage module. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] The storage device provided by the present invention is an embedded memory, and specifically can be an eMMC chip (eMMC Embedded Multi Media Card). The storage device includes a main controller A and a flash memory chip B, and the main controller A and the flash memory chip B are packaged to form a whole. In this embodiment, the main controller A includes an instruction scheduling module 100, an optimization module 200, an acceleration module 300, a data transmission component, a read-write component and an auxiliary component. The instruction scheduling module 100 includes a plurality of processing units, wherein the processing unit can be a reduced instruction system computer (RISC), and specifically an ARM processor. The acceleration module 300 can be a hardware accelerator (HA), the instruction scheduling module 100 and the acceleration module 300 are electrically connected, and data and instructions can be sent to the acceleration module 300. The acceleration module 300 can assist the processor in processing tasks, thereby reducing the load of the processor, so that the processor can focus on core logic operations and system management. In the present embodiment, the optimization module 200 is electrically connected to the instruction scheduling module 100 and the acceleration module 300, and there is bidirectional data transmission between the optimization module 200 and the instruction scheduling module 100, and between the optimization module 200 and the acceleration module 300. The data transmission component is used to process the hardware logic timing, and is used for the input and output of data. The read-write component is used to cache read and write data. The auxiliary components include a power supply module 400, a log output module 710 and a plurality of storage modules, and the auxiliary components are used to improve the use effect of the storage device. In the present embodiment, the storage device includes a power supply module 400, wherein the power supply module 400 is electrically connected to each component in the storage device and supplies power. After power-on, the storage device is initialized.

[0027] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, the instruction scheduling module 100 includes a task queue and multiple processing units. The multiple processing units are parallel processors and can work simultaneously when the hardware resources are sufficient. Figure 2 A quad-core processor is shown, which has four processing units. In other embodiments of the present invention, the processing unit may also be 1, 2, 8, etc. In the present embodiment, after the instruction scheduling module 100 is powered on and initialized, the instruction scheduling module 100 establishes a task queue. Whenever the host sends an instruction, or the storage device reaches a maintenance condition, the instruction scheduling module 100 adds corresponding task information in the task queue. In the present embodiment, the task queue may be a linked list, an array, or a priority queue, and the task information is stored in the task queue in the form of data. The processing unit may read the task information in the task queue and perform operations corresponding to the task information.

[0028] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, task information includes task number, task type, task priority, task status, task parameters and task result. The task number is a unique number. The task type is the operation content corresponding to the task, such as writing data, calculating, etc. The task priority represents the urgency of the task, which is determined by the optimization module 200. Different priority tags can be set for tasks according to different priorities. The task status is the current progress of the task, such as waiting, executing, completed, etc. For completed tasks, the corresponding task can be deleted in the task queue. The task parameters are the input data or configuration information required for task execution. The task result is the output data after the task is executed.

[0029] See also Figure 1 As shown, in one embodiment of the present invention, the read-write component includes a buffer module 510, a read buffer 520 and a write buffer 530, wherein the buffer module 510 is electrically connected to the output end of the instruction scheduling module 100 and the output end of the acceleration module 300, and receives the address mapping information of the data. The address mapping information includes the correspondence between the physical address and the logical address of the data. The buffer module 510 is electrically connected to the flash memory chip B, and the address mapping information can be stored in the flash memory chip B. In this embodiment, the buffer module 510 is, for example, a static random access memory (SRAM). The read buffer 520 is electrically connected to the instruction scheduling module 100, the acceleration module 300 and the flash memory chip B, can receive data read instructions, and can obtain the cache information of the data to be read from the flash memory chip B and temporarily store it, such as the address mapping information of the data to be read. The write buffer 530 is electrically connected to the output end of the read buffer 520, the instruction scheduling module 100 and the acceleration module 300, and the flash memory chip B. The write buffer 530 and the read buffer 520 are both temporary storage areas. The write buffer 530 is used to cache data received from the host, and subsequently write the data into the flash memory chip B according to the timing arrangement. In this embodiment, the data in the write buffer 530 can be written into the flash memory chip B by direct memory access, thereby reducing the burden of the instruction scheduling module 100.

[0030] See also Figure 1As shown, in one embodiment of the present invention, the data transmission component includes a logic processing module 630, a data input module 610 and a data output module 620. Among them, the data input module 610 is electrically connected to the instruction scheduling module 100, the acceleration module 300 and the logic processing module 630. Among them, the logic processing module 630 is electrically connected to the instruction scheduling module 100, the optimization module 200 and the host, and the logic processing module 630 can parse and execute the eMMC JEDEC protocol to ensure communication and data transmission between the host and the storage device. In this embodiment, the data input module 610 is used to store data input from the host to the storage device. Specifically, when the host initiates a write request, the data is first parsed by the logic processing module 630, then transmitted to the data input module 610 for temporary storage, and then according to the control method of the storage device provided by the present invention, when the processing unit or the acceleration module 300 is free, it is written into the flash memory chip B according to the priority sequence of the task. In this embodiment, the data output module 620 is connected to the instruction scheduling module 100, the acceleration module 300, the logic processing module 630, and the data input module 610, and is used to store data output from the storage device to the host. Specifically, when the host initiates a read request, the storage device reads the data from the flash memory chip B to the data output module 620, and then transmits the data to the host through the logic processing module 630.

[0031] See also Figure 1 As shown, in one embodiment of the present invention, the auxiliary component includes a log output module 710, a first storage module 720 and a second storage module 730. In this embodiment, the log output module 710 is electrically connected to the instruction scheduling module 100, and is used to store and output the work log of the storage device. In this embodiment, the first storage module 720 is electrically connected to the instruction scheduling module 100 and the acceleration module 300, and is used to store the storage firmware. The storage firmware can be a pre-entered running program. In the present invention, the control method of the storage device provided by the present invention is also stored in the first storage module 720 in the form of firmware. After power-on, the storage device is initialized, and the storage firmware can be read from the first storage module 720 and run. In this embodiment, the first storage module 720 is a read-only memory (ROM). In this embodiment, the second storage module 730 is electrically connected to the instruction scheduling module 100 and the acceleration module 300, and is used to provide storage space for program operation, and can be used to store variables. In the present invention, depending on the different working modes, the first storage module 720 and the second storage module 730 can be set to be called only by the instruction scheduling module 100, or can be set to be called by both the instruction scheduling module 100 and the acceleration module 300.

[0032] See also Figure 1 and Figure 3As shown, in one embodiment of the present invention, the optimization module 200 is electrically connected to the instruction scheduling module 100, and the optimization module 200 can receive information from the instruction scheduling module 100, and can also send information to the instruction scheduling module 100. In this embodiment, the optimization module 200 includes a collection unit 201, a supervision unit 202, an execution unit 204, an allocation unit 203, a feedback unit 206, a coordination unit 207, a suspension unit 208 and a state generation unit 205. Among them, the collection unit 201 is electrically connected to the instruction scheduling module 100 and the acceleration module 300, and can read the task queue from the instruction scheduling module 100 and obtain task information. Specifically, the collection unit 201 obtains the type, quantity and task priority of the task. In this embodiment, the data collected by the collection unit 201 is temporarily stored in the buffer module 510 or the second storage module 730.

[0033] See also Figure 1 and Figure 3 As shown, in one embodiment of the present invention, the monitoring unit 202 and the collection unit 201 are electrically connected, and the task process information of the instruction scheduling module 100 and the acceleration module 300 is obtained. Specifically, the task process information includes monitoring task process status, module status, device idle resources, and maximum task load information. The task process status is the current state of the task in the task queue, and the current state of the task can be specifically a waiting state, an execution state, and a completion state. The module state is the real-time state of the instruction scheduling module 100 and the acceleration module 300, and the real-time state can be specifically a busy state, an idle state, and a ready state. Among them, the preparation is the state in which the task has been received and is ready to start execution, or the state in which the task is ready to be received immediately. Working is the operation corresponding to the task that is already being executed. The idle state refers to the state in which the task has been completed and no new tasks have been received. The device idle resources are the number of processing units and acceleration modules 300 that are in an idle state at this time, so as to determine whether the system has enough resources to execute new tasks. The maximum task load information is the maximum number of tasks that each processing unit and acceleration module 300 can take over and execute, so as to ensure that the task allocation does not exceed the module processing capacity.

[0034] It should be noted that, in one embodiment of the present invention, there is one acceleration module 300. Figure 1An acceleration module 300 is shown. In other embodiments of the present invention, the number of acceleration modules 300 may be multiple, and each acceleration module 300 has a corresponding number to distinguish different acceleration modules 300. And the working contents of multiple acceleration modules 300 may be different. For example, in one embodiment, four acceleration modules 300 are set, and they are numbered as HW_1, HW_2, HW_3 and HW_4 respectively. Among them, the acceleration module 300HW_1 can be used for data filling. Among them, data filling means that in order to ensure the stability of data storage in the storage area, when the data does not fill a storage unit, the unfilled storage page is filled with supplementary data to fill the storage unit. Among them, the storage unit is, for example, a storage page. The acceleration module 300HW_2 can be used to search for data. The acceleration module 300HW_3 can be used for data migration. The acceleration module 300HW_4 can be used to complete complex computing tasks. For example, in another embodiment, four acceleration modules 300 are set, and they are numbered as HW_1, HW_2, HW_3 and HW_4 respectively. The working content of each acceleration module 300 is not limited. Each acceleration module 300 can be used to implement data filling, data movement, data search and complex calculation. However, each time a task is executed, the acceleration module 300 only executes one type of work task W. For example, when performing data search, the current acceleration module 300 no longer receives other types of tasks. When the task is terminated, the acceleration module 300 is restored to a state where it can receive various types of tasks.

[0035] See also Figure 1 , Figure 3 and Figure 4 As shown, in one embodiment of the present invention, the allocation unit 203 is electrically connected to the output end of the acquisition unit and the output end of the execution unit 204, and is used to allocate the tasks with corresponding numbers to the execution unit 204 according to the task progress information and the task information. The execution unit 204 is a processing unit or an acceleration module 300. In this embodiment, the work task W is divided into first-level tasks, second-level tasks and third-level tasks. The priority of the first-level tasks is higher than that of the second-level tasks, and the priority of the second-level tasks is higher than that of the third-level tasks. Figure 4 As shown, H represents the first level task, M represents the second level task, and L represents the third level task. In this embodiment, there are, for example, 3 priorities. In other embodiments of the present invention, the number of priorities may also be adjusted to achieve more refined management or faster management.

[0036] See also Figures 1 to 4As shown, in one embodiment of the present invention, the task types in the storage device can be preset, specifically according to the functions of the storage device. For example, for the basic functions of the storage device, the task types may include data reading and writing tasks, data management tasks, error handling tasks, system management tasks, performance optimization tasks, security-related tasks, monitoring and logging tasks, and testing and diagnosis tasks. Depending on the different firmware contents set for different storage devices, the types of work tasks W may also include, for example, temperature management tasks and user demand tasks, etc. In this embodiment, the task types of the storage device also include hardware acceleration tasks. Among them, the hardware acceleration task is a task type that can be executed by the acceleration module 300. Among them, the task type of the hardware acceleration task can be set by the designer.

[0037] See also Figures 1 to 4 As shown, in one embodiment of the present invention, the priorities of different tasks are set according to the task type. When the instruction scheduling module 100 establishes the task queue, the priority of the work task W type is directly marked according to the task type. For example, the data reading and writing task, the error handling task, the security-related task and the hardware acceleration task are set to the first priority, that is, set to the first-level task. The data management task, the performance optimization task and the system management task are set to the second priority, that is, set to the second-level task. The monitoring and log task and the test and diagnosis task are set to the third priority, that is, set to the third-level task. More specifically, the priority can be set according to the specific tasks corresponding to each task type. For example, the data reading and writing task can include a read task, a write task and a data cache task. The read task and the write task can be set as the first-level task, and the data cache task can be set as the second-level task. There can be a garbage collection task in the data management task, and the garbage collection task can be decomposed into a data moving task, a data erasing task, a data analysis task, etc., then the data moving task can be set as a first-level task, the data analysis task can be set as a third-level task, the data erasing task can be set as a second-level task, and the like.

[0038] See also Figures 1 to 4As shown, in one embodiment of the present invention, the allocation unit 203 stores multiple preset ratio ranges, and the preset ratio ranges represent the ratio of the number of adjacent level work tasks W executed by the execution unit 204. For example, the first preset ratio range is set to 4:2~6:2, which means that the ratio of the number of first-level tasks to second-level tasks is greater than or equal to 4:2, and the ratio of the number of first-level tasks to second-level tasks is less than or equal to 6:2. For example, the second preset ratio range is set to 4:2~6:2, which means that the ratio of the number of second-level tasks to third-level tasks is greater than or equal to 4:2, and the ratio of the number of second-level tasks to third-level tasks is less than or equal to 6:2. In this embodiment, in the step of allocating the work tasks W by the allocation unit 203, the preset ratio range can be used as an auxiliary limiting condition in the conditional branch. In another embodiment of the present invention, the preset ratio range can also be represented as the upper limit of the number ratio of the execution unit 204 to continuously execute tasks of the same level. For example, the first preset ratio range is set to 0~50%, which means that the number of first-level tasks that the execution unit 204 can continuously execute is less than or equal to 50% of the total number of currently executed tasks. For another example, setting the first preset ratio range to 40%~50% means that the number of first-level tasks continuously executed by the execution unit 204 is less than or equal to 50% of the total number of currently executed tasks, and greater than or equal to 40% of the total number of currently executed tasks. For another example, setting the limit of the second-level ratio to 0~25% means that the number of second-level tasks continuously executed by the execution unit 204 is less than or equal to 25% of the total number of currently executed tasks. For another example, setting the limit of the second-level ratio to 20%~25% means that the number of second-level tasks continuously executed by the execution unit 204 is less than or equal to 25% of the total number of currently executed tasks, and greater than or equal to 20% of the total number of currently executed tasks. For another example, setting the limit of the third-level ratio to 0~15% means that the number of third-level tasks continuously executed by the execution unit 204 is less than or equal to 15% of the total number of currently executed tasks. For another example, setting the limit of the third-level ratio to 10%~15% means that the number of third-level tasks continuously executed by the execution unit 204 is less than or equal to 15% of the total number of currently executed tasks, and greater than or equal to 10% of the total number of currently executed tasks. In order to achieve balanced use of each processing unit and acceleration module 300 as much as possible, in the present invention, a range limit is set to balance the utilization of each execution unit 204 by the storage device.

[0039] See also Figure 1 and Figure 4As shown, it should be noted that, in the system power-on stage, the data value obtained according to the preset ratio range may not be an integer, and the obtained data is rounded at this time. For example, the total number of tasks is 5, and the number of first-level tasks executed continuously can be 3, the number of second-level tasks executed continuously can be 1, and the number of third-level tasks executed continuously can be 1. It should also be noted that the task type inside the storage device is not completely predictable. At this time, it may appear that although the requirements of the preset ratio range cannot be met, there is no executable task type inside the storage device. In one embodiment of the present invention, the execution unit 204 can enter an idle state or a ready state, and hand over the corresponding task to the execution unit 204 that meets the conditions for execution. In another embodiment of the present invention, when all conditions are not met, and the first-level task has not been fully executed at this time, the second-level task is to be executed, and an additional trigger condition can also be set. When the requirements of the preset ratio range are not met, the preset ratio range is temporarily corrected to ensure that the execution unit 204 executes the first-level task before the second-level task. Similarly, the second-level task is executed before the third-level task, and so on. That is, in this embodiment, the priority of high-priority tasks is the highest priority allocation strategy. Multiple conditional branches are the second-priority allocation strategy. Additional trigger conditions are the third-priority allocation strategy.

[0040] See also Figure 1 and Figure 4 As shown, it should be noted that the task priority set in this embodiment can be entered into the firmware at the factory stage. When the user uses the storage device, or in the test stage, the task priority is determined according to the setting content at the time of entry. In another embodiment of the present invention, a priority adjustment unit can be set in the optimization module 200, and the priority adjustment unit is electrically connected to the collection unit 201. When a specific task required by the user appears in the storage device, or there is no task content agreed in the firmware, the task priority of the newly appeared work task W is set by the priority adjustment unit. In this embodiment, when the system meets additional trigger conditions, the priority adjustment unit can also be enabled and the level ratio range can be adjusted. In one embodiment of the present invention, a reset unit can also be set. When the system does not meet the additional trigger conditions for a preset period of time, a reset signal is sent to allow the priority adjustment unit to reset the level ratio range to the initial value.

[0041] See also Figure 1 , Figure 4 and Figure 5 As shown, in the present invention, the allocation unit 203 can be enabled when all processing units are in a busy state, and closed when the processing unit is in an idle state for a preset time. The allocation unit 203 can also be closed when the number of first-level tasks is less than the number of processing units. The allocation unit 203 can also be closed when the total amount of tasks / task increment is less than or equal to a threshold.

[0042] See also Figures 1 to 5 As shown, in one embodiment of the present invention, the allocation unit 203 includes multiple conditional branches. For example, the allocation unit 203 includes a first conditional branch 2031, a second conditional branch 2032, and a third conditional branch 2033. In this embodiment, the first conditional branch 2031 is that the work task W is in a waiting state, and at least one available execution unit 204 is in a standby state. The available execution unit 204 refers to the execution unit 204 that can process the corresponding work task W. In this embodiment, the processing unit is the available execution unit 204 of all work tasks W. The acceleration module 300 is the available execution unit 204 of the preset type of work task W. The standby state includes the idle state and the ready state of the execution unit 204. In the case where the first conditional branch 2031 is triggered, it is continued to determine whether the second branch condition or the third branch condition is triggered. In this embodiment, the second branch condition is that the number of tasks executed by the execution unit 204 at the level to which the work task W belongs is less than or equal to the corresponding preset ratio range. If the second branch condition is not satisfied, it is determined whether the third branch condition is satisfied. In this embodiment, the third branch condition is that the number of tasks at any level is cleared. When the first conditional branch 2031 is satisfied, and the second conditional branch 2032 or the third conditional branch 2033 is satisfied, the allocation unit 203 allocates the work task W that meets the condition to the execution unit 204 that meets the condition. In this embodiment, the allocation unit 203 can send the allocation information to the execution unit 204 by sending a trigger signal or sending a matching linked list.

[0043] See also Figures 1 to 4 As shown, in one embodiment of the present invention, the execution unit 204 is electrically connected to the output end of the monitoring unit 202 and the output end of the allocation unit 203. When the tasks and resources are ready, the execution unit 204 triggers the execution of the corresponding work task W according to the allocation information sent by the allocation unit 203. Specifically, the work task W in the allocation information is sent to the corresponding execution unit 204, and the execution signal is triggered. After the execution unit 204 receives the execution signal and the work task W, it starts to execute the corresponding work task W. In the present invention, as long as the task is in the execution state, even if it is a new high-priority task later, the currently executed low-priority task is executed first, so as to ensure that the task can clearly and clearly obtain the task result. The allocation system provided by the present invention can still ensure that the high-priority task can be completed as soon as possible. Therefore, the present invention not only has high task execution efficiency, but also can improve the stability and accuracy of the system processing tasks.

[0044] See also Figure 1 and Figure 3As shown, in one embodiment of the present invention, the state generation unit 205 is electrically connected to the output end of the supervisory unit 202 and the output end of the execution unit 204, and is used to modify the state of each task. Specifically, for the work task W that has been assigned to the execution unit 204, the task state can be updated from the waiting state to the execution state. In addition, for the task that was last executed by the execution unit 204, the task state can be modified to the completion state. And the instruction scheduling module 100 can be set according to the firmware of the storage device, and the work task W in the completion state is cleared out of the task queue.

[0045] See also Figure 1 and Figure 3 As shown, in the present invention, the feedback unit 206 is electrically connected to the output end of the execution unit 204 and the input end of the coordination unit 207. In this embodiment, the feedback unit 206 is used to feed back the status information of the task execution to the coordination unit 207 through hardware interruption or software processing. In this embodiment, when the task is completed or an exception occurs, the execution unit 204 triggers an interrupt, and the feedback module generates feedback information and sends the feedback information to the coordination unit 207. In this embodiment, the feedback information includes the task number and the task status. The coordination unit 207 updates the task status and sends the updated task status to the allocation unit 203, so that the allocation unit 203 can dynamically and accurately complete the allocation of the work task W according to the latest information. In another embodiment of the present invention, the feedback unit 206 obtains the task execution status from the execution unit 204 in a polling or event-driven manner, and sends the feedback information to the coordination unit 207.

[0046] See also Figure 1 and Figure 6 As shown, the present invention provides a method for controlling a storage device, and the method includes steps S10 to S40.

[0047] Step S10: in the power-on state, the instruction scheduling module 100, the acceleration module 300 and the optimization module 200 are initialized, wherein the processing unit establishes a work task W according to the host instruction and the internal maintenance condition of the storage device.

[0048] Step S20 , collecting multiple work tasks W in the task queue of the instruction scheduling module 100 , and distinguishing the priorities of the work tasks W.

[0049] Step S30 , monitoring the execution unit 204 and the task queue, and when all processing units are busy, enabling the acceleration module 300 .

[0050] Step S40 , allocating the execution unit 204 of the work task W according to the task information of the work task W, the task progress information of the execution unit 204 , and the task type previously executed by the execution unit 204 , wherein the execution unit 204 is a processing unit or an acceleration module 300 .

[0051] See also Figure 1 and Figure 6 As shown, in one embodiment of the present invention, the power supply module 400 supplies power to the storage device, the storage device starts working, and executes step S10. In step S10, the initialization step includes hardware initialization, firmware loading step, resource configuration and task configuration, etc. After power-on, multiple processing units and storage resources of the instruction scheduling module 100 are detected and configured. The storage resources include flash memory chip B, the first storage module 720, the second storage module 730, the buffer module 510, the read buffer 520 and the write buffer 530. In this embodiment, in step S10, the basic parameters of the main controller A are set, such as the working mode, clock frequency, data transmission protocol, etc. In step S10, after power-on, the physical state of the flash memory chip B is detected, and the working parameters of the flash memory chip B are initialized, such as the page size, block size, erase and write times, etc. In this embodiment, in the firmware loading step, the instruction scheduling module 100 reads the storage firmware from the first storage module 720 and runs the storage firmware, thereby realizing various control methods of the storage device to realize various functions of the storage device. In this embodiment, the control method of the storage device provided by the present invention is a part of the storage firmware and is stored in the first storage module 720. In the initialization step, various functions corresponding to the storage firmware are configured, such as error correction (ECC), bad block management, read-write cache, etc. The data input channel and data output channel of the storage device are initialized. In one embodiment of the present invention, in step S10, a task queue is established in the instruction scheduling module 100, and a plurality of work tasks W can be stored in the task queue.

[0052] See also Figure 1 and Figure 6As shown, in one embodiment of the present invention, in step S10, after power-on, necessary hardware resources such as storage resources are allocated to the acceleration module 300 to ensure that the acceleration module 300 can operate normally after power-on. In step S10, the buffer module 510, the read buffer 520 and the write buffer 530 are configured to a mode accessible to both the acceleration module 300 and the instruction scheduling module 100 to support collaborative work. In the step of initializing the buffer module 510, the access rights of the mapping table are configured, and the mapping table in the storage information is set to a mode accessible to both the acceleration module 300 and the instruction scheduling module 100 to support efficient task allocation. In the step of initializing the data transmission component, the data input channel and the data output channel are set to a mode accessible to both the acceleration module 300 and the instruction scheduling module 100 to support collaborative data processing. The access rights of the flash memory chip B are configured, and the flash memory chip B is set to a mode accessible to both the acceleration module 300 and the instruction scheduling module 100 to support efficient task processing.

[0053] See also Figure 1 and Figure 6 As shown, in one embodiment of the present invention, in step S10, after power-on, the working mode of the acceleration module 300 is configured, and the acceleration module 300 can perform one or more types of tasks of a preset type, so as to share the pressure for the processing unit before the processing unit is overloaded, and avoid system overload. Regarding the working mode of the acceleration module 300, for example, the acceleration module 300 can quickly fill data of any type and any range, which is suitable for scenes that require a large amount of data to be written. For example, the acceleration module 300 can be used to query and count by arbitrarily setting a specified string or different digital graphics, so as to efficiently search for data, which is suitable for data retrieval tasks. For example, the acceleration module 300 can be used to move data from various specified cache locations, which is suitable for data migration or replication tasks. For example, the acceleration module 300 can be used for computing tasks, including arithmetic addition, subtraction, multiplication and division, logical operations and or non-combinatorial logical operations, which are suitable for scenes that require high-performance computing. The acceleration module 300 can handle one or more types of tasks. The acceleration module 300 can dynamically select the best working mode according to the task requirements, efficiently handle specific tasks, thereby improving the overall performance of the system.

[0054] See also Figure 1 and Figure 6As shown, in one embodiment of the present invention, in step S10, whenever the instruction scheduling module 100 receives a host instruction or reaches the task generation condition designed by the storage firmware, a new task is established in the task queue. In step S20, the priority of the work task W is distinguished according to the preset task type. The optimization module 200 regularly checks the work task W in the task queue, and classifies the work task W according to the priority of the work task W, so as to mark the new task as a first-level task, a second-level task, or a third-level task. In other embodiments of the present invention, more or fewer priorities can also be set.

[0055] See also Figure 1 and Figure 6 As shown, in one embodiment of the present invention, in step S30, the monitoring unit 202 obtains task process information and task information. When all processing units are in a busy state, the acceleration module 300 is enabled, and task allocation is implemented according to the allocation unit 203 and the allocation method provided by the present invention.

[0056] See also Figure 1 and Figure 4 , Figure 6 and Figure 7 As shown, in one embodiment of the present invention, in step S40, the corresponding execution unit 204 is allocated to the work task W in the task queue. Step S40 includes steps S41 to S48.

[0057] Step S41, according to the task priority and task creation time, obtain the work tasks W in the task queue in sequence.

[0058] Step S42, determine whether the work task W and the execution unit 204 satisfy the first conditional branch 2031, if not, return to step S41.

[0059] Step S43: If the work task W and the execution unit 204 satisfy the first conditional branch 2031, continue to determine whether the work task W and the execution unit 204 satisfy the second conditional branch 2032; if the second conditional branch 2032 is satisfied, jump to step S47.

[0060] Step S44, when the work task W and the execution unit 204 do not satisfy the second conditional branch 2032, determine whether the work task W and the execution unit 204 satisfy the third conditional branch 2033, if the third conditional branch 2033 is satisfied, jump to step S47.

[0061] Step S45: If the work task W and the execution unit 204 do not satisfy the third conditional branch 2033, it is determined whether the system satisfies an additional triggering condition at this moment.

[0062] Step S46: If the additional triggering condition is met, the level ratio range is temporarily modified and step S47 is executed.

[0063] Step S47: Allocate the work task W to the corresponding execution unit 204 and trigger an execution signal.

[0064] Step S48, monitor and update the task status, and return to step S41 until the allocation unit 203 is closed.

[0065] See also Figure 1 , Figures 4 to 7 As shown, in one embodiment of the present invention, in combination with multiple conditional branches, when there are multiple work tasks W in the task queue that need to be assigned. In step S41, the work task W is obtained according to the task priority from high to low, and the same priority is obtained according to the order from first to last within the task establishment time. When the allocation unit 203 is enabled, the collection unit 201 continues to collect the task queue, the feedback unit 206 and the coordination unit 207 continue to update the task information, and the allocation unit 203 continues to loop through the task information of the work task W and the task process information of the execution unit 204 until the allocation unit 203 is closed. In step S42, when the work task W is in the ready state, it continues to judge. When the work task W is in the execution state or the completion state, the current work task W is skipped and the next work task W is obtained in sequence. If the work task W is in the ready state at this time, but there is no available execution unit 204 at this time, it returns to step S41 and continues to obtain the task information of the next work task W. In this case, the processing unit may be fully occupied, while the acceleration module 300 has a vacancy, but the work task W itself does not belong to the task type that the acceleration module 300 can process, so the task information of the next work task W continues to be obtained.

[0066] See also Figure 1 , Figures 4 to 7As shown, in one embodiment of the present invention, in step S43 and step S44, step S43 and step S44 can be executed simultaneously or in sequence. In this embodiment, it is shown that they are executed in sequence. If either the second conditional branch 2032 or the third conditional branch 2033 is satisfied, step S45 and step S46 can be skipped and step S47 can be directly executed. In step S45, when neither the second conditional branch 2032 nor the third conditional branch 2033 is satisfied, if the additional triggering condition is satisfied at this time, specifically, the enabling condition of the additional triggering statement is met, the corresponding task can also be executed. The additional triggering statement is a program statement, and is enabled when the work task W and the execution unit 204 do not trigger the second conditional branch 2032 and the third conditional branch 2033, and the allocation priority of the low-priority work task W is higher than that of the high-priority work task W. During the allocation process, if the next work task W meets the allocation condition branch, and the priority of the next work task W is lower than the priority of the previous work task W, or within the preset number, a low-priority task is allocated before a high-priority task in the same batch of established work tasks W, then an additional trigger statement is enabled. The tasks established in the same batch are bounded by the collection cycle of the collection unit 201, and can be specifically expressed as all the task contents in the task queue within this allocation cycle. If within the preset number, for example, there are no tasks that meet the additional trigger conditions within 4 work tasks W, and the fifth task is allocated first with a low priority, the additional trigger statement may not be enabled. Each execution unit 204 can be divided into multiple rounds according to the number of tasks it executes. For example, the first task executed is the first round of tasks, the second task is the second round of tasks, and so on. Figure 4 As shown, for the processing unit numbered C3, four first-level tasks have been executed continuously. When allocating the fifth round of tasks, if the allocation strategy is met, the low-level task, that is, the second-level task numbered M9, will be preferentially allocated to C3 for execution.

[0067] See also Figure 1 , Figures 4 to 7 As shown, in one embodiment of the present invention, in step S46, when the additional trigger statement is enabled, the priority adjustment unit modifies the level ratio range until the enabling state of the additional trigger statement ends. The level ratio range can be modified multiple times and continuously, each modification is, for example, 1%, until the enabling condition of the additional trigger statement is no longer met, and then the modification is stopped. When the closing time of the additional trigger statement reaches a preset time, the level ratio range can be reset by the reset unit, that is, restored to a preset initial value.

[0068] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A storage device, characterized in that: include: Flash memory chips; An instruction scheduling module is electrically connected to the host and the flash memory chip, the instruction scheduling module includes a plurality of processing units, the processing units establish work tasks according to host instructions and internal maintenance conditions of the storage device, wherein the work tasks are divided into a plurality of levels according to priorities; At least one acceleration module is electrically connected to the instruction scheduling module, and when all the processing units are busy, the acceleration module is enabled and allowed to execute the work task of a preset type; as well as An optimization module is electrically connected to the instruction scheduling module and the acceleration module, and the optimization module allocates the execution unit of the work task according to the task information of the work task, the task process information of the execution unit, and the type of task previously executed by the execution unit, wherein the execution unit is the processing unit or the acceleration module.

2. A storage device according to claim 1, characterized in that: The optimization module includes: a collecting unit, electrically connected to the instruction scheduling module, wherein the task information acquired by the collecting unit includes a task number, a task type, a task priority, a task status, a task parameter and a task result; and The monitoring unit is electrically connected to the collecting unit and obtains the task process information of the executing unit, wherein the task process information includes monitoring task process status, module status, device idle resources, and maximum task load information.

3. A storage device according to claim 2, characterized in that: The optimization module stores a plurality of preset ratio ranges, wherein the preset ratio range is a limit value of the number of tasks of the same level that are continuously executed by the execution unit, or the preset ratio range is a limit value of the ratio of the number of tasks of adjacent levels.

4. A storage device according to claim 3, characterized in that: The optimization module includes an allocation unit, which is electrically connected to the collection unit and the supervision unit, and the allocation unit at least includes: The first conditional branch is triggered when the work task is in a waiting state and at least one available execution unit is in a standby state; The second conditional branch is triggered when the number of tasks executed by the execution unit for the level to which the work task belongs is within the preset ratio range; and The third conditional branch is triggered when the number of tasks at any level is reset to zero; When the task information and the task progress information satisfy the first conditional branch and the second conditional branch or the third conditional branch, the allocation unit associates the work task with the execution unit.

5. A storage device according to claim 4, characterized in that: The allocation unit stores an additional trigger statement, and the additional trigger statement is enabled when the work task and the execution unit do not trigger the second conditional branch and the third conditional branch, and the allocation priority of the low-priority work task is higher than that of the high-priority work task. When the additional trigger statement is enabled, the execution unit preferentially executes the high-priority work task.

6. A storage device according to claim 5, characterized in that: The optimization module includes a priority adjustment unit, which is electrically connected to the instruction scheduling module and the allocation unit. When the additional trigger statement is enabled, the priority adjustment unit corrects the level ratio range until the enabling state of the additional trigger statement ends.

7. A storage device according to claim 6, characterized in that: The optimization module includes a reset unit, which is electrically connected to the priority adjustment unit. When the closing duration of the additional trigger statement reaches a preset duration, the reset unit outputs a reset signal to the priority adjustment unit, and the priority adjustment unit resets the level ratio range to an initial value.

8. A storage device according to claim 1, characterized in that: The storage device includes a cache component, which is electrically connected to the flash memory chip, and the cache component temporarily stores data of the storage device. When the acceleration module is enabled, the acceleration module is allowed to call the cache component and the flash memory chip.

9. The storage device according to claim 1, characterized in that: The flash memory chip, the instruction scheduling module, the acceleration module and the optimization module are integrated in the same package, and the instruction scheduling module, the acceleration module and the optimization module are integrated into the main controller of the storage device.

10. A method for controlling a storage device, based on the storage device according to claim 1, characterized in that: The method comprises the following steps: In a power-on state, the instruction scheduling module, the acceleration module and the optimization module are initialized, wherein the processing unit establishes a work task according to the host instruction and the internal maintenance condition of the storage device; Collecting a plurality of the work tasks in the task queue of the instruction scheduling module and distinguishing the priorities of the work tasks; Monitor the execution unit and the task queue, and enable the acceleration module when all the processing units are busy; as well as The execution unit of the work task is allocated according to the task information of the work task, the task process information of the execution unit, and the type of task that the execution unit has executed, wherein the execution unit is the processing unit or the acceleration module.

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