Memory system, memory system disaster recovery control method and electronic equipment

Abstract

The invention provides a memory system, a memory system disaster recovery control method and electronic equipment, which can be applied to the technical field of memory disaster recovery. The memory system comprises a power supply monitoring module used for monitoring mainboard power supply parameters of a mainboard power interface; the memory controller is electrically connected with the power supply monitoring module, and the memory controller is used for determining the operation mode of the memory system according to the mainboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system; when the operation mode is an emergency operation mode and a control instruction from the central processing unit is received, determining multiple pieces of target data migration protocol information according to the control instruction and multiple pieces of dynamic data stored in the dynamic random access memory; according to the multiple pieces of target data migration protocol information, multiple data migration protocol interfaces of the memory controller are called respectively, and the multiple pieces of dynamic data are migrated from the dynamic random access memory to the target solid state disk in the multiple solid state disks.

Description

Technical Field

[0001] The present application relates to the field of memory disaster recovery, and in particular to a memory system, a memory system disaster recovery control method, and an electronic device. Background Art

[0002] The memory controller is a hardware component that supports high-performance memory interconnect protocols. The memory controller can optimize the traditional memory architecture and improve the efficiency of data interaction between the memory and the central processor, so that the memory system can meet the needs of today's high-density data scenarios. However, when a failure occurs, the memory system based on the memory controller is difficult to have good disaster recovery performance. Summary of the invention

[0003] In view of the above problems, the present application provides a memory system, a memory system disaster recovery control method and an electronic device.

[0004] According to the first aspect of the present application, a memory system is provided, including: a power supply monitoring module, used to monitor the mainboard power supply parameters of the mainboard power interface; a memory controller, electrically connected to the power supply monitoring module, the memory controller is used to: determine the operation mode of the memory system according to the mainboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system: when the operation mode is the emergency operation mode and a control instruction from a central processing unit is received, determine multiple target data migration protocol information according to the control instruction and multiple dynamic data stored in the dynamic random access memory; based on the multiple target data migration protocol information, call multiple data migration protocol interfaces of the memory controller respectively to migrate the multiple dynamic data from the dynamic random access memory to the target solid-state hard disk among the multiple solid-state hard disks.

[0005] The second aspect of the present application provides a memory system disaster recovery control method, including: obtaining a motherboard power supply parameter of a motherboard power interface; determining an operating mode of the memory system based on the motherboard power supply parameter and the heartbeat information of the memory system; when the operating mode is an emergency operating mode and a control instruction from a central processing unit is received, determining multiple target data migration protocol information based on the control instruction and multiple dynamic data stored in a dynamic random access memory; based on the multiple target data migration protocol information, calling multiple data migration protocol interfaces respectively to migrate multiple dynamic data from the dynamic random access memory to a target solid-state hard drive.

[0006] The third aspect of the present application provides an electronic device, comprising: one or more processors; a memory for storing one or more computer programs, wherein the one or more processors execute the one or more computer programs to implement the steps of the above method.

[0007] The fourth aspect of the present application also provides a computer-readable storage medium on which a computer program or instruction is stored. When the computer program or instruction is executed by a processor, the steps of the above method are implemented.

[0008] The fifth aspect of the present application also provides a computer program product, including a computer program or instructions, which implement the steps of the above method when the above computer program or instructions are executed by a processor.

[0009] According to an embodiment of the present application, the memory system may include a power supply monitoring module, a memory controller and a memory module, the power supply monitoring module is electrically connected to the mainboard power interface, the central processing unit is electrically connected to the memory controller, the memory controller is electrically connected to the power supply monitoring module, and the memory module is electrically connected to the memory controller. The power supply monitoring module is used to monitor the mainboard power supply parameters of the mainboard power interface in real time, and the mainboard power supply parameters are sent to the memory controller through the integrated circuit bus protocol or the system management bus protocol, so that the memory controller can quickly determine the operating mode and configure the current power supply mode.

[0010] According to an embodiment of the present application, the memory controller determines the current operation mode of the memory system according to the mainboard power supply parameters and the heartbeat information of the memory system. When the operation mode is the emergency operation mode and a control instruction from the central processing unit is received, multiple target data migration protocol information is determined according to the information in the control instruction and the multiple dynamic data stored in the dynamic random access memory. Then, based on the multiple target data migration protocol information, multiple data migration protocol interfaces are called respectively, so that the multiple dynamic data in the dynamic random access memory are quickly and orderly migrated and stored to the target solid-state hard disk. Thus, when the memory system fails, nanosecond power switching can be achieved through multi-protocol collaborative control and dynamic power management. In addition, by backing up volatile dynamic data to the solid-state hard disk for storage, the risk of data loss in the memory system in the disaster recovery scenario can be reduced, and the preservation integrity of dynamic data and system configuration parameters can be improved. Further, according to different disaster recovery scenarios, different multiple protocols or different protocol call orders can be used to adaptively back up volatile dynamic data and system configuration parameters to the solid-state hard disk for storage, thereby improving the flexibility and adaptability of the memory system, so that it can be widely used in various high-standard data-intensive scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above contents and other purposes, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings, in which:

[0012] Figure 1 A schematic diagram of a memory system according to an embodiment of the present application is shown;

[0013] Figure 2A schematic diagram of a data migration engine and a data migration protocol module according to an embodiment of the present application is shown;

[0014] Figure 3 A schematic diagram of a data migration engine according to an embodiment of the present application is shown;

[0015] Figure 4 A schematic diagram of a solid state drive according to an embodiment of the present application is shown;

[0016] Figure 5 A schematic diagram of an enabling controller according to an embodiment of the present application is shown;

[0017] Figure 6 A schematic diagram of a power supply monitoring module according to an embodiment of the present application is shown;

[0018] Figure 7 A schematic diagram of a charging and discharging electronic module according to an embodiment of the present application is shown;

[0019] Figure 8 A flow chart of a method for controlling disaster recovery of a memory system according to an embodiment of the present application is shown;

[0020] Fig. 9 A block diagram of an electronic device suitable for implementing a memory system disaster recovery control method according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0021] Below, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present application. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present application. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present application.

[0022] The terms used herein are only for describing specific embodiments and are not intended to limit the present application. The terms "include", "comprising", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0023] All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0024] When using expressions such as "at least one of A, B, and C, etc.", they should generally be interpreted according to the meaning of the expression commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0025] The memory controller is a hardware component that supports high-performance memory interconnect protocols. The memory controller can optimize the traditional memory architecture and improve the efficiency of data interaction between the memory and the central processor, so that the memory system can meet the needs of today's high-density data scenarios. However, when a failure occurs, the memory system based on the memory controller is difficult to have good disaster recovery performance.

[0026] An embodiment of the present application provides a memory system, including: a power supply monitoring module, used to monitor the mainboard power supply parameters of the mainboard power interface; a memory controller, electrically connected to the power supply monitoring module, the memory controller is used to: determine the operation mode of the memory system according to the mainboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system: when the operation mode is an emergency operation mode and a control instruction from a central processing unit is received, determine multiple target data migration protocol information according to the control instruction and multiple dynamic data stored in the dynamic random access memory; based on the multiple target data migration protocol information, call multiple data migration protocol interfaces of the memory controller respectively to migrate the multiple dynamic data from the dynamic random access memory to the target solid-state hard disk among the multiple solid-state hard disks.

[0027] Figure 1 A schematic diagram of a memory system according to an embodiment of the present application is shown.

[0028] like Figure 1 As shown, the memory system includes a power supply monitoring module 101, a memory controller 102 and a memory module 103. The power supply monitoring module 101 monitors the motherboard voltage at the motherboard power interface 104. The central processing unit 105 interacts with the memory controller 102. The memory module 103 includes multiple dynamic random access memories 1031 and multiple solid-state hard drives 1032.

[0029] According to an embodiment of the present application, the power supply monitoring module is used to monitor the mainboard power supply parameters of the mainboard power interface.

[0030] The power supply monitoring module can be electrically connected to hardware components such as the memory controller and the memory module, so that while monitoring the mainboard power supply parameters of the mainboard power interface, it can supply power to hardware components such as the memory controller and the memory module to keep the memory system working, and transmit the power supply parameters of the power supply monitoring module to the memory controller through the integrated circuit bus protocol or the system management bus protocol to facilitate the memory controller to control storage and other operations. Among them, the mainboard power supply parameters include the mainboard voltage and the mainboard current. The power supply monitoring module is usually used to monitor the mainboard voltage of the mainboard power interface so that the memory controller can determine the operating mode of the memory system based on the mainboard voltage.

[0031] According to an embodiment of the present application, the memory controller is electrically connected to the power supply monitoring module, and the memory controller is used to: determine the operating mode of the memory system based on the mainboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system; when the operating mode is the emergency operating mode and a control instruction from the central processing unit is received, determine multiple target data migration protocol information based on the control instruction and multiple dynamic data stored in the dynamic random access memory; based on the multiple target data migration protocol information, call multiple data migration protocol interfaces of the memory controller respectively to migrate multiple dynamic data from the dynamic random access memory to target solid-state hard drives among multiple solid-state hard drives.

[0032] The heartbeat information of the memory system can be characterized as the operating status of the memory system within a certain period of time. Based on the heartbeat information, it can be determined whether the current memory system is down.

[0033] The operation mode of the memory system may include multiple operation modes, such as normal operation mode, emergency operation mode, and suspended operation mode, but is not limited to the above modes. According to the motherboard power supply parameters and heartbeat information, the current operation mode of the memory system is determined, so that according to different operation modes, the memory controller and the power supply monitoring module are controlled to perform different operations and processes, and the cache data sent by the central processing unit or the data in the memory module are stored, migrated, etc.

[0034] The target data migration protocol information may include a target solid-state drive for storing the backup dynamic data.

[0035] According to an embodiment of the present application, the memory system also includes a memory module, and the memory module is electrically connected to the memory controller. The memory module may include multiple dynamic random access memories and multiple solid-state hard disks, and multiple dynamic data may be stored in the dynamic random access memory, and multiple non-volatile data may be stored in the solid-state hard disk. When it is determined that the current operating mode of the memory system is an emergency operating mode, the dynamic data in the dynamic random access memory and the power supply parameters of the power supply monitoring module can be migrated and stored in the solid-state hard disk to facilitate the backup of dynamic data, and when waiting for the memory system to resume the normal operating mode, the dynamic data and the power supply parameters of the power supply monitoring module and other information are restored.

[0036] According to an embodiment of the present application, the memory system may include a power supply monitoring module, a memory controller and a memory module, the power supply monitoring module is electrically connected to the mainboard power interface, the central processing unit is electrically connected to the memory controller, the memory controller is electrically connected to the power supply monitoring module, and the memory module is electrically connected to the memory controller. The power supply monitoring module is used to monitor the mainboard power supply parameters of the mainboard power interface in real time, and the mainboard power supply parameters are sent to the memory controller through the integrated circuit bus protocol or the system management bus protocol, so that the memory controller can quickly determine the operating mode and configure the current power supply mode.

[0037] The memory controller determines the current operation mode of the memory system according to the power supply parameters of the motherboard and the heartbeat information of the memory system. When the operation mode is the emergency operation mode and a control instruction from the central processing unit is received, multiple target data migration protocol information is determined according to the information in the control instruction and the multiple dynamic data stored in the dynamic random access memory. Then, based on the multiple target data migration protocol information, multiple data migration protocol interfaces are called respectively, so that the multiple dynamic data in the dynamic random access memory are quickly and orderly migrated and stored to the target solid-state hard disk. Therefore, when a failure occurs in the memory system, nanosecond power switching can be achieved through multi-protocol collaborative control and dynamic power management. In addition, by backing up volatile dynamic data to the solid-state hard disk for storage, the risk of data loss in the memory system in the disaster recovery scenario can be reduced, and the preservation integrity of dynamic data and system configuration parameters can be improved. Further, according to different disaster recovery scenarios, different multiple protocols or different protocol call orders can be used to adaptively back up volatile dynamic data and system configuration parameters to the solid-state hard disk for storage, thereby improving the flexibility and adaptability of the memory system, so that it can be widely used in various high-standard data-intensive scenarios.

[0038] When the memory system is in emergency operation mode, unused data channels can be shut down, retaining only x4 links (4 data transmission channels) or x2 links (2 data transmission channels), reducing the serializer drive current to 30% of the normal value, reducing the clock frequency and system power consumption, and retaining only the functions required for data migration.

[0039] According to an embodiment of the present application, the target data migration protocol information includes a target data migration protocol and a target data migration protocol priority.

[0040] Figure 2 A schematic diagram of a data migration engine and a data migration protocol module according to an embodiment of the present application is shown.

[0041] like Figure 2 As shown, the memory controller 102 includes a data migration engine 201 and a data migration protocol module 202. The data migration engine 201 is electrically connected to the central processing unit 105 and the power supply monitoring module 101. The data migration protocol module 202 is electrically connected to the data migration engine 201. The data migration protocol module 202 can obtain hard disk attribute information and dynamic data from the target solid-state hard disk 203 and the dynamic random access memory 1031 by calling the data migration access protocol interface, and determine multiple target data migration protocols and multiple target data migration protocol priorities.

[0042] According to an embodiment of the present application, the data migration engine is electrically connected to the central processing unit, and the data migration engine is used to send emergency power supply mode configuration instructions to the power supply monitoring module according to the emergency operation mode; in response to the power supply monitoring module being configured as the emergency power supply mode, emergency operation information is generated according to multiple dynamic data and hard disk attribute information of the solid-state hard disk, and the data migration access protocol interface is called to send the emergency operation information to the central processing unit; and the data migration control protocol interface is called to receive control instructions generated by the central processing unit in response to the emergency operation information, the control instructions including multiple target migration information and target solid-state hard disk information.

[0043] When it is determined that the memory system is in the emergency operation mode, the memory controller generates an emergency power supply mode configuration instruction and sends the emergency power supply mode configuration instruction to the power supply monitoring module through the integrated circuit bus protocol or the system management bus protocol. After receiving the emergency power supply mode configuration instruction, the power supply monitoring module can adjust the power supply voltage of the power supply monitoring module to hardware components such as the memory controller and the memory module, so that the hardware components such as the memory controller and the memory module can migrate and store dynamic data to the target solid-state hard disk in the emergency operation mode, thereby maintaining the temporary working state of the memory system.

[0044] When the power supply monitoring module is configured in the emergency power supply mode, the data migration access protocol interface can be called to obtain multiple dynamic data and hard disk attribute information from multiple dynamic random access memories and multiple solid-state hard disks, and then emergency operation information is generated based on the multiple dynamic data and hard disk attribute information. The data migration access protocol interface is then called to send the emergency operation information to the central processing unit, wherein the hard disk attribute information may include the storage capacity of the solid-state hard disk, the storable capacity and other attribute information.

[0045] After receiving the emergency operation information, the central processing unit generates a control instruction containing the target solid-state drive and target migration information according to the hard disk attribute information of each solid-state drive, wherein the target migration information may include migration instruction information such as switching, backup, updating, and address allocation of dynamic data.

[0046] According to an embodiment of the present application, the data migration protocol module is electrically connected to the data migration engine, and is used to determine multiple target data migration protocols and multiple target data migration protocol priorities for multiple dynamic data based on multiple target migration information.

[0047] According to an embodiment of the present application, the data migration protocol module is also used to: determine multiple first data migration protocols for multiple dynamic data based on multiple target migration information; call the data migration access protocol interface to confirm the consistency of multiple dynamic data stored in the dynamic random access memory and the non-volatile data stored in the target solid-state drive to obtain first storage consistency information; determine multiple target data migration protocols based on the first storage consistency information and the first data migration protocol; determine the target data migration protocol priority of multiple target data migration protocols based on multiple target migration information and multiple dynamic data.

[0048] Based on multiple target migration information, multiple first data migration protocols for migrating multiple dynamic data can be determined. For example, when the target migration information is switching, backup, update, and address allocation, multiple first data migration protocols can all be data migration storage protocols, but are not limited to the above migration information. The target migration information can customize the operation code to expand the migration information instructions. When the target migration information is address allocation and backup, multiple first data migration protocols can also be data migration control protocols and data migration storage protocols; when the target migration information is update, backup, and address allocation, multiple first data migration protocols can also be data migration access protocols, data migration storage protocols, and data migration control protocols.

[0049] The first storage consistency information can represent the same data of multiple dynamic data stored in the dynamic random access memory and non-volatile data stored in the target solid state drive. According to the first storage consistency information, part of the dynamic data stored in the target solid state drive can be marked, so that the part of the dynamic data does not need to be migrated and stored.

[0050] The priority of the target migration information can be preset, so as to determine the priority of the target data migration protocol of the multiple target data migration protocols to be adopted according to the preset priority of the target migration information. For example, the backup migration information is preset as the first priority, the address migration information is preset as the second priority, and the update migration information is preset as the third priority, so that the priority of the data migration storage protocol is higher than that of the data migration control protocol and higher than that of the data migration access protocol.

[0051] It is also possible to set the target data migration protocol with the largest number of dynamic data corresponding to each target migration information as the highest priority, and the target data migration protocol with the smallest number of dynamic data corresponding to the migration information as the lowest priority, according to the number of multiple dynamic data corresponding to each target migration information. For example, there are 500 dynamic data corresponding to the backup migration information, 30 dynamic data corresponding to the address migration information, and 172 dynamic data corresponding to the update migration information, so that the data migration storage protocol is the first priority, the data migration access protocol is the second priority, and the data migration control protocol is the third priority.

[0052] It is also possible to pre-set the call priority weights and experience parameters of multiple target migration information, and then set multiple data size weights according to the storage volume occupied by multiple dynamic data corresponding to each target migration information, and then determine the emergency duration weight according to the duration of the emergency operation mode. The target weight corresponding to the target data migration protocol is calculated by multiplying the call priority weight, experience parameter, data size weight and emergency duration weight, and the priority of multiple target data migration protocols is determined according to the size of the target weight.

[0053] For example, the call priority weight of the backup migration information is preset to 0.7, the call priority weight of the address migration information is preset to 0.6, and the call priority weight of the update migration information is preset to 0.4. The empirical parameter of the backup migration information is set to 0.5, the empirical parameter of the address migration information is set to 0.3, and the empirical parameter of the update migration information is set to 0.4. The storage size occupied by the multiple dynamic data corresponding to the backup migration information is 500MB, the storage size occupied by the multiple dynamic data corresponding to the address migration information is 1000MB, and the storage size occupied by the multiple dynamic data corresponding to the update migration information is 800MB, so the data size weight of the multiple dynamic data corresponding to the backup migration information is 0.25, the data size weight of the multiple dynamic data corresponding to the address migration information is 0.7, and the data size weight of the multiple dynamic data corresponding to the backup migration information is 0.5. The current memory system is in emergency operation mode for 2 minutes, and the emergency duration weight is determined to be 0.6. Multiplying the above weights respectively, we get the target weight corresponding to the data migration storage protocol is 0.0525, the target weight corresponding to the data migration control protocol is 0.0756, and the target weight corresponding to the data migration location protocol is 0.048, thereby determining that the data migration control protocol is the first priority, the data migration storage protocol is the second priority, and the data migration access protocol is the third priority.

[0054] According to the embodiments of the present application, by determining the target data migration protocol priorities of multiple target data migration protocols, it is possible to flexibly meet the disaster recovery requirements of the memory system in different disaster recovery scenarios, thereby improving the flexibility and adaptability of the memory system, so that it can be widely used in various high-standard data-intensive scenarios.

[0055] According to an embodiment of the present application, the memory controller includes a data migration engine and a data migration protocol module. The data migration engine and the data migration protocol module are electrically connected. In the emergency operation mode, the power supply mode of the power supply monitoring module is configured by using the data migration engine, and then emergency operation information is generated according to multiple dynamic data and hard disk attribute information and sent to the central processing unit by calling the data migration access protocol interface, so that the central processing unit can quickly respond according to the current system status, generate and issue control instructions, and prepare for the migration and storage of multiple dynamic data.

[0056] According to an embodiment of the present application, after receiving the control instruction, the data migration engine sends it to the data migration protocol module. The data migration protocol module first determines the multiple first data migration protocols that need to be used according to the multiple target migration information in the control instruction, and then confirms the data consistency information in the current two storage areas by calling the data migration access protocol interface, thereby screening the multiple first data migration protocols according to the first storage consistency information, and removing the first data migration protocols of partial dynamic data and partial dynamic data that do not need to be backed up repeatedly, and obtaining the target data migration protocol. Then, based on the target migration information and dynamic data, determine the target data migration protocol priority of the multiple target data migration protocols. Therefore, the corresponding protocol interface can be called according to the priority to realize multi-protocol collaborative control, and under the multi-protocol collaborative control, multiple dynamic data can be migrated and stored, thereby reducing the risk of data loss of the memory system in disaster recovery scenarios and improving the preservation integrity of dynamic data and system configuration parameters.

[0057] According to an embodiment of the present application, the data migration engine is also used to configure and process multiple dynamic data and multiple target migration information according to multiple target data migration protocols and multiple target data migration protocol priorities, obtain multiple target dynamic data, and call the data migration storage protocol interface to store the multiple target dynamic data to the target solid-state drive.

[0058] Figure 3 A schematic diagram of a data migration engine according to an embodiment of the present application is shown.

[0059] like Figure 3 As shown, the data migration engine 201 includes a monitoring trigger submodule 301, a direct memory access submodule 302, a data compression mixed check submodule 303 and a storage queue management submodule 304. The data compression mixed check submodule 303 includes a streaming compression engine 3031 and a mixed check unit 3032. The direct memory access submodule 302 migrates multiple dynamic data from the dynamic random access memory 1031 to the data compression mixed check submodule 303, and the storage queue management submodule 304 stores multiple dynamic compressed data to the target solid state drive 203 respectively.

[0060] According to an embodiment of the present application, the monitoring triggering submodule is used to send multiple target migration information to the direct memory access submodule in response to receiving multiple target migration information.

[0061] The monitoring trigger submodule can also be used to receive cache data sent by the central processing unit. In the emergency operation mode, if the memory system is not down, the storage of cache data is suspended. If the memory system is down, the central processing unit will not send cache data to the data migration engine during the period of downtime of the memory system.

[0062] According to an embodiment of the present application, the direct memory access sub-module is electrically connected to the monitoring trigger sub-module, and is used to call multiple data migration protocol interfaces in sequence based on multiple target data migration protocols according to multiple target data migration protocol priorities, and migrate multiple dynamic data and multiple target migration information from the dynamic random access memory to the data compression mixed check sub-module.

[0063] The direct memory access submodule can be a dual-channel direct memory access submodule. One channel can migrate multiple target migration information to the data compression hybrid check submodule under lossless and zero-copy transmission conditions, and the other channel can call multiple data migration protocol interfaces in sequence according to the priorities of multiple target data migration protocols, and migrate multiple dynamic data to the data compression hybrid check submodule under lossless and zero-copy transmission conditions.

[0064] For example, the first priority is the data migration storage protocol, the second priority is the data migration access protocol, and there are currently 5 dynamic data. The target migration information of the first, second and fifth dynamic data are all backups, and the target migration information of the third and fourth dynamic data are all updates. According to the priorities of multiple target data migration protocols, one channel migrates the backup target migration information to the data compression mixed check submodule under the condition of lossless and zero copy transmission, and another channel calls the data migration storage protocol interface to migrate the first, second and fifth dynamic data to the data compression mixed check submodule under the condition of lossless and zero copy transmission. Then one channel migrates the update target migration information to the data compression mixed check submodule under the condition of lossless and zero copy transmission, and another channel calls the data migration access protocol interface to migrate the third and fourth dynamic data to the data compression mixed check submodule under the condition of lossless and zero copy transmission.

[0065] According to an embodiment of the present application, the direct memory access submodule is also used to call the data migration access protocol interface to transmit multiple verification information for multiple dynamic data to the data compression hybrid verification submodule, wherein the verification information includes a first redundant verification code and a first linear grouping code.

[0066] In addition to storing multiple dynamic data, the dynamic random access memory can also store verification information corresponding to the dynamic data, so that when the dynamic data is migrated and stored in the solid-state drive, the verification information can be used to verify the data migrated to the target solid-state drive to ensure that the data stored in the target solid-state drive is consistent with the data in the dynamic random access memory.

[0067] According to an embodiment of the present application, the data compression hybrid check submodule is used to compress and check multiple dynamic data and multiple target migration information to obtain multiple target dynamic data.

[0068] According to an embodiment of the present application, the data compression hybrid check submodule includes a streaming compression engine and a hybrid check unit.

[0069] According to an embodiment of the present application, the streaming compression engine is electrically connected to the direct memory access submodule, and is used to perform compression processing on multiple dynamic data to obtain multiple dynamic compressed data.

[0070] The compression method may include LZ4 compression, but is not limited to the above compression methods.

[0071] According to an embodiment of the present application, a hybrid verification unit is electrically connected to a streaming compression engine, and is used to verify multiple dynamic compressed data using multiple verification information to obtain a verification result; when the verification result indicates that the verification has passed, the multiple dynamic compressed data and multiple target migration information are packaged and processed separately to obtain multiple target dynamic data.

[0072] According to an embodiment of the present application, the hybrid check unit is also used to obtain a first intermediate check result based on multiple first redundant check codes and multiple second redundant check codes obtained by performing cyclic redundancy check on multiple dynamic compressed data respectively; when the first intermediate check result indicates that the check is passed, the first intermediate check result is used as the check result.

[0073] If the first redundant check code and the second redundant check code are consistent, the first intermediate check result is confirmed as passed. If the first redundant check code and the second redundant check code are inconsistent, the first intermediate check result is confirmed as failed.

[0074] According to an embodiment of the present application, the hybrid check unit is also used for: when the first intermediate check result indicates that the check fails: according to multiple first linear block codes and multiple second linear block codes obtained by performing finite field checks on multiple dynamic compressed data respectively, error correction processing is performed on multiple dynamic compressed data to obtain multiple dynamic corrected data; according to the third redundant check code and the first redundant check code obtained by performing cyclic redundancy checks on the multiple dynamic corrected data respectively, a second intermediate check result is obtained, and the second intermediate check result is used as the check result.

[0075] When the first intermediate check result indicates that the check fails, the first linear block code and the second linear block code are usually inconsistent. Therefore, based on the first linear block code, the error correction operation in the finite field check is used to correct the dynamic compressed data, thereby obtaining dynamically corrected data.

[0076] When the third redundant check code is consistent with the first redundant check code, it is determined that both the second intermediate check result and the check result have passed the check. When the third redundant check code is inconsistent with the first redundant check code, it is determined that both the second intermediate check result and the check result have failed the check, and the abnormal dynamic correction data is kicked out of the multiple dynamic data to be migrated to ensure that the correct multiple dynamic compressed data can continue to be migrated and stored. At the same time, the abnormal dynamic correction data and the original dynamic compression data corresponding to the abnormal dynamic correction data can be temporarily stored with the mixed verification generation unit. After all the dynamic compression data are normally migrated to the storage queue management submodule, according to the predetermined error correction round, the abnormal dynamic correction data and the original dynamic compression data corresponding to the abnormal dynamic correction data are subjected to error correction processing again.

[0077] In the process of verifying each dynamic compressed data, multiple first intermediate verification results and multiple second intermediate verification results can be obtained. According to each first intermediate verification result and each second intermediate verification result, the dynamic compressed data is released to the storage queue management submodule one by one, so that it is not necessary to wait for multiple dynamic compressed data to pass the verification before transmitting to the storage queue management submodule, thereby improving processing efficiency.

[0078] According to the embodiment of the present application, by combining multiple verification methods, the first redundant check code and the first linear block code are used to verify the correctness of the dynamic compressed data transmitted to the hybrid check generation unit. In the case of failure of the verification using the first redundant check code, the first linear block code is used to perform error correction based on the finite field check, so that the erroneous dynamic data can be corrected back to the dynamic data consistent with the dynamic data stored in the dynamic random access memory. In order to store the correct dynamic compressed data in the target solid-state drive, reduce the risk of data loss in the memory system in the disaster recovery scenario, and improve the preservation integrity and correctness of the dynamic data and system configuration parameters.

[0079] According to an embodiment of the present application, the data migration engine also includes a storage queue management submodule.

[0080] According to an embodiment of the present application, the storage queue management submodule is used to respond to receiving multiple target dynamic data from the data compression hybrid check submodule, and store multiple dynamic compressed data in multiple predetermined storage spaces of the target solid-state hard disk according to multiple target migration information.

[0081] Figure 4 A schematic diagram of a solid state drive according to an embodiment of the present application is shown.

[0082] like Figure 4As shown, each solid state drive 1032 may include multiple predetermined storage spaces, including a configuration storage space 401, an address storage space 402, and a data storage space 403. Among them, the configuration storage space 401 can be used to store configuration information such as address allocation, mode configuration, and application form of the memory controller, the address storage space 402 can be used to store information such as the source address, target address, and transmission ID routing of cached data, and the data storage space 403 is used to store cached data and dynamic data.

[0083] The plurality of predetermined storage spaces may include a configuration storage space, an address storage space, and a data storage space, but are not limited to the above storage spaces.

[0084] The storage queue management submodule can be used to store multiple dynamic compressed data corresponding to the configuration migration information into the configuration storage space; store multiple dynamic compressed data corresponding to the address migration information into the address storage space; and store multiple dynamic compressed data corresponding to the backup migration information into the data storage space.

[0085] According to the embodiment of the present application, by pre-dividing the storage space in the solid-state drive according to the function of the solid-state drive, the write scheduling and channel allocation of the solid-state drive are optimized, so that the solid-state drive can be better managed and controlled. Combined with the queue characteristics of the storage queue management submodule, multiple dynamic data can be stored in the corresponding predetermined storage space in an orderly and efficient manner, thereby improving the efficiency of migration storage.

[0086] According to the embodiments of the present application, through the pipelined collaboration between multiple sub-modules and units within the data migration engine, combined with the collaborative control between multiple protocols, lossless migration of 128GB-level dynamic data can be achieved within 300ms, extending the backup time window of dynamic data and improving the effective throughput of the memory system.

[0087] According to an embodiment of the present application, the memory controller may further include a data migration confirmation module.

[0088] According to an embodiment of the present application, a data migration confirmation module is used to call a data migration access protocol interface to perform consistency confirmation on multiple dynamic data stored in a dynamic random access memory and multiple non-volatile data stored in a target solid-state drive to obtain second storage consistency information; when the second storage consistency information indicates storage consistency, the emergency operation mode is switched to a suspended operation mode, wherein the suspended operation mode indicates freezing multiple dynamic data migrations and maintaining the physical layer training state between the memory system and the central processing unit.

[0089] After all dynamic data in the emergency operation mode is migrated and stored in the target solid-state drive, the operation mode of the memory system needs to be switched to the suspended operation mode, freezing multiple dynamic data migrations, and only maintaining the physical layer training state between the memory system and the central processor, retaining basic parameters such as equalization parameters and bit error rate, and reducing the power consumption of the memory system while waiting for the host to restart and wake up. Therefore, it is necessary to use the data migration confirmation module to once again confirm the consistency of the data stored in the target solid-state drive and the dynamic random access memory at this time. If the second storage consistency information indicates that the storage is consistent, it indicates that the dynamic data in the dynamic random access memory has been backed up and stored in the target solid-state drive. If the second storage consistency information indicates that the storage is inconsistent, the memory system needs to maintain the emergency operation mode until the second storage consistency information indicates that the storage is consistent and enters the suspended operation mode.

[0090] According to an embodiment of the present application, the memory controller is also used to call multiple data migration protocol interfaces to store cache data from the central processing unit into multiple dynamic random access memories and / or multiple solid-state hard drives when the operating mode is the normal operating mode.

[0091] When the operation mode of the memory system is the normal operation mode, multiple data migration protocol interfaces can be called simultaneously, and functions required for multiple data processing can be performed simultaneously, and various data channels can be reserved.

[0092] Figure 5 A schematic diagram of an enabling controller according to an embodiment of the present application is shown.

[0093] like Figure 5 As shown, the memory system further includes an enabling controller 501 , which is electrically connected to the memory controller 102 and the power supply monitoring module 101 , and the central processing unit 105 is electrically connected to the memory controller 102 .

[0094] According to an embodiment of the present application, the enable controller is electrically connected to the memory controller and the power supply monitoring module, and is used to send an enable signal or an interrupt signal to the power supply monitoring module in response to the operating mode to control the power supply monitoring module to switch to normal power supply mode or emergency power supply mode.

[0095] In normal operation mode, the memory controller controls the enable controller to send an enable signal to the power supply monitoring module, so that the memory system is powered by the motherboard voltage of the motherboard power interface. In emergency operation mode, the memory controller controls the enable controller to send an enable signal or an interrupt signal to the power supply monitoring module, so that the memory system is powered by the motherboard voltage of the motherboard power interface or by the backup power submodule in the power supply monitoring module.

[0096] According to an embodiment of the present application, the mainboard power supply parameter includes a mainboard voltage, and the emergency power supply mode may include a first emergency power supply mode and a second emergency power supply mode.

[0097] According to an embodiment of the present application, the memory controller is also used to control the enable controller to send an enable signal to the power supply monitoring module when the mainboard voltage is greater than a first preset voltage threshold and the heartbeat information is greater than a first heartbeat threshold, so that the power supply monitoring module switches to the first emergency power supply mode.

[0098] According to an embodiment of the present application, the memory controller is also used to control the enable controller to send an interrupt signal to the power supply monitoring module when the mainboard voltage is less than a second preset voltage threshold, so that the power supply monitoring module switches to a second emergency power supply mode, wherein the first preset voltage threshold is greater than the second preset voltage threshold.

[0099] According to an embodiment of the present application, the memory controller is also used to: when the mainboard voltage is greater than a first preset voltage threshold and the heartbeat information is less than a first heartbeat threshold, control the enable controller to send an interrupt signal to the power supply monitoring module so that the power supply monitoring module switches to normal power supply mode.

[0100] The first preset voltage threshold may be 11.5V, the second preset voltage threshold may be 10.8V, and the first heartbeat threshold may be 30ms.

[0101] When the motherboard voltage is greater than the first preset voltage threshold and the heartbeat information is greater than the first heartbeat threshold, the first emergency power supply mode is powered by the motherboard voltage of the motherboard power interface. When the motherboard voltage is less than the second preset voltage threshold, the second emergency power supply mode is powered by the backup power submodule in the power supply monitoring module.

[0102] When the motherboard voltage is less than the first preset voltage threshold and greater than the second preset voltage threshold, the operation mode of the memory system is still the normal operation mode, and the motherboard power supply parameters can be sent to the memory controller. The memory controller can pay close attention to and monitor the motherboard voltage at this time, so as to quickly retrieve multiple dynamic data and hard disk attribute information of the solid state drive when the operation mode is switched to the emergency operation mode.

[0103] As long as either the heartbeat information is greater than the first heartbeat threshold and the motherboard voltage is less than the second preset voltage threshold, it can be determined that the current memory system enters the emergency operation mode, and then the current emergency power supply mode can be further determined based on the motherboard voltage of the motherboard power interface.

[0104] The operation mode includes a normal operation mode, an emergency operation mode and a suspended operation mode as shown in Table 1.

[0105] Table 1

[0106]

[0107] Figure 6 A schematic diagram of a power supply monitoring module according to an embodiment of the present application is shown.

[0108] like Figure 6 As shown, the power supply monitoring module 101 includes a monitoring sub-module 601, a charging and discharging electronic module 602, a backup power sub-module 603 and a power conversion sub-module 604. The monitoring sub-module 601 is electrically connected to the mainboard power interface 104, the charging and discharging electronic module 602 is electrically connected to the monitoring sub-module 601, the backup power sub-module 603, the enabling controller 401 and the memory controller 102, the backup power sub-module 603 is electrically connected to the charging and discharging electronic module 602, and the power conversion sub-module 604 is electrically connected to the charging and discharging electronic module 602, the monitoring sub-module 601, the memory controller 102 and the memory module 103.

[0109] According to an embodiment of the present application, the monitoring submodule is electrically connected to the mainboard power interface and is used to monitor the mainboard voltage. When the mainboard voltage is greater than a first preset voltage threshold, the monitoring submodule connects the electrical connection between the mainboard power interface and the charging and discharging electronic module; when the mainboard voltage is less than a second preset voltage threshold, the monitoring submodule disconnects the electrical connection between the mainboard power interface and the charging and discharging electronic module.

[0110] The mainboard voltage and mainboard current can be monitored in the monitoring submodule, and a switch can be provided in the monitoring submodule. When the mainboard voltage is greater than the first preset voltage threshold, the switch is turned on to connect the mainboard power interface with the charging and discharging electronic module. When the mainboard voltage is less than the second preset voltage threshold, the switch is turned off to disconnect the mainboard power interface from the charging and discharging electronic module.

[0111] According to an embodiment of the present application, the charging and discharging electronic module is electrically connected to the monitoring submodule and the backup power submodule, and is used to be in a charging state or a discharging state in response to the electrical connection state between the mainboard power interface and the charging and discharging electronic module.

[0112] Figure 7 A schematic diagram of a charging and discharging electronic module according to an embodiment of the present application is shown.

[0113] like Figure 7 As shown, the charging and discharging electronic module 602 includes a power switching unit 701, an interaction unit 702 and a power dynamic adjustment unit 703. The power switching unit 701 is electrically connected to the monitoring submodule 601, the backup power submodule 603 and the power conversion submodule 604, the interaction unit 702 is electrically connected to the enabling controller 401 and the memory controller 102, and the power dynamic adjustment unit 703 is electrically connected to the power switching unit 701.

[0114] According to an embodiment of the present application, the power switching unit is electrically connected to the monitoring sub-module and the backup power sub-module, and is used to be in a normal power supply mode or a first emergency power supply mode when the mainboard power interface is connected to the charging and discharging electronic module, and to control the mainboard voltage to supply power to the memory controller; when the mainboard power interface is disconnected from the charging and discharging electronic module, it is in a second emergency power supply mode, and to control the backup power sub-module to supply power to the memory controller.

[0115] When the mainboard power interface is connected to the charging and discharging electronic module, the first terminal VIN0 of the power switching unit receives the mainboard voltage, VIN0 is pulled high to 1, and the second terminal VIN1 is pulled low to 0, so that in the normal power supply mode or the first emergency power supply mode, the power switching unit outputs the mainboard voltage. At the same time, in response to the charging state configuration instruction transmitted by the interactive unit, the power switching unit is configured to the charging state, and the output mainboard voltage is used to charge the backup power submodule, and the mainboard power interface directly sends the mainboard voltage to the power conversion submodule, so that the power conversion submodule can convert the mainboard voltage.

[0116] When the mainboard power interface is disconnected from the charging and discharging electronic module, the first terminal VIN0 of the power switching unit is pulled down to 0, the memory controller configures the backup power submodule to the discharge state, the backup power submodule supplies power to the power switching unit, and the second terminal VIN1 is pulled up to 1, so that in the second emergency power supply mode, the power switching unit outputs the power supply voltage. At the same time, in response to the discharge state configuration instruction transmitted by the interactive unit, the power switching unit is configured to the discharge state, and the backup power submodule and the power switching unit are used to send the power supply voltage to the power conversion submodule, so that the power conversion submodule can convert the power supply voltage.

[0117] According to an embodiment of the present application, the interaction unit is electrically connected to the enable controller and the memory controller, and is used to provide an enable signal or interrupt signal from the enable controller and a charge and discharge status configuration instruction from the memory controller to the power switching unit, and to provide the input voltage and output voltage of the power switching unit to the memory controller.

[0118] The memory controller sends the charge and discharge state configuration instructions and the voltage and current limiting configuration instructions of the power switching unit to the interactive unit according to the configuration parameters of the monitoring submodule and the configuration parameters of the backup power submodule transmitted through the integrated circuit bus protocol or the system management bus protocol, and controls the enable controller to send an enable signal or an interrupt signal to the interactive unit. After receiving the charge and discharge state configuration instructions and the enable signal or the interrupt signal, the interactive unit sends them to the power switching unit so that the power switching unit switches the charge and discharge state, the on and off of the first end VIN0, and the on and off of the second end VIN1. Then, after the power switching unit is configured, the configuration parameters at this time can be sent to the memory controller through the interactive unit. Among them, when the operating mode is the emergency operating mode, the serializer driving current is reduced to 30% of the normal value, which can be achieved by the memory controller sending the corresponding voltage and current limiting configuration instructions to the interactive unit.

[0119] According to an embodiment of the present application, the power dynamic adjustment unit is electrically connected to the power switching unit and is used to dynamically adjust the input voltage and the output voltage to stabilize the input voltage and the output voltage.

[0120] When the motherboard power interface is connected to the charging and discharging electronic module, the power dynamic adjustment unit can dynamically adjust the input motherboard voltage and the output motherboard voltage. When the motherboard power interface is disconnected from the charging and discharging electronic module, the power dynamic adjustment unit can dynamically adjust the input power supply voltage and the output power supply voltage.

[0121] According to an embodiment of the present application, the backup power submodule is electrically connected to the charge-discharge electronic module, and is used to supply power to the memory controller in response to the charge-discharge electronic module being in a discharge state.

[0122] The backup power submodule may be a battery module.

[0123] When the motherboard voltage is less than the second preset voltage threshold, the standby power submodule in the discharging state and the charge-discharge electronic module in the discharging state are used to jointly supply power to the memory system to maintain the memory system to retain only the power required for data migration.

[0124] The power conversion submodule is electrically connected to the monitoring submodule, the charge and discharge electronic module, the memory controller and the memory module, and is used to convert the motherboard voltage or the power supply voltage to obtain output voltages of various specifications and magnitudes to supply power to different hardware components. For example, it can output 12V DC voltage, 1.2V DC voltage, 1.1V DC voltage, and 0.6V DC voltage, and use the 12V DC voltage to supply power to the memory controller, and use the 1.2V DC voltage to supply power to the memory module.

[0125] Figure 8A flow chart of a memory system disaster recovery control method according to an embodiment of the present application is shown.

[0126] like Figure 8 As shown, the memory system disaster recovery control method of this embodiment includes operations S810 to S840.

[0127] In operation S810, a mainboard power supply parameter of a mainboard power interface is obtained.

[0128] In operation S820, an operation mode of the memory system is determined according to the mainboard power supply parameter and the heartbeat information of the memory system.

[0129] In operation S830, when the operation mode is the emergency operation mode and a control instruction is received from the central processing unit, a plurality of target data migration protocol information is determined according to the control instruction and a plurality of dynamic data stored in the dynamic random access memory.

[0130] In operation S840, a plurality of data migration protocol interfaces are respectively called according to a plurality of target data migration protocol information to migrate a plurality of dynamic data from the dynamic random access memory to the target solid state drive.

[0131] After multiple dynamic data are migrated from the dynamic random access memory to the target solid state drive, the consistency of the data in the dynamic random access memory and the target solid state drive is confirmed. After the consistency is confirmed, the operation mode of the memory system is switched to the suspended operation mode.

[0132] According to an embodiment of the present application, the motherboard power supply parameters of the motherboard power interface are first obtained, and then the operating mode of the memory system is determined according to the motherboard power supply parameters and the heartbeat information of the memory system. When a failure occurs in the memory system, the operating mode is switched to the emergency operating mode and a control instruction from the central processing unit is received. According to the control instruction and the multiple dynamic data stored in the dynamic random access memory, multiple target data migration protocol information is determined. Based on the multiple target data migration protocol information, multiple data migration protocol interfaces are called respectively to migrate multiple dynamic data from the dynamic random access memory to the target solid-state hard disk. The operating mode of the memory system is quickly switched by real-time monitoring of the motherboard power supply parameters and heartbeat information, and the switching of the power supply unit is configured to achieve nanosecond power switching, dynamically adjust the memory control protocol under different operating conditions, ensure data integrity while reducing power consumption. Compared with the prior art, the data loss risk of the present application can be reduced by 90%.

[0133] Fig. 9 A block diagram of an electronic device suitable for implementing a memory system disaster recovery control method according to an embodiment of the present application is shown.

[0134] like Fig. 9As shown, the electronic device according to the embodiment of the present application includes a processor 901, which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 902 or the program loaded from the storage part 908 to the random access memory (RAM) 903. The processor 901 may include, for example, a general-purpose microprocessor (such as a CPU), an instruction set processor and / or a related chipset and / or a special-purpose microprocessor (for example, an application-specific integrated circuit (ASIC)), etc. The processor 901 may also include an onboard memory for caching purposes. The processor 901 may include a single processing unit or multiple processing units for performing different actions of the method flow according to the embodiment of the present application.

[0135] In RAM 903, various programs and data required for the operation of the electronic device are stored. The processor 901, ROM 902 and RAM 903 are connected to each other via a bus 904. The processor 901 performs various operations of the method flow according to the embodiment of the present application by executing the program in ROM 902 and / or RAM 903. It should be noted that the program can also be stored in one or more memories other than ROM 902 and RAM 903. The processor 901 can also perform various operations of the method flow according to the embodiment of the present application by executing the program stored in the one or more memories.

[0136] According to an embodiment of the present application, the electronic device may further include an input / output (I / O) interface 905, which is also connected to the bus 904. The electronic device 900 may further include one or more of the following components connected to the input / output (I / O) interface 905: an input portion 906 including a keyboard, a mouse, etc.; an output portion 907 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage portion 908 including a hard disk, etc.; and a communication portion 909 including a network interface card such as a LAN card, a modem, etc. The communication portion 909 performs communication processing via a network such as the Internet. A drive 910 is also connected to the input / output (I / O) interface 905 as needed. A removable medium 911, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 910 as needed, so that a computer program read therefrom is installed into the storage portion 908 as needed.

[0137] The present application also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or may exist independently without being assembled into the device / apparatus / system. The above computer-readable storage medium carries one or more programs, and when the above one or more programs are executed, the method according to the embodiment of the present application is implemented.

[0138] According to an embodiment of the present application, the computer-readable storage medium may be a non-volatile computer-readable storage medium, for example, it may include but is not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, the computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, an apparatus or a device. For example, according to an embodiment of the present application, the computer-readable storage medium may include the ROM 902 and / or RAM 903 described above and / or one or more memories other than ROM 902 and RAM 903.

[0139] The embodiment of the present application also includes a computer program product, which includes a computer program, and the computer program includes a program code for executing the method shown in the flowchart. When the computer program product is run in a computer system, the program code is used to enable the computer system to implement the memory system disaster recovery control method provided in the embodiment of the present application.

[0140] The computer program executes the above functions defined in the system / device of the embodiment of the present application when the processor 901 executes the computer program. According to the embodiment of the present application, the system, device, module, unit, etc. described above can be implemented by a computer program module.

[0141] In one embodiment, the computer program may be based on a tangible storage medium such as an optical storage device, a magnetic storage device, etc. In another embodiment, the computer program may also be transmitted and distributed in the form of a signal on a network medium, and downloaded and installed through the communication part 909, and / or installed from a removable medium 911. The program code contained in the computer program may be transmitted using any appropriate network medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0142] In such an embodiment, the computer program can be downloaded and installed from the network through the communication part 909, and / or installed from the removable medium 911. When the computer program is executed by the processor 901, the above functions defined in the system of the embodiment of the present application are performed. According to the embodiment of the present application, the system, device, means, module, unit, etc. described above can be implemented by a computer program module.

[0143] According to an embodiment of the present application, the program code for executing the computer program provided by the embodiment of the present application can be written in any combination of one or more programming languages, and specifically, these computing programs can be implemented using high-level process and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, such as Java, C++, python, "C" language or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on the remote computing device, or completely on the remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (e.g., using an Internet service provider to connect through the Internet).

[0144] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the above-mentioned module, program segment or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flow chart, and the combination of the boxes in the block diagram or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0145] It will be appreciated by those skilled in the art that the features described in the various embodiments of the present application may be combined and / or combined in a variety of ways, even if such combinations or combinations are not explicitly described in the present application. In particular, without departing from the spirit and teachings of the present application, the features described in the various embodiments of the present application may be combined and / or combined in a variety of ways. All of these combinations and / or combinations fall within the scope of the present application.

[0146] The embodiments of the present application are described above. However, these embodiments are only for the purpose of illustration, and are not intended to limit the scope of the present application. Although each embodiment is described above, this does not mean that the measures in each embodiment cannot be used in combination advantageously. Without departing from the scope of the present application, those skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present application.

Claims

1. A memory system, characterized in that: The memory system comprises: The power supply monitoring module is used to monitor the mainboard power supply parameters of the mainboard power interface; A memory controller is electrically connected to the power supply monitoring module, and the memory controller is used to: Determining an operation mode of the memory system according to the mainboard power supply parameters from the power supply monitoring module and the heartbeat information of the memory system; In the case where the operation mode is an emergency operation mode and a control instruction from a central processing unit is received, determining a plurality of target data migration protocol information according to the control instruction and a plurality of dynamic data stored in a dynamic random access memory; According to the plurality of target data migration protocol information, the plurality of data migration protocol interfaces of the memory controller are respectively called to migrate the plurality of dynamic data from the dynamic random access memory to a target solid state drive among the plurality of solid state drives.

2. The system according to claim 1, characterized in that The target data migration protocol information includes the target data migration protocol and the target data migration protocol priority; The memory controller comprises: a data migration engine, electrically connected to the central processing unit, for sending an emergency power supply mode configuration instruction to the power supply monitoring module according to the emergency operation mode; in response to the power supply monitoring module being configured in the emergency power supply mode, generating emergency operation information according to the plurality of dynamic data and the hard disk attribute information of the solid state disk, and calling a data migration access protocol interface to send the emergency operation information to the central processing unit; and calling a data migration control protocol interface to receive the control instruction generated by the central processing unit in response to the emergency operation information, the control instruction including a plurality of target migration information and target solid state disk information; and The data migration protocol module is electrically connected to the data migration engine and is used to determine a plurality of target data migration protocols and a plurality of target data migration protocol priorities for a plurality of the dynamic data according to a plurality of the target migration information.

3. The system according to claim 2, characterized in that The data migration protocol module is also used for: Determining a plurality of first data migration protocols for a plurality of the dynamic data according to the plurality of the target migration information; Calling the data migration access protocol interface to perform consistency confirmation on the plurality of dynamic data stored in the dynamic random access memory and the non-volatile data stored in the target solid state drive to obtain first storage consistency information; Determining a plurality of target data migration protocols according to the first storage consistency information and the first data migration protocol; The target data migration protocol priorities of the target data migration protocols are determined according to the target migration information and the dynamic data.

4. The system according to claim 2, characterized in that The data migration engine is also used for: According to the multiple target data migration protocols and the multiple target data migration protocol priorities, the multiple dynamic data and the multiple target migration information are configured and processed to obtain multiple target dynamic data, and the data migration storage protocol interface is called to store the multiple target dynamic data to the target solid state drive.

5. The system according to claim 4, characterized in that The data migration engine includes: a monitoring triggering submodule, configured to send the plurality of target migration information to the direct memory access submodule in response to receiving the plurality of target migration information; a direct memory access submodule, electrically connected to the monitoring trigger submodule, and configured to sequentially call a plurality of data migration protocol interfaces based on a plurality of target data migration protocols according to a plurality of target data migration protocol priorities, and migrate a plurality of dynamic data and a plurality of target migration information from the dynamic random access memory to a data compression hybrid check submodule; The data compression and mixed verification submodule is used to compress and verify the multiple dynamic data and the multiple target migration information to obtain the multiple target dynamic data.

6. The system according to claim 5, characterized in that The direct memory access submodule is also used for: The data migration access protocol interface is called to transmit a plurality of check information for the plurality of dynamic data to the data compression hybrid check submodule, wherein the check information includes a first redundant check code and a first linear block code.

7. The system according to claim 5, characterized in that The data compression mixed syndrome submodule comprises: A stream compression engine, electrically connected to the direct memory access submodule, for compressing the plurality of dynamic data to obtain a plurality of dynamic compressed data; A hybrid verification unit is electrically connected to the streaming compression engine and is used to verify the multiple dynamic compressed data using multiple verification information to obtain a verification result; when the verification result indicates that the verification is passed, the multiple dynamic compressed data and the multiple target migration information are packaged and processed separately to obtain multiple target dynamic data.

8. The system according to claim 7, characterized in that The hybrid verification unit is also used for: Obtaining a first intermediate check result according to the plurality of first redundant check codes and the plurality of second redundant check codes obtained by performing cyclic redundancy check on the plurality of dynamic compressed data respectively; When the first intermediate verification result indicates that the verification has passed, the first intermediate verification result is used as the verification result.

9. The system according to claim 8, characterized in that The hybrid verification unit is further configured to: if the first intermediate verification result indicates that the verification fails: According to the plurality of first linear block codes and the plurality of second linear block codes obtained by respectively performing finite field checks on the plurality of dynamic compressed data, error correction processing is performed on the plurality of dynamic compressed data to obtain a plurality of dynamic corrected data; A second intermediate check result is obtained according to a third redundant check code and the first redundant check code obtained by performing cyclic redundancy check on the plurality of the dynamic correction data respectively, and the second intermediate check result is used as the check result.

10. The system according to claim 5, characterized in that The data migration engine also includes: The storage queue management submodule is used to respond to receiving the multiple target dynamic data from the data compression hybrid check submodule, and store the multiple dynamic compressed data respectively in the multiple predetermined storage spaces of the target solid state drive according to the multiple target migration information.

11. The system according to claim 1, characterized in that The memory controller further includes: A data migration confirmation module is used to call a data migration access protocol interface to perform consistency confirmation on multiple dynamic data stored in the dynamic random access memory and multiple non-volatile data stored in the target solid-state drive to obtain second storage consistency information; when the second storage consistency information indicates storage consistency, the emergency operation mode is switched to a suspended operation mode, wherein the suspended operation mode indicates freezing the migration of multiple dynamic data and maintaining the physical layer training state between the memory system and the central processing unit.

12. The system according to claim 1, characterized in that The memory controller is further configured to: When the operation mode is a normal operation mode, a plurality of the data migration protocol interfaces are called to store the cache data from the central processing unit into the dynamic random access memory or the solid state drive.

13. The system according to claim 1, characterized in that The memory system further includes: An enable controller is electrically connected to the memory controller and the power supply monitoring module, and is used to send an enable signal or an interrupt signal to the power supply monitoring module in response to the operating mode to control the power supply monitoring module to switch to a normal power supply mode or an emergency power supply mode.

14. The system according to claim 13, characterized in that The mainboard power supply parameter includes a mainboard voltage, and the emergency power supply mode includes a first emergency power supply mode and a second emergency power supply mode; The memory controller is also used to: when the mainboard voltage is greater than a first preset voltage threshold and the heartbeat information is greater than the first heartbeat threshold, control the enable controller to send the enable signal to the power supply monitoring module so that the power supply monitoring module switches to the first emergency power supply mode; when the mainboard voltage is less than a second preset voltage threshold, control the enable controller to send the interrupt signal to the power supply monitoring module so that the power supply monitoring module switches to the second emergency power supply mode, wherein the first preset voltage threshold is greater than the second preset voltage threshold.

15. The system according to claim 14, characterized in that The memory controller is further configured to: When the mainboard voltage is greater than the first preset voltage threshold and the heartbeat information is less than the first heartbeat threshold, the enabling controller is controlled to send the interrupt signal to the power supply monitoring module so that the power supply monitoring module switches to the normal power supply mode.

16. The system according to claim 1, characterized in that The power supply monitoring module comprises: A monitoring submodule, electrically connected to the mainboard power interface, and used to monitor the mainboard voltage. When the mainboard voltage is greater than a first preset voltage threshold, the monitoring submodule connects the mainboard power interface to the charging and discharging electronic module; when the mainboard voltage is less than a second preset voltage threshold, the monitoring submodule disconnects the mainboard power interface from the charging and discharging electronic module. A charging and discharging electronic module, electrically connected to the monitoring submodule and the backup power submodule, and configured to be in a charging state or a discharging state in response to the electrical connection state between the mainboard power interface and the charging and discharging electronic module; The backup power submodule is electrically connected to the charge-discharge electronic module and is used to supply power to the memory controller in response to the charge-discharge electronic module being in the discharge state.

17. The system according to claim 16, characterized in that The charging and discharging electronic module comprises: A power switching unit is electrically connected to the monitoring submodule and the backup power submodule, and is used to control the motherboard voltage to supply power to the memory controller in a normal power supply mode or a first emergency power supply mode when the motherboard power interface is connected to the charging and discharging electronic module; and in a second emergency power supply mode when the motherboard power interface is disconnected from the charging and discharging electronic module, and control the backup power submodule to supply power to the memory controller; An interaction unit is electrically connected to the enable controller and the memory controller, and is used to provide the enable signal or interrupt signal from the enable controller and the charge and discharge state configuration instruction from the memory controller to the power switching unit, and to provide the input voltage and output voltage of the power switching unit to the memory controller.

18. The system according to claim 17, characterized in that The charging and discharging electronic module also includes a power supply dynamic adjustment unit; The power dynamic adjustment unit is electrically connected to the power switching unit and is used to dynamically adjust the input voltage and the output voltage to stabilize the input voltage and the output voltage.

19. A memory system disaster recovery control method applied to the memory system of any one of claims 1-18, characterized in that: include: Get the motherboard power supply parameters of the motherboard power interface; Determining an operating mode of the memory system according to the mainboard power supply parameters and the heartbeat information of the memory system; In the case where the operation mode is an emergency operation mode and a control instruction from a central processing unit is received, determining a plurality of target data migration protocol information according to the control instruction and a plurality of dynamic data stored in a dynamic random access memory; According to the plurality of target data migration protocol information, a plurality of data migration protocol interfaces are respectively called to migrate the plurality of dynamic data from the dynamic random access memory to the target solid state drive.

20. An electronic device, comprising: one or more processors; a memory for storing one or more computer programs, The method according to claim 19 is characterized in that the one or more processors execute the one or more computer programs to implement the method according to claim 19.

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