Semiconductor device

Abstract

A multi-finger transistor having a plurality of control electrodes (2), a plurality of first electrodes (3), and a plurality of second electrodes (4) is formed on a semiconductor substrate (1). The resin films (14, 15) cover the transistors. First wirings (8) that electrically connect the plurality of first electrodes (3) to each other are formed on the resin films (14, 15). Resin films (14, 15) cover contact portions between the first wiring (8) and the plurality of first electrodes (3). A hollow structure (16) sealed by resin films (14, 15) is formed around the plurality of control electrodes (2) and the plurality of second electrodes (4).

Description

[0001] This application is based on Chinese national application No. 201780089183.0 filed on September 27, 2019

[0002] This application is a divisional application of (PCT / JP2017 / 014100) (semiconductor device and method for manufacturing the same), and its contents are cited below. Technical Field

[0003] The present invention relates to a semiconductor device having a hollow structure sealed by a resin film. Background Art

[0004] High electron mobility transistors (HEMTs) made of compound semiconductors have excellent high-frequency characteristics and low noise, so they are used in amplifiers for micrometer and millimeter waves. In order to improve the high-frequency characteristics of HEMTs, it is necessary to reduce the cutoff frequency (f T ) and maximum operating frequency (f max ) to improve. T and f max , increasing the mutual conductance and reducing the electrostatic capacitance between the gate electrode and the source electrode are effective means.

[0005] On the other hand, it has been reported that, in the case of HEMTs to which chip-level packaging technology is applied, since the resin film is filled under the eaves of the Y-shaped gate, the electrostatic capacitance increases and the high-frequency characteristics deteriorate (for example, refer to non-patent document 1). In order to solve this problem, it is known to remove the resin film around the gate electrode as a means for preventing the degradation of high-frequency characteristics (for example, refer to patent documents 1 to 3). In addition, in addition to forming a hollow structure around the gate electrode, in order to suppress the increase in capacitance as much as possible, a transistor and a manufacturing method thereof in which the hollow structure is extended to the source and drain electrodes are proposed (for example, refer to patent documents 4 and 5).

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 05-335343

[0007] Patent Document 2: Japanese Patent Application Publication No. 2015-046445

[0008] Patent Document 3: Japanese Patent Application Publication No. 2016-039319

[0009] Patent Document 4: Japanese Patent Application Publication No. 2014-209522

[0010] Patent Document 5: Japanese Patent Application Publication No. 2009-176930

[0011] Non-patent document 1: T. Hisaka1, H. Sasaki1, T. Katoh1, K. Kanaya1, N. Yoshida1, AA Villanueva, and JA del Alamo, IEICE Electronics Express, Vol. 7, No. 8, P. 558-562 Summary of the invention

[0012] However, in the structure where the resin film is not formed on the entire transistor, there is a problem that chemicals such as resists or inorganic aqueous solutions used in subsequent processes enter the hollow structure from the gap between the resin film and the electrode. In addition, in the case of semiconductor devices using wafer-level packaging technology, the wiring parts other than the transistor are covered with the resin film, and the electrostatic capacitance of the entire device increases. As a result, there is a problem that high-frequency characteristics such as gain and noise characteristics deteriorate.

[0013] The present invention is made to solve the above-mentioned problems, and its object is to obtain a semiconductor device and a manufacturing method thereof which can prevent chemicals from entering the hollow structure, reduce the electrostatic capacitance and improve the high-frequency characteristics.

[0014] The semiconductor device involved in the present invention is characterized in that it comprises: a semiconductor substrate; a multi-finger transistor formed on the semiconductor substrate and having multiple control electrodes, multiple first electrodes and multiple second electrodes; a resin film covering the transistor; and a first wiring formed on the resin film and electrically connecting the multiple first electrodes to each other, the resin film covering the contact portion between the first wiring and the multiple first electrodes, and a first hollow structure sealed by the resin film is formed around the multiple control electrodes and the multiple second electrodes.

[0015] Effects of the Invention

[0016] In the present invention, a first hollow structure sealed by a resin film is formed around a plurality of control electrodes and a plurality of second electrodes. In this way, by expanding the hollow structure of the transistor, the electrostatic capacitance of the transistor can be reduced as much as possible compared to the case where the hollow structure is formed only around the control electrode. Thus, the electrostatic capacitance can be reduced and the high-frequency characteristics can be improved. In addition, the resin film covers the contact portion between the first wiring and the plurality of first electrodes. Thus, chemicals such as a resist or an inorganic aqueous solution used in the process after the first hollow structure is formed can be prevented from entering the first hollow structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a plan view showing the semiconductor device according to the first embodiment of the present invention.

[0018] Figure 2 is along Figure 1 I-II sectional view.

[0019] Figure 3 is along Figure 1 Cross-sectional view of III-IV.

[0020] Figure 4 It is a cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment of the present invention.

[0021] Figure 5 It is a cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment of the present invention.

[0022] Figure 6 It is a cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment of the present invention.

[0023] Figure 7 It is a cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment of the present invention.

[0024] Figure 8 It is a cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment of the present invention.

[0025] Fig. 9 It is a plan view showing a semiconductor device according to a second embodiment of the present invention.

[0026] Fig.10 is along Fig. 9 I-II sectional view.

[0027] Fig.11 It is a cross-sectional view showing a semiconductor device according to a third embodiment of the present invention.

[0028] Fig.12 It is a cross-sectional view showing a semiconductor device according to a fourth embodiment of the present invention.

[0029] Fig.13 It is a top view showing a semiconductor device according to a fifth embodiment of the present invention.

[0030] Fig.14 is along Fig.13 I-II sectional view. DETAILED DESCRIPTION

[0031] A semiconductor device and a method for manufacturing the same according to an embodiment of the present invention will be described with reference to the accompanying drawings. The same or corresponding components are denoted by the same reference numerals, and duplicate descriptions may be omitted.

[0032] Implementation method 1.

[0033] Figure 1It is a plan view showing the semiconductor device according to the first embodiment of the present invention. Figure 2 is along Figure 1 I-II sectional view. Figure 3 is along Figure 1 A multi-finger field effect transistor is formed on a semiconductor substrate 1, and the multi-finger field effect transistor has a plurality of gate electrodes 2, a plurality of source electrodes 3, and a plurality of drain electrodes 4. The cross-sectional shape of the gate electrode 2 is T-shaped or Y-shaped. The plurality of gate electrodes 2 are connected to the gate pad 6 via the gate wiring 5. The plurality of source electrodes 3 are connected to the source pad 9 via the source wiring 7 and the connecting wiring 8. The plurality of drain electrodes 4 are connected to the drain pad 11 via the drain wiring 10.

[0034] The insulating films 12 and 13 and the resin films 14 and 15 cover the transistor. The connection wiring 8 is formed on the resin film 15. The connection wiring 8 and the source wiring 7 electrically connect the plurality of source electrodes 3 to each other. The resin film 14 covers the contact portion between the connection wiring 8 and the plurality of source electrodes 3. A hollow structure 16 sealed by the resin films 14 and 15 is formed around the plurality of gate electrodes 2 and the plurality of drain electrodes 4. In addition, a hollow structure 17 sealed by the resin films 14 and 15 is formed at the intersection of the gate wiring 5 and the connection wiring 8.

[0035] The thickness of the resin films 14 and 15 is 2 to 20 μm. The height of the hollow structures 16 and 17 is 1 to 10 μm. The width and depth of the hollow structures 16 and 17 are several μm to several hundred μm. The hollow structures 16 and 17 are not formed in the entire chip, but are formed for each circuit element such as transistors and wiring.

[0036] Next, a description will be given of a process for manufacturing the semiconductor device according to this embodiment. Figures 4 to 8 It is a cross-sectional view showing the manufacturing process of the semiconductor device according to the first embodiment of the present invention. Figure 4 , 6 , 8 and Figure 2 The cross-sectional view corresponds to Figure 5 , 7 and Figure 3 The cross-sectional view corresponds to .

[0037] First, if Figure 4 , 5As shown, a transistor having a gate electrode 2, a source electrode 3 and a drain electrode 4 is formed on a semiconductor substrate 1. At this time, lower wirings such as a gate wiring 5 are also formed at the same time. An insulating film 12 is formed on the entire surface. In a subsequent process, the insulating film 12 is opened at the position where the electrical wiring is connected. Next, a photosensitive resin film, i.e., a resin film 14, is formed on the entire surface by a coating method using a spin coater, a lamination method, or an STP (Spin-coating film Transfer and hot-Pressing technology) method. The resin film 14 is patterned by exposure and development to cover the source electrode 3, and does not cover but surrounds the gate electrode 2 and the drain electrode 4. In this way, by using a photosensitive resin film, the resin film 14 can be easily patterned. In addition, the resin film 14 is also opened in the area above the gate wiring 5 that becomes the intersection of the wiring. Thereafter, a curing treatment is performed to cure the resin film 14.

[0038] Then, if Figure 6 , 7 As shown, a thin film of a photosensitive resin film is bonded to the upper surface of a resin film 14 as a resin film 15 by lamination or STP. Thus, a hollow structure 16 sealed by the resin films 14 and 15 is formed around the gate electrode 2 and the drain electrode 4. At the same time, a hollow structure 17 can also be formed in the region above the gate wiring 5 on the same plane.

[0039] Then, if Figure 8 As shown, the resin film 15 is exposed and developed to form the through hole 18 on the source electrode 3 and the like. Thereafter, a curing treatment is performed to cure the resin film 15. The resin film 15 may be a non-photosensitive resin, in which case dry etching is used when forming the through hole 18.

[0040] Next, a connection wiring 8 connected to the source electrode 3 via the through hole 18 is formed on the resin film 15 by plating or evaporation. In the case of plating, after the power supply layer is formed into a film and patterned by a resist, electroplating is performed. Thereafter, the resist and the power supply layer are removed. On the other hand, in the case of the evaporation method, patterning is performed by a resist, a metal film is formed by evaporation, and the resist is removed by a stripping method. Finally, the outside of the resin film 14 and the outside of the resin film 15 are covered by an insulating film 13. Among them, an opening is made at a position where contact is required. Thus, the semiconductor device involved in this embodiment is manufactured.

[0041] In this embodiment, a hollow structure 16 sealed by resin films 14 and 15 is formed around the gate electrode 2 and the drain electrode 4. In this way, by expanding the hollow structure of the transistor, the electrostatic capacitance of the transistor can be reduced as much as possible compared to the case where the hollow structure is formed only around the gate electrode 2. As a result, the electrostatic capacitance can be reduced and the high-frequency characteristics can be improved.

[0042] In addition, the resin film 14 covers the contact portion between the connection wiring 8 and the source electrode 3. Figure 6 When the resin film 15 is attached as shown, the hollow structure 16 is completely sealed. Therefore, it is possible to prevent chemicals such as resists and inorganic aqueous solutions used in the process after the hollow structure 16 is formed from entering the hollow structure 16.

[0043] In addition, a hollow structure 17 sealed by resin films 14 and 15 is formed at the intersection of the gate wiring 5 and the connection wiring 8. In this way, by forming a hollow structure between the wirings, the wiring capacitance is reduced, so that the characteristic impedance can be increased. Therefore, impedance matching becomes easy and circuit design becomes easy. In addition, the hollow structure 17 can also be formed at the intersection of the gate wiring 5 and the drain wiring 10.

[0044] Implementation method 2.

[0045] Fig. 9 It is a plan view showing a semiconductor device according to a second embodiment of the present invention. Fig.10 is along Fig. 9 The connection wiring 8 is located above the plurality of gate electrodes 2 and the plurality of drain electrodes 4, is formed on the resin film 15, and electrically connects the plurality of source electrodes 3 to each other. The connection wiring 8 extends in a direction perpendicular to the length direction of the drain electrode 4. The other structures are the same as those in the first embodiment, and in this case, the same effects as those in the first embodiment can be obtained.

[0046] Implementation method 3.

[0047] Fig.11 1 is a cross-sectional view showing a semiconductor device according to Embodiment 3 of the present invention. A lower wiring 19 and an upper wiring 20 are formed in an area outside the field effect transistor. The lower wiring 19 is covered by resin films 14 and 15, and the upper wiring 20 is formed on the resin film 15. A hollow structure 17 sealed by resin films 14 and 15 is formed at the intersection of the lower wiring 19 and the upper wiring 20. In this way, the wiring capacitance is reduced by forming a hollow structure between the wirings, so that the characteristic impedance can be increased. Therefore, impedance matching becomes easy and circuit design becomes easy. Other structures and effects are the same as those in Embodiment 2.

[0048] Implementation method 4.

[0049] Fig.12 2 is a cross-sectional view showing a semiconductor device according to Embodiment 4 of the present invention. A support column 21 is formed inside the hollow structures 16 and 17 to support the resin film 15 on the upper portion thereof. Thus, the resin film 15 can be prevented from sagging, and defects in the process can be prevented. Although the electrostatic capacitance of the device increases compared to Embodiment 3, the production stability is improved because the structure can be stably formed. The other structures and effects are the same as those of Embodiment 3.

[0050] Implementation method 5.

[0051] Fig.13 It is a top view showing a semiconductor device according to a fifth embodiment of the present invention. Fig.14 is along Fig.13 A multi-finger bipolar transistor is formed on a semiconductor substrate 1, and the multi-finger bipolar transistor has a plurality of base electrodes 22, a plurality of emitter electrodes 23, and a plurality of collector electrodes 24. The plurality of base electrodes 22 are connected to a base pad 26 via a base wiring 25. The plurality of emitter electrodes 23 are connected to an emitter pad 28 via a connecting wiring 27. The plurality of collector electrodes 24 are connected to a collector pad 30 via a collector wiring 29.

[0052] A connection wiring 27 for electrically connecting the plurality of emitter electrodes 23 to each other is formed on the resin film 15. The resin film 14 covers the contact portion between the connection wiring 27 and the plurality of emitter electrodes 23. A hollow structure 16 sealed by the resin films 14 and 15 is formed around the plurality of base electrodes 22 and the plurality of collector electrodes 24. In the case of such a bipolar transistor, the same effects as those of the first and second embodiments can be obtained.

[0053] In addition, a second hollow structure may be formed at the intersection of the wirings as in Embodiment 3. This reduces the wiring capacitance and thus increases the characteristic impedance. This facilitates impedance matching and circuit design.

[0054] Description of the label

[0055] 1 semiconductor substrate, 2 gate electrode (control electrode), 3 source electrode (first electrode), 4 drain electrode (second electrode), 5 gate wiring (second wiring), 8, 27 connecting wiring (first wiring), 14, 15 resin film, 16, 17 hollow structure, 19 lower wiring, 20 upper wiring, 21 supporting column, 22 base electrode (control electrode), 23 emitter electrode (first electrode), 24 collector electrode (second electrode).

Claims

1. A semiconductor device, characterized in that: have: Semiconductor substrate; A multi-finger transistor formed on the semiconductor substrate, having a plurality of control electrodes, a plurality of first electrodes and a plurality of second electrodes; a resin film covering the transistor; as well as a first wiring formed on the resin film and electrically connecting the plurality of first electrodes to each other; The resin film covers the contact portion formed on the transistor region among the contact portions between the first wiring and the plurality of first electrodes. A first hollow structure for accommodating the plurality of control electrodes and the plurality of second electrodes and sealed by the resin film is formed around the plurality of control electrodes and the plurality of second electrodes in units of elements of the transistor. further comprising a second wiring formed on the semiconductor substrate and covered by the resin film, the second wiring electrically connecting the plurality of control electrodes to each other, At the intersection of the first wiring and the second wiring, a second hollow structure sealed by the resin film is formed in units of the intersection. The first hollow structure and the second hollow structure are separated from each other by the resin film.

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