Linear compensation method applied to output voltage dynamic load of resonant LLC circuit

Abstract

The invention discloses an output voltage dynamic load linear compensation method applied to a resonant LLC circuit, and relates to the technical field of AC / DC power conversion. A sampling line with an operational amplifier is used for sampling output voltage and output current, and the output voltage and the output current are sent into an analog conversion pin of a DSP; through the processing of a voltage error compensator, a voltage differential error compensator, a voltage error hysteresis comparator and a current differential hysteresis comparator of the control chip, when the output FswCompOut of the voltage differential error compensator meets the limitation of the voltage error hysteresis comparator and the current differential hysteresis comparator, the voltage error hysteresis comparator outputs FswCompOut. Therefore, the loop response of the LLC during dynamic load switching is accelerated, and the purpose of linearly compensating the drop and overshoot of the output voltage of the LLC is achieved.

Description

Technical Field

[0001] The invention relates to the technical field of AC / DC power conversion, and in particular to a linear compensation method for an output voltage dynamic load applied to a resonant LLC circuit. Background Art

[0002] With the rapid development of the AI ​​industry, the demand for electricity has increased significantly. The core computing equipment has gradually shifted from traditional CPUs to GPUs, and AI server power supplies have put forward higher requirements in terms of power density and efficiency. For AC / DC power supplies, the DC / DC level circuit uses a resonant LLC topology. Considering reliability, voltage-type control is generally used. This type of control has problems such as low bandwidth and poor dynamic response. When the system performs a full-frequency stress test, there is a risk of uneven current causing one of the units to overload protection. Therefore, it is particularly important to invent a linear compensation method for the dynamic load of the output voltage of a resonant LLC circuit.

[0003] The prior art also has the following shortcomings, which are specifically embodied in:

[0004] 1. In the prior art, the voltage-type control used in the DC / DC stage circuit of the AC / DC power supply has the problems of low bandwidth and poor dynamic response. When the high-power power supply faces high-slope current changes and large load current changes, the output voltage will drop too deep or rise too high, which cannot meet the high requirements of the dynamic response specifications of the AI ​​server power supply.

[0005] 2. In the existing technology, its control relies on the detection window of dynamic current. Due to the limitations of detection technology and the response speed of hardware equipment, there are blind spots at the update time, resulting in untimely control. When the system is subjected to full-frequency stress testing, uneven current may occur, which may lead to overload protection of one of the devices, affecting the normal operation of the system, reducing the reliability of the system, and even triggering a chain reaction, resulting in failure of the operation of the entire AI server cluster, thereby affecting the normal operation of various businesses based on the AI ​​system. Summary of the invention

[0006] The object of the present invention is to provide a linear compensation method for dynamic load of output voltage of a resonant LLC circuit, which solves the problems existing in the background technology.

[0007] In order to solve the above technical problems, the present invention adopts the following technical solution: The present invention provides a linear compensation method for the output voltage dynamic load of a resonant LLC circuit, including: Step 1, system initialization.

[0008] Step 2: Sample the output voltage and output current.

[0009] Step 3: Calculate the voltage error and current differential.

[0010] Step 4: Determine the timing of compensation.

[0011] Step 5: Calculate linear gain compensation.

[0012] Step six: Compensation implementation.

[0013] Step seven: loop control and optimization.

[0014] Preferably, it is characterized in that the system initialization is specifically implemented by: selecting a suitable topology structure and building a circuit according to requirements, and at the same time initializing a control chip with a high-precision ADC / PWM peripheral.

[0015] The topology structure includes a half-bridge resonant LLC topology, a full-bridge resonant LLC topology, and an interleaved resonant LLC topology.

[0016] Preferably, the output voltage and output current sampling are specifically implemented as follows: the output voltage is sampled using a first-stage follower op amp and an ADC input port, and the output current is sampled using a sampling resistor; the ADC module of the control chip converts the analog voltage and current signals into digital signals to obtain digital sampling values ​​of the output voltage and output current at the current moment.

[0017] Preferably, the calculation of the voltage error and the current differential is specifically implemented by: calculating the voltage error based on the sampled output voltage and a preset output voltage reference value, and obtaining the current differential through numerical calculation based on the sampled output current.

[0018] Preferably, the determination of compensation timing is specifically implemented by: extracting a voltage error, comparing it with a threshold range of a voltage error hysteresis comparator, extracting a current differential, comparing it with a threshold range of a current differential hysteresis comparator; if the voltage error is within the threshold range of the voltage error hysteresis comparator and the current differential is within the threshold range of the current differential hysteresis comparator, it is determined that the compensation timing is not met; if the voltage error is not within the threshold range of the voltage error hysteresis comparator and the current differential is not within the threshold range of the current differential hysteresis comparator, it is determined that the compensation timing is met.

[0019] Preferably, the linear gain compensation calculation is specifically implemented as follows: if the compensation timing is met, a compensation value is calculated according to a linear gain compensation algorithm, and a change rate of the compensation value is linearly related to the switching frequency and voltage differential error of the previous control cycle.

[0020] Preferably, the compensation is implemented by extracting a compensation value and adjusting the PWM signal. If the compensation value is positive, the frequency of the PWM signal is increased; if the compensation value is negative, the frequency of the PWM signal is reduced.

[0021] Preferably, the cyclic control and optimization is specifically implemented by repeating steps 2 to 6, continuously collecting output voltage and current data, and optimizing control parameters according to system operation conditions.

[0022] The beneficial effects of the present invention are as follows: 1. In the present invention, by adding this linear compensation strategy, in terms of taking into account the dynamic voltage index, whether it is the voltage fluctuation range, or the overshoot and drop amplitude when the load changes, it can be strictly controlled within a reasonable range. At the same time, it also shows excellent performance for the adjustment and recovery time of the output voltage, which can significantly shorten the time for the voltage to recover and stabilize, ensuring that the power supply can continuously and stably output the required voltage under dynamic load conditions, and providing a strong guarantee for the reliable operation of high-power power supplies in complex application scenarios.

[0023] 2. In the present invention, accurate compensation time and linearly changing compensation amplitude have a positive impact on the reliability of the power supply system. Stable current distribution means that the workload of each power supply is more balanced, reducing the risk of failure due to local overload. It not only extends the service life of the power supply equipment, but also enhances the anti-interference ability of the entire system in the face of various complex working conditions, ensuring that the system can operate continuously and stably, greatly improving the reliability of the power supply system, and providing solid protection for various application scenarios with extremely high requirements for power supply stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 The present invention is a schematic flow chart of the steps for implementing the method.

[0026] Figure 2 Schematic diagram of the resonant LLC dynamic linear compensation strategy of the present invention.

[0027] Figure 3 Schematic diagram of control of the voltage error compensator of the present invention.

[0028] Figure 4 Graph 1 is the operating frequency vs. gain curve of the LLC resonant topology of the present invention.

[0029] Figure 5 It is a control schematic diagram of the voltage differential error compensator of the present invention.

[0030] Figure 6 It is a schematic diagram of limiting the output of the voltage differential error compensator of the present invention.

[0031] Figure 7 This is a waveform diagram of the LLC dynamic linear compensation measurement strategy of the present invention. DETAILED DESCRIPTION

[0032] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] Reference Figure 1 As shown, the present invention provides a linear compensation method for the output voltage dynamic load of a resonant LLC circuit, including: step one, system initialization.

[0034] In a specific embodiment, it is characterized in that the system is initialized, and the specific implementation method is: select a suitable topology structure and build a circuit according to the needs, and initialize the control chip with a high-precision ADC / PWM peripheral.

[0035] The topology structure includes a half-bridge resonant LLC topology, a full-bridge resonant LLC topology, and an interleaved resonant LLC topology.

[0036] Ensure that the hardware circuit is built, the control chip enters the operational state, the PWM module starts to output the initial PWM signal, and the ADC module can start sampling, but the output voltage and current have not yet started to be sampled.

[0037] Step 2: Sample the output voltage and output current.

[0038] In a specific embodiment, the output voltage and output current are sampled, and the specific implementation method is: use a first-stage follower op amp and an ADC input port to sample the output voltage, and use a sampling resistor to sample the output current. The ADC module of the control chip converts the analog voltage and current signals into digital signals to obtain the digital sampling values ​​of the output voltage and output current at the current moment.

[0039] An operational amplifier is used to sample the output voltage and output current signals, which are sent to the analog-to-digital converter of the control chip through an RC filter circuit to obtain the sampled values ​​of the output voltage and output current. These sampled values ​​are processed by a voltage error compensator, a voltage differential error compensator, a voltage error hysteresis comparator, and a current differential hysteresis comparator to obtain the final operating frequency, which is sent to the PWM module of the control chip to control the switch tube drive of the resonant LLC circuit.

[0040] Step 3: Calculate the voltage error and current differential.

[0041] In a specific embodiment, the calculation of voltage error and current differential is specifically implemented as follows: based on the sampled output voltage and a preset output voltage reference value, the voltage error is calculated, and based on the sampled output current, the current differential is obtained through numerical calculation.

[0042] Step 4: Determine the timing of compensation.

[0043] In a specific embodiment, the compensation timing is determined by the following specific implementation method: extracting a voltage error, comparing it with a threshold range of a voltage error hysteresis comparator, extracting a current differential, comparing it with a threshold range of a current differential hysteresis comparator; if the voltage error is within the threshold range of the voltage error hysteresis comparator and the current differential is within the threshold range of the current differential hysteresis comparator, it is determined that the compensation timing is not met; if the voltage error is not within the threshold range of the voltage error hysteresis comparator and the current differential is not within the threshold range of the current differential hysteresis comparator, it is determined that the compensation timing is met.

[0044] In the present invention, accurate compensation time and linearly changing compensation amplitude have a positive impact on the reliability of the power supply system. Stable current distribution means that the workload of each power supply is more balanced, reducing the risk of failure due to local overload. It not only extends the service life of the power supply equipment, but also enhances the anti-interference ability of the entire system in the face of various complex working conditions, ensuring that the system can operate continuously and stably, greatly improving the reliability of the power supply system, and providing solid protection for various application scenarios with extremely high requirements for power supply stability.

[0045] Step 5: Calculate linear gain compensation.

[0046] In a specific embodiment, the linear gain compensation calculation is specifically implemented as follows: if the compensation timing is met, a compensation value is calculated according to a linear gain compensation algorithm, and the change rate of the compensation value is linearly related to the switching frequency of the previous control cycle and the voltage differential error.

[0047] In the present invention, this linear compensation strategy is added. In terms of dynamic voltage indicators, both the voltage fluctuation range and the overshoot and drop range when the load changes can be strictly controlled within a reasonable range. At the same time, the adjustment and recovery time of the output voltage also show excellent performance, which can significantly shorten the time for the voltage to recover and stabilize, ensuring that the power supply can continuously and stably output the required voltage under dynamic load conditions, providing a strong guarantee for the reliable operation of high-power power supplies in complex application scenarios.

[0048] Step six: Compensation implementation.

[0049] In a specific embodiment, the compensation is implemented by extracting a compensation value and adjusting the PWM signal. If the compensation value is positive, the frequency of the PWM signal is increased; if the compensation value is negative, the frequency of the PWM signal is reduced.

[0050] The adjusted PWM signal will act on the switch tube, changing the working state of the LLC circuit, thereby affecting the output voltage and current.

[0051] Step seven: loop control and optimization.

[0052] In a specific embodiment, the cyclic control and optimization are specifically implemented by repeating steps 2 to 6, continuously collecting output voltage and current data, and optimizing control parameters according to system operation conditions.

[0053] refer to Figure 3 When the sampling value of the output voltage is subtracted from the given voltage, the voltage error Ve[n] is obtained. The voltage error Ve[n] is sent to the voltage error compensator to obtain the operating frequency Fsw[n] outputted in the loop cycle. At the same time, the voltage error Ve[n] is combined with the voltage error value Ve[n-1] of the previous loop cycle to calculate the voltage differential error dVe / dt. After taking the absolute value, the voltage differential error dVe / dt is sent to the voltage differential error linear gain module.

[0054] refer to Figure 4 According to the curve, the higher the operating frequency, the more gradual the change of the gain curve. To change the same gain, the operating frequency needs to change more. Figure 5, according to the absolute value of the voltage differential error and the operating frequency obtained by the voltage error compensator module. The absolute value of the voltage differential error enters the voltage differential linear gain module. The calculation logic of this module is that the larger the absolute value of the voltage differential error, the steeper the output voltage change, so the larger the compensation gain required, and the voltage differential error gain K_dVe is calculated. The operating frequency Fsw[n] will be sent to the operating frequency linear gain module to calculate the operating frequency gain K_Fsw. Finally, the voltage differential error gain K_dVe and the operating frequency gain K_Fsw are multiplied to obtain the final voltage differential error compensation frequency Fsw_Comp_Out.

[0055] The calculation formula of the linear gain module is summarized as follows:

[0056] 1、 K_dVe=dVe / dt*K1+B1 ,

[0057] 2、 K_Fsw=Fsw [ n ] *K2+B2 ，

[0058] 3、 Fsw_Comp_Out=K_dVe*K_Fsw ，其中 K1 、 B1 为 K2 and B2 are the linear gain slope and offset of the voltage differential error module, and K2 and B2 are the linear gain slope and offset of the operating frequency module.

[0059] When the voltage differential error compensator outputs the compensation operating frequency Fsw_Comp_Out, in order to prevent the output voltage from oscillating due to incorrect compensation time, it is necessary to limit the action time of the voltage differential error compensator, that is, the output of the voltage differential error compensator needs to be logically ANDed with the output of the limited voltage differential error compensator. The module output of the limited voltage differential error compensator is obtained by the logic AND gate AND1 of the outputs of the current differential hysteresis comparator Comp1 and the voltage error hysteresis comparator Comp2. Only when the output of the logic AND gate AND1 is 1, the compensation operating frequency output by the voltage differential error compensator can act on the operating frequency output of the current loop cycle, and when the output of the logic AND gate AND1 is 0, the output of the voltage differential error compensator is invalid, which can prevent the occurrence of output voltage oscillation caused by the linear compensation malfunction.

[0060] refer to Figure 6, when the output current changes rapidly from light load to heavy load, the current differential hysteresis comparator changes from 0 to 1. The output voltage will drop rapidly until the output voltage drops to the lowest point, the voltage error Ve will slowly increase from 0, and the voltage differential error Vde / dt will slowly decrease from the maximum value to 0. During this period of time, the output of the voltage differential error compensator can be superimposed on the output of the voltage error compensator of the current loop cycle. The larger the voltage differential error, the faster the output voltage drops, and the larger the compensation operating frequency Fsw_Comp_Out, the more it can suppress the depth of the output voltage drop. When the output voltage drops to the lowest point, the value of the voltage differential error is 0, the compensation operating frequency Fsw_Comp_Out is 0, and often at this time the current differential hysteresis comparator will change from 1 to 0, the voltage differential error compensator will not work, and it will also have a suppressive effect on the reverse recovery overshoot of the output voltage.

[0061] When the output current changes rapidly from heavy load to light load, the current differential hysteresis comparator changes from 0 to 1. The output voltage will rise rapidly until the output voltage reaches the highest point, the voltage error Ve will gradually decrease from 0, and the voltage differential error Vde / dt will gradually increase from the minimum value to 0 (its absolute value will gradually decrease from the maximum value to 0). During this period of time, the output of the voltage differential error compensator can be superimposed on the output of the voltage error compensator of the current loop cycle. The larger the voltage differential error, the faster the trend of output voltage overshoot, the larger the compensation operating frequency Fsw_Comp_Out, and the more it can suppress the overshoot of the output voltage. When the output voltage overshoots to the highest point, the value of the voltage differential error is 0, the compensation operating frequency Fsw_Comp_Out is 0, and the current differential hysteresis comparator will often change from 1 to 0 at this time, and the voltage differential error compensator will not work, and it will also have a suppressive effect on the reverse recovery overshoot of the output voltage.

[0062] The above contents are merely examples and explanations of the concept of the present invention. Those skilled in the art may make various modifications or additions to the specific embodiments described or replace them in a similar manner. As long as they do not deviate from the concept of the invention or exceed the scope defined by the present invention, they shall all fall within the protection scope of the present invention.

Claims

1. A linear compensation method for dynamic load of output voltage of a resonant LLC circuit, characterized in that: The following steps are involved: Step 1: System initialization; Step 2: sampling the output voltage and output current; Step 3, calculate the voltage error and current differential; Step 4: Determine the timing of compensation; Step 5: linear gain compensation calculation; Step 6: Compensation implementation; Step seven: loop control and optimization.

2. A linear compensation method for dynamic load of output voltage applied to a resonant LLC circuit according to claim 1, characterized in that: The system initialization is specifically implemented as follows: Select the appropriate topology and build the circuit according to the requirements, and initialize the control chip with high-precision ADC / PWM peripherals; The topology structure includes a half-bridge resonant LLC topology, a full-bridge resonant LLC topology, and an interleaved resonant LLC topology.

3. The linear compensation method for dynamic load of output voltage applied to resonant LLC circuit according to claim 2, characterized in that: The output voltage and output current sampling are specifically implemented as follows: The output voltage is sampled using a first-stage follower op amp and an ADC input port, while the output current is sampled using a sampling resistor. The ADC module of the control chip converts the analog voltage and current signals into digital signals to obtain the digital sampling values ​​of the output voltage and output current at the current moment.

4. The linear compensation method for dynamic load of output voltage applied to resonant LLC circuit according to claim 3, characterized in that: The specific implementation method of calculating the voltage error and current differential is as follows: The voltage error is calculated based on the sampled output voltage and a preset output voltage reference value, and the current differential is obtained through numerical calculation based on the sampled output current.

5. A linear compensation method for dynamic load of output voltage applied to a resonant LLC circuit according to claim 4, characterized in that: The specific implementation method of determining the compensation timing is as follows: The voltage error is extracted and compared with the threshold range of the voltage error hysteresis comparator. The current differential is extracted and compared with the threshold range of the current differential hysteresis comparator. If the voltage error is within the threshold range of the voltage error hysteresis comparator and the current differential is within the threshold range of the current differential hysteresis comparator, it is determined that the compensation timing is not met. If the voltage error is not within the threshold range of the voltage error hysteresis comparator and the current differential is not within the threshold range of the current differential hysteresis comparator, it is determined that the compensation timing is met.

6. A linear compensation method for dynamic load of output voltage applied to a resonant LLC circuit according to claim 5, characterized in that: The linear gain compensation calculation is specifically implemented as follows: If the compensation timing is met, the compensation value is calculated according to the linear gain compensation algorithm, and the change speed of the compensation value is linearly related to the switching frequency and the voltage differential error of the previous control cycle.

7. A linear compensation method for dynamic load of output voltage applied to a resonant LLC circuit according to claim 6, characterized in that: The compensation is implemented in the following specific ways: The compensation value is extracted and the PWM signal is adjusted. If the compensation value is positive, the frequency of the PWM signal is increased; if the compensation value is negative, the frequency of the PWM signal is reduced.

8. A linear compensation method for dynamic load of output voltage applied to a resonant LLC circuit according to claim 7, characterized in that: The cycle control and optimization are specifically implemented as follows: Repeat steps 2 to 6, continuously collect output voltage and current data, and optimize control parameters according to system operation conditions.

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