Spread spectrum control implementation circuit in DCM mode of buck converter

Abstract

The invention discloses a spread spectrum control implementation circuit in a DCM mode of a buck converter, which relates to the technical field of power management and comprises a spread spectrum control module, a self-adaptive conduction time module, a PWM module, a logic control circuit and a zero current detection module. According to the invention, load information is judged through simple control logic, high current or voltage feedback complexity of a traditional converter is avoided, and higher detection precision is provided under light load or no load; the load state is judged by detecting the time interval of a zero current detection signal and a PWM signal, when the system enters a set load range, frequency expansion is carried out to improve efficiency, a spread spectrum mode can be quitted in time during the load transient state, and it is ensured that the system is stable and efficient; spread spectrum control can be adaptively adjusted when the load changes, efficiency and ripples are balanced under different load conditions, and the stability and performance of the system are remarkably improved.

Description

Technical Field

[0001] The present invention relates to the field of power management technology, in particular to a control circuit for a buck converter (BUCK) and an adaptive spread spectrum control method thereof under DCM. The technology can be applied to the field of integrated circuits, and is particularly suitable for low-power, high-efficiency power management chips, portable battery-powered systems, and various power converters that need to optimize efficiency and ripple under load conditions. Background Art

[0002] With the increasing demand for power management systems in modern electronic devices, BUCK has become a key component in power management. In such systems, DCM mode is widely adopted because it can improve conversion efficiency under light load or no load. However, existing DCM mode buck converters still face some key issues in practical applications, especially in spread spectrum control.

[0003] 1. Insufficient traditional spread spectrum control logic At present, traditional DCM mode buck converters mostly use fixed spread spectrum control logic, which makes the spread spectrum control always turned on when the load is light, resulting in excessive output ripple and the inability to adaptively adjust the efficiency and ripple control. Therefore, when the system load is low, the efficiency decreases and the ripple is too large; when the load increases, the spread spectrum mode cannot be exited in time, and the system stability and efficiency deteriorate. At present, how to adaptively adjust the spread spectrum control in different load states to achieve higher efficiency and lower ripple has become a key issue in power management design.

[0004] 2. Analysis of research status Although the existing technologies provide load detection modules or control circuit designs, most of them only solve the efficiency and ripple problems in certain specific modes, and still fail to effectively solve the adaptive switching problem of spread spectrum control in DCM mode. The following is an analysis of several related technologies: The patent technology of "CN1111416505B A Switching Power Converter" contains key technical means such as load detection module and counter module, but only solves the switching control of the system between PWM mode and PFM mode. However, these solutions fail to effectively solve the spread spectrum control problem in DCM mode, especially the automatic switching problem under light load and heavy load conditions.

[0005] In the patent application "CN104753346A A Technology for Improving the Efficiency of BUCK Circuit", the gating or non-gating of the additional high-side tube and low-side tube is controlled according to the duty cycle of the output node voltage signal, thereby realizing the dynamic reduction of the overall on-resistance of the high-side tube and the low-side tube under different output conditions, and improving the efficiency of the BUCK circuit. However, the efficiency improvement method of this solution requires more power tubes, which will consume a larger overall area and bring a burden to the overall power consumption of the system.

[0006] In the patented technology of "CN117724563B Adaptive Peak Current Control Circuit and Electronic Device Suitable for BUCK PSM Operation", the peak current is linearly adjusted according to the conduction time of the upper power tube to solve the problems of low efficiency of the BUCK circuit at high input voltage and high ripple of the BUCK circuit at low input voltage. However, this patent solution is only applicable to the PSM frequency hopping mode under peak current mode control, and the complexity and instability of current sampling in DCM mode become the bottleneck of its application.

[0007] In the patented technology of "CN105763051B A Light-load Frequency Reduction Mode Control System", the relative changes of charging time and demagnetization time are measured according to the inductor current through the output load current calculation circuit. The load current supplies the phase detection voltage signal. The frequency conversion control circuit is fixed with an adaptive adjustment clock unit that controls the clock frequency according to the voltage signal. However, this solution requires the use of current sampling modules and comparators and other highly complex circuits. At the same time, this solution cannot guarantee that the spread spectrum mode adaptive prohibition is turned on under no-load or extremely light load. Summary of the invention

[0008] The present invention provides a spread spectrum control implementation circuit in a buck converter DCM mode, which can solve the above problem.

[0009] In order to solve the above problems, the technical solution adopted by the present invention is as follows: A spread spectrum control implementation circuit in a step-down converter DCM mode comprises a spread spectrum control module, an adaptive conduction time module, a PWM module, a logic control circuit and a zero current detection module; the zero current detection module is used to perform zero current detection after a low-side tube is turned on, and when the detected inductor current is zero, the logic control circuit is instructed to turn off the low-side tube; the spread spectrum control module is used to detect a load state based on a zero current detection signal, so that the load outputs a high level when it is within a set spread spectrum control range; the adaptive conduction time module is used to extend the high-side tube conduction time when the spread spectrum control module outputs a high level, and the high-side tube conduction time is adaptively set by the adaptive conduction time module according to the input voltage V of the converter in a non-spread spectrum mode. IN and output voltage V OUT The PWM module is used to convert the output voltage VOUT Falling to the voltage threshold V ref When the PWM module outputs a high level, when the time when the PWM module outputs a high level is longer than the set filtering time, the spread spectrum control module outputs a low level to instruct the logic control circuit to turn on the high-side tube.

[0010] Specifically, the spread spectrum control module performs spread spectrum control based on the number of triggering times of the zero current detection signal, and includes an adaptive load detection unit and a load state confirmation unit; the adaptive load detection unit is used to dynamically detect the zero current detection signal, and output a high level when the triggering time interval of the zero current detection signal is less than the set filtering time, and the load state confirmation unit accumulates the number of triggering times of the zero current detection signal to perform spread spectrum control, otherwise the load state confirmation unit does not accumulate the number of triggering times of the zero current detection signal.

[0011] Optionally, when the triggering number of the zero current detection signal reaches 16 times, it is confirmed to enter the spread spectrum mode.

[0012] Specifically, the adaptive load detection unit includes rising edge delayers B1~B3, inverters N1~N5, NAND gates NAND, AND gates AND, and D flip-flop D1; inverter N1, rising edge delayer B1 and inverter N2 are connected step by step; the first input end of the NAND gate NAND is connected to the output end of the inverter N2, the second input end is connected to the input end of the rising edge delayer B1, and the output end is connected to the Set end of the D flip-flop D1; inverter N3, rising edge delayer B2 and the CLK end of the D flip-flop D1 are connected step by step; the Q end of the D flip-flop D1, inverter N4 and the first input end of the AND gate AND are connected step by step; the output end of the rising edge delayer B3 is connected to the inverter N5; the input ends of inverters N1 and N3, and the second input end of the AND gate AND are all connected to the output end of the zero current detection module; the input end of the rising edge delayer B3 is connected to the output end of the PWM module; the output ends of the inverter N5 and the AND gate AND are both connected to the load state confirmation unit.

[0013] Specifically, the load state confirmation unit includes D flip-flops D2-D5, whose Set terminals are all connected to the output terminal of the inverter N5; the CLK terminal of the D flip-flop D5 is connected to the output terminal of the AND gate AND; the D terminal of the D flip-flop D3, The D end of the D flip-flop D4 is connected to the CLK end of the D flip-flop D2; The D end of the D flip-flop D5 is connected to the CLK end of the D flip-flop D3; The Q end of the D flip-flop D2 is connected to the CLK end of the D flip-flop D4; the Q end of the D flip-flop D2 is the output end of the adaptive load detection unit.

[0014] Specifically, the adaptive on-time module includes an adaptive on-time circuit, a dynamic power bias comparator and a D trigger connected in stages; the output end of the D trigger is the on-time output end of the adaptive on-time module; the input end of the adaptive on-time circuit is connected to the output end of the spread spectrum control module.

[0015] Furthermore, the above-mentioned spread spectrum control implementation circuit also includes an enable control module, which is used to connect the spread spectrum control implementation circuit to the power supply voltage.

[0016] Furthermore, the above-mentioned spread spectrum control implementation circuit also includes a driving circuit for providing current to drive the external power tube to turn on and off after receiving the high-side tube conduction signal HS and the low-side tube conduction signal LS sent by the logic control circuit.

[0017] Furthermore, the above-mentioned spread spectrum control implementation circuit includes a voltage divider network for outputting the voltage V OUT Adjusted by circuit ratio, the voltage after voltage division is recorded as V FB , used to provide to the PWM module.

[0018] Furthermore, the PWM module includes a comparator, an error amplifier circuit and a ripple injection module; the output end of the ripple injection module is connected to the inverting input end of the comparator, the output end of the error amplifier circuit is connected to the non-phase input end of the comparator, and the output end of the comparator is the output end of the PWM module; the input end of the ripple injection module and the first input end of the error amplifier circuit are both connected to the voltage divider network; the second input end of the error amplifier circuit is connected to the reference voltage.

[0019] Compared with the prior art, the present invention has the following beneficial effects: 1) The load information is judged through simple control logic, which avoids the high complexity of current or voltage feedback of traditional converters and provides higher detection accuracy under light load or no load.

[0020] 2) The load state is determined by detecting the time interval of the zero current detection signal and the PWM signal. When the system enters the set load range, frequency expansion is performed to improve efficiency. The spread spectrum mode can be exited in time during load transients to ensure system stability and efficiency.

[0021] 3) Ability to adaptively adjust spread spectrum control when load changes, balance efficiency and ripple under different load conditions, and significantly improve system stability and performance.

[0022] 4) By changing the resistance ratio, the on-time is extended with a lower area solution, and a comparator that can adaptively compensate the response time according to the power supply voltage is realized, ensuring the designed on-time value.

[0023] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the embodiments of the present invention are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 It is a schematic block diagram of the structure of the spread spectrum control implementation circuit; Figure 2 It is a circuit example of a spread spectrum control module; Figure 3 It is a circuit example of the adaptive on-time module; Figure 4 It is a synchronous BUCK topology; Figure 5 It is a flow chart of the implementation method of spread spectrum control, wherein the left flow chart is the execution process of spread spectrum control, and the right flow chart is the release process of spread spectrum control; Figure 6 It is the load current and inductor current waveform of the buck converter in DCM; Figure 7 It is the load variation waveform; Figure 8 It is the output waveform of the spread spectrum control circuit; Fig. 9 is the output voltage waveform; Fig.10 It is the load & ripple curve graph; Fig.11 It is the load & efficiency curve diagram. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments.

[0027] The embodiment of the present invention provides a spread spectrum control implementation circuit in the DCM mode of a buck converter, including a spread spectrum control module, an adaptive on-time module, a PWM module, a logic control circuit, a zero current detection module, an enable control module, a voltage divider network and a drive circuit. The connection relationship between the modules is as follows: Figure 1 shown.

[0028] The PWM module includes a comparator, an error amplifier circuit and a ripple injection module; the output of the ripple injection module is connected to the inverting input of the comparator, the output of the error amplifier circuit is connected to the non-inverting input of the comparator, and the output of the comparator is the output of the PWM module; the input of the ripple injection module and the first input of the error amplifier circuit are both connected to a voltage divider network; the second input of the error amplifier circuit is connected to a reference voltage. The voltage divider network is used to adjust the output voltage V OUT The drive circuit is used to provide current to drive the external power tube to turn on and off after receiving the high-side tube conduction signal HS and the low-side tube conduction signal LS sent by the logic control circuit.

[0029] The method of the present invention utilizes a zero current detection signal ZCD, a comparator signal PWM, and a simple filtering circuit and digital logic to achieve adaptive spread spectrum control, which significantly reduces the area and complexity of the required circuit, while avoiding additional power consumption and ensuring low-power operation. Most importantly, the control scheme can adaptively adjust the spread spectrum within a controllable load range, which not only optimizes the system efficiency, but also effectively reduces the output voltage ripple under no-load and light-load conditions.

[0030] In order to reasonably configure the various filtering times in the present invention, the relationship between the interval time between two ZCD signals and the load current is described here. Figure 6 It can be seen that under DCM, the ripple amount on the output capacitor is when the inductor current is higher than the load current. The inductor current supplies energy to the load end and stores energy in the output capacitor end, thus causing the output end ripple amount to increase.

[0031] Figure 6 The T1 time is the time when the inductor current rises from zero to the load current when the high-side tube is turned on. time, is the slope of the inductor current change, L is the inductor value, V IN is the input supply voltage, V OUT is the output voltage, the formula is: Figure 6 The T2 time is the time it takes for the inductor current to drop from the load current value to zero when the low-side tube is turned on. The formula is: Figure 6 The T3 time is, the inductor current I L Greater than the load current I LOAD The time of the high-side tube conduction time and the low-side tube conduction time are processed by phase-locked loop in chip design, so the default high-side tube conduction time is T HZand low side switch on time T LS The total time T HS+LS Approximately fixed, high-side tube conduction switching frequency F HS The switching frequency F of the low-side tube is LS The total switching frequency F HS+LS is also approximately fixed. The formula is: Figure 6 The area of ​​the shaded triangle is the amount of charge transferred to the output capacitor. , the formula is: The amount of charge accumulated on the capacitor and the output capacitance , the ripple voltage on the output capacitor can be obtained The changes are: According to the adaptive constant on time (ACOT) control method, when the output voltage drops to the reference value set by the chip in steady state, that is, when the next switching cycle begins, the time when both the high-side and low-side transistors are not conducting, i.e., the high-resistance time, can be calculated. N represents an unspecified ZCD signal trigger, N+1 is the next ZCD signal trigger, and the time between ZCD signals is Wherein, DVV is the duty cycle of the BUCK circuit voltage conversion, that is, the ratio of the output voltage to the input voltage.

[0032] The spread spectrum control module in the present invention performs spread spectrum control based on the triggering times of the zero current detection signal, detects the load state, and confirms that the load outputs a high level within the set spread spectrum control range to control the adaptive on-time module to extend the on-time. Figure 2 As shown, the spread spectrum control module includes an adaptive load detection unit and a load state confirmation unit.

[0033] The adaptive load detection unit includes rising edge delayers B1-B3, inverters N1-N5, NAND gates NAND, AND gates AND, and D flip-flop D1; inverter N1, rising edge delayer B1 and inverter N2 are connected step by step; the first input end of the NAND gate NAND is connected to the output end of the inverter N2, the second input end is connected to the input end of the rising edge delayer B1, and the output end is connected to the Set end of the D flip-flop D1; inverter N3, rising edge delayer B2 and the CLK end of the D flip-flop D1 are connected step by step; the Q end of the D flip-flop D1, inverter N4 and the first input end of the AND gate AND are connected step by step; the output end of the rising edge delayer B3 is connected to the inverter N5; the input ends of the inverters N1 and N3, and the second input end of the AND gate AND are all connected to the output end of the zero current detection module; the input end of the rising edge delayer B3 is connected to the output end of the PWM module; the output ends of the inverter N5 and the AND gate AND are all connected to the load state confirmation unit. The load status confirmation unit includes D flip-flops D2 to D5, whose Set terminals are all connected to the output terminal of the inverter N5; the CLK terminal of the D flip-flop D5 is connected to the output terminal of the AND gate AND; the D terminal of the D flip-flop D3, The D end of the D flip-flop D4 is connected to the CLK end of the D flip-flop D2; The D end of the D flip-flop D5 is connected to the CLK end of the D flip-flop D3; The Q end of the D flip-flop D2 is connected to the CLK end of the D flip-flop D4; the Q end of the D flip-flop D2 is the output end of the adaptive load detection unit.

[0034] The specific circuit of the adaptive on-time module is as follows Figure 3 As shown, it includes: resistors R1, R2, R3, R4, R5, R6, R7, R8 and R9, capacitor C1, NMOS tubes NM1, NM2, NM3, NM4, NM5, NM6, NM7, NM8, NM9 and NM10; PMOS tubes PM1, PM2, PM3, PM4, PM5, PM6, PM7 and PM8; inverters INV1, INV2 and INV3; D flip-flop Diff1. Among them, resistors R1~R5, inverter INV1, NMOS tubes NM1, NM2 and NM3, and capacitor C1 form an adaptive on-time circuit; except for D flip-flop Diff1 and the other components of the adaptive on-time circuit, the dynamic power bias comparator is formed.

[0035] The working principle of the above spread spectrum control module implementation method is as follows: the system works in DCM mode, the load current is too low or completely unloaded, when the ZCD signal outputs a high level and is transmitted to the CLK end of the D1 trigger after the B2 rising edge delay, the D1 trigger Q end outputs a high level, and after being inverted by the N4 inverter, the output is a low level. The post-stage counter module cannot collect the ZCD signal for counting, so the system is prohibited from entering the spread spectrum mode. The design of the B2 rising edge delay time can be combined with the high impedance time and the load relationship T HS+LS , T HZ The design is based on theoretical formulas such as . In order to realize dynamic detection of load status, the Set end of the D1 trigger will generate a reset signal at the falling edge of the ZCD signal, and reset the output Q of the D1 trigger to a low level so that it can be detected again when the next ZCD signal comes. As the system load current increases, the time interval between two ZCDs is less than the rising edge delay of R2, and the D1 trigger CLK signal cannot collect the rising edge signal. The output Q of the D1 trigger remains at a low level, and the signal output by the N4 inverter remains at a high level. The AND gate can effectively collect the ZCD signal for cumulative counting. When the number of ZCD signals reaches 16 times, the signal output by the output end Q of the D5 trigger is high, and the adaptive control BUCK circuit enters the frequency extension mode to extend the conduction time of the high-side tube HS. When the load current state changes continue to increase, the output voltage needs longer time to reach the output voltage set by the system, so the pulse width of the comparator output signal PWM will also keep the high level for a longer time, until the high level time increases to be higher than the B3 rising edge delay time, then the N5 inverter outputs a low level signal to reset the counter module as a whole, the output signal indicator bit becomes low level, and the system automatically exits the frequency expansion mode. The design of the rising edge delay time of B3 needs to be combined with the PWM comparator response time, drive time, dead time and peripheral devices.

[0036] The working principle of the above adaptive on-time module implementation method is as follows: When the system high-side tube conduction signal HS is high, the D flip-flop D1 is reset, the TON signal output is low to control NM3 to disconnect, and the system power supply VINH charges the capacitor C1 through the resistor R2. The VN voltage is the comparator inversion threshold point, and the voltage at this point can be obtained by the formula: From the capacitor current formula we can get: V gs,NM1 is the voltage between the gate and source of NM1 tube. Substituting VN formula into it, we can get: It can be seen from the formula that the TON time will be adjusted adaptively with the duty cycle DVV. However, the time from when the HS signal is high to when the TON signal output is high still needs to consider the comparator response time Td, so the overall TON time should be: When the ADDTON signal is high, the TON time becomes: It can be seen that the resistor R4 will intervene at this time to increase the voltage at the VN terminal and thus increase the TON time, that is, to extend the on-time of the high-side tube HS of the system. The extended TON time can be designed based on the compromise between the output voltage ripple and the load efficiency, so as to design the optimal value. In this solution, by changing the ratio to increase the voltage at the VN terminal, a large amount of chip area can be saved compared to changing the capacitor C1 or R2.

[0037] It can be seen from the TON formula that when the VINH voltage increases to a certain extent, the denominator of the first term of the TON equation increases, so the first term will become smaller. At this time, the error caused by the comparator response time Td will increase. Therefore, in this circuit design, a comparator current bias related to VINH is specially designed for compensation. gs,NM5 is the voltage between the gate and source of the NM5 tube, and the current formula is: It can be seen that VINH is positively correlated with the current bias. When the VINH voltage increases and the first term in the TON formula becomes smaller, the bias current will also increase to improve the response time of the comparator and ensure the design value of the TON time.

[0038] Therefore, the spread spectrum control module is responsible for real-time detection and status confirmation of the load state in this method, and the ADDTON signal output by it is used as a control signal of the adaptive on-time module to instruct the module to turn on or off the spread spectrum mode. The TON signal output by the adaptive on-time module is an indication signal indicating whether the logic control circuit and its driving circuit perform the spread spectrum action.

[0039] Combination Figure 1~Figure 5 As shown, the spread spectrum control implementation method of the spread spectrum control implementation circuit in the DCM mode of the buck converter according to the embodiment of the present invention includes a spread spectrum control execution process and a spread spectrum control release process.

[0040] like Figure 5 As shown in the left figure, the spread spectrum control execution process includes: 1. The chip power supply voltage is established, the enable port is at a high level, the enable control module enables the spread spectrum control circuit to connect to the power supply voltage, and the enable control module controls the chip to start working.

[0041] 2. At this time, the chip works in the light-load DCM mode, and the zero current detection module will Figure 4 When the SN,ON control low-side tube is turned on, the inductor energy provides energy to the energy storage capacitor and the load end through the arrow indication. Figure 4 The current value of the inductor L shown is determined and judged. When the inductor current is zero, a high level is output to instruct the logic control circuit to shut down the low-side tube.

[0042] 3. The spread spectrum control module is used to detect the load state based on the zero current detection signal, so that the load outputs a high level when it is within the set spread spectrum control range. Specifically: The adaptive load detection unit dynamically detects the ZCD (zero current detection) signal. When the filter time is greater than or equal to the set filter time Td, the output is low level, the load status confirmation unit cannot accumulate the number of triggering times of the zero current detection signal to perform spread spectrum control, and the adaptive load detection maintains real-time detection; As the load current increases, the time interval If the value is less than the set filtering time Td, the shielding signal output of the adaptive load detection unit is high level, and the load status confirmation unit receives the ZCD signal. The load status confirmation unit can ensure the accuracy of the control logic and avoid system misoperation. This module is responsible for accumulating and counting the ZCD signal. When the ZCD signal is triggered 16 times, it can be confirmed that the spread spectrum mode has been entered.

[0043] 4. When the spread spectrum control module outputs a high level, it controls the adaptive on-time module to expand the time and extend the high-side tube on-time. The high-side tube on-time is adaptively set by the adaptive on-time module according to the input voltage V IN and output voltage V OUT Get. Combine Figure 3 and Figure 5 As shown, the ADDTON signal output by the spread spectrum control module is high level, the NM2 tube is disconnected, and the R4 resistor is inserted to increase the TON conduction time (the R4 resistor is inserted to adjust the resistance ratio). The specific implementation method is described in the above Figure 3 The working principle has been explained.

[0044] 5. When the TON on-time of the adaptive on-time module is extended, the TON signal will be transmitted to the logic control circuit, such as Figure 1 When TON is at a high level, the logic control circuit will control the high-side tube (i.e., high-side power tube) to conduct, and the signal HS will output a high level and provide it to the drive circuit.

[0045] 6. If Figure 1As shown, the high-side tube conduction signal HS of the logic control circuit is connected to the drive circuit. The HS signal is high level, indicating that the drive circuit PDR signal outputs a high level. Figure 4 As shown, PDR serves as the output signal of the driving circuit to drive the external high-side power tube to turn on, that is, the power passes through the high-side power tube SP, and the inductor L supplies energy to the energy storage capacitor and the load.

[0046] like Figure 5 As shown in the right figure, the spread spectrum control release process includes: 1. At this time, the system still works in DCM mode under spread spectrum control.

[0047] 2. As the load current increases, more energy needs to be provided to the load in each cycle, so the output voltage rises more slowly and the comparator maintains a high level for a longer time.

[0048] 3. The PWM module's comparator outputs a high level, prompting the logic control circuit to turn on the high-side tube to replenish energy. When the load increases to the time when the PWM module's comparator outputs a high level When it is higher than the set filtering time Td, the spread spectrum control module outputs a low level.

[0049] 4. The spread spectrum control module outputs a low level to control the adaptive on-time module to turn off the expansion of the on-time.

[0050] 5. The high-side tube in the logic control circuit is turned on, and the output high-side tube conduction signal HS, and the drive circuit output signal PDR will also turn off the extension of the conduction time and exit the frequency extension mode.

[0051] Therefore, the present invention allows the system to perform frequency expansion only within the set load range. Figure 4 The conduction time of the high-side tube SP of the synchronous buck circuit shown is extended, and the circuit will not enter this mode under low load, no load or heavy load.

[0052] Figure 7 , Figure 8 and Fig. 9The effect diagram of the embodiment of the present invention is respectively a load change waveform diagram, a spread spectrum control circuit output waveform diagram and an output voltage waveform diagram. By comparing the load change waveform diagram and the spread spectrum control circuit output waveform, it can be seen that when the load current is extremely low or completely unloaded, the control circuit always outputs a level, and the system does not perform a spread spectrum operation. When the load current enters the design range, the control circuit output is a high level, and the adaptive conduction time module is controlled to increase the TON time. The system starts to spread the spectrum to increase the high-side tube conduction time, thereby extending the high resistance time to improve the system efficiency. As the load current continues to increase, the adaptive spread spectrum control module will automatically output a low level to release the spread spectrum control. As shown in the output voltage waveform diagram, the circuit without the introduction of the present invention does not perform a spread spectrum operation on the load, the cycle is smaller under light load, the switching loss is higher, and the equivalent time of the high resistance and low power consumption stage is shorter, and the system efficiency cannot be effectively improved under light load.

[0053] The function of the present invention is verified by simulation: The peripheral parameters of the BUCK circuit are Ind_4R7_ETQP3M4R7KPV model inductance 2.2uH, output capacitance 22uF, equivalent output parasitic resistance 30mohm, high-side power tube model: PMV27UPEA, low-side power tube model: PMV65UNEA.

[0054] like Fig.10 and Fig.11 As shown, it can be seen from the load, ripple and efficiency curve that the present invention can prohibit entering the spread spectrum mode under low load or complete no-load, so that the output voltage ripple is less than 10mv. The frequency expansion operation is performed within the set load range, which will be greatly improved to more than 70%. The ripple amount after the spread spectrum operation can be compromised according to the formula and the actual circuit environment. As the load increases, the control circuit will also adaptively exit the spread spectrum mode according to the design and return to the normal control mode to avoid stability interference caused by large ripple. In summary, the scheme can adaptively control the opening and closing of the spread spectrum mode, and successfully achieve a good balance between efficiency and ripple under light load.

[0055] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A circuit for implementing spread spectrum control in a buck converter DCM mode, characterized in that: The invention comprises a spread spectrum control module, an adaptive conduction time module, a PWM module, a logic control circuit and a zero current detection module; the zero current detection module is used to perform zero current detection after the low-side tube is turned on, and when the detected inductor current is zero, the logic control circuit is instructed to turn off the low-side tube; the spread spectrum control module is used to detect the load state based on the zero current detection signal, so that the load outputs a high level when it is within the set spread spectrum control range; the adaptive conduction time module is used to extend the high-side tube conduction time when the spread spectrum control module outputs a high level, and the high-side tube conduction time is adaptively set by the adaptive conduction time module according to the input voltage V of the converter in the non-spread spectrum mode. IN and output voltage V OUT The PWM module is used to convert the output voltage V OUT Falling to the voltage threshold V ref When the PWM module outputs a high level, when the time when the PWM module outputs a high level is longer than the set filtering time, the spread spectrum control module outputs a low level to instruct the logic control circuit to turn on the high-side tube.

2. The spread spectrum control implementation circuit according to claim 1, characterized in that: The spread spectrum control module performs spread spectrum control based on the number of triggering times of the zero current detection signal, and includes an adaptive load detection unit and a load state confirmation unit; the adaptive load detection unit is used to dynamically detect the zero current detection signal, and output a high level when the triggering time interval of the zero current detection signal is less than the set filtering time, and the load state confirmation unit accumulates the number of triggering times of the zero current detection signal to perform spread spectrum control, otherwise the load state confirmation unit does not accumulate the number of triggering times of the zero current detection signal.

3. The spread spectrum control implementation circuit according to claim 2, characterized in that: When the zero current detection signal is triggered 16 times, it is confirmed to enter the spread spectrum mode.

4. The spread spectrum control implementation circuit according to claim 2, characterized in that: The adaptive load detection unit includes rising edge delayers B1-B3, inverters N1-N5, NAND gates, AND gates, and D flip-flop D1; inverter N1, rising edge delayer B1 and inverter N2 are connected step by step; the first input end of the NAND gate NAND is connected to the output end of the inverter N2, the second input end is connected to the input end of the rising edge delayer B1, and the output end is connected to the Set end of the D flip-flop D1; inverter N3, rising edge delayer B2 and the CLK end of the D flip-flop D1 are connected step by step; the Q end of the D flip-flop D1, inverter N4 and the first input end of the AND gate AND are connected step by step; the output end of the rising edge delayer B3 is connected to the inverter N5; the input ends of the inverters N1 and N3, and the second input end of the AND gate AND are all connected to the output end of the zero current detection module; the input end of the rising edge delayer B3 is connected to the output end of the PWM module; the output ends of the inverter N5 and the AND gate AND are all connected to the load state confirmation unit.

5. The spread spectrum control implementation circuit according to claim 4, characterized in that: The load state confirmation unit includes D flip-flops D2-D5, whose Set terminals are all connected to the output terminal of the inverter N5; the CLK terminal of the D flip-flop D5 is connected to the output terminal of the AND gate AND; the D terminal of the D flip-flop D3, The D end of the D flip-flop D4 is connected to the CLK end of the D flip-flop D2; The D end of the D flip-flop D5 is connected to the CLK end of the D flip-flop D3; The Q end of the D flip-flop D2 is connected to the CLK end of the D flip-flop D4; the Q end of the D flip-flop D2 is the output end of the adaptive load detection unit.

6. The spread spectrum control implementation circuit according to claim 1, characterized in that: The adaptive on-time module includes an adaptive on-time circuit, a dynamic power bias comparator and a D trigger connected in stages; the output end of the D trigger is the on-time output end of the adaptive on-time module; the input end of the adaptive on-time circuit is connected to the output end of the spread spectrum control module.

7. The spread spectrum control implementation circuit according to claim 1, characterized in that: It also includes an enabling control module, which is used to enable the spread spectrum control implementation circuit to connect to the power supply voltage.

8. The spread spectrum control implementation circuit according to claim 1, characterized in that: It also includes a driving circuit for providing current to drive the external power tube to turn on and off after receiving the high-side tube conduction signal HS and the low-side tube conduction signal LS sent by the logic control circuit.

9. The spread spectrum control implementation circuit according to claim 1, characterized in that: Includes a voltage divider network for the output voltage V OUT Adjustment is done by circuit ratio.

10. The spread spectrum control implementation circuit according to claim 8, characterized in that: The PWM module includes a comparator, an error amplifier circuit and a ripple injection module; the output end of the ripple injection module is connected to the inverting input end of the comparator, the output end of the error amplifier circuit is connected to the non-inverting input end of the comparator, and the output end of the comparator is the output end of the PWM module; the input end of the ripple injection module and the first input end of the error amplifier circuit are both connected to the voltage divider network; the second input end of the error amplifier circuit is connected to a reference voltage.

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