Gold-free ohmic contact electrode, preparation method thereof and semiconductor device

Abstract

The invention relates to a non-gold ohmic contact electrode, a preparation method thereof and a semiconductor device, and belongs to the technical field of semiconductor devices. The non-gold ohmic contact electrode is formed on the surface of an epitaxial structure of the semiconductor device, and the outermost layer of the epitaxial structure is a p-GaN layer. The non-gold ohmic contact electrode comprises a first metal layer, a second metal layer and a third metal layer which are sequentially stacked on the surface of the p-GaN layer. Wherein the material of the first metal layer comprises at least one of Ti, Al or Zn; the material of the second metal layer comprises at least one of Ni, Pt or Ag, and the thickness of the second metal layer is 3-8 nm; and the third metal layer is made of Pd. The non-gold ohmic contact electrode has ultra-low specific contact resistivity, can greatly improve the performance of a GaN p-FETs device, does not contain Au, is low in manufacturing cost, and can be compatible with a GaN CMOS process and a Si-based CMOS process at the same time.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a gold-free ohmic contact electrode, a preparation method thereof, and a semiconductor device. Background Art

[0002] At present, in order to give full play to the performance advantages of gallium nitride (GaN) and eliminate parasitic inductance in circuit systems, monolithic integration of GaN-based complementary metal oxide semiconductor logic integrated circuits (GaN CMOS) and GaN devices has become an important research trend. However, as one of the basic units of GaN CMOS, p-channel GaN field effect transistors (GaN p-FETs) devices face difficulties such as large on-resistance (about 1kΩ) and small saturation current (less than 100mA / mm), they cannot match the performance of another basic unit, n-channel GaN field effect transistors (GaN n-FETs), which seriously limits the further development of GaN CMOS technology.

[0003] The ohmic contact formed at the metal / semiconductor interface at the source and drain electrodes of the device is the cornerstone of the device's connection with the external circuit. It is closely related to device performance such as saturation current and on-resistance. By reducing the resistance of the source and drain electrodes, the performance of GaN p-FETs devices can be significantly improved. However, there are currently three main methods for preparing ohmic contact electrodes: 1) optimizing the epitaxial structure and increasing the doping concentration; 2) surface treatment technology, using chemical solutions such as HCl, KOH and BOE to soak the sample before metal deposition to remove GaO generated by air oxidation on the p-GaN surface. x Barrier; 3) Selecting metal gold (Au) with high work function to reduce the barrier height. However, it is difficult to prepare ohmic contact electrodes with ultra-low resistance using the above three methods, and the specific contact resistivity is almost greater than 10 -4 Ω·cm 2 , which is still 2 to 3 orders of magnitude different from the specific contact resistivity of GaN n-FETs.

[0004] In addition, the strong diffusion of Au will cause equipment contamination, thus affecting process stability; in addition, Au is a precious metal material, which will increase the processing cost of the device and is not conducive to commercial application; and the existing Si-based CMOS process line does not allow the introduction of any process containing Au. Therefore, in order to introduce GaN CMOS technology into mature Si-based CMOS process lines, it is urgent to develop a gold-free ohmic contact electrode. Summary of the invention

[0005] To solve the above problems, the purpose of the embodiments of the present application includes providing a gold-free ohmic contact electrode and a preparation method thereof and a semiconductor device. The gold-free ohmic contact electrode has a low specific contact resistivity and does not contain gold, which can save manufacturing costs and is compatible with GaN CMOS and Si-based CMOS processes.

[0006] In the first aspect, the embodiment of the present application provides a gold-free ohmic contact electrode, which is formed on the surface of an epitaxial structure of a semiconductor device, and the outermost layer of the epitaxial structure is a p-GaN layer; the gold-free ohmic contact electrode includes a first metal layer, a second metal layer, and a third metal layer sequentially stacked on the surface of the p-GaN layer. Among them, the material of the first metal layer includes at least one of Ti, Al, or Zn; the material of the second metal layer includes at least one of Ni, Pt, or Ag, and the thickness of the second metal layer is 3 to 8 nm; the material of the third metal layer is Pd.

[0007] In the above technical solution, by designing a structure having a first metal layer, a second metal layer and a third metal layer and controlling the material of each metal layer, the gold-free ohmic contact electrode has an ultra-low specific contact resistivity. Among them, by selecting the material of the first metal layer to be Ti, Al or Zn with an electronegativity lower than that of Ga, since the electronegativity of Ga (1.81) is much lower than that of O (3.44), the GaO on the surface of the p-GaN layer can be removed in situ by utilizing the electronegativity difference with O. x By selecting Ni, Pt or Ag with high work function and / or oxygen affinity as the second metal layer, the high work function metal Ni and Pt can form a dense barrier layer to prevent Pd from reacting with residual O to form high resistance PdO to deteriorate the ohmic contact performance, and the oxygen-affinity metal Ni and Ag can react with residual O to form a p-type intermediate semiconductor layer p-NiO x or p-AgO x , reducing the barrier height; by controlling the material of the third metal layer to be Pd, using the high reactivity of Pd with Ga and the low formation enthalpy of reaction with Ga, it can more effectively promote the outward diffusion of Ga elements, form Ga vacancies, and increase the hole concentration, but Pd easily reacts with O, so by setting the first metal layer and the second metal layer, it is effective to avoid direct contact between Pd and O. The specific contact resistivity of the gold-free ohmic contact electrode provided in this application is less than 5×10 -5 Ω·cm 2 , and because it does not contain Au, it can save manufacturing costs and is compatible with GaN CMOS and Si-based CMOS processes.

[0008] In some embodiments of the present application, the thickness of the first metal layer is not greater than 2 nm. By controlling the thickness of the first metal layer within a suitable range, the in-situ removal of GaO on the surface of the p-GaN layer can be achieved. x, and at the same time, it can prevent the metal elements blocking the second metal layer from diffusing into the p-GaN layer to form an ohmic contact.

[0009] In some embodiments of the present application, the thickness of the second metal layer is 5 nm. By controlling the thickness of the second metal layer to a suitable value, the metal elements of the second metal layer can be diffused into the p-GaN layer to form an ohmic contact, while preventing the Pd of the third metal layer from diffusing into the p-GaN layer and directly contacting the p-GaN.

[0010] In some embodiments of the present application, the thickness of the third metal layer is not less than 20 nm. By controlling the third metal layer to have a larger thickness, a large number of Ga vacancies can be generated in the p-GaN layer, the net hole concentration can be increased, and the barrier height can be reduced, thereby further reducing the specific contact resistivity.

[0011] In a second aspect, an embodiment of the present application provides a method for preparing the above-mentioned gold-free ohmic contact electrode, comprising the following steps:

[0012] Providing an epitaxial structure with a p-GaN layer as the outermost layer;

[0013] Depositing metals on the surface of the p-GaN layer in sequence to form a first metal layer, a second metal layer and a third metal layer to obtain a prefabricated structure; wherein the material of the first metal layer includes at least one of Ti, Al or Zn; the material of the second metal layer includes at least one of Ni, Pt or Ag; and the material of the third metal layer is Pd;

[0014] The prefabricated structure is annealed to obtain a gold-free ohmic contact electrode.

[0015] In the above technical solution, by sequentially depositing metals on the surface of the p-GaN layer to form a first metal layer, a second metal layer and a third metal layer, and controlling the material of each metal layer, a gold-free ohmic contact electrode with ultra-low specific contact resistivity can be prepared. Among them, since the traditional ohmic contact preparation requires an additional surface treatment step between photolithography and metal deposition to remove GaO on the surface of the p-GaN layer, the ohmic contact electrode can be prepared. x In this application, the first metal layer is formed by controlling the deposition of Ti, Al or Zn with electronegativity less than Ga, which can achieve in-situ removal of GaO x , and can also avoid the problem of reduced device reliability caused by the use of chemical solutions. The second metal layer is formed by depositing Ni, Pt or Ag with high work function and / or oxygen affinity. High work function metal Ni and Pt can form a dense barrier layer to prevent Pd from reacting with residual O to form high resistance PdO to deteriorate ohmic contact performance. Oxyphilic metal Ni and Ag can react with residual O to form a p-type intermediate semiconductor layer p-NiO x or p-AgO x, reducing the barrier height; by depositing Pd to form the third metal layer, the high reactivity of Pd with Ga and the low formation enthalpy of reaction with Ga can more effectively promote the outward diffusion of Ga elements, form Ga vacancies, and increase the hole concentration, but Pd easily reacts with O, so by setting the first metal layer and the second metal layer, direct contact between Pd and O can be effectively avoided.

[0016] The preparation method provided in this application can reduce the specific contact resistivity of the gold-free ohmic contact electrode on the p-GaN device to the order of -5, reaching the same or even better ohmic contact level as that of n-GaN devices, greatly improving the performance of GaN p-FETs. When the epitaxial structure has dual-channel characteristics, it can also be used to prepare GaN n-FETs devices at the same time, which is very suitable for GaN CMOS integration process.

[0017] In addition, since Au is not used in the entire preparation method, the problem of equipment contamination due to the strong diffusion of Au is avoided, thereby improving the process stability; in addition, Au is a precious metal, which increases the processing cost of the device and is not conducive to commercial application, thus reducing the process cost and being more conducive to commercial application; and the existing Si-based CMOS process line does not allow the introduction of any process containing Au, so the preparation method of the present application can successfully introduce GaN CMOS technology into mature Si-based CMOS process lines.

[0018] In some embodiments of the present application, the thickness of the first metal layer is not greater than 2 nm. By controlling the thickness of the first metal layer within a suitable range, the in-situ removal of GaO on the surface of the p-GaN layer can be achieved. x , and at the same time, it can prevent the metal elements blocking the second metal layer from diffusing into the p-GaN layer to form an ohmic contact.

[0019] In some embodiments of the present application, the thickness of the second metal layer is 5 nm. By controlling the thickness of the second metal layer to a suitable value, the metal elements of the second metal layer can be diffused into the p-GaN layer to form an ohmic contact, while preventing the Pd of the third metal layer from diffusing into the p-GaN layer and directly contacting the p-GaN.

[0020] In some embodiments of the present application, the thickness of the third metal layer is not less than 20 nm. By controlling the third metal layer to have a larger thickness, a large number of Ga vacancies can be generated in the p-GaN layer, the net hole concentration can be increased, and the barrier height can be reduced, thereby further reducing the specific contact resistivity.

[0021] In some embodiments of the present application, the preparation method further includes: cleaning the surface of the epitaxial structure; and preparing an electrode pattern on the surface of the p-GaN layer;

[0022] After obtaining the prefabricated structure, the method further includes: removing metal outside the electrode pattern.

[0023] In some embodiments of the present application, the annealing conditions include: a temperature of 450-600° C. and an annealing atmosphere of an inert gas environment.

[0024] In a third aspect, an embodiment of the present application provides a semiconductor device, comprising the gold-free ohmic contact electrode provided in the first aspect of the present application, or the gold-free ohmic contact electrode prepared by the preparation method provided in the second aspect of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 A schematic diagram of the structure of a gold-free ohmic contact electrode provided in an embodiment of the present application.

[0027] Figure 2 A process flow chart of a method for preparing a gold-free ohmic contact electrode provided in an embodiment of the present application.

[0028] Figure 3 This is a graph showing the ohmic performance test of the semiconductor device prepared in Example 1 of the present application.

[0029] Figure 4 This is a graph showing the ohmic performance test of the semiconductor device prepared in Comparative Example 1 of the present application.

[0030] Figure 5 This is a graph showing the ohmic performance test of the semiconductor device prepared in Comparative Example 2 of the present application.

[0031] Figure 6 This is a graph showing the ohmic performance test of the semiconductor device prepared in Comparative Example 3 of the present application.

[0032] Description of main component symbols:

[0033] 100-epitaxial structure; 10-substrate layer; 11-buffer layer; 12-GaN layer; 13-AlN layer; 14-AlGaN layer; 15-U-GaN layer; 16-p-GaN layer; 200-gold-free ohmic contact electrode; 20-first metal layer; 22-second metal layer; 24-third metal layer. DETAILED DESCRIPTION

[0034] Hereinafter, the gold-free ohmic contact electrode, preparation method and implementation mode of the semiconductor device of the present application are specifically disclosed with appropriate reference to the accompanying drawings. However, there may be cases where unnecessary detailed descriptions are omitted. For example, there are cases where detailed descriptions of well-known matters and repeated descriptions of actually the same structures are omitted. This is to avoid the following description from becoming unnecessarily lengthy and to facilitate the understanding of those skilled in the art. In addition, the drawings and the following descriptions are provided for those skilled in the art to fully understand the present application and are not intended to limit the subject matter described in the claims.

[0035] Unless otherwise specified, all embodiments and optional embodiments of the present application can be combined with each other to form a new technical solution.

[0036] Unless otherwise specified, all technical features and optional technical features of this application can be combined with each other to form a new technical solution.

[0037] If there is no special explanation, all steps of the present application can be performed sequentially or randomly, preferably sequentially. For example, the method includes steps (a) and (b), which means that the method may include steps (a) and (b) performed sequentially, or may include steps (b) and (a) performed sequentially. For example, the method may further include step (c), which means that step (c) may be added to the method in any order. For example, the method may include steps (a), (b) and (c), or may include steps (a), (c) and (b), or may include steps (c), (a) and (b), etc.

[0038] As mentioned above, the performance of GaN p-FETs devices can be improved by reducing the resistance of the source and drain, promoting the further development of GaN CMOS technology. However, there are currently three main methods for preparing ohmic contact electrodes: 1) Optimizing the epitaxial structure and increasing the doping concentration. The increase in doping concentration will lead to too many epitaxial defects, seriously affecting the crystal quality of p-GaN, resulting in a serious reduction in other electrical properties of p-FETs. 2) Surface treatment technology, using chemical solutions such as HCl, KOH and BOE to soak the sample before metal deposition to remove GaO generated by air oxidation on the p-GaN surface. x However, this surface treatment technology has little effect on the formation of ohmic contacts between the source and drain of the device, because after being immersed in the chemical solution, the epitaxial wafer cannot be immediately placed in the high vacuum coating equipment to deposit metal electrodes, and it will be exposed to the air for a period of time to form new GaO x, and the residual chemical solution will also lead to a decrease in the reliability of the final device. 3) Select metals with high work function to reduce the barrier height, such as gold (Au). This method is the same as the above two methods. It is difficult to prepare an ohmic contact electrode with ultra-low resistance. The specific contact resistivity is almost greater than 10 -4 Ω·cm 2 , which is still 2 to 3 orders of magnitude different from the specific contact resistivity of GaN n-FETs. Moreover, the strong diffusion of Au will cause equipment contamination, thus affecting process stability. In addition, Au is a precious metal material, which will increase the processing cost of the device and is not conducive to commercial application. In addition, the existing Si-based CMOS process line does not allow the introduction of any process containing Au.

[0039] Based on this, an embodiment of the present application provides a gold-free ohmic contact electrode. Figure 1 This is a schematic diagram of the structure of a gold-free ohmic contact electrode provided in an embodiment of the present application. Figure 1 The gold-free ohmic contact electrode 200 is formed on the surface of the epitaxial structure 100 of the semiconductor device, and the outermost layer of the epitaxial structure 100 is the p-GaN layer 16. The gold-free ohmic contact electrode 200 includes a first metal layer 20, a second metal layer 22 and a third metal layer 24 stacked sequentially on the surface of the p-GaN layer 16. Among them, the material of the first metal layer 20 is a first metal with an electronegativity less than Ga; the material of the second metal layer 22 includes at least one of Ni, Pt or Ag, and the thickness of the second metal layer 22 is 3 to 8 nm; the material of the third metal layer 24 is Pd.

[0040] The present application designs a gold-free ohmic contact electrode having a structure of a first metal layer, a second metal layer and a third metal layer, and controls the material of each metal layer, so that the gold-free ohmic contact electrode has an ultra-low specific contact resistivity. Among them, by selecting the material of the first metal layer to be Ti, Al or Zn with an electronegativity lower than that of Ga, since the electronegativity of Ga (1.81) is much lower than that of O (3.44), the difference in electronegativity with O can be used to effectively remove GaO on the surface of the p-GaN layer in situ. x By controlling the material of the second metal layer to be Ni, Pt or Ag with high work function and / or oxygen affinity and controlling the appropriate thickness range, the high work function metal Ni and Pt can form a dense barrier layer to prevent Pd from reacting with residual O to form high resistance PdO to deteriorate the ohmic contact performance, and the oxygen-affinity metal Ni and Ag can react with residual O to form a p-type intermediate semiconductor layer p-NiO x or p-AgO x, reducing the barrier height; by controlling the material of the third metal layer to be Pd, using the high reactivity of Pd with Ga and the low formation enthalpy of reaction with Ga, it can more effectively promote the outward diffusion of Ga elements, form Ga vacancies, and increase the hole concentration, but Pd easily reacts with O, so by setting the first metal layer and the second metal layer, it is effective to avoid direct contact between Pd and O. The specific contact resistivity of the gold-free ohmic contact electrode provided in this application is less than 5×10 -5 Ω·cm 2 , and because it does not contain Au, it can save manufacturing costs and is compatible with GaNCMOS and Si-based CMOS processes.

[0041] The specific structure and preparation method of the gold-free ohmic contact electrode provided in the embodiments of the present application are described in detail below in conjunction with the accompanying drawings.

[0042] Figure 2 This is a process flow chart of a method for preparing a gold-free ohmic contact electrode provided in an embodiment of the present application. Figure 1 and Figure 2 The method for preparing the gold-free ohmic contact electrode provided in the embodiment of the present application comprises the following steps:

[0043] S110 , providing an epitaxial structure 100 whose outermost layer is a p-GaN layer.

[0044] The preparation method of the present application does not specifically limit the specific structure of the epitaxial structure 100, as long as the outermost layer is a p-GaN layer. The preparation method of the present application can be applied to the preparation of ohmic contact electrodes of discrete devices with any p-GaN epitaxial structure. For example, p-GaN / AlGaN / GaN, p-GaN / U-GaN / AlGaN / GaN, p-GaN / AlGaN / AlN / GaN, p-GaN / AlN / AlGaN / AlN / GaN / , etc. with a two-dimensional electron gas (2DEG) and a two-dimensional hole gas (2DHG) double channel layer; p-InGaN / GaN / AlN, p-AlGaN / p-GaN, etc. with a single channel layer; it can also be used for p-GaN of light-emitting diodes (LEDs), p-GaN / MQW / n-GaN of specialized p discrete devices, etc.

[0045] See also Figure 1 In some embodiments, the epitaxial structure 100 may include a substrate layer 10, a buffer layer 11, a GaN layer 12, an AlN layer 13, an AlGaN layer 14, a U-GaN layer 15, and a p-GaN layer 16 stacked in sequence. The substrate layer 10 may be made of any material such as sapphire, silicon, silicon carbide, diamond, etc., and the material of the buffer layer 11 may be at least one of AlN, AlGaN, and GaN. The thickness of each layer in the epitaxial structure 100 may be adjusted as needed.

[0046] Before forming the gold-free ohmic contact electrode, the process further includes: cleaning the surface of the epitaxial structure 100 .

[0047] In some embodiments, the surface cleaning step may include: using acetone solution and isopropanol solution to clean organic pollutants and particles attached to the surface, etc. Specifically, the epitaxial structure 100 is immersed in acetone for ultrasonic cleaning for about 10 minutes, then immersed in isopropanol solution for ultrasonic cleaning for 5 minutes, and finally deionized water is used to clean the residual solution on the surface, and then dried with nitrogen.

[0048] S120, depositing metals in sequence on the surface of the p-GaN layer 16 to form a first metal layer 20, a second metal layer 22 and a third metal layer 24 to obtain a prefabricated structure; wherein the material of the first metal layer 20 includes at least one of Ti, Al or Zn; the material of the second metal layer 22 includes at least one of Ni, Pt or Ag, and the thickness of the second metal layer 22 is 3 to 8 nm; the material of the third metal layer 24 is Pd.

[0049] Among them, the electronegativity of Ti is 1.54, the electronegativity of Al is 1.61, and the electronegativity of Zn is 1.65, which are all smaller than the electronegativity of Ga (1.81), and much smaller than the electronegativity of O (3.44). Therefore, the metal of the first metal layer 20 can in-situ remove the GaO on the surface of the p-GaN layer during the subsequent annealing process. x .

[0050] It can be understood that the first metal layer 20 can be a single metal layer, such as a Ti metal layer, an Al metal layer or a Zn metal layer, or it can be an alloy of any two or three of Ti, Al or Zn. For example, the first metal layer 20 can be a Ti, Al alloy layer, a Ti, Zn alloy layer or a Ti, Al, Zn alloy layer.

[0051] In some embodiments, the thickness of the first metal layer 20 is not greater than 2 nm, for example, 2 nm, 1.5 nm, 1 nm, 0.8 nm, 0.5 nm, etc.

[0052] Among them, Ni and Pt are high work function metals, the work function of Ni is 5.01eV, and the work function of Pt is 5.3eV. Ni and Pt can form a dense barrier layer, thereby preventing residual O from diffusing into the third metal layer 24 and reacting with Pd to form high-resistance PdO to deteriorate the ohmic contact performance. Ni and Ag are strong oxygen-affinity metals, which can react with residual O to form a p-type intermediate semiconductor layer p-NiO x or p-AgO x , reducing the barrier height.

[0053] It can be understood that the second metal layer 22 can be a single metal layer, such as a Ni metal layer, a Pt metal layer or an Ag metal layer, or it can be an alloy of any two or three of Ni, Pt, and Ag. For example, the second metal layer 22 can be a Ni, Pt alloy layer or a Ni, Ag alloy layer.

[0054] Preferably, the second metal layer 22 is made of Ni. Ni has both high work function and strong oxygen affinity, so that the barrier formed between it and the p-GaN layer 16 is lower, and the reaction with residual O also avoids the reaction of O and Pd to form high-resistance PdO. In addition, the Ni metal layer can also promote the out-diffusion of part of Ga, form Ga vacancies, increase the hole concentration, and be more conducive to carrier transport. More preferably, the thickness of the second metal layer 22 is 5nm.

[0055] In some embodiments, the thickness of the third metal layer 24 is not less than 20 nm, for example, 20 nm, 30 nm, 50 nm, 100 nm, etc.

[0056] In some embodiments, before depositing metal sequentially on the surface of the p-GaN layer 16, the method further includes: preparing an electrode pattern on the surface of the p-GaN layer 16. After obtaining the prefabricated structure, the method further includes: removing the metal outside the electrode pattern.

[0057] As an example, the method for preparing the electrode pattern can adopt the graphic lithography technology. Specifically, a double-layer glue process of LOR-5A and 304.10 is adopted. When applying the glue, the parameters of 4000RMP and 60 seconds are first set to coat LOR-5A and pre-bake at 170°C for 8 minutes, and then the parameters of 3000RMP and 30 seconds are set to coat 304.10 and pre-bake at 100°C for 3 minutes. Then, the mask corresponding to the ohmic electrode is used for exposure. The exposure mode is hard contact, the time is 2.4 seconds, and the development is performed for 65 seconds after the exposure is completed. Then, the film is post-baked at 120°C for 90 seconds.

[0058] As an example, the method of removing the metal outside the electrode pattern can adopt a metal lift-off process. Specifically, dimethyl sulfoxide (DMSO) is used, the water bath is heated to 80°C, and then the prefabricated structure is immersed in DMSO for 15 minutes, and then a short-time low-power ultrasonic treatment is performed to ensure that the metal in the area with smaller line width is completely stripped. After the pattern is clear and complete, it is taken out and washed with deionized water, and finally blown dry with nitrogen.

[0059] In other embodiments, after metals are sequentially deposited on the surface of the p-GaN layer 16 , an electrode pattern may be formed by etching or other processes.

[0060] S130, performing annealing treatment on the prefabricated structure to obtain the gold-free ohmic contact electrode 200.

[0061] In some embodiments, the annealing process conditions include: a temperature of 450-600° C., and an annealing atmosphere of an inert gas environment.

[0062] Furthermore, the annealing atmosphere is nitrogen, and the annealing treatment time is 100 to 600 seconds.

[0063] In addition, an embodiment of the present application also provides a semiconductor device, including the above-mentioned gold-free ohmic contact electrode.

[0064] Since the gold-free ohmic contact electrode and its preparation method provided by the present application can be applied to any discrete device with p-GaN epitaxial structure, the semiconductor device can be a GaN n-FETs device in addition to a GaN p-FETs device, and can also be other field effect transistors, LEDs, etc.

[0065] The embodiments of the present application will be described in detail below in conjunction with specific examples, but it will be appreciated by those skilled in the art that the following examples are only used to illustrate the present application and should not be considered as limiting the scope of the present application. If specific conditions are not specified in the examples, they are carried out according to normal conditions or the conditions recommended by the manufacturer. If the manufacturer is not specified for the reagents or instruments used, they are all conventional products that can be purchased commercially.

[0066] Example 1

[0067] This embodiment provides a semiconductor device, and the preparation method thereof includes the following steps:

[0068] (1) An epitaxial structure with a p-GaN layer as the outermost layer is provided. The epitaxial structure includes a substrate layer (Si), three buffer layers (AlN layer, AlGaN layer and GaN layer), GaN layer, AlN layer, AlGaN layer, U-GaN layer and p-GaN layer stacked in sequence. The epitaxial structure is immersed in acetone for ultrasonic cleaning for about 10 minutes, then immersed in isopropanol for ultrasonic cleaning for 5 minutes, and finally, the residual solution on the surface is cleaned with deionized water and blown dry with nitrogen.

[0069] (2) Graphical photolithography. A double-layer glue process of LOR-5A and 304.10 is used to perform graphic photolithography on the surface of the p-GaN layer to form an electrode pattern. When applying the glue, first set the parameters of 4000RMP and 60 seconds to coat LOR-5A and perform pre-bake heating at 170°C for 8 minutes, then set the parameters of 3000RMP and 30 seconds to coat 304.10 and perform pre-bake heating at 100°C for 3 minutes. Then use the mask corresponding to the ohmic electrode for exposure. The exposure mode is hard contact, the time is 2.4 seconds, and the development is performed for 65 seconds after the exposure is completed. Then perform a post-bake at 120°C for 90 seconds to harden the film.

[0070] (3) Metal deposition and stripping. Place the sample photolithographically prepared in step (2) into the coating equipment, and perform metal deposition on the surface of the p-GaN layer to sequentially form a Ti metal layer with a thickness of 1 nm, a Ni metal layer with a thickness of 5 nm, and a Pd metal layer with a thickness of 30 nm to obtain a prefabricated structure. Heat the prefabricated structure to 80°C in a DMSO water bath, then immerse the prefabricated structure in DMSO for 15 minutes, and then perform a short-term low-power ultrasonic treatment to ensure that the metal in the area with smaller line width is completely stripped. After the pattern is clear and complete, take out the sample and wash it with deionized water, and finally blow it dry with nitrogen.

[0071] (4) Annealing treatment: The sample was subjected to high temperature rapid thermal annealing treatment at 500° C. in a nitrogen atmosphere for 300 seconds to obtain a semiconductor device including a gold-free ohmic contact electrode.

[0072] Comparative Example 1

[0073] This comparative example provides a semiconductor device, and its preparation method is different from that of Example 1 in that: in step (3), metal deposition is performed on the surface of the p-GaN layer to sequentially form a Ni metal layer with a thickness of 5 nm and a Pd metal layer with a thickness of 30 nm.

[0074] Comparative Example 2

[0075] This comparative example provides a semiconductor device, and its preparation method is different from that of Example 1 in that: in step (3), metal deposition is performed on the surface of the p-GaN layer to form a Pd metal layer with a thickness of 30 nm.

[0076] Comparative Example 3

[0077] This comparative example provides a semiconductor device, the preparation method of which is different from that of Example 1 in that: in step (3), metal deposition is performed on the surface of the p-GaN layer to sequentially form a Ti metal layer with a thickness of 1 nm, a Ni metal layer with a thickness of 20 nm, and a Pd metal layer with a thickness of 30 nm.

[0078] The structural composition of the electrodes in the above embodiments and comparative examples can be seen in Table 1.

[0079] Table 1 Structure and composition of electrodes in Examples and Comparative Examples

[0080]

[0081] Performance testing and result analysis

[0082] The semiconductor devices prepared in the embodiment and the comparative example were subjected to ohmic performance tests using an Agilent 4200 semiconductor device analyzer (parameter analyzer) equipped with a probe station (probe station).

[0083] Figure 3 The ohmic performance test curve of the semiconductor device prepared in Example 1 is shown in FIG. Figure 3 It can be seen that when the annealing temperature is 500℃, an ohmic contact is formed (the straight line is the ohmic contact, and the curve is the Schottky contact), and the specific contact resistivity ρ c 2.23×10 -5 Ω·cm 2 .

[0084] Figure 4 The ohmic performance test curve of the semiconductor device prepared in Comparative Example 1 is shown in FIG. Figure 4 It can be seen that when the electrode contains only a Ni metal layer and a Pd metal layer, a Schottky contact is formed when the annealing temperature is 500°C, and no ohmic contact is formed.

[0085] Figure 5 The ohmic performance test curve of the semiconductor device prepared in Comparative Example 2 is shown in FIG. Figure 5 It can be seen that when the electrode contains only a Pd metal layer, a Schottky contact is formed when the annealing temperature is 500°C, and no ohmic contact is formed.

[0086] Figure 6 The ohmic performance test curve of the semiconductor device prepared in Comparative Example 3 is shown in FIG. Figure 6 It can be seen that when the electrode contains a 1nm Ti metal layer, a 20nm Ni metal layer, and a 30nm Pd metal layer, although an ohmic contact can be formed when the annealing temperature is 500℃, the specific contact resistivity ρ c Only 3.78×10 -3 Ω·cm 2 .

[0087] The embodiments described above are part of the embodiments of the present application, rather than all of the embodiments. The detailed description of the embodiments of the present application is not intended to limit the scope of the present application for protection, but merely represents the selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

Claims

1. A gold-free ohmic contact electrode, formed on the surface of an epitaxial structure of a semiconductor device, wherein the outermost layer of the epitaxial structure is a p-GaN layer, characterized in that: The gold-free ohmic contact electrode comprises a first metal layer, a second metal layer and a third metal layer sequentially stacked on the surface of the p-GaN layer; The material of the first metal layer includes at least one of Ti, Al or Zn; the material of the second metal layer includes at least one of Ni, Pt or Ag, and the thickness of the second metal layer is 3 to 8 nm; the material of the third metal layer is Pd.

2. The gold-free ohmic contact electrode according to claim 1, characterized in that: The thickness of the first metal layer is no more than 2 nm.

3. The gold-free ohmic contact electrode according to claim 1, characterized in that: The thickness of the second metal layer is 5 nm.

4. The gold-free ohmic contact electrode according to claim 1, characterized in that: The thickness of the third metal layer is not less than 20 nm.

5. A method for preparing a gold-free ohmic contact electrode, characterized in that: The following steps are involved: Providing an epitaxial structure with a p-GaN layer as the outermost layer; Depositing metals on the surface of the p-GaN layer in sequence to form a first metal layer, a second metal layer and a third metal layer to obtain a prefabricated structure; wherein the material of the first metal layer includes at least one of Ti, Al or Zn; the material of the second metal layer includes at least one of Ni, Pt or Ag, and the thickness of the second metal layer is 3 to 8 nm; the material of the third metal layer is Pd; The prefabricated structure is annealed to obtain a gold-free ohmic contact electrode.

6. The preparation method according to claim 5, characterized in that: The thickness of the first metal layer is no more than 2 nm.

7. The preparation method according to claim 5, characterized in that: The thickness of the second metal layer is 5 nm.

8. The preparation method according to claim 5, characterized in that: Also includes: Cleaning the surface of the epitaxial structure; and preparing an electrode pattern on the surface of the p-GaN layer; After obtaining the prefabricated structure, the method further includes: removing metal outside the electrode pattern.

9. The preparation method according to claim 5, characterized in that: The annealing treatment conditions include: a temperature of 450-600° C. and an annealing atmosphere of an inert gas environment.

10. A semiconductor device, characterized in that: The invention comprises the gold-free ohmic contact electrode according to any one of claims 1 to 4, or comprises the gold-free ohmic contact electrode prepared by the preparation method according to any one of claims 5 to 9.

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