Quantum bit selective tuning of two-level systems in superconducting qubits via optical control

Abstract

Methods and systems are provided for mitigating the effects of defects in a quantum processor. A mitigation system includes a quantum processor having a plurality of qubits. The system includes an array of light emitting sources. Each light emitting source is aligned with a quantum bit on the quantum processor. The system includes a controller configured to receive a selection of a qubit and to enable light emitting sources from the array of light emitting sources to emit light to the selected qubit. The light is used to disrupt a strongly coupled two level system (TLS) in a quantum processor.

Description

Technical Field

[0001] The present disclosure relates generally to quantum computing, and more particularly to selective tuning of qubits via optical control. Background Art

[0002] Quantum bits or qubits are the basic elements of information encoding in quantum computers. Two-level systems or TLS are pseudo quantum systems that can couple to qubits and cause decoherence. TLS is one of the main sources of decoherence in superconducting quantum circuits. Typically, TLS consists of two groups: a large set of low-frequency two-level fluctuators (fluctuators) (baths) and several discrete two-level systems that are close to resonance with the qubit transitions. If TLS interacts strongly with the qubit, the qubit becomes inoperable due to frequency shifts and decoherence.

[0003] The properties of these TLS are not fully understood, but are thought to arise from crystal defects, surface defects, or atomic-scale defects in the material that create microscopic dipoles (atomic or electron traps) that interact with the qubit (e.g., couple to the qubit's electric field). TLS are always present and randomly distributed.

[0004] The two-level system can be non-resonant or in resonance with the qubit. Resonant TLS is much more harmful than non-resonant TLS. These strongly coupled TLS in resonance have a significant adverse effect on the gate fidelity in the processor. This is especially true for processors based on fixed frequency qubits. Summary of the invention

[0005] Some embodiments of the present disclosure provide methods and systems for mitigating the effects of defects in a quantum processor. The system includes a quantum processor having a plurality of qubits. The system includes an array of light sources. In some embodiments, the light sources are used to disrupt a two-level system (TLS) in the quantum processor. Each light source is aligned with a qubit on the quantum processor. The system includes a controller configured to receive a selection of a qubit and enable a light source from the array of light sources to emit light to the selected qubit.

[0006] In some embodiments, the array of light sources is supplied by different light sources. In some embodiments, multiple light sources are supplied by a common light source. In some embodiments, each light source array in the array of light sources is a light emitting diode (LED). In some embodiments, each light source in the light source is a laser. In some embodiments, the array of light sources can be provided by a mounted lens array connected to a plurality of optical fibers. In embodiments that can be combined with the previous embodiments, the lenses in the mounted lens array can be mounted on an illumination chip that is in the same package as the package of the quantum processor. The illumination chip can be in the same refrigeration unit as the refrigeration unit of the quantum processor. In some embodiments, the array of light sources is provided by a mounted optical fiber array.

[0007] In some embodiments, the system may include an optical switch matrix that distributes light pulses from the optical fiber to the lens array. The input of the optical switch matrix is ​​connected to the optical fiber. The output of the optical switch matrix is ​​connected to the optical fiber array that feeds the lens array. The system may also include a controller configured to receive a selection of a qubit and enable the optical switch matrix to pass the light pulse from the optical fiber to the light emitting source aligned with the selected qubit.

[0008] In some embodiments, the system may include a light source and a positioning device configured to physically move the light source relative to the quantum processor. The system may also include a controller configured to receive a selection of a quantum bit and control the positioning device to move the light source to a position corresponding to the selected quantum bit.

[0009] Two-level systems are one of the most fundamental problems in superconducting qubits because they are the main source of decoherence. The ability to focus light on a specific qubit can quickly improve the coherence of the qubit, rather than relying on time-consuming processes such as heating the entire quantum processor.

[0010] The foregoing summary is intended to serve as a brief introduction to some embodiments of the present disclosure. This is not meant to be an introduction or overview of all inventive subject matter disclosed herein. The following detailed description and the drawings referenced in the detailed description will further describe the embodiments described in the summary as well as other embodiments. Therefore, in order to understand all embodiments described by this document, the summary, the detailed description and the drawings are provided. In addition, the claimed subject matter is not limited by the illustrative details in the summary, the detailed description and the drawings, but is defined by the appended claims, because the claimed subject matter may be embodied in other specific forms without departing from the spirit of the present subject matter. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The accompanying drawings are illustrative embodiments. They do not show all embodiments. Additionally or alternatively, other embodiments may be used. Details that may be obvious or unnecessary may be omitted to save space or for more effective description. Some embodiments may be implemented with additional components or steps and / or without all components or steps shown. When the same number appears in different drawings, it refers to the same or similar components or steps.

[0012] Figure 1 A two-level system mitigation system consistent with an illustrative embodiment is shown that uses illumination to mitigate the effects of a two-level system in a quantum processor.

[0013] Figure 2 A method for measuring the performance of a quantum bit is shown.

[0014] Figure 3 An example two-level system landscape consistent with an illustrative embodiment is shown.

[0015] Figure 4 A quantum processor having qubits illuminated by optical fibers is shown consistent with an illustrative embodiment.

[0016] Figure 5 Spectral graphs of a qubit in a quantum processor before and after illumination are shown, consistent with an illustrative embodiment.

[0017] Figure 6 A process for repeatedly applying illumination to a quantum processor to eliminate strongly coupled two-level system interactions is conceptually shown, consistent with an illustrative embodiment.

[0018] Figure 7 A plurality of light emitting sources are shown being used to illuminate qubits of a quantum processor, with each light emitting source in the array aligned with a qubit on the quantum processor, consistent with an exemplary embodiment.

[0019] Figure 8 An array of light emitting diodes (LEDs) in an illumination chip for illuminating an array of qubits in a processor is shown, consistent with an illustrative embodiment.

[0020] Fig. 9 An array of mounted lenses connected to a plurality of optical fibers for illuminating an array of qubits in a processor is shown consistent with an illustrative embodiment.

[0021] Fig.10 An array of optical fibers is shown for mounting of a qubit array in an illumination processor, consistent with an illustrative embodiment.

[0022] Fig.11Multiple light emitting sources are shown, consistent with an illustrative embodiment, being supplied by a common light source to illuminate an array of qubits in a processor.

[0023] Fig.12 A positioning apparatus for positioning a light source to illuminate selected qubits in a quantum processor is shown, consistent with an illustrative embodiment.

[0024] Fig.13 A block diagram showing components of a data processing system according to an illustrative embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0025] In the following detailed description, numerous specific details are set forth by way of example in order to provide a thorough understanding of the relevant teachings. However, it should be appreciated that the present teachings may be practiced without these details. In other examples, well-known methods, procedures, components and / or circuits have been described at a relatively high level without detail in order to avoid unnecessarily obscuring aspects of the present teachings.

[0026] Because strongly coupled TLS is significantly harmful to the performance of qubits in a large number of subcircuits, it is significant to develop methods to shift their frequencies to non-resonance. The frequency of TLSs is adjustable by electric fields and material strains because the frequency (spectral diffusion) of TLSs drifts slowly over time on a time scale of hours to days. Therefore, TLS can be alleviated by waiting for its diffusion in large quantities. TLS can also be removed from qubits by heating or thermally cycling the entire processor until several Kelvins. Heating the entire processor is a very time-consuming process because it usually takes a long time (e.g., hours) and involves a complete recalibration of the processor. Heating the entire processor is also a random global process that cannot be used to target a specific qubit. It is uncertain that any specific TLS will be shifted in frequency by global heating. There is also a possibility that a qubit previously released from a TLS can interact with another TLS after heating.

[0027] Some embodiments provide methods and systems for mitigating the effects of strongly coupled two-level systems. Specifically, optical illumination is used to disrupt the frequency of the two-level system. Disrupting the TLS distribution is used to improve coherence time and maintain stable quantum processor performance over time. Optical illumination can use telecommunication frequency light at 1310nm and 1550nm. In some embodiments, optical illumination is delivered to a quantum processor or any array of qubits through a dilution refrigerator, where the light is selectively focused on an individual qubit or globally applied to all qubits of the quantum processor.

[0028] Figure 1A TLS mitigation system 100 is shown that uses lighting to mitigate the effects of TLS in a quantum processor 110. As shown, a TLS mitigation controller 120 controls a qubit measurement system 130 and an illumination system 140. The qubit measurement system 130 is used to detect or identify TLS in the quantum processor 110. The illumination system 140 is used to apply light to the quantum processor 110.

[0029] The measurement system 130 provides performance parameters of the qubits in the quantum processor 110, including the decoherence time (or relaxation time) of the qubits at different electric field frequencies. In some embodiments, the performance parameters of the qubits at different frequencies are captured. The mitigation controller 120 can use these captured performance parameters of the qubit to generate a spectrogram for the qubit. The spectrogram can be used as a TLS landscape to identify the frequencies at which TLS is strongly coupled to the qubit (e.g., by identifying the frequencies at which the decoherence time of the qubit is shortened by more than 25%).

[0030] Illumination system 140 is used to provide light pulses to quantum processor 110. The light pulses may disrupt the frequency landscape of the TLSs so that the TLSs do not couple strongly to the qubits, e.g., become non-resonant so that the decoherence time of the qubits is at least 75% of the ideal or expected relaxation time.

[0031] The TLS mitigation controller 120 may use the TLS landscape generated based on the measurements provided by the measurement system 130 to determine when and how to apply light pulses to the quantum processor 110 and control the illumination system 140 accordingly.

[0032] In some embodiments, one or more laser sources are used to disrupt the frequency of TLS. Laser pulses are used to change the TLS landscape of a superconducting quantum processor on a very short time scale (e.g., less than one second). In some embodiments, very short laser pulses can be applied to instantaneously shift the TLS frequency. The recovery time from the laser pulse is on a time scale of seconds (or less) compared to the hours that may be involved in heating an entire quantum processor. The light pulses can be visible light or infrared light.

[0033] Figure 2A method for measuring the performance of a qubit is conceptually illustrated. A microwave pulse 200 of calibrated amplitude, frequency, and duration is applied to the qubit to place the qubit in its excited state. After the microwave pulse is applied, the state of the qubit is measured at a number of different delay times. The measurements are repeated and averaged to give a unique exponential decay curve 210. (The vertical axis of the decay curve 210 refers to the ratio of measurements made on the qubit that were found to be in an excited state at a given delay time, so 1.0 corresponds to 100% of the qubits being found to be in an excited state in the measurements made at a given delay time).

[0034] Defects can be resonantly coupled to qubits and act as strong energy relaxation channels with a Lorentzian spectral signature that can be used to identify defects. Figure 3 An example TLS landscape is shown. The TLS landscape is based on measurements of flux-tunable qubits showing several regions of strong TLS coupling. If a fixed frequency transmission accidentally has a transition frequency near strong TLS, the qubit performance becomes severely degraded, i.e., has a significantly shortened relaxation or decoherence time. In the figure, the measured qubit relaxation time (also called T1) is normalized relative to the ideal or expected relaxation time. Therefore, at frequencies with weak or no TLS coupling, the normalized relaxation time is close to 1.0, while at frequencies with strong TLS coupling, the normalized relaxation time can drop significantly (to 0.1 or less).

[0035] Figure 4 A quantum processor with qubits is shown, which are illuminated by optical fibers. The quantum processor can be built on silicon, sapphire, or other dielectric substrates. In some embodiments, a laser or optical fiber pierces the quantum processor chip to provide illumination. As shown, an optical fiber 400 is attached to a housing 405 above the quantum processor 110. Light pulses can be directed from the outside of the housing to illuminate part or all of the quantum processor 110. Since silicon is transparent to infrared light of 1100nm or higher wavelengths, the quantum processor can be illuminated from either surface (front or back). Light pulses applied to the quantum processor or qubit can shift or disrupt the frequency landscape of TLS. It can be seen that after the light pulse, TLS can move in frequency in a random manner. On the other hand, without applying a light pulse, TLS can remain almost constant for hours.

[0036] Figure 5Spectral graphs of qubits in a quantum processor before and after illumination are shown. The figure shows two spectrograms 510 and 520, which show the relaxation times of qubits in a quantum processor at different frequencies. The first spectrogram 510 is based on measurements of qubits taken before applying a light pulse, and the second spectrogram 520 is based on measurements of qubits taken after applying a light pulse. As shown, after applying the light pulse, the distribution of qubit relaxation times at different frequencies shifts. This is because the TLS in the quantum processor has been disrupted by the applied light pulse. Based on the TLS landscape as shown in the spectrogram 520, the TLS mitigation controller 120 can determine that (i) at the frequency of interest, TLS will not significantly weaken the operation of the qubit, or (ii) the qubit is still weakened by the TLS at the frequency of interest, thereby requiring additional light pulses to further disrupt the TLS. This determination can be determined by whether the relaxation time of the qubit has dropped to a specific threshold ratio (e.g., 0.75 or 75%) below the expected relaxation time.

[0037] Since the laser operates very fast, the TLS frequency scrambling process by laser illumination can be repeated several times in order to find the ideal TLS configuration in which all severe or strongly coupled TLS interactions have been eliminated. This will significantly improve the functionality of the quantum processor. The ability to quickly cycle through TLS configurations and find the optimal configuration has a significant impact on the performance on any large-scale fixed-frequency quantum processor.

[0038] Figure 6 A process 600 for repeatedly applying illumination to a quantum processor in order to eliminate strongly coupled TLS interactions consistent with an illustrative embodiment is conceptually shown. The TLS mitigation system 100 or the TLS mitigation controller 120 can perform the process to mitigate the harmful effects of TLS in order to prepare the quantum processor for use. The process rearranges the TLS landscape by rapidly cycling the TLS configuration. The characteristics of the qubits are measured to determine whether the scrambling by illumination can improve processor performance. An iterative search is performed to find a good global TLS configuration across different qubits of the quantum processor. In some embodiments, one or more processing units (e.g., processors) of a computing device implementing the TLS mitigation controller 120 perform the process 600 by executing instructions stored in a computer-readable medium.

[0039] The system measures (at block 605) the coherence properties of all qubits. Figure 2 Example methods for measuring qubits are described.

[0040] The system determines (at block 610) whether one or more qubits do not meet a performance criterion. The system may receive performance parameters (e.g., coherence properties) of one or more qubits in the quantum processor to identify qubits that fail to meet a performance threshold. If none of the qubits do not meet the performance criterion, the system proceeds to 650 to calibrate the quantum processor to prepare for use. If at least one qubit does not meet the performance criterion, the process proceeds to 620.

[0041] At block 620, the system illuminates one or more qubits in a processor. The system may apply a global light pulse to the processor such that multiple qubits in the quantum processor are illuminated. The system may also use local light pulses confined to qubits that are identified as experiencing bad TLS interactions.

[0042] The system performs (at block 630) spectroscopy (e.g., Stark spectroscopy, which is a method of obtaining small, fast frequency tuning of a qubit through the AC Stark effect) on the qubits of the processor to obtain a spectral graph that is a TLS landscape. The TLS landscape of a qubit is a collection of qubit relaxation times measured at different probe frequencies. The system receives or captures qubit relaxation times measured at different qubit frequencies, including relaxation times measured before and after a light pulse. In some embodiments, the system can perform multiple scans of frequency to obtain multiple sets of relaxation times. Because the system identifies qubits that do not meet performance requirements, and the received qubit relaxation times will include relaxation times for the identified faulty qubits.

[0043] The system determines (at block 640) whether the TLS landscape is acceptable, e.g., whether there is a good global TLS configuration on the different qubits of the quantum processor, or whether there is strongly coupled TLS in the quantum processor. If the TLS landscape is acceptable, the process proceeds to 650 to calibrate the quantum processor so that it is ready for use. If the TLS situation is unacceptable, e.g., there is strong coupling between the qubits and TLS to cause severe degradation of the decoherence time (e.g., less than 75% of the expected qubit relaxation time), the process returns to 620 to apply laser pulses again and measure the performance of the qubits. In other words, the system applies a first light pulse to illuminate the quantum processor, and then determines whether to apply a second light pulse to illuminate the quantum processor based on the current TLS configuration or landscape. This is an iterative process of applying light pulses and checking qubit relaxation times to eliminate or minimize TLS interactions with qubits.

[0044] In some embodiments, one or more optical fibers are used to direct laser light from room temperature down to the chip. The focus of the laser can be manipulated to direct all laser power to a specific area (e.g., a specific qubit) or to apply a global diffuse field (e.g., to a group of multiple qubits). In some embodiments, one or several optical fibers are integrated into the package to allow qubit-specific or global scrambling of the TLS landscape. In some embodiments, far-infrared lasers are used for chip illumination to scramble TLS while the silicon substrate is transparent.

[0045] In some embodiments, an array of light emitting sources is used to illuminate the qubits of the quantum processor. Each light emitting source in the array is aligned with a qubit on the quantum processor. Figure 7 A plurality (e.g., array) of light sources are shown that are used to illuminate the qubits of the quantum processor 110, wherein each light source in the array is aligned with a qubit on the quantum processor. The light sources are in an illumination chip 710 that is in the same package as the quantum processor 110 and is placed in the same refrigeration unit (e.g., cryostat). A controller (e.g., TLS mitigation controller 120) (not shown) may be configured to receive a selection of a qubit and enable a light source from the array of light sources to emit light to the selected qubit.

[0046] In some embodiments, the multiple light sources are provided by different light sources. Figure 8 An array of light emitting diodes (LEDs) is shown in an illumination chip 710 for illuminating an array of qubits in processor 110. Each LED serves as a light source for illuminating a corresponding qubit.

[0047] In some embodiments, multiple light emitting sources may be provided by a mounted lens array connected to multiple optical fibers. Fig. 9 An array of mounted lenses connected to multiple optical fibers is shown for illuminating an array of qubits in processor 110. Attached to each lens mount is a lens coupled to an optical fiber. The incident light from each optical fiber is focused or collimated by the corresponding lens and directed to the corresponding qubit. In some embodiments, the lens is mounted on an illumination chip 910 in the same package as the quantum processor. The illumination chip 910 can be in the same refrigeration unit (e.g., cryostat) as the quantum processor.

[0048] In some embodiments, multiple light emitting sources are provided by an array of mounted optical fibers. Fig.10 An optical fiber array 1010 is shown for mounting of a qubit array in an illumination processor 110. Each location in the base 1010 has a lensed optical fiber attached to it. The lensed optical fiber focuses or collimates the light from the optical fiber to the qubit on a one-to-one basis.

[0049] In some embodiments, multiple light sources used to illuminate individual qubits are supplied by a common light source. Fig.11 A plurality of light sources are shown that are supplied by a common light source to illuminate the qubit array in the processor 110. As shown, the qubit array is mounted by a fiber array mount 1110. The fiber array mount 1110 has a lens array, each lens being aligned with a qubit on the quantum processor 110. In some embodiments, the lens array 1110 is mounted on an illumination chip that is in the same package as the quantum processor 110, and the illumination chip is in the same refrigeration unit as the quantum processor 110.

[0050] The optical switching matrix 1120 is used to direct the incident light source (optical fiber 1105) to the target qubit in the array. The optical switching matrix 1120 distributes the light pulses from the optical fiber 1105 to the lens array. The input of the optical switching matrix 1120 is connected to the optical fiber 1105, and the output of the optical switching matrix 1120 is connected to the optical fiber array that supplies the lens array 1110. In some embodiments, a controller (e.g., mitigation controller 120) (not shown) can be configured to receive a selection of a qubit and enable the optical switching matrix 1120 to pass the light pulse from the optical fiber 1105 to the lens aligned with the selected qubit.

[0051] In some embodiments, a positioning device capable of physically moving a light emitting source relative to the quantum processor is used to aim illumination at a specific qubit in the processor. A controller may be configured to receive a selection of a qubit and control the positioning device to move the light emitting source to a position corresponding to the selected qubit. Fig.12 A positioning device is shown, which is used to position the light source to illuminate the selected qubit in the quantum processor. As shown, the optical fiber 1205 attached to the lens 1210 is mounted on a 3-dimensional translation stage 1220. The lens 1210 is pointed at the qubit array 110. By manipulating the stage 1220, the qubit can be selected to be illuminated by the light pulse from the optical fiber 1205. In addition, a specific point within a single qubit can be targeted by the spatial position of the optical fiber / lens.

[0052] The present application may use systems, methods and / or computer program products at any possible level of integrated technical detail. The computer program product may include a computer-readable storage medium (or multiple media) having computer-readable program instructions thereon, the computer-readable program instructions being used to cause a processor to perform aspects of the present disclosure.

[0053] A computer-readable storage medium may be a tangible device capable of retaining and storing instructions used by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device such as a punch card or a raised structure in a groove on which instructions are recorded, and any suitable combination of the foregoing. As used herein, a computer-readable storage medium should not be interpreted as a temporary signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagated by a waveguide or other transmission medium (e.g., a light pulse by an optical fiber cable), or an electrical signal transmitted by a wire.

[0054] The computer-readable program instructions described herein can be downloaded to the corresponding computing / processing equipment from the computer-readable storage medium, or via a network, such as the Internet, a local area network, a wide area network and / or a wireless network, downloaded to an external computer or an external storage device. The network can include copper transmission cables, optical transmission optical fibers, wireless transmissions, routers, firewalls, switches, gateway computers and / or edge servers. The network adapter card or the network interface in each computing / processing equipment receives the computer-readable program instructions from the network, and forwards the computer-readable program instructions to be stored in the computer-readable storage medium in the corresponding computing / processing equipment. The computer-readable program instructions for performing the operation disclosed herein can be assembly instructions, instruction set architecture (ISA) instructions, machine-related instructions, microcodes, firmware instructions, state setting data, configuration data of integrated circuits, or source code or object code written in any combination of one or more programming languages ​​(including object-oriented programming languages, such as Smalltalk, C++, etc.) and procedural programming languages ​​(such as "C" programming languages ​​or similar programming languages). Computer readable program instructions can be executed completely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or completely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., using an Internet service provider through the Internet). In some embodiments, electronic circuits including, for example, programmable logic circuits, field programmable gate arrays (FPGAs), or programmable logic arrays (PLAs) can execute computer readable program instructions to personalize the electronic circuits by utilizing the state information of computer readable program instructions, so as to perform aspects of the present disclosure.

[0055] Aspects of the present disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, devices (systems) and computer program products according to embodiments of the present disclosure. It will be understood that each block of a flowchart and / or block diagram and the combination of blocks in a flowchart and / or block diagram can be implemented by computer-readable program instructions. These computer-readable program instructions can be provided to a processor of a computer or other programmable data processing device to produce a machine, so that instructions executed by a processor of a computer or other programmable data processing device create a device for implementing the function / action specified in one or more blocks of a flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, which can guide a computer, a programmable data processing device and / or other equipment to work in a particular manner, so that a computer-readable storage medium having instructions stored therein includes a product, and the product includes instructions for implementing various aspects of the function / action specified in one or more blocks of a flowchart and / or block diagram.

[0056] The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operation steps to be performed on the computer, other programmable apparatus, or other device to produce a computer-implemented process, so that the instructions executed on the computer, other programmable apparatus, or other device implement the functions / actions specified in one or more blocks of the flowchart and / or block diagram. Figure 6 ) illustrate possible implementations of the system, method, and computer program product according to various embodiments of the present disclosure, The architecture, functions, and operations. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of instructions, which includes one or more executable instructions for implementing a specified logical function. In some alternative embodiments, the functions noted in the blocks may not occur in the order noted in the figure. For example, two blocks shown in succession may actually be executed substantially simultaneously, or the blocks may sometimes be executed in reverse order, depending on the functions involved. It will also be noted that each block illustrated in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart illustration, can be implemented by a dedicated hardware-based system that performs a specified function or action or performs a combination of dedicated hardware and computer instructions.

[0057] Fig.13 1 is a block diagram of components of data processing systems 1300 and 1350 that may be used to implement TLS mitigation controller 120 according to an illustrative embodiment of the present disclosure. It should be understood that Fig.13 This merely provides an illustration of one implementation and does not imply any limitation on the environments in which different embodiments may be implemented. Many modifications to the described environment may be made based on design and implementation requirements.

[0058] Data processing systems 1300 and 1350 represent any electronic device capable of executing machine-readable program instructions. Data processing systems 1300 and 1350 may represent a smart phone, a computer system, a PDA, or other electronic device. Examples of computing systems, environments, and / or configurations that may be represented by data processing systems 1300 and 1350 include, but are not limited to, personal computer systems, server computer systems, thin clients, fat clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, network PCs, small computer systems, and distributed cloud computing environments that include any of the above systems or devices.

[0059] Data processing systems 1300 and 1350 may include Fig.13 1305 and a set of external components 1355, the set of internal components 1305 includes one or more processors 1320, one or more computer-readable RAMs 1322 and one or more computer-readable ROMs 1324 on one or more buses 1326, and one or more operating systems 1328 and one or more computer-readable tangible storage devices 1330. One or more operating systems 1328 and programs such as those used to perform process 600 are stored on one or more computer-readable tangible storage devices 1330 for execution by one or more processors 1320 via one or more RAMs 1322 (which typically include cache memory). Fig.13 In the illustrated embodiment, each of the computer-readable tangible storage devices 1330 is a disk storage device of an internal hard drive. Alternatively, each of the computer-readable tangible storage devices 1330 is a semiconductor memory device such as ROM 1324, EPROM, flash memory, or any other computer-readable tangible storage device capable of storing a computer program and digital information.

[0060] The set of internal components 1305 also includes an R / W drive or interface 1332 to read from and write to one or more portable computer-readable tangible storage devices 1386, such as a CD-ROM, DVD, memory stick, tape, disk, optical disk, or semiconductor storage device. Instructions for performing process 600 may be stored on one or more corresponding portable computer-readable tangible storage devices 1386, read via corresponding R / W drives or interfaces 1332, and loaded into corresponding hard disk drives 1330.

[0061] The collection of internal components 1305 may also include a network adapter (or switch port card) or interface 1336, such as a TCP / IP adapter card, a wireless Wi-Fi interface card, or a 3G or 4G wireless interface card or other wired or wireless communication link. The instructions of the above-mentioned process or program can be downloaded from an external computer (e.g., a server) via a network (e.g., the Internet, a local area network or other wide area network) and a corresponding network adapter or interface 1336. From the network adapter (or switch port adapter) or interface 1336, the instructions and data of the described program or process are loaded into the corresponding hard disk drive 1330. The network may include copper wire, optical fiber, wireless transmission, routers, firewalls, switches, gateway computers and / or edge servers.

[0062] The set of external components 1355 may include a computer display monitor 1370, a keyboard 1380, and a computer mouse 1384. The collection of external components 1355 may also include touch screens, virtual keyboards, touch pads, pointing devices, and other human-machine interface devices. The set of internal components 1305 also includes a device driver 1340 to interface with the computer display monitor 1370, the keyboard 1380, and the computer mouse 1384. The device driver 1340, the R / W driver or interface 1332, and the network adapter or interface 1336 include hardware and software (stored in the storage device 1330 and / or ROM 1324).

[0063] The description of various embodiments of the present teachings has been presented for illustrative purposes, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein are selected to best explain the principles of the embodiments, practical applications, or technical improvements existing in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A system comprising: A quantum processor, the quantum processor comprising a plurality of quantum bits; an array of light sources, each light source being aligned with a quantum bit on the quantum processor; as well as A controller is configured to receive a selection of a qubit and enable light sources from the array of light sources to emit light toward the selected qubit.

2. The system of claim 1, wherein each light source in the array of light sources is a light emitting diode (LED).

3. A system according to any one of the preceding claims, wherein the array of light emitting sources is provided by an array of mounted lenses connected to an array of optical fibres.

4. The system of claim 3, wherein the lenses of the mounted lens array are mounted on an illumination chip that is in the same package as the quantum processor.

5. The system of claim 4, wherein the illumination chip is in the same refrigeration unit as a refrigeration unit of the quantum processor.

6. A system according to any preceding claim, wherein the array of light emitting sources is provided by an array of mounted optical fibres.

7. A system according to any one of the preceding claims, wherein the array of light emitting sources is supplied by different light sources.

8. A system according to any preceding claim, wherein the array of light sources is supplied by a common light source.

9. The system of any preceding claim, wherein the light sources are arranged as a two-dimensional array of light sources.

10. A system comprising: A quantum processor comprising a quantum bit array; optical fiber; a lens array, each lens aligned with a quantum bit on the quantum processor; as well as An optical switching matrix distributes light pulses from the optical fibers to the lens arrays.

11. The system of claim 10, wherein the lenses are arranged as a two-dimensional lens array.

12. A system according to any one of the preceding claims 10 to 11, wherein: An input of the optical switch matrix is ​​connected to the optical fiber; and The output of the optical switch matrix is ​​connected to an array of optical fibers that feed the lens array.

13. The system of any of the preceding claims 10 to 12, wherein the lenses in the lens array are mounted on an illumination chip that is in the same package as the quantum processor.

14. The system according to any of the preceding claims 10 to 13, wherein the illumination chip is in the same refrigeration unit as a refrigeration unit of the quantum processor.

15. The system of any one of claims 10 to 14, further comprising a controller configured to receive a selection of a qubit and enable the optical switching matrix to deliver light pulses from the optical fiber to the light emitting source aligned with the selected qubit.

16. A system comprising: A quantum processor, the quantum processor comprising a plurality of quantum bits; Light source; a positioning device configured to physically move the light emitting source relative to the quantum processor; as well as A controller is configured to receive a selection of a quantum bit and control the positioning device to move the light source to a position corresponding to the selected quantum bit.

17. The system of claim 16, wherein the positioning device is configured to move the light emitting source relative to the quantum processor in three dimensions.

18. A method comprising: Providing a quantum processor including a plurality of quantum bits; aligning each light source of the light source array with a quantum bit on the quantum processor; as well as receiving, by a controller, a selection of a qubit; as well as The controller enables a light source from the array of light sources to emit light toward the selected quantum bit.

19. The method of claim 18, wherein each light source in the array of light sources is a light emitting diode (LED).

20. A method according to any preceding claim 18 to 19, wherein the array of light emitting sources is provided by an array of mounted lenses connected to an array of optical fibres.

21. The method of claim 20, wherein the lenses of the mounted lens array are mounted on an illumination chip that is in the same package as the quantum processor.

22. The method of claim 21, wherein the illumination chip is in the same refrigeration unit as a refrigeration unit of the quantum processor.

23. A method according to any preceding claim 18 to 22, wherein the array of light emitting sources is provided by an array of mounted optical fibres.

24. A method according to any one of the preceding claims 18 to 23, wherein the array of light emitting sources is supplied by different light sources.

25. A method according to any one of the preceding claims 18 to 24, wherein the array of light emitting sources is supplied by a common light source.

Images