Power device test circuit and BVDSS and IDM test method thereof

By designing a power device test circuit and using a voltage source to charge and discharge the inductor, the problems of high testing costs and lack of IDM testing methods in the prior art are solved, and cost-effective measurement of BVDSS and IDM are achieved, and the accuracy and flexibility of the test are improved.

CN120028668APending Publication Date: 2025-05-23CHONGQING CLOUDCHILD TECH CO LTD
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Patent Information

Application Number
CN202510206740.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-25
Publication Date
2025-05-23

AI Technical Summary

Technical Problem

There is a lack of a cost-effective BVDSS testing method and IDM testing method in the prior art, resulting in high testing costs and the inability to accurately evaluate the maximum single pulse current IDM of power devices.

Method used

By designing a power device test circuit, using a voltage source to charge and discharge the inductor, the BVDSS and IDM is tested, avoiding the use of expensive current sources, and the measurement of IDM is achieved through switch settings.

Benefits of technology

Reduces testing costs, achieves cost-effective measurement of BVDSS and IDM, and improves the accuracy and flexibility of testing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a power device test circuit and a BVDSS and IDM test method. The test circuit comprises a to-be-tested power device, the first pole of which is connected with the variable inductor, the second pole of which is connected with a second input control signal, and the third pole of which is grounded; the variable inductor is connected between the first pole of the power device to be tested and the third pole of the auxiliary power device; the fly-wheel diode is connected between the third pole of the auxiliary power device and the first pole of the power device to be tested; and the first pole of the auxiliary power device is connected with the capacitor, the second pole of the auxiliary power device is connected with the high-side driving circuit, and the third pole of the auxiliary power device is connected with the variable inductor. The voltage source is used for charging and discharging the inductor, so that the effect of the current source is achieved, an expensive current source device is prevented from being used, the economical voltage source is adopted, and the test cost is effectively reduced; in addition, through the arrangement of the switch, the circuit also realizes the measurement of the IDM.
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Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a power device test circuit and a BVDSS and IDM test method. Background Art

[0002] Metal oxide field effect transistor (MOSFET) is a power semiconductor device whose electrical performance is controlled by the electric field between its gate and drain, and its on-resistance will change significantly with the change of gate voltage. When the voltage does not exceed its limit, the field effect tube can work normally, but when the voltage exceeds its tolerance range, it may burn out.

[0003] The voltage resistance of a field effect tube is mainly determined by its gate-source, gate-drain and source-drain voltage resistance, among which the source-drain voltage resistance is the strongest. The voltage resistance of a field effect tube depends on its manufacturing process and materials. Currently, the common voltage resistance can reach hundreds of volts to thousands of volts. In the application scenario, it is necessary to select a field effect tube with appropriate voltage resistance according to actual needs to ensure the reliability and stability of the circuit.

[0004] The main function of the BVDSS test (Breakdown Voltage Source to Drain) is to evaluate the performance of MOSFET devices under high-voltage working environments. Through the BVDSS test, we can understand the maximum rated voltage that can be applied to the MOSFET when no avalanche breakdown occurs between the drain and source, thereby ensuring the reliability and stability of the device under high-voltage environments.

[0005] The prior art generally uses a current source when performing a source-drain breakdown voltage BVDSS test, and tests the withstand voltage BVDSS under different IDs (maximum continuous currents) under the condition of VGS=0. Specifically, when performing a BVDSS test, it is necessary to short-circuit the gate and the source, and then connect a DC power supply and a load in series between the drain and the source. In addition, the load is usually set to a constant current mode, and the source-drain voltage when the rated current is reached is recorded, which is the BVDSS value. The current source used in this test method is very expensive. A KEITHLEY2600B series high-precision current source is priced at around 110,000, and the current source is generally priced at around 50,000-200,000. Therefore, a cost-effective BVDSS test method is needed. In addition, the maximum continuous current ID of a power device is usually obtained as a theoretical value based on the thermal resistance formula, and the maximum single pulse current IDM of an existing power device is usually 3 to 4 times the maximum continuous current ID. Therefore, in actual use, it is usually also a theoretical value, and the maximum single pulse current IDM of the power device cannot be accurately evaluated and determined. In the actual application of power devices, the maximum single-pulse current IDM is also one of the important reference indicators of their working performance. Therefore, the actual maximum single-pulse current IDM of the power device has an important reference to its application scope. However, the prior art lacks a method to actually test this value. Therefore, based on the aforementioned test scheme, the present invention supplements the lack of IDM testing method in the prior art in order to more clearly and actually determine the IDM value of the power device. Summary of the invention

[0006] In view of the deficiencies in the prior art, the present invention provides a power device test circuit and its BVDSS and IDM test methods, which mainly solve the problem that the prior art lacks an economical and effective BVDSS test method and an additional IDM test method.

[0007] The objective of the present invention is achieved through the following solutions:

[0008] In the first aspect, according to an embodiment of the present invention, a power device test circuit is provided, comprising: a power device to be tested, a first pole of which is connected to a variable inductor, a second pole of which is connected to a low-side drive circuit, and a third pole of which is grounded; a low-side drive circuit, the low-side drive circuit providing a first input control signal to the power device to be tested; a variable inductor, connected between the first pole of the power device to be tested and the third pole of an auxiliary power device; a freewheeling diode, connected between the third pole of the auxiliary power device and the first pole of the power device to be tested; an auxiliary power device, a first pole of which is connected to a capacitor, a second pole of which is connected to a high-side drive circuit, and a third pole of which is connected to the variable inductor; a high-side drive circuit providing a second input control signal to the power device to be tested; a capacitor, connected between a power supply and the first pole of the auxiliary power device; a first switch, connected between the power supply and the first pole of the auxiliary power device; and a second switch, connected between the first pole of the power device to be tested and the first pole of the auxiliary power device.

[0009] According to an embodiment of the present invention, the high-side drive circuit includes: a first IC drive chip, whose first power pin is connected to the power supply, whose positive input pin is connected to the first input control signal, whose negative input pin is connected to the power supply and grounded via the eighth capacitor, whose ground pin is grounded, whose negative power pin is grounded, whose positive output pin and negative output pin are commonly connected to the second poles of the seventh transistor and the eighth transistor, whose second power pin is connected to the power supply and grounded via the ninth capacitor; the seventh transistor, whose first pole is connected to the positive polarity drive voltage, and whose third pole is connected to the auxiliary power device via the first resistor; the eighth transistor, whose first pole is connected to the auxiliary power device via the second resistor, and whose third pole is connected to the negative polarity drive voltage; wherein the positive polarity drive voltage and the negative polarity drive voltage are generated by the power supply voltage via the power conversion module.

[0010] According to an embodiment of the present invention, the power conversion module includes: a third power supply module, whose input pin is connected to the power supply, whose ground pin is grounded, whose negative output pin outputs a negative polarity drive voltage, whose positive output pin outputs a positive polarity drive voltage, and whose contact pin outputs zero voltage; a fourth capacitor and a fifth capacitor, which are connected in parallel between the input pin and the ground pin.

[0011] According to an embodiment of the present invention, the low-side drive circuit includes: a second IC driver chip, whose first power pin is connected to the power supply, whose positive input pin is connected to the second input control signal, whose negative input pin is connected to the power supply and grounded via the seventh capacitor, whose ground pin is grounded, whose negative power pin is grounded, whose positive output pin is connected to the power device to be measured via the third resistor, whose negative output pin is connected to the power device to be measured via the fourth resistor, and whose second power pin is connected to the power supply and grounded via the ninth capacitor.

[0012] According to an embodiment of the present invention, the freewheeling diode includes a fast recovery diode or a Schottky diode.

[0013] According to an embodiment of the present invention, the power conversion module includes a power isolation submodule.

[0014] In a second aspect, according to another embodiment of the present invention, a BVDSS measurement method is provided, which is tested using a power device test circuit as described in the first aspect, and the BVDSS measurement method includes: S1, disconnecting the first switch and the second switch, and turning on the power supply to power the test circuit, wherein the voltage of the power supply is set to half of the rated voltage; S2, applying an input control signal to the power devices in the test circuit to turn on all power devices for a specific on-time period, wherein the specific on-time period is determined based on the rated breakdown voltage of the power device to be tested, the maximum continuous current, and the inductance value of the variable inductor; S3, after all power devices are turned on for the specific on-time period and then turned off, measuring the stabilized drain-source voltage value of the power device to be tested.

[0015] According to another embodiment of the present invention, the specific on-time period is:

[0016]

[0017] Among them, U represents the rated breakdown voltage, I represents the maximum continuous current, and L represents the inductance value of the variable inductor.

[0018] In a third aspect, according to another embodiment of the present invention, an IDM measurement method is provided, which is tested using a power device test circuit as described in the first aspect, and the IDM measurement method includes: P1, opening the first switch, closing the second switch, applying the second input control signal without applying the first input control signal, and turning on the power supply at the same time; P2, after a specific time period, closing the first switch for a first time period, measuring and recording the maximum continuous current of the power device to be tested at this time.

[0019] According to yet another embodiment of the present invention, the first time period is between 1 and 10 microseconds.

[0020] Compared with the prior art, the present invention has the following beneficial effects: by using a voltage source to charge and discharge the inductor to achieve the effect of a current source, the use of an expensive current source device is avoided, and instead an economical voltage source is used to effectively reduce the test cost; in addition, the auxiliary power device decouples the test circuit, reducing the influence of the voltage source on the test result; in addition, through the setting of the switch, the circuit also realizes the measurement of the IDM, which supplements the lack of IDM test method in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The embodiments of the present invention are further described below with reference to the accompanying drawings:

[0022] Figure 1 A schematic diagram of a BVDSS test circuit in the prior art;

[0023] Figure 2 Schematic diagram of a BVDSS test circuit according to an embodiment of the present invention;

[0024] Figure 3 It is a terminal connection diagram of the BVDSS test extended to the half-bridge module according to the embodiment of the present invention. DETAILED DESCRIPTION

[0025] Before proceeding to the following detailed description, it may be advantageous to set forth the definitions of certain words and phrases used throughout this patent document. The terms "coupling", "connection" and their derivatives refer to any direct or indirect communication or connection between two or more elements, regardless of whether those elements are in physical contact with each other. The terms "transmission", "reception" and "communication" and their derivatives cover direct and indirect communication. The terms "include" and "comprising" and their derivatives refer to including but not limited to. The term "or" is inclusive, meaning and / or. The phrase "associated with..." and its derivatives refer to including, including within, interconnecting, containing, contained within, connecting or connecting with, coupling or coupling with, communicating with, cooperating, interweaving, parallel, close to, binding or binding with, having, having attributes, having a relationship or having a relationship with, etc. The term "controller" refers to any device, system or part thereof that controls at least one operation. Such a controller can be implemented with hardware, or a combination of hardware and software and / or firmware. The functions associated with any particular controller can be centralized or distributed, whether local or remote. The phrase "at least one of", when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one of the items in the list may be required. For example, "at least one of A, B, C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.

[0026] Definitions for other specific words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior and future uses of such defined words and phrases.

[0027] In this patent document, the application combination of modules and the division level of sub-modules are only used for illustration, and the application combination of modules and the division level of sub-modules may have different forms without departing from the scope of the present disclosure.

[0028] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below through specific embodiments in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0029] In order to better explain the present invention, the test circuit in the prior art is first reviewed. Figure 1 A BVDSS test circuit is shown. In which, the G pole and S pole of the device to be tested are short-circuited to ground, the current source continuously provides a rated current of 250 microamperes to the drain, and then the voltage Vds=VD-VS between DS is measured. As described in the background technology, this test method relies on a current source, but the price of the current source is expensive; in addition, the actual maximum single pulse current IDM of the power device is an important reference for its application range, and the prior art lacks a method for actually testing this value. Therefore, the prior art lacks an economical and effective BVDSS test method and IDM test method.

[0030] In response to the above problem, the applicant has found that the price of voltage source is generally around 2K. For example, a GPS-2303C voltage stabilizer is priced at around 1500. In addition, the applicant has also found that the effect of current source can be achieved by charging and discharging energy storage elements such as inductors through voltage source. Therefore, combining the above two findings, Figure 1As shown, according to an embodiment of the present invention, a power device test circuit is provided, including: a power device Q5 to be tested, a first pole of which is connected to a variable inductor L1, a second pole of which is connected to a high-side drive circuit, and a third pole of which is grounded; a low-side drive circuit, the low-side drive circuit providing a first input control signal to the power device Q5 to be tested; a variable inductor L1, connected between the first pole of the power device Q5 to be tested and the third pole of an auxiliary power device Q6; a diode D4, connected between the third pole of the auxiliary power device Q6 and the first pole of the power device Q5 to be tested; an auxiliary power device Q6, a first pole of which is connected to a capacitor, a second pole of which is connected to a high-side drive circuit, and a third pole of which is connected to the variable inductor L1; a high-side drive circuit providing a second input control signal to the power device to be tested; a capacitor, connected between a power supply U and a first pole of the auxiliary power device Q6; a first switch SW1, connected between a power supply U and a first pole of the auxiliary power device Q6; a second switch SW2, connected between the first pole of the power device Q5 to be tested and the first pole of the auxiliary power device Q6. By using a voltage source to charge and discharge the inductor to achieve the effect of a current source, the use of expensive current source devices is avoided, and instead an economical voltage source is used to effectively reduce the test cost; in addition, the auxiliary power device decouples the test circuit, reducing the influence of the voltage source on the test results; in addition, through the setting of the switch, this circuit also realizes the measurement of IDM, with better circuit flexibility.

[0031] Depending on the different types of power devices, the connection methods of each end are different. According to an embodiment of the present invention, when the power device to be tested and / or the auxiliary power device is an NMOS, the first pole is the drain, the second pole is the gate, and the third pole is the source; when the power device to be tested and / or the auxiliary power device is a PMOS, the first pole is the source, the second pole is the gate, and the third pole is the drain. Similarly, when the power device is a PNP or NPN transistor, the first pole is the emitter or collector, and the second pole is the base.

[0032] In addition, refer again Figure 2 Since the DC voltage source is not stable enough at output, in order to better filter and stabilize the voltage, according to an embodiment of the present invention, the capacitor is equivalent to three capacitors connected in parallel. Figure 2 As shown, PWM1 and PWM2 are control signals, C1-C9 are capacitors, R1-R4 are resistors, Q7 is an NPN transistor, Q8 is a PNP transistor, U1 and U2 are IC driver chips, U3 is a power module, VCC is a low-voltage power supply, and U is the bus voltage (power supply).

[0033] Reference again Figure 2According to an embodiment of the present invention, the high-side drive circuit includes: a first IC driver chip U1, whose first power pin VCC1 is connected to the power supply VCC, whose positive input pin IN+ is connected to the first input control signal PWM1, whose negative input pin IN- is connected to the power supply and grounded via the eighth capacitor C8, whose ground pin GND1 is grounded, whose negative side power pin VEE2 is grounded, whose positive output pin OUT1+ and negative output pin OUT1- are commonly connected to the second poles of the seventh transistor Q7 and the eighth transistor Q8, whose second power pin VCC2 is connected to the power supply VCC and grounded via the ninth capacitor C9; the seventh transistor Q7, whose first pole is connected to the positive polarity drive voltage +VGE, and whose third pole is connected to the auxiliary power device Q6 via the first resistor R1; the eighth transistor Q8, whose first pole is connected to the auxiliary power device Q6 via the second resistor R2, and whose third pole is connected to the negative polarity drive voltage -VGE; wherein, the positive polarity drive voltage +VGE and the negative polarity drive voltage -VGE are generated by the power supply voltage VCC via the power conversion module.

[0034] In addition, in order to convert voltage, according to an embodiment of the present invention, the power conversion module includes: a third power module U3, whose input pin +VIN is connected to the power supply, whose ground pin GND is grounded, whose negative output pin -VOUT outputs a negative polarity driving voltage -VGE, whose positive output pin +VOUT outputs a positive polarity driving voltage +VGE, and whose contact pin COM outputs zero voltage; a fourth capacitor C4 and a fifth capacitor C5, which are connected in parallel between the input pin +VIN and the ground pin GND.

[0035] According to an embodiment of the present invention, the low-side drive circuit includes: a second IC driver chip U2, whose first power pin VCC1 is connected to the power supply, whose positive input pin IN+ is connected to the second input control signal PWM2, whose negative input pin IN- is connected to the power supply VCC and grounded via the seventh capacitor C7, whose ground pin GND1 is grounded, whose negative side power pin VEE2 is grounded, whose positive output pin OUT1+ is connected to the power device to be tested Q5 via the third resistor R3, whose negative output pin OUT1- is connected to the power device to be tested Q5 via the fourth resistor R4, and whose second power pin VCC2 is connected to the power supply and grounded via the ninth capacitor C9.

[0036] In order to enhance the current capacity of the inductor and thus improve the test range of the inductor, according to an embodiment of the present invention, the variable inductor includes a winding inductor. In addition, the winding inductor also has good solderability and heat resistance.

[0037] In addition, in order to further increase the test range, a variable inductor is used. According to an embodiment of the present invention, the variable inductor adjusts the inductance value based on the core position. In addition, according to an embodiment of the present invention, the variable inductor adjusts the inductance value based on changing the number of turns of the coil.

[0038] In addition, in order to make the current in the circuit change more smoothly and avoid the occurrence of surge voltage, especially when energy storage devices are contained. According to an embodiment of the present invention, the diode is a freewheeling diode. A freewheeling diode (flyback diode), sometimes also called a flywheel diode or a snubber diode, is a diode used in conjunction with an inductive load. When the current of the inductive load suddenly changes or decreases, a sudden voltage will be generated at both ends of the inductor. According to an embodiment of the present invention, the freewheeling diode includes a fast recovery diode or a Schottky diode. It is generally used in a circuit to protect components from being broken down or burned by an induced voltage. It is connected in parallel to both ends of a component that generates an induced electromotive force and forms a loop with it, so that the high electromotive force generated by it is consumed in the loop in the form of a freewheeling current, thereby protecting the components in the circuit from damage.

[0039] According to another embodiment of the present invention, the power conversion module includes a power isolation submodule. MOS devices are generally turned on at 10V and turned off at 0V. The two power devices are turned on and off at the same time, and the turn-on voltage is also 10V. Isolation drive is to transmit signals or power by means of electrical isolation, thereby ensuring that there is no direct electrical connection between circuits of different parts. The gate of Q5 (power device to be tested) is grounded as a bottom-side device, and the gate of Q6 (auxiliary power device) is connected to the inductor and is not grounded. It is between the power supply and the inductor of the working device, and belongs to a high-side device. The high-side device must be driven by isolation, otherwise the reverse electromotive force caused by the inductor will affect the GS gate voltage of Q6, resulting in erroneous opening or breakdown of the gate of Q6.

[0040] According to another embodiment of the present invention, a BVDSS measurement method is provided, which is tested by using a power device test circuit as described above, and the BVDSS measurement method includes:

[0041] S1, disconnecting the first switch and the second switch, and turning on the power supply to supply power to the test circuit, wherein the voltage of the power supply is set to half of the rated voltage;

[0042] S2. Applying an input control signal to the power devices in the test circuit to turn on all the power devices for a specific on-time period, wherein the specific on-time period is determined based on a rated breakdown voltage, a maximum continuous current, and an inductance value of the variable inductor of the power device to be tested;

[0043] S3. After all power devices are turned on for a specific conduction period and then turned off, measure the stabilized drain-source voltage value of the power device to be tested. The purpose of selecting half of the power supply voltage is to prevent a large voltage spike from breaking down Q6 during the test, reducing the test accuracy and damaging the test system.

[0044] According to another embodiment of the present invention, the specific on-time period is:

[0045]

[0046] Among them, U represents the rated breakdown voltage, I represents the maximum continuous current, and L represents the inductance value of the variable inductor. L is selected by referring to the method of large current and small inductance, small current and large inductance. For example, the time is controlled at about 100us, and the inductance value is obtained by calculation. The inductance value can be increased by 20% to prevent insufficient energy storage capacity, and an integer value can be selected. For example, L = 347uH is obtained by calculation, and 400uH can be finally selected as the actual selected value.

[0047] In addition, if Figure 3 As shown in the figure, for the device test method in the half-bridge module, when testing the upper bridge, the lower bridge G2E2 is short-circuited. In this figure, E1 is the Kelvin pin, which cannot carry too much current, that is, G1E1 is connected to the PWM control device switch, C1 is connected to the inductor L, C2E1 is grounded, and the other terminals are not involved in grounding. The same applies when testing the lower bridge.

[0048] In addition, for the device test method in the H-bridge module, it is important to prevent other non-tested devices from being turned on during measurement. For example, when measuring No. 1 IGBT, the No. 1 IGBT is connected to the aforementioned test circuit, and the terminal grounding is not involved. The Vces of a single chip is measured according to the above operation. The lowest Vces value is the Vces of the module. The same applies to testing other chips.

[0049] Similarly, the full-bridge module test method is the same as the half-bridge module, which can be divided into three half-bridge tests. The lowest Vces of a single chip is the Vces of the entire full-bridge module.

[0050] According to another embodiment of the present invention, an IDM measurement method is provided, which is tested by using a power device test circuit as described above, and the IDM measurement method includes:

[0051] P1, disconnect the first switch SW1, close the second switch SW2, apply the second input control signal instead of the first input control signal PWM1, and turn on the power supply U;

[0052] P2. After a specific time period, close the first switch SW1 for a first time period, measure and record the maximum continuous current of the power device under test at this time. When SW1 is disconnected and SW2 is closed, that is, Q6 remains closed and Q5 is turned on, the current ID flowing through Q5 increases rapidly and enters a desaturated state, and the current no longer increases and is accompanied by a certain decrease. Therefore, the specific time period for keeping Q5 turned on is determined based on the change state of the current. In addition, the maximum value of ID recorded after closing SW1 is IDM.

[0053] In order to capture the maximum continuous current, according to yet another embodiment of the present invention, the first time period is between 1-10 microseconds.

[0054] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A power device test circuit, characterized in that: include: The power device to be tested has a first pole connected to the variable inductor, a second pole connected to the low-side drive circuit, and a third pole grounded; A low-side driving circuit, wherein the low-side driving circuit provides a first input control signal to the power device to be tested; a variable inductor connected between the first pole of the power device to be tested and the third pole of the auxiliary power device; A freewheeling diode connected between the third electrode of the auxiliary power device and the first electrode of the power device to be tested; An auxiliary power device, a first electrode of which is connected to the capacitor, a second electrode of which is connected to the high-side drive circuit, and a third electrode of which is connected to the variable inductor; A high-side driving circuit provides a second input control signal to the power device to be tested; A capacitor connected between the power source and the first electrode of the auxiliary power device; A first switch connected between the power source and the first electrode of the auxiliary power device; The second switch is connected between the first electrode of the power device to be tested and the first electrode of the auxiliary power device.

2. A power device test circuit according to claim 1, characterized in that: The high-side driving circuit comprises: A first IC driver chip, wherein the first power supply pin thereof is connected to the power supply, the positive input pin thereof is connected to the first input control signal, the negative input pin thereof is connected to the power supply and to the ground via the eighth capacitor, the ground pin thereof is connected to the ground, the negative power supply pin thereof is connected to the ground, the positive output pin thereof and the negative output pin thereof are connected to the second electrodes of the seventh transistor and the eighth transistor in common, and the second power supply pin thereof is connected to the power supply and to the ground via the ninth capacitor; A seventh triode, a first pole of which is connected to a positive polarity driving voltage, and a third pole of which is connected to the auxiliary power device via a first resistor; an eighth triode, a first electrode of which is connected to the auxiliary power device via a second resistor, and a third electrode of which is connected to a negative polarity driving voltage; The positive polarity driving voltage and the negative polarity driving voltage are generated by the power supply voltage via a power conversion module.

3. A power device test circuit according to claim 2, characterized in that: The power conversion module comprises: A third power supply module, whose input pin is connected to the power supply, whose ground pin is grounded, whose negative output pin outputs a negative polarity driving voltage, whose positive output pin outputs a positive polarity driving voltage, and whose contact pin outputs a zero voltage; The fourth capacitor and the fifth capacitor are connected in parallel between the input pin and the ground pin.

4. A power device test circuit according to claim 1, characterized in that: The low-side driving circuit comprises: The second IC driver chip has a first power supply pin connected to the power supply, a positive input pin connected to the second input control signal, a negative input pin connected to the power supply and grounded via a seventh capacitor, a ground pin connected to the ground, a negative power supply pin connected to the ground, a positive output pin connected to the power device to be tested via a third resistor, a negative output pin connected to the power device to be tested via a fourth resistor, and a second power supply pin connected to the power supply and grounded via a ninth capacitor.

5. A power device test circuit according to claim 1, characterized in that: The freewheeling diode includes a fast recovery diode or a Schottky diode.

6. A power device test circuit according to claim 2, characterized in that: The power conversion module includes a power isolation submodule.

7. A BVDSS measurement method, characterized in that: A power device test circuit according to any one of claims 1 to 6 is used for testing, wherein the BVDSS measurement method comprises: S1, disconnecting the first switch and the second switch, and turning on the power supply to supply power to the test circuit, wherein the voltage of the power supply is set to half of the rated voltage; S2. Applying an input control signal to the power devices in the test circuit to turn on all the power devices for a specific on-time period, wherein the specific on-time period is determined based on a rated breakdown voltage, a maximum continuous current, and an inductance value of the variable inductor of the power device to be tested; S3. After all power devices are turned on for a specific conduction period and then turned off, a stabilized drain-source voltage value of the power device to be tested is measured.

8. A BVDSS measurement method according to claim 7, characterized in that: The specific conduction time period is: Wherein, U represents the rated breakdown voltage, I represents the maximum continuous current, and L represents the inductance value of the variable inductor.

9. An IDM measurement method, characterized in that: A power device test circuit according to any one of claims 1 to 6 is used for testing, wherein the IDM measurement method comprises: P1, open the first switch, close the second switch, apply the second input control signal without applying the first input control signal, and turn on the power supply at the same time; P2. After a specific time period, close the first switch for a first time period, and measure and record the maximum continuous current of the power device under test at this time.

10. An IDM measurement method according to claim 9, characterized in that: The first time period is between 1 and 10 microseconds.