A method for automatically calibrating a carrier half-cycle detection threshold, a navigation receiver, a system, and a storage medium
Automatically calibrate the carrier half-period detection threshold of the anti-interference antenna through the internal algorithm of the navigation receiver, solving the problem of cumbersome and time-consuming existing calibration methods, and achieving the effect of simplifying the calibration process and lowering the threshold for use.
Patent Information
- Application Number
- CN202510512906.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-23
- Publication Date
- 2025-08-15
- Estimated Expiration
- 2045-04-23
AI Technical Summary
The carrier half-period detection threshold calibration method of existing anti-interference antennas is cumbersome, time-consuming and complex, and it is difficult for actual users to master, resulting in difficulty in promoting.
Through the internal algorithm of the navigation receiver, the master and slave antenna are connected to the anti-interference antenna using a one-to-two-digit signal power splitter, the carrier half-period detection range is automatically calibrated, the number of satellites changes are recorded, and the real half-period detection range is determined.
Automatic calibration of the half-period detection threshold of anti-interference antenna carrier is realized, reducing the calibration complexity and time, simplifying the threshold for use, and convenient for practical applications.
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Figure CN120028813B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of carrier half-cycle repair, and in particular to a carrier half-cycle detection threshold automatic calibration method, a navigation receiver, a system and a storage medium. Background Art
[0002] Currently, navigation receivers typically repair the BOC signal carrier half-cycle by obtaining the BOC signal modulation method and pre-compensation observations, converting them into subcarrier observations, and ultimately calculating a half-cycle compensation value (between 0 and 1). The need for carrier half-cycle compensation is determined by determining in real time whether the half-cycle compensation value is within the range of [0.5-1.0].
[0003] However, for anti-interference antennas, due to the unstable carrier phase center, setting the half-cycle detection threshold to the range of [0.5, 1] can result in false alarms. Therefore, it is generally necessary to calibrate the true detection threshold for anti-interference antennas. The current calibration method typically connects the anti-interference antenna to the master and slave antenna ports of a navigation receiver using a one-to-two power splitter. The carrier observations and half-cycle compensation values for all satellites from the master and slave antennas are recorded for one hour. The carrier observations from the master and slave antennas are then double-differenced to determine the half-cycle status of each satellite. By comparing the half-cycle compensation values of the master and slave antennas with the half-cycle status of each satellite, the true detection threshold is determined.
[0004] This calibration method requires recording data and then performing double-difference on the carrier observations through software post-processing to obtain the half-cycle status of each satellite. It also requires tabulating the half-cycle compensation values of the master and slave antennas for each satellite and comparing them with the half-cycle status. The time period and pattern of each half-cycle must be identified to ultimately determine the half-cycle compensation value for the anti-interference antenna. This method is cumbersome, time-consuming, and requires a deep understanding of its core principles. However, most users lack this understanding, hindering its practical application and widespread adoption. Summary of the Invention
[0005] In order to solve the technical problem that the existing anti-interference antenna real half-cycle detection threshold calibration method is too cumbersome, time-consuming and complicated, the embodiment of the present invention provides a carrier half-cycle detection threshold automatic calibration method, navigation receiver, system and storage medium.
[0006] The technical solution of the embodiment of the present invention is achieved as follows:
[0007] An embodiment of the present invention provides a method for automatically calibrating a carrier half-cycle detection threshold, which is applied to a navigation receiver, wherein the master and slave antennas of the navigation receiver are connected to the same anti-interference antenna using a one-to-two signal power splitter with a zero baseline. The method includes:
[0008] Initialize the carrier half-cycle detection range to 0 to 0.5; perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period;
[0009] Slide the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1, perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period;
[0010] Repeatedly shift the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1.0, perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period; until the shifted carrier half-cycle detection range returns to the initialized range;
[0011] The carrier half-cycle detection range with the smallest number of satellites is determined as the real half-cycle detection range of the anti-interference antenna.
[0012] In one embodiment, the preset time is 10 minutes.
[0013] In one embodiment, the preset value is 0.1.
[0014] An embodiment of the present invention further provides a navigation receiver, wherein the master and slave antennas of the navigation receiver are connected to the same anti-interference antenna using a one-to-two signal power splitter with a zero baseline, and the navigation receiver performs the following steps:
[0015] Initialize the carrier half-cycle detection range to 0 to 0.5; perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period;
[0016] Slide the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1, perform double difference on the carrier observations of the master and slave antennas again, and record the number of satellites that appear in a half-cycle within the preset time period;
[0017] Repeatedly shift the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1.0, perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period; until the shifted carrier half-cycle detection range returns to the initialized range;
[0018] The carrier half-cycle detection range with the smallest number of satellites is determined as the real half-cycle detection range of the anti-interference antenna.
[0019] In one embodiment, the preset time is 10 minutes.
[0020] In one embodiment, the preset value is 0.1.
[0021] An embodiment of the present invention also provides a carrier half-cycle detection threshold automatic calibration system, comprising: a processor and a memory for storing a computer program that can be run on the processor; wherein, when the processor is used to run the computer program, it executes the steps of the above-mentioned method.
[0022] An embodiment of the present invention further provides a storage medium, wherein the storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the above-mentioned method are implemented.
[0023] This embodiment has the following beneficial effects:
[0024] 1. Ability to automatically calibrate the real half-cycle detection threshold of the anti-interference antenna with one click;
[0025] 2. Reduces calibration complexity, time, and user requirements. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 Schematic diagram of the process of the automatic calibration method of the carrier half-cycle detection threshold according to an embodiment of the present invention;
[0027] Figure 2 This is a schematic diagram of the automatic calibration process according to an embodiment of the present invention;
[0028] Figure 3 This is a schematic diagram of a specific execution process of a navigation receiver according to an embodiment of the present invention;
[0029] Figure 4 This is a diagram of the internal structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0030] The present invention will be described in further detail below with reference to the accompanying drawings and embodiments.
[0031] The embodiment of the present invention provides a method for automatically calibrating a carrier half-cycle detection threshold, which is applied to a navigation receiver, wherein the master and slave antennas of the navigation receiver are connected to the same anti-interference antenna using a one-to-two signal power splitter with a zero baseline, such as Figure 1 As shown, the method includes:
[0032] Step 101: Initialize the carrier half-cycle detection range to 0 to 0.5; perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within a preset time period;
[0033] Step 102: Slide the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1, perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within a preset time period;
[0034] Step 103: Repeatedly shift the carrier half-cycle detection range rightward by a preset value within the range of 0 to 1.0, perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites with half-cycles within the preset time period; until the shifted carrier half-cycle detection range returns to the initialized range;
[0035] Step 104: Determine the carrier half-cycle detection range with the smallest number of satellites as the real half-cycle detection range of the anti-interference antenna.
[0036] The current calibration method typically connects the anti-interference antenna to the master and slave antenna ports of a navigation receiver using a two-way power splitter. The carrier observations and half-cycle compensation values for all satellites from the master and slave antennas are recorded for one hour. The carrier observations from the master and slave antennas are then double-differencing to obtain the half-cycle status for each satellite. This calibration method requires recording the data and then performing double-differencing of the carrier observations using software post-processing to obtain the half-cycle status for each satellite. Furthermore, a table is required to compare the half-cycle compensation values of the master and slave antennas with the half-cycle status for each satellite, identifying the time periods and patterns within the half-cycles to ultimately determine the half-cycle compensation value for the anti-interference antenna. This method is cumbersome, time-consuming, and requires a deep understanding of the core method. However, most users lack this understanding, hindering its practical application and widespread adoption.
[0037] The method for automatically calibrating the carrier half-cycle detection threshold of the BOC signal of the navigation receiver implemented based on the method of this embodiment is automatically calibrated through the internal algorithm of the receiver, and does not require recording data for post-processing and finding patterns, thereby reducing the calibration complexity, shortening the calibration time and the usage threshold of the calibrator.
[0038] Specifically, see Figure 2 , the method of this embodiment includes:
[0039] Step 1: Connect the master and slave antennas of the navigation receiver to the same anti-interference antenna using a one-to-two signal power splitter with zero baseline;
[0040] Step 2: Initialize the carrier half-cycle detection range to B[0]=[0,0.5]. After the master and slave antennas of the navigation receiver capture the signal, the receiver automatically performs double difference on the carrier observations of the master and slave antennas, records the number of satellites that appear in the half-cycle within 10 minutes, and records it in array A[0].
[0041] Step 3: The navigation receiver automatically slides the carrier half-cycle detection range to the right by 0.1, changing it to B[1]=[0.1, 0.6], and repeats step 2;
[0042] Step 4: Repeat step 3 until the carrier half-cycle detection range reaches B[9]=[0.9,1.0]&[0,0.4], and obtain a total of 10 sets of parameters from A[0] to A[9].
[0043] Step 5: Find the smallest subscript c among A[0] to A[9]. The corresponding carrier half-cycle detection range B[c] is the actual half-cycle detection range of the anti-interference antenna.
[0044] Step 6: The automatic calibration process ends.
[0045] In summary, see Figure 3 , the specific execution process of the navigation receiver can be:
[0046] 1. Initialize i=0 and initialize the carrier half-cycle detection range B[0] to [0,0.5];
[0047] 2. Count the number of satellite carrier half cycles within 10 minutes and record it as A[i];
[0048] 3. If i is less than 9, then i++, and continue the previous step until i is greater than or equal to 9;
[0049] 4. Find the minimum subscript c from A[0] to A[9]. The corresponding carrier half-cycle detection range B[c] is the actual carrier half-cycle detection range;
[0050] 5. End.
[0051] The current method for calibrating the real half-cycle detection threshold of the anti-interference antenna is too cumbersome, time-consuming and complicated. This embodiment can automatically calibrate the real half-cycle detection threshold of the anti-interference antenna, without any threshold for users, and is convenient for practical use and promotion.
[0052] The following describes the solution of this embodiment based on a specific scenario.
[0053] 1. Automatic calibration method for the real half-cycle detection threshold of the anti-interference antenna BOC signal through the internal algorithm of the navigation receiver:
[0054] Connect the anti-interference antenna to the master and slave antennas of the navigation receiver via a one-to-two power splitter. Initialize the carrier half-cycle detection range to B[0] = [0, 0.5]. After the master and slave antennas of the navigation receiver capture the signal, the receiver automatically performs a double difference on the carrier observations of the master and slave antennas, recording the number of satellites that appear in a half-cycle within 10 minutes and recording it in array A[0]. Slide the carrier half-cycle detection range to the right to B[1] = [0.1, 0.6]. Similarly, count the number of satellites that appear in a half-cycle within 10 minutes and record it in array A[1]. Repeat this step until a total of 10 parameter sets, from A[0] to A[9], are obtained. The smallest parameter subscript c is statistically obtained, and its corresponding carrier half-cycle detection range B[c] is the actual carrier half-cycle detection range.
[0055] Table 1 below shows the values automatically detected by the navigation receiver. It can be seen that when i=3, the number of satellite carrier half-cycles is zero, so B[3]=[0.3,0.8] is the actual half-cycle detection range of the anti-interference antenna.
[0056]
[0057] This embodiment can realize automatic calibration of the anti-interference antenna BOC signal carrier half-cycle detection threshold by the navigation receiver.
[0058] This embodiment also provides a navigation receiver, wherein the master and slave antennas of the navigation receiver are connected to the same anti-interference antenna with a zero baseline of a one-to-two signal power splitter, and the navigation receiver performs the following steps: initializing the carrier half-cycle detection range to 0 to 0.5; performing double difference on the carrier observation quantities of the master and slave antennas, and recording the number of satellites that appear in the half-cycle within a preset time period; sliding the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1, and again performing double difference on the carrier observation quantities of the master and slave antennas, and recording the number of satellites that appear in the half-cycle within the preset time period; repeatedly moving the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1.0, and performing double difference on the carrier observation quantities of the master and slave antennas, and recording the number of satellites that appear in the half-cycle within the preset time period; until the moved carrier half-cycle detection range returns to the initialized range; and determining the carrier half-cycle detection range with the smallest number of satellites as the true half-cycle detection range of the anti-interference antenna.
[0059] In one embodiment, the preset time is 10 minutes.
[0060] In one embodiment, the preset value is 0.1.
[0061] In order to implement the method of an embodiment of the present invention, an embodiment of the present invention also provides a carrier half-cycle detection threshold automatic calibration system, including: a processor and a memory for storing a computer program that can be run on the processor; wherein, when the processor is used to run the computer program, it executes the steps of the above-mentioned method.
[0062] The above-mentioned system provided in this embodiment and the above-mentioned method embodiment belong to the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.
[0063] To implement the method of an embodiment of the present invention, an embodiment of the present invention further provides a computer program product. The computer program product includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the steps of the above method.
[0064] Based on the hardware implementation of the above program modules and in order to implement the method of the embodiment of the present invention, the embodiment of the present invention further provides an electronic device (computer device). Specifically, in one embodiment, the computer device can be a terminal, and its internal structure diagram can be as follows: Figure 4 As shown. The computer device includes a processor A01, a network interface A02, a display screen A04, an input device A05, and a memory (not shown in the figure) connected via a system bus. The processor A01 of the computer device is used to provide computing and control capabilities. The memory of the computer device includes an internal memory A03 and a non-volatile storage medium A06. The non-volatile storage medium A06 stores an operating system B01 and a computer program B02. The internal memory A03 provides an environment for the operation of the operating system B01 and the computer program B02 in the non-volatile storage medium A06. The network interface A02 of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor A01, the method of any of the above embodiments is implemented. The display screen A04 of the computer device can be a liquid crystal display or an electronic ink display. The input device A05 of the computer device can be a touch layer covering the display screen, or it can be a key, trackball, or touchpad provided on the computer device housing, or it can be an external keyboard, touchpad, or mouse.
[0065] Those skilled in the art will understand that Figure 4 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.
[0066] The device provided by an embodiment of the present invention includes a processor, a memory, and a program stored in the memory and executable on the processor. When the processor executes the program, the method of any one of the above embodiments is implemented.
[0067] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0068] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0069] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.
[0070] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0071] In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.
[0072] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.
[0073] Computer-readable media includes permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. The information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic disk storage or other magnetic storage devices, or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media (transitory media), such as modulated data signals and carrier waves.
[0074] It is understood that the memory of the embodiments of the present invention may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Among them, non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), ferromagnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disk, or compact disc read-only memory (CD-ROM); magnetic surface memory may be magnetic disk or tape memory. Volatile memory may be random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus random access memory (DRRAM).The memories described in the embodiments of the present invention are intended to include, but are not limited to, these and any other suitable types of memories.
[0075] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.
[0076] The above are merely embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.
Claims
1. A method for automatically calibrating a carrier half-cycle detection threshold, characterized in that: Applied to a navigation receiver, the master and slave antennas of the navigation receiver are connected to the same anti-interference antenna using a one-to-two signal power splitter with a zero baseline, and the method includes: Initialize the carrier half-cycle detection range to 0 to 0.5; perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period; Slide the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1, perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period; Repeatedly shift the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1.0, perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period; until the shifted carrier half-cycle detection range returns to the initialized range; The carrier half-cycle detection range with the smallest number of satellites is determined as the real half-cycle detection range of the anti-interference antenna.
2. The method for automatically calibrating the carrier half-cycle detection threshold according to claim 1, characterized in that: The preset time is 10 minutes.
3. The method for automatically calibrating the carrier half-cycle detection threshold according to claim 1, characterized in that: The preset value is 0.
1.
4. A navigation receiver, characterized in that: The master and slave antennas of the navigation receiver are connected to the same anti-interference antenna using a one-to-two signal power splitter with a zero baseline. The navigation receiver performs the following steps: Initialize the carrier half-cycle detection range to 0 to 0.5; perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period; Slide the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1, perform double difference on the carrier observations of the master and slave antennas again, and record the number of satellites that appear in a half-cycle within the preset time period; Repeatedly shift the carrier half-cycle detection range to the right by a preset value within the range of 0 to 1.0, perform double difference on the carrier observations of the master and slave antennas, and record the number of satellites that appear in a half-cycle within the preset time period; until the shifted carrier half-cycle detection range returns to the initialized range; The carrier half-cycle detection range with the smallest number of satellites is determined as the real half-cycle detection range of the anti-interference antenna.
5. The navigation receiver according to claim 4, characterized in that The preset time is 10 minutes.
6. The navigation receiver according to claim 4, characterized in that The preset value is 0.
1.
7. A carrier half-cycle detection threshold automatic calibration system, characterized in that: include: A processor and a memory for storing a computer program that can be run on the processor; wherein, when the processor is used to run the computer program, the steps of the method according to any one of claims 1 to 3 are performed.
8. A storage medium storing a computer program, wherein: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 3 are implemented.
Citation Information
Patent Citations
Half-cycle jumping measuring method and device for satellite navigation
CN106842243A
Carrier half-cycle repair method and RTK (Real-Time Kinematic) integer ambiguity fixing method thereof
CN114675310A