Array type photoelectric chip with embedded micro-channel structure and preparation method of array type photoelectric chip

Abstract

The invention discloses an array type photoelectric chip with an embedded micro-channel structure and a preparation method, and relates to the technical field of integrated circuits. The chip comprises an IC substrate, an insulating medium layer, a pixel array, a transparent conductive layer, a transparent cover plate and a micro-channel structure, the pixel array is arranged in the insulating dielectric layer, one side of the pixel array is connected with the transparent conductive layer, the other side of the pixel array is connected with the IC substrate, and the transparent cover plate is arranged on the outer side of the transparent conductive layer; the micro-channel structure comprises micro-flow channels, a liquid inlet and a liquid outlet, the micro-flow channels are distributed in gaps of pixel components in the pixel array, the transparent cover plate is provided with the liquid inlet and the liquid outlet which are communicated with the micro-flow channels, and a cooling medium flows in the micro-flow channels; according to the invention, efficient thermal management is realized, the heat dissipation and cooling performance of the device is remarkably improved, the working performance of the device is guaranteed, and meanwhile, the integrated level is higher.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to an array type optoelectronic chip with an embedded microchannel structure and a preparation method thereof. Background Art

[0002] With the improvement of the integration and performance of array optoelectronic chips, efficient thermal management of each pixel unit is crucial. Especially in applications such as single-photon detector arrays, long-wave infrared detection, and superconducting single-photon detection, the pixel temperature needs to be kept at a low temperature, so efficient cooling is the key to ensuring the normal operation of these array devices. In recent years, micro-light-emitting diode multi-pixel array light-emitting chips based on III-V semiconductor materials have gradually emerged. Among them, efficient heat dissipation of each light-emitting pixel is a key factor affecting the overall performance of the device.

[0003] The microfluidic structure can realize direct heat exchange between the device and the heat dissipation medium, and is an efficient device thermal management solution. The traditional microfluidic structure exists on an independent "microfluidic heat sink". After the microfluidic structure is prepared, the heat sink is attached to the back of the component that needs heat dissipation, that is, the overall heat dissipation of the chip outside. The integration is low, and it is impossible to achieve efficient heat exchange of each pixel unit inside the chip, resulting in limited heat dissipation effect and heat exchange capacity. Summary of the invention

[0004] The present invention aims to solve the technical problem that the existing microfluidic structure has a low integration level in the chip structure, cannot realize efficient heat exchange of each pixel unit inside the chip, and leads to limited heat dissipation effect and heat exchange capacity. The present invention aims to provide an array-type optoelectronic chip with an embedded microfluidic structure and a preparation method, which realizes efficient thermal management, significantly improves the heat dissipation and cooling performance of the device, ensures the working performance of the device, and has a higher integration level.

[0005] The present invention is achieved through the following technical solutions:

[0006] The first object of the present invention is to provide an array-type optoelectronic chip with an embedded microfluidic structure, comprising an IC substrate, an insulating dielectric layer, a pixel array, a transparent conductive layer, a transparent cover plate and a microfluidic structure;

[0007] The pixel array is arranged in the insulating medium layer, one side of the pixel array is connected to the transparent conductive layer, and the other side is connected to the IC substrate, and the transparent cover is arranged outside the transparent conductive layer;

[0008] The microfluidic structure includes a microfluidic channel, a liquid inlet and a liquid outlet. The microfluidic channel penetrates the transparent conductive layer and extends into the insulating medium layer. The microfluidic channel is distributed in the gaps between the pixel components in the pixel array. The transparent cover is provided with a liquid inlet and a liquid outlet connected to the microfluidic channel. A cooling medium flows in the microfluidic channel.

[0009] Furthermore, the pixel array is connected to the IC substrate via a pixel electrode, and a common electrode is connected between the transparent conductive layer and the IC substrate.

[0010] Furthermore, the cooling medium is selected from any one of deionized water, silicone oil, insulating mineral oil, liquid nitrogen, and liquid helium.

[0011] The second object of the present invention is to provide a method for preparing an array type optoelectronic chip with an embedded microfluidic channel structure, characterized in that it comprises the following steps:

[0012] S1, processing the epitaxial wafer on the substrate into a pixel array;

[0013] S2, depositing an insulating dielectric layer on the surface of the product obtained in S1, processing a pixel electrode hole on the insulating dielectric layer, and then depositing a pixel electrode in the pixel electrode hole;

[0014] S3, bonding the product obtained in S2 to the IC substrate, so that the pixel electrodes are connected to the control electrode contacts on the surface of the IC substrate correspondingly;

[0015] S4, removing the substrate, processing a common electrode contact hole on the surface of the removed substrate, and then depositing a common electrode in the common electrode contact hole;

[0016] S5, depositing a transparent conductive layer on the surface of the product obtained in S4, and processing the microchannel structure by spin coating photoresist on the transparent conductive layer, exposing and developing the microchannel structure pattern, etching, and removing the photoresist in sequence;

[0017] S6. Bond a transparent cover plate on the surface of the product obtained in S5, and etch a liquid inlet and a liquid outlet connected to the microfluidic structure on the transparent cover plate.

[0018] Furthermore, the processing steps include spin coating of photoresist, exposure and development of patterns, plasma dry etching, and finally removing the photoresist with an organic solvent.

[0019] Furthermore, the deposition is performed by sputtering, electron beam evaporation or PECVD.

[0020] Furthermore, in step S1, the epitaxial wafer material is any one of Si, Ge, superconducting material or III-V group semiconductor material.

[0021] Furthermore, in step S2, the insulating dielectric layer is mainly composed of SiO 2 、Si 3 N 4 and Al 2 O 3 .

[0022] Furthermore, the material of the pixel electrode and the common electrode is one or a combination of Ti, Cr, Au, Ni, and Pt.

[0023] Furthermore, the transparent conductive layer is made of ITO material, and the transparent cover plate is made of transparent insulating material.

[0024] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0025] 1. The present invention directly embeds the microfluidic structure in the pixel array that needs to be cooled, wherein the flowing cooling medium can directly exchange heat with the pixel components and remove the heat generated by the components when they are working, thereby achieving efficient thermal management and significantly improving the heat dissipation and cooling performance of the components, thereby ensuring the working performance of the components. At the same time, the microfluidic heat dissipation structure is directly embedded in the pixel array to form an integral structure with the pixel array, and has a higher degree of integration.

[0026] 2. The insulating dielectric layer deposited by the present invention wraps each pixel in the pixel array, and the microchannel structure is formed by etching and removing the specific structure of the insulating dielectric layer, while the remaining insulating dielectric layer that has not been etched away is still wrapped around the device, avoiding direct contact between the device and the coolant flowing in the microchannel, thereby effectively avoiding the influence of the microchannel on the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, other relevant drawings can be obtained based on these drawings without creative work. In the drawings:

[0028] Figure 1 This is a schematic diagram of the product structure obtained in step (1) of Example 2;

[0029] Figure 2 This is a schematic diagram of the product structure obtained in step (2) of Example 2;

[0030] Figure 3 This is a schematic diagram of the product structure obtained in step (4) of Example 2;

[0031] Figure 4 Schematic diagram of the product structure obtained in step (5) of Example 2;

[0032] Figure 5 Schematic diagram of the product structure obtained in step (7) of Example 2;

[0033] Figure 6 Schematic diagram of the product structure obtained in step (9) of Example 2;

[0034] Figure 7 Schematic diagram of the product structure obtained in step (10) of Example 2;

[0035] Figure 8 Schematic diagram of the product structure obtained in step (11) of Example 2;

[0036] Fig. 9 Schematic diagram of the product structure obtained in step (13) of Example 2;

[0037] Fig.10 Schematic diagram of the product structure obtained in step (14) of Example 2;

[0038] Fig.11 Schematic diagram of the product structure obtained in step (16) of Example 2;

[0039] Fig.12 Schematic diagram of the product structure of the present invention;

[0040] Fig.13 Top view structure schematic diagram of a microchannel structure of the present invention;

[0041] Fig.14 Another top view structure schematic diagram of the microchannel structure of the present invention.

[0042] Marks in the drawings and corresponding component names:

[0043] 1 - IC substrate, 2 - insulating dielectric layer, 3 - pixel electrode, 4 - pixel array, 5 - transparent conductive layer, 6 - transparent cover plate, 7 - microfluidic channel, 8 - liquid inlet, 9 - liquid outlet, 10 - common electrode, 11 - substrate, 12 - epitaxial wafer, 13 - photoresist, 14 - pixel electrode hole, 15 - pixel electrode layer, 16 - common electrode contact hole. Detailed implementation manners

[0044] To make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments and the drawings. Obviously, the illustrative embodiments and descriptions thereof of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0045] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings as appropriate. However, there may be cases where unnecessary detailed descriptions are omitted. For example, there may be cases where detailed descriptions and repeated descriptions of well-known matters are omitted. This is to avoid the following description from becoming unnecessarily lengthy and to facilitate understanding by those skilled in the art.

[0046] Unless otherwise specified, all embodiments and optional embodiments of the present application can be combined with each other to form a new technical solution.

[0047] Unless otherwise specified, all technical features and optional technical features of this application can be combined with each other to form a new technical solution.

[0048] Unless otherwise specified, the terms "include" and "comprising" mentioned in this application may be open-ended or closed-ended. For example, the terms "include" and "comprising" may mean that other substances not listed may also be included or only the listed substances may be included.

[0049] If there is no special explanation, all the steps of the present application can be performed sequentially or randomly, preferably sequentially.

[0050] In view of the technical problem that the existing microfluidic structure has a low integration level in the chip structure and cannot realize efficient heat exchange for each pixel unit inside the chip, resulting in limited heat dissipation effect and heat exchange capacity, the purpose of the present invention is to provide an array-type optoelectronic chip with an embedded microfluidic structure and a preparation method.

[0051] The traditional microfluidic structure exists on an independent "microfluidic heat sink". After the microfluidic structure is prepared, the heat sink is attached to the back of the component that needs heat dissipation.

[0052] In conventional array devices, the insulating layer between unit devices only serves as electrical insulation and environmental isolation. In the present invention, the microchannel structure of each pixel element in the flow array is nested in the insulating layer, which has a higher degree of integration. The insulating layer of the present invention not only serves as electrical insulation and environmental isolation, but is also used to form a microchannel structure.

[0053] The structure proposed in the present invention application is to directly nest and integrate the microfluidic structure into the device array, so that the microfluidic structure is directly integrated with the element to be cooled, thereby achieving the purpose of improving the heat dissipation effect, eliminating the "microfluidic heat sink" component, and having a higher degree of integration.

[0054] The technical solution of the present invention is further described in detail below in conjunction with embodiments.

[0055] It should be noted that the experimental methods used in the examples are conventional methods unless otherwise specified. The materials, reagents, methods and instruments used are conventional materials, reagents, methods and instruments in the art unless otherwise specified, and can be obtained by those skilled in the art through commercial channels.

[0056] Example 1

[0057] An array type optoelectronic chip with an embedded microfluidic structure, such as Figure 12-14 As shown, it includes an IC substrate 1, an insulating medium layer 2, a pixel array 4, a transparent conductive layer 5, a transparent cover plate 6 and a microchannel structure;

[0058] The pixel array 4 is arranged in the insulating medium layer 2, one side of the pixel array 4 is connected to the transparent conductive layer 5, and the other side is connected to the IC substrate 1, and the transparent cover plate 6 is arranged outside the transparent conductive layer 5; the pixel array 4 is connected to the IC substrate 1 through the pixel electrode 3, and a common electrode 10 is connected between the transparent conductive layer 5 and the IC substrate 1.

[0059] The microfluidic structure includes a microfluidic channel 7, a liquid inlet 8 and a liquid outlet 9. The microfluidic channel 7 penetrates the transparent conductive layer 5 and extends into the insulating medium layer 2. The microfluidic channel 7 is distributed in the gaps between the pixel components in the pixel array 4. The transparent cover plate 6 is provided with a liquid inlet 8 and a liquid outlet 9 connected to the microfluidic channel 7. A cooling medium flows in the microfluidic channel 7.

[0060] The cooling medium is selected from any one of deionized water, silicone oil, insulating mineral oil, liquid nitrogen and liquid helium.

[0061] The present invention directly embeds the microfluidic structure in the pixel array 4 that needs to be cooled, where the flowing cooling medium can directly exchange heat with the pixel components to remove the heat generated by the components when they are working, thus achieving efficient thermal management and significantly improving the heat dissipation and cooling performance of the components, thereby ensuring the working performance of the components. At the same time, the microfluidic heat dissipation structure is directly embedded in the pixel array 4 to form an integral structure with the pixel array 4, which has a higher degree of integration. Among them, the planar structure of the microfluidic structure is as follows: Fig.13 , Fig.14 As shown, of course, the microfluidic channel 7 may also be in other shapes such as staggered arrangement between pixels. The specific shape of the arrangement is not limited by the present invention, and various shapes and styles may be applicable to the present invention.

[0062] Example 2

[0063] In this embodiment, an epitaxial wafer including an InGaN / GaN multi-quantum well structure and a dedicated silicon-based CMOS driver IC wafer are used as materials. The growth substrate of the epitaxial wafer can be any one of common single crystal materials such as Si, sapphire, GaN, SiC, etc. This embodiment uses Si, and the epitaxial layer mainly includes two types of charge transport layers, p-type and N-type, and an InGaN / GaN multi-quantum well light-emitting structure.

[0064] A method for preparing an array type optoelectronic chip with an embedded microfluidic channel structure comprises the following steps:

[0065] (1) Cleaning of epitaxial wafer 12: Use organic solvents such as acetone / alcohol to remove organic contamination on the wafer surface, and use HCl, H 2 O 2 A mixed solution of 1:1:6 and deionized water is used to clean the metal ion contamination on the surface of the epitaxial wafer 12. The wafer is thoroughly cleaned with deionized water and blown dry with dry nitrogen; the product structure is as shown in FIG. Figure 1 As shown;

[0066] (2) Spin coating the photoresist 13: Spin coating the photoresist 13 on the surface of the epitaxial wafer 12 using a coating machine, and stably controlling the spin coating speed at 1000-2000 rpm to make the thickness of the photoresist layer on the surface of the wafer uniform; the product structure is as follows: Figure 2 As shown;

[0067] (3) Exposure and development: Use a photolithography machine to perform exposure, and then perform development to transfer the pixel array 4 pattern designed on the mask to the photoresist layer;

[0068] (4) Pixel array 4 etching: The etching is performed using a plasma dry etching process, and the etching gas is a Cl-containing 2 / BCl 3 After etching, the remaining photoresist 13 layer is removed using organic solvents such as acetone and NMP, and the surface is cleaned with deionized water; the product structure is as shown in FIG. Figure 3 As shown;

[0069] (5) Deposition of insulating dielectric layer 2: Using PECVD or PVD process, the insulating dielectric layer 2 is deposited on the surface of the product obtained in step (4). The main component of the insulating dielectric layer 2 is SiO 2 、Si 3 N 4 、Al 2 O 3 The deposition process is PECVD or sputtering. When PECVD is used to deposit the insulating dielectric layer 2, SiH 4 , O 2 As a precursor, SiO 2Deposition, using SiH 4 NH 3 As a precursor for depositing Si 3 N 4 , using trimethylaluminum (TMA), O 2 Or 3 Al as a gaseous precursor 2 O 3 The surface after deposition was flattened using chemical mechanical polishing (CMP) technology, and the sample surface was cleaned with deionized water. The product structure was as follows: Figure 4 As shown;

[0070] (6) Exposure and development of the pixel electrode hole 14: Spin-coat a layer of photoresist on the surface of the product obtained in step (5), and transfer the pixel electrode hole pattern to the surface of the photoresist layer through exposure and development;

[0071] (7) Etching of pixel electrode hole 14: Etching is performed using a plasma dry etching process, using CHF 3 / CF 4 / SF 6 Mixed gas etching SiO 2 , using CF 4 or CHF 3 Gas etching Si 3 N 4 , using Cl 2 / BCl 3 Mixed gas etching Al 2 O 3 After etching, use acetone, NMP and other organic solvents to remove the photoresist layer; the product structure is as follows Figure 5 As shown;

[0072] (8) Exposure and development of pixel electrode 3 pattern: After step (7), the surface of the product is subjected to photoresist spin coating, and the pixel electrode pattern is transferred to the surface of the photoresist layer through exposure and development, wherein the electrode pattern corresponds to the position of the electrode hole etched in step (7);

[0073] (9) Deposition of pixel electrode layer 15: Using deposition processes such as sputtering and electron beam evaporation, the metal of the pixel electrode layer 15 is deposited on the surface of the product after step (8). The metal electrode material is one or a combination of metal materials such as Ti / Cr / Au / Ni / Pt; the product structure is as follows: Figure 6 As shown;

[0074] (10) Removal of the photoresist layer: Use acetone, NMP or other organic solvents to remove the photoresist layer, and the excess metal layer thereon is also removed; the product structure is as follows: Figure 7 As shown;

[0075] (11) Align and bond with IC substrate 1: Use a bonding machine to align and bond the product completed in step (10) with IC substrate 1, and connect the pixel electrode 3 to the control electrode contact on the surface of IC substrate 1. The bonding technology can be direct bonding or a bonding process using a bonding medium (organic glue, inorganic medium, etc.); the product structure is as follows: Figure 8 As shown;

[0076] (12) Removal of substrate 11: removing the growth substrate 11 of the epitaxial wafer 12 by using processes such as wafer polishing, laser lift-off or chemical etching;

[0077] (13) Processing of common electrode contact hole 16: The common electrode contact hole 16 is processed on the surface of the product after step (12) by sequentially using the steps of spin coating photoresist / exposure / development / etching / removal of photoresist; the product structure is as follows: Fig. 9 As shown;

[0078] (14) Deposition of metal layer of common electrode 10: After step (13) is completed, the common electrode 10 structure is prepared by sequentially using the steps of spin coating photoresist / exposure / development / metal deposition. The metal deposition process can be electroplating, sputtering or electron beam evaporation, and the metal electrode material is one or a combination of metal materials such as Ti / Cr / Au / Ni / Pt; the product structure is as follows: Fig.10 As shown;

[0079] (15) Deposition of transparent conductive layer 5: After step (14), a layer of transparent conductive ITO material is deposited on the surface of the product, and the surface after deposition is planarized using CMP technology;

[0080] (16) Etching of microfluidic structure: After step (15), the microfluidic channel 7 is processed by sequentially using the steps of spin coating photoresist / exposure / development / etching / removal of photoresist on the surface of the product. The product structure is as follows: Fig.11 As shown;

[0081] Among them, BCl is used in the plasma dry etching process of ITO material. 3 / Cl 2 As the main etching gas, for the dielectric layer material under the ITO layer, if the dielectric layer material is SiO 2 , using CHF 3 / CF 4 / SF 6 Mixed gas etching, if it is Si 3 N 4 Using CF 4 or CHF 3 Gas etching, if Al2 O 3 Use Cl 2 / BCl 3 Mixed gas etching;

[0082] (17) Bonding of transparent cover plate 6: After step (16), a transparent medium layer (glass layer, SiO 2 Or other transparent insulating materials) to form an effective microchannel sealing structure. The bonding technology can be direct bonding or a bonding process with the help of a transparent bonding medium (organic glue, glass layer, etc.);

[0083] (18) Inlet and outlet processing: After step (17), a photolithography / etching process (wet, dry or laser etching process) is used to etch the inlet 8 and outlet 9 on the transparent cover plate, and the inlet 8 and outlet 9 are connected to the microfluidic channel 7. The final product structure is as follows: Fig.12 shown.

[0084] Finally, it should be noted that the above specific embodiments are only used to explain in detail the purpose, technical solutions and beneficial effects of the present invention. It should be understood that the above description is only a specific implementation method of the present invention and is not used to limit the protection scope of the present invention. Although the present invention is described in detail with reference to the above specific embodiments, ordinary technicians in this field should understand that it is still possible to modify the technical solutions recorded in the above embodiments, or to replace or improve some or all of the technical features therein. These modifications, equivalent replacements and improvements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be included in the scope of the claims and description of the present invention.

Claims

1. An array type optoelectronic chip with an embedded microfluidic channel structure, characterized in that: It comprises an IC substrate (1), an insulating medium layer (2), a pixel array (4), a transparent conductive layer (5), a transparent cover plate (6) and a microchannel structure; The pixel array (4) is arranged in the insulating medium layer (2), one side of the pixel array (4) is connected to the transparent conductive layer (5), and the other side is connected to the IC substrate (1), and the transparent cover plate (6) is arranged outside the transparent conductive layer (5); The microfluidic channel structure comprises a microfluidic channel (7), a liquid inlet (8) and a liquid outlet (9); the microfluidic channel (7) penetrates the transparent conductive layer (5) and extends into the insulating medium layer (2); the microfluidic channel (7) is distributed in the gaps between the pixel components in the pixel array (4); the transparent cover plate (6) is provided with a liquid inlet (8) and a liquid outlet (9) which are in communication with the microfluidic channel (7); and a cooling medium flows in the microfluidic channel (7).

2. The array-type optoelectronic chip with an embedded microfluidic structure according to claim 1, characterized in that: The pixel array (4) is connected to the IC substrate (1) via a pixel electrode (3), and a common electrode (10) is connected between the transparent conductive layer (5) and the IC substrate (1).

3. The array-type optoelectronic chip with an embedded microfluidic structure according to claim 1, characterized in that: The cooling medium is selected from any one of deionized water, silicone oil, insulating mineral oil, liquid nitrogen and liquid helium.

4. A method for preparing an array-type optoelectronic chip with an embedded microfluidic channel structure, characterized in that: The following steps are involved: S1, processing an epitaxial wafer (12) on a substrate (11) to form a pixel array (4); S2, depositing an insulating dielectric layer (2) on the surface of the product obtained in S1, processing a hole for a pixel electrode (3) on the insulating dielectric layer (2), and then depositing a pixel electrode (3) in the hole for the pixel electrode (3); S3, bonding the product obtained in S2 to the IC substrate (1), so that the pixel electrode (3) is connected to the control electrode contact on the surface of the IC substrate (1) correspondingly; S4, removing the substrate (11), processing a common electrode contact hole (11) on the surface of the removed substrate (11), and then depositing a common electrode (10) in the common electrode contact hole (11); S5, depositing a transparent conductive layer (5) on the surface of the product obtained in S4, and processing the microchannel structure by spin coating a photoresist (13) on the transparent conductive layer (5), exposing and developing the microchannel structure pattern, etching, and removing the photoresist (13) in sequence; S6. Bond a transparent cover plate (6) on the surface of the product obtained in S5, and etch a liquid inlet (8) and a liquid outlet (9) connected to the microchannel structure on the transparent cover plate (6).

5. The method for preparing an array type optoelectronic chip with an embedded microfluidic channel structure according to claim 4, characterized in that: The processing steps include spin coating photoresist, pattern exposure and development, plasma dry etching, and finally removing the photoresist with an organic solvent.

6. The method for preparing an array type optoelectronic chip with an embedded microfluidic structure according to claim 4, characterized in that: The deposition is performed by sputtering, electron beam evaporation or PECVD.

7. The method for preparing an array type optoelectronic chip with an embedded microfluidic channel structure according to claim 4, characterized in that: In step S1, the epitaxial wafer (12) is made of any one of Si, Ge, superconducting materials or III-V semiconductor materials.

8. The method for preparing an array type optoelectronic chip with an embedded microfluidic structure according to claim 4, characterized in that: In step S2, the main components of the insulating dielectric layer (2) are SiO2, Si3N4 and Al2O3.

9. The method for preparing an array type optoelectronic chip with an embedded microfluidic channel structure according to claim 4, characterized in that: The material of the pixel electrode (3) and the common electrode (10) is one or a combination of Ti, Cr, Au, Ni and Pt materials.

10. The method for preparing an array type optoelectronic chip with an embedded microfluidic channel structure according to claim 4, characterized in that: The transparent conductive layer (5) is made of ITO material, and the transparent cover plate (6) is made of transparent insulating material.

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