Thermal reset test method, apparatus and device for disk array card, and medium

Abstract

The invention provides a thermal reset test method, device and equipment for a disk array card and a medium, and is applied to the technical field of disk array card testing, and the method comprises the following steps: obtaining a target host end scene implementation logic corresponding to target scene type information based on a preset mapping relation; different scene type information in the preset mapping relation corresponds to different pre-created host end scene implementation logics; executing the target host end scene implementation logic, constructing a test scene at the host end, and notifying a disk array card to execute the disk array card scene implementation logic corresponding to the target scene type information so as to construct a test scene at the disk array card; and triggering the disk array card to perform thermal reset so as to realize a thermal reset test of the disk array card in a test scene corresponding to the target scene type information. In this way, the flexibility and efficiency of the thermal reset test of the disk array card can be improved.

Description

Technical Field

[0001] The present invention relates to the field of disk array card testing technology, and in particular to a hot reset testing method, device, equipment and medium for a disk array card. Background Art

[0002] The current design and implementation of disk array cards usually include a reset mechanism to ensure that the disk array card can be restored to its normal working state when the system is running. Among them, the hot reset of the disk array card is a specific reset operation that can reset the disk array card without turning off the system power to restore its normal function. Due to various factors, some problems may occur in this process, so the hot reset needs to be fully tested to ensure that the hot reset process is as reliable as possible. At present, the method for testing the hot reset scenario of the disk array card is usually a black box test, which mainly focuses on the input and output of the software system, is not flexible enough, and has low test efficiency. It takes a lot of time and effort to design test cases.

[0003] Therefore, how to improve the flexibility and efficiency of the hot reset test of the disk array card is a problem that those skilled in the art need to solve. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a method, device, equipment and medium for hot reset testing of a disk array card, which can improve the flexibility and efficiency of hot reset testing of a disk array card. The specific scheme is as follows:

[0005] In a first aspect, the present invention provides a hot reset test method for a disk array card, which is applied to a host side and comprises:

[0006] Acquire the target host-side scene implementation logic corresponding to the target scene type information based on the preset mapping relationship; different scene type information in the preset mapping relationship corresponds to different pre-created host-side scene implementation logics;

[0007] Executing the target host-side scenario implementation logic to construct a test scenario on the host side, and notifying the disk array card to execute the disk array card scenario implementation logic corresponding to the target scenario type information to construct a test scenario on the disk array card;

[0008] The disk array card is triggered to perform a hot reset, so as to implement a hot reset test of the disk array card in a test scenario corresponding to the target scenario type information.

[0009] Optionally, also include:

[0010] Acquire a test scenario input type based on a first preset interaction window;

[0011] Acquire target scenario type information based on the test scenario input type;

[0012] Among them, the test scenario input types include manual input and random generation.

[0013] Optionally, when the test scenario input type is manual input, obtaining target scenario type information based on the test scenario input type includes:

[0014] Target scene type information is acquired based on the second preset interaction window.

[0015] Optionally, when the test scenario input type is randomly generated, obtaining target scenario type information based on the test scenario input type includes:

[0016] The scene type information is randomly generated within a preset scene type information generation range to obtain the target scene type information.

[0017] Optionally, the test scenario types corresponding to the scenario type information in the preset mapping relationship include: reading data, writing data, normal or abnormal status of a high-speed peripheral component interconnect standard port, terminal device disconnection, full root complex or single root complex, normal or abnormal status of a hardware Internet Protocol address, and one or more of the transmission process between an endpoint and a root complex.

[0018] Optionally, the scene type information is a type number, and the method further includes:

[0019] Get the host-side scenario implementation logic entered by the user;

[0020] The host-side scene implementation logic is saved into an array to obtain a target array, wherein the element subscript of the target array is consistent with the type number corresponding to the element, and the element is the host-side scene implementation logic;

[0021] Acquire a test scenario input type code value based on the first preset interaction window;

[0022] When the test scenario input type code value is a first preset value, it represents manual input, and the target type number is obtained based on the second preset interaction window. When the test scenario input type code value is a second preset value, it represents random generation, and the type number is randomly generated based on the generation range of the type number to obtain the target type number.

[0023] Correspondingly, the target host-side scene implementation logic corresponding to the target scene type information obtained based on the preset mapping relationship includes:

[0024] The target host-side scenario implementation logic corresponding to the target type number is obtained based on the target array.

[0025] In a second aspect, the present invention provides a hot reset test method for a disk array card, which is applied to the disk array card and comprises:

[0026] In response to the notification of the host side, the disk array card scenario realization logic corresponding to the target scenario type information is executed to construct a test scenario on the disk array card, wherein the target scenario type information is the scenario type information corresponding to the target host side scenario realization logic in the preset mapping relationship, different scenario type information in the preset mapping relationship corresponds to different pre-created host side scenario realization logic, and the target host side scenario realization logic is executed by the host side to construct a test scenario on the host side;

[0027] In response to the hot reset trigger operation of the host end, a hot reset test of the disk array card is implemented in the test scenario corresponding to the target scenario type information.

[0028] In a third aspect, the present invention discloses a hot reset test device for a disk array card, which is applied to a host side and comprises:

[0029] A logic acquisition module, used to acquire the target host-side scene implementation logic corresponding to the target scene type information based on a preset mapping relationship; different scene type information in the preset mapping relationship corresponds to different pre-created host-side scene implementation logic;

[0030] A scenario construction module, used to execute the target host-side scenario realization logic, construct a test scenario on the host side, and notify the disk array card to execute the disk array card scenario realization logic corresponding to the target scenario type information to construct a test scenario on the disk array card;

[0031] The hot reset trigger module is used to trigger the disk array card to perform a hot reset, so as to implement a hot reset test of the disk array card in a test scenario corresponding to the target scenario type information.

[0032] In a fourth aspect, the present invention discloses an electronic device, comprising:

[0033] Memory for storing computer programs;

[0034] The processor is used to execute the computer program to implement the steps of the above-mentioned hot reset test method of the disk array card.

[0035] In a fifth aspect, the present invention discloses a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the aforementioned hot reset test method for a disk array card are implemented.

[0036] In a sixth aspect, the present invention provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the aforementioned hot reset test method for a disk array card.

[0037] It can be seen from the above scheme that the present invention provides a hot reset test method for a disk array card, which is applied to a host side, and includes: obtaining a target host side scenario implementation logic corresponding to target scenario type information based on a preset mapping relationship; different scenario type information in the preset mapping relationship corresponds to different pre-created host side scenario implementation logics; executing the target host side scenario implementation logic to construct a test scenario on the host side, and notifying the disk array card to execute the disk array card scenario implementation logic corresponding to the target scenario type information to construct a test scenario on the disk array card; triggering the disk array card to perform a hot reset to implement a hot reset test of the disk array card under the test scenario corresponding to the target scenario type information.

[0038] It can be seen that the beneficial effects of the present invention are: pre-creating host-side scene implementation logic corresponding to different scene type information, building a preset mapping relationship, and when performing a hot reset test on a disk array card, the target host-side scene implementation logic corresponding to the target scene type information can be obtained based on the preset mapping relationship and executed, constructing a test scene on the host side, and notifying the disk array card to construct a test scene corresponding to the target scene type information on the disk array card, realizing the construction of test scenes on both sides, and then triggering the disk array card to perform a hot reset, so as to realize the hot reset test of the disk array card under the test scene corresponding to the target scene type information. In this way, by creating host-side scene implementation logic corresponding to different scene type information and building a preset mapping relationship, when performing a hot reset test, the test scene under the corresponding scene type information can be constructed based on the scene implementation logic, and the test can be performed, which can improve the flexibility and efficiency of the hot reset test of the disk array card. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 A flow chart of a hot reset test method for a disk array card provided by an embodiment of the present invention;

[0041] Figure 2 A schematic diagram of a hot reset test of a disk array card provided by an embodiment of the present invention;

[0042] Figure 3 A hot reset test flow chart of a disk array card provided by an embodiment of the present invention;

[0043] Figure 4 A schematic diagram of a RAID side hot reset processing mechanism provided by an embodiment of the present invention;

[0044] Figure 5 A flow chart of another hot reset test method for a disk array card provided by an embodiment of the present invention;

[0045] Figure 6 A schematic diagram of the structure of a hot reset test device for a disk array card provided by an embodiment of the present invention;

[0046] Figure 7 A structural diagram of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0048] The terms "including" and "having" in the specification of the present invention and the above-mentioned drawings, as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but may include steps or units that are not listed.

[0049] The current RAID card design and implementation usually include a reset mechanism to ensure that the normal working state of the RAID card can be restored when the system is running. Among them, the hot reset of the RAID card is a specific reset operation, which can reset the RAID card without turning off the system power to restore its normal function. In this process, due to various factors, some problem scenarios may occur, such as hard disk failure and data synchronization failure. Therefore, in the research and development test stage, it is necessary to fully test the possible hot reset scenarios to ensure that the hot reset process is as reliable as possible. The current method for testing the hot reset scenario of the RAID card usually belongs to black box testing, which leaves the following problems: limited test coverage, if the main focus is on the input and output of the software system, it is impossible to deeply test the internal implementation details and code structure; low test efficiency, designing test cases requires a lot of time and energy, and due to limited test coverage, more test cases may be required to achieve the expected test effect. To this end, the present invention provides a hot reset test scheme for a disk array card, which can improve the comprehensiveness, flexibility and efficiency of the hot reset test of the RAID card.

[0050] First, the technical terms involved in the present invention are explained:

[0051] RAID: Redundant Arrays of Independent Disks (RAID) is a disk group with huge capacity, which is composed of many independent disks.

[0052] PCIe: Peripheral Component Interconnect Express, a hardware interface between the host and peripherals. It realizes data interaction between the host and peripherals through the PCIe bus protocol and host PCIe implemented inside the PCIe hardware link. It has the characteristics of high-speed transmission, link abnormality recovery, and power consumption management.

[0053] NVMe: Non Volatile Memory Host Controller Interface Specification, a host software application layer protocol running on top of the hardware PCIe protocol, defines a set of management and IO request / response queue interfaces, which can enable the host to submit IO request commands to the device and process IO responses in a high-concurrency and asynchronous manner.

[0054] EP: Endpoint, the terminal device in the PCIe link, the starting point or end point of data transmission, completing data sending and receiving.

[0055] RC: Root Complex, the root complex in the PCIe link, connects the CPU and memory, is responsible for initializing and managing the PCIe bus, and realizes communication between the CPU and PCIe devices.

[0056] Disk: Disk device, data storage device, provides data persistence storage function and responds to read and write requests.

[0057] Switch: A switching device in a PCIe link, used to increase the number of ports on a PCIe link and other functions.

[0058] IO: Input Output, input and output streams.

[0059] SSD: Solid State Disk, a hard disk made of an array of solid-state electronic storage chips.

[0060] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0061] Next, a hot reset test method for a disk array card provided by an embodiment of the present invention is described in detail. Figure 1 A flow chart of a hot reset test method for a disk array card provided by an embodiment of the present invention, the hot reset test method for the disk array card comprising:

[0062] Step S11: acquiring the target host-side scene implementation logic corresponding to the target scene type information based on a preset mapping relationship; different scene type information in the preset mapping relationship corresponds to different pre-created host-side scene implementation logics.

[0063] That is, in the embodiment of the present invention, the preset mapping relationship is the mapping relationship between the scene type information and the pre-created host-side scene implementation logic. There are multiple scenarios for hot reset. The embodiment of the present invention implements the host-side scene implementation logic under multiple scenarios. The host-side scene implementation logic is the implementation logic of the test scene that can be built on the host side. The scene type information can be information that characterizes the scene type, such as the scene number, etc.

[0064] In an optional implementation, an embodiment of the present invention obtains a test scenario input type based on a first preset interaction window; obtains target scenario type information based on the test scenario input type; wherein the test scenario input type includes manual input and random generation. When the test scenario input type is manual input, obtaining target scenario type information based on the test scenario input type includes: obtaining target scenario type information based on a second preset interaction window. When the test scenario input type is randomly generated, obtaining target scenario type information based on the test scenario input type includes: randomly generating scenario type information within a preset scenario type information generation range to obtain target scenario type information.

[0065] That is, in the present invention, the scene type information can be manually input as the target scene type information, or the scene type information can be randomly generated as the target scene type information. The preset scene type information generation range includes all scene type information in the preset mapping relationship. It can be obtained through the interactive window or pre-configured.

[0066] In an optional implementation, the test scenario types corresponding to the scenario type information in the preset mapping relationship include: reading data, writing data, normal or abnormal status of a high-speed peripheral component interconnect standard port, terminal device disconnection, root complex full or single root complex, normal or abnormal status of a hardware Internet Protocol address, and one or more of the transmission process between an endpoint and a root complex. In addition, the embodiment of the present invention can number each scenario type. The embodiment of the present invention can refer to the latest NVMe protocol and PCIe manual standards to determine the scenario tests involved in the hot reset of the RAID card, thereby improving the comprehensiveness of the test.

[0067] In an optional embodiment, the scene type information is a type number, and the method further includes: obtaining the host-side scene implementation logic entered by the user; saving the host-side scene implementation logic to an array to obtain a target array, wherein the element subscript of the target array is consistent with the type number corresponding to the element, and the element is the host-side scene implementation logic; obtaining a test scene input type coding value based on a first preset interaction window; when the test scene input type coding value is a first preset value, it represents manual input, and obtaining a target type number based on a second preset interaction window; when the test scene input type coding value is a second preset value, it represents random generation, and randomly generates a type number based on the generation range of the type number to obtain a target type number. For example, the first preset value is 0, i.e., manual input, and the second preset value is 1, i.e., randomly generated. It can be understood that the preset mapping relationship is stored in the form of an array.

[0068] Correspondingly, the method of obtaining the target host-side scene implementation logic corresponding to the target scene type information based on the preset mapping relationship includes: obtaining the target host-side scene implementation logic corresponding to the target type number based on the target array.

[0069] Step S12: Execute the target host-side scenario implementation logic to construct a test scenario on the host side, and notify the disk array card to execute the disk array card scenario implementation logic corresponding to the target scenario type information to construct a test scenario on the disk array card.

[0070] That is, the test scenario in the embodiment of the present invention includes the test scenario of the host side and the test scenario of the disk array card, and the test scenario corresponding to the target scenario type information is composed of the test scenario of the host side and the test scenario of the disk array card. Different disk array card scenarios corresponding to different scenario type information realize logic.

[0071] Step S13: triggering the disk array card to perform a hot reset, so as to implement a hot reset test of the disk array card in a test scenario corresponding to the target scenario type information.

[0072] After the test scenario is constructed, the disk array card is triggered to perform a hot reset to implement a hot reset test of the disk array card in the test scenario corresponding to the target scenario type information. For example, when reading and writing data, whether the hot reset causes data loss, and in other scenarios, whether it causes corresponding state changes.

[0073] In an optional implementation, a scene type number can be generated by a preset random algorithm as target scene type information for stress testing. The preset random algorithm is an algorithm for randomly generating a type number based on a generation range of the type number, and the formula used is: type number = (rand()% (b-a+1)) + a, a and b represent the upper and lower limits of the range, and a=0 is set, and b=the total number of scene types. Through stress testing, the stability of the hot reset of the disk array card can be guaranteed.

[0074] For further information, see Figure 2 As shown, Figure 2 A schematic diagram of a hot reset test of a disk array card provided in an embodiment of the present invention. It is mainly divided into two parts and implemented together: 1) Test scenario injection logic, as the source of test scenario injection, supports manual input and random generation of test scenario types, can trigger hot reset test scenarios on the host side by executing scripts, etc., or directly trigger hot reset test scenarios through standard transmission interfaces such as serial ports. Both are implemented on the host side, and the execution script can be based on the NVMe protocol. 2) RAID side hot reset processing mechanism, receives the reset trigger condition transmitted by the host, and implements hot reset scenario processing logic. In this way, the problems of incomplete testing and low testing efficiency are solved.

[0075] The embodiment of the present invention can support different hot reset test scenarios. For test scenario injection, the embodiment of the present invention summarizes and numbers the different test scenarios involved in hot reset, supports manual input and randomly generated scenario type numbers, and these two methods are controlled by switches, and can be selected at will through input type codes such as 0: manual input; 1: randomly generated scenario type. Different scenario implementation logics will then be adopted according to the scenario type and passed to the RAID side scenario implementation logic. For hot reset, the host side is triggered, and after the RAID side hot reset public processing logic receives the hot reset condition triggered by the host side, it will be passed to the control logic, business logic, and data storage logic respectively through methods such as triggering interrupts. In each logic, information is transmitted through message queues and other methods, and finally the respective reset processing threads are awakened for processing. Different logics perform different operations such as hardware module reset handshake, Disk / Swicth hot reset, data save operations, etc. The execution flow of hot reset is as follows Figure 2 As shown in the ④->⑤->⑥->⑦ process, the reset scenario test can be performed on the host side, such as Figure 2 As shown in the process of ①->②->③->④->⑤->⑥->⑦. For the scenario injection logic, refer to the latest NVMe protocol and PCIe manual standards. The hot reset of the RAID card involves the following scenario tests. Different resets involve different related information such as IO and disk operations. Therefore, all reset types and related information are classified by type and numbered. The designed IO operation description represents the impact of hot reset on IO operations in the corresponding scenario, which is summarized in Table 1:

[0076] Table 1 Summary of hot reset test scenario types

[0077]

[0078] The host side executes the test script. First, the scene type information in the above table is entered and saved, and then the test is performed. The hot reset test can be performed by manually entering the scene type number. The stress test can also be performed by generating the scene type number through a random algorithm. The two can be freely selected through the switch. See Figure 3 As shown, Figure 3A hot reset test flow chart for a disk array card provided in an embodiment of the present invention. Execute the test script, and before starting the test, prompt to enter the test scenario type, corresponding number, etc., save them in the same array, and count the total number of current types. After the entry is completed, prompt to enter the type of test scenario, 0: manual input, 1: randomly generated. For manual input, you need to enter the type number first. After the script prompts the range of the type number, you need to enter a reasonable value within the range, otherwise it will be invalid. If invalid, you will be prompted to try again; after the correct number is entered, find the corresponding scene information array according to the type number, and obtain the corresponding scene information, that is, the host-side scene implementation logic. If it is randomly generated, generate the scene type number first. Random algorithm formula:

[0079] Scenario type number = (rand() % (b-a+1)) + a, a and b represent the upper and lower limits of the range, set a=0, b=the total number of scenario types, and find the corresponding scenario information array according to the type number to obtain the corresponding test scenario information. After the above method obtains the corresponding test scenario, the host side executes the corresponding scenario trigger process, uses the host-side scenario implementation logic to build the host-side test scenario, and passes it to the RAID side to implement the scenario execution process and construct the RAID-side test scenario. At this time, the test scenario has been constructed, and the host side triggers the hot reset logic, which is passed to the RAID side to perform the hot reset process. The hot reset results under different test scenarios can be viewed. The scene injection logic process ends here.

[0080] For further information, see Figure 4 As shown, Figure 4 A schematic diagram of a RAID side hot reset processing mechanism provided by an embodiment of the present invention. The host side triggers the hot reset condition, which is transmitted to the RAID side, and the hot reset processing logic performs processing, which can be divided into the following parts:

[0081] Public processing: The reset processing logic on the RAID side receives the reset trigger condition from the host, usually in the form of an interrupt, etc. In the interrupt processing function, the reset processing thread in the chip firmware is awakened by means of a message queue.

[0082] Each main reset processing logic: After the corresponding reset thread of each main reset processing logic wakes up, it will process according to the corresponding reset type (i.e. hot reset) and information:

[0083] The control logic may include: a) reset handshake of each hardware module, send corresponding reset handshake information to each hardware module, and wait for its handshake response. b) reset the PCIe port status. c) stop EP and RC data transmission to ensure that there is no data transmission during the reset process. d) wait for the data storage logic to complete the sent response. e) perform the Raid hot reset operation.

[0084] The service logic may include: a) resetting all the Disks / Switches attached to the RC. b) stopping the service logic and entering the idle state.

[0085] The data storage logic may include: a) data saving operation. b) after the data saving operation is completed, notifying the control logic that data protection is completed.

[0086] Among them, the most important is the control logic. After the business logic and data storage logic have completed their operations and notified the control logic, the hot reset process is finally executed. That is, the control logic executes to d) to wait, starts to execute the business logic, and then executes the data storage logic. When the business logic and data storage logic have completed their operations, the Raid hot reset operation is executed.

[0087] The present invention provides a hot reset white box test method based on RAID card, which adopts the design of adding hot reset scene injection logic, and injects the test scene type number to perform a comprehensive test of the hot reset function. Based on the standard NVMe protocol and PCIe manual, different hot reset test scenarios such as IO reading and writing are counted, and at the same time, the scene type encoding and injection method is adopted to replace the specific single reset test scene construction process, which greatly reduces the cost and improves the efficiency. A test scene injection mechanism is designed, which supports manual input and random generation to trigger the scene, and the two can be executed alternately, and supports stress testing, realizes the automatic processing of the test, increases the flexibility of the hot reset test, and improves the coverage of the hot reset test scene.

[0088] In this way, costs are reduced. Since the method of directly injecting hot reset test scenario types and information for testing replaces the original method of building reset scenarios from scratch, the investment cost of scenario construction is reduced. It is flexible. Manually constructing various complex reset scenarios is difficult to control. The current solution can omit the complex reset construction process and directly input the corresponding scenario types and information for testing and processing. Automation. The current solution can freely select hot reset test scenarios for testing. Automated testing has been implemented, and stress testing is supported, which is more efficient. Coverage is improved. The current solution has basically achieved full scenario coverage of hot reset. Compared with black box testing, the test coverage is wider.

[0089] See also Figure 5 As shown, an embodiment of the present invention provides a hot reset test method for a disk array card, which is applied to the disk array card and includes:

[0090] Step S21: in response to the notification of the host side, executing the disk array card scenario implementation logic corresponding to the target scenario type information to construct a test scenario on the disk array card, wherein the target scenario type information is the scenario type information corresponding to the target host side scenario implementation logic in the preset mapping relationship, different scenario type information in the preset mapping relationship corresponds to different pre-created host side scenario implementation logic, and the target host side scenario implementation logic is executed by the host side to construct a test scenario on the host side;

[0091] Step S22: responding to the hot reset triggering operation of the host end to implement the hot reset test of the disk array card in the test scenario corresponding to the target scenario type information.

[0092] It can be seen that the embodiment of the present invention pre-creates the host-side scene realization logic corresponding to different scene type information, constructs a preset mapping relationship, and when performing a hot reset test of the disk array card, the target host-side scene realization logic corresponding to the target scene type information can be obtained based on the preset mapping relationship and executed, a test scene can be constructed on the host side, and the disk array card is notified to construct a test scene corresponding to the target scene type information of the disk array card, to achieve the construction of test scenes on both sides, and then the disk array card is triggered to perform a hot reset, so as to achieve a hot reset test of the disk array card under the test scene corresponding to the target scene type information. In this way, by creating the host-side scene realization logic corresponding to different scene type information and constructing a preset mapping relationship, when performing a hot reset test, a test scene under the corresponding scene type information can be constructed based on the scene realization logic, and the test can be performed, which can improve the flexibility and efficiency of the hot reset test of the disk array card.

[0093] See also Figure 6 As shown, an embodiment of the present invention discloses a hot reset test device for a disk array card, which is applied to a host side and includes:

[0094] A logic acquisition module 61 is used to acquire the target host-side scene implementation logic corresponding to the target scene type information based on a preset mapping relationship; different scene type information in the preset mapping relationship corresponds to different pre-created host-side scene implementation logic;

[0095] A scenario construction module 62 is used to execute the target host-side scenario realization logic, construct a test scenario on the host side, and notify the disk array card to execute the disk array card scenario realization logic corresponding to the target scenario type information to construct a test scenario on the disk array card;

[0096] The hot reset trigger module 63 is used to trigger the disk array card to perform a hot reset, so as to implement a hot reset test of the disk array card in the test scenario corresponding to the target scenario type information.

[0097] The device further comprises:

[0098] A test scenario input type acquisition module, used to acquire the test scenario input type based on the first preset interaction window;

[0099] The target scenario type information acquisition module is used to acquire the target scenario type information based on the test scenario input type; wherein the test scenario input type includes manual input and random generation.

[0100] In an optional implementation, when the test scenario input type is manual input, the target scenario type information acquisition module is specifically used to:

[0101] Target scene type information is acquired based on the second preset interaction window.

[0102] In an optional implementation, when the test scenario input type is randomly generated, obtaining target scenario type information based on the test scenario input type includes:

[0103] The scene type information is randomly generated within a preset scene type information generation range to obtain the target scene type information.

[0104] In an optional embodiment, the test scenario types corresponding to the scenario type information in the preset mapping relationship include: reading data, writing data, normal or abnormal status of a high-speed peripheral component interconnect standard port, terminal device disconnection, root complex full or single root complex, normal or abnormal status of a hardware Internet Protocol address, and one or more of the transmission process between an endpoint and a root complex.

[0105] In an optional implementation manner, the scene type information is a type number, and the device further includes:

[0106] The scene realization logic input module is used to obtain the host-side scene realization logic entered by the user;

[0107] A target data determination module, used for saving the host-side scene realization logic into an array to obtain a target array, wherein the element subscript of the target array is consistent with the type number corresponding to the element, and the element is the host-side scene realization logic;

[0108] Correspondingly, the test scenario input type acquisition module is used to obtain the test scenario input type code value based on the first preset interaction window;

[0109] When the test scenario input type code value is a first preset value, it indicates manual input, and the target scenario type information acquisition module is specifically used to obtain a target type number based on a second preset interaction window; when the test scenario input type code value is a second preset value, it indicates random generation, and the target scenario type information acquisition module is specifically used to randomly generate a type number based on a generation range of the type number to obtain a target type number;

[0110] Correspondingly, the logic acquisition module is specifically used to: acquire the target host-side scenario implementation logic corresponding to the target type number based on the target array.

[0111] It can be seen that the embodiment of the present invention pre-creates the host-side scene realization logic corresponding to different scene type information, constructs a preset mapping relationship, and when performing a hot reset test of the disk array card, the target host-side scene realization logic corresponding to the target scene type information can be obtained based on the preset mapping relationship and executed, a test scene can be constructed on the host side, and the disk array card is notified to construct a test scene corresponding to the target scene type information of the disk array card, to achieve the construction of test scenes on both sides, and then the disk array card is triggered to perform a hot reset, so as to achieve a hot reset test of the disk array card under the test scene corresponding to the target scene type information. In this way, by creating the host-side scene realization logic corresponding to different scene type information and constructing a preset mapping relationship, when performing a hot reset test, a test scene under the corresponding scene type information can be constructed based on the scene realization logic, and the test can be performed, which can improve the flexibility and efficiency of the hot reset test of the disk array card.

[0112] Figure 6 The description of the features in the corresponding embodiments can be found in Figure 1 The relevant descriptions of the corresponding embodiments will not be repeated here one by one.

[0113] Figure 7 A structural diagram of an electronic device provided by an embodiment of the present invention, as shown in 7, the electronic device includes: a memory 70, for storing a computer program;

[0114] The processor 71 is used to implement the steps of the hot reset test method of the disk array card in the above embodiment when executing the computer program.

[0115] Among them, the processor 71 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 71 may be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), and programmable logic array (PLA). The processor 71 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 71 may be integrated with a graphics processing unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 71 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.

[0116] The memory 70 may include one or more computer-readable storage media, which may be non-transitory. The memory 70 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 70 is at least used to store the following computer program 701, wherein, after the computer program is loaded and executed by the processor 71, it can implement the relevant steps of the hot reset test method of the disk array card disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 70 may also include an operating system 702 and data 703, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 702 may include Windows, Unix, Linux, etc. The data 703 may include but is not limited to preset mapping relationships, etc.

[0117] In some embodiments, the electronic device may further include a display screen 72 , an input / output interface 73 , a communication interface 74 , a power supply 75 , and a communication bus 76 .

[0118] Those skilled in the art will understand that Figure 7 The structure shown in the figure does not constitute a limitation on the electronic device, and may include more or fewer components than shown in the figure.

[0119] It is understandable that if the hot reset test method of the disk array card in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention is essentially or the part that contributes to the current technology or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium to execute all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, register, hard disk, removable disk, CD-ROM, magnetic disk or optical disk and other media that can store program codes.

[0120] Based on this, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the hot reset test method for the disk array card as described above are implemented.

[0121] A computer program product provided by an embodiment of the present invention is introduced below. The computer program product described below can be referenced to other embodiments described in this document.

[0122] A computer program product includes a computer program / instruction, which implements the steps of the hot reset test method of the disk array card disclosed above when executed by a processor.

[0123] The above is a detailed introduction to a hot reset test method, device, equipment and medium for a disk array card provided by an embodiment of the present invention. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0124] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0125] The above is a detailed introduction to the hot reset test method, device, equipment and medium of a disk array card provided by the present invention. This article uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and core ideas of the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A hot reset test method for a disk array card, characterized in that: Applied to the host side, including: Acquire the target host-side scene implementation logic corresponding to the target scene type information based on the preset mapping relationship; different scene type information in the preset mapping relationship corresponds to different pre-created host-side scene implementation logics; Executing the target host-side scenario implementation logic to construct a test scenario on the host side, and notifying the disk array card to execute the disk array card scenario implementation logic corresponding to the target scenario type information to construct a test scenario on the disk array card; The disk array card is triggered to perform a hot reset, so as to implement a hot reset test of the disk array card in a test scenario corresponding to the target scenario type information.

2. The hot reset test method of the disk array card according to claim 1, characterized in that: Also includes: Acquire a test scenario input type based on a first preset interaction window; Acquire target scenario type information based on the test scenario input type; Among them, the test scenario input types include manual input and random generation.

3. The hot reset test method of the disk array card according to claim 2, characterized in that: When the test scenario input type is manual input, obtaining target scenario type information based on the test scenario input type includes: Target scene type information is acquired based on the second preset interaction window.

4. The hot reset test method of the disk array card according to claim 2, characterized in that: When the test scenario input type is randomly generated, obtaining target scenario type information based on the test scenario input type includes: The scene type information is randomly generated within a preset scene type information generation range to obtain the target scene type information.

5. The hot reset test method for a disk array card according to any one of claims 1 to 4, characterized in that: The test scenario types corresponding to the scenario type information in the preset mapping relationship include: reading data, writing data, normal or abnormal status of a high-speed peripheral component interconnect standard port, terminal device disconnection, full root complex or single root complex, normal or abnormal status of a hardware Internet Protocol address, and one or more of the transmission process between an endpoint and a root complex.

6. The hot reset test method of the disk array card according to claim 1, characterized in that: The scene type information is a type number, and the method further includes: Get the host-side scenario implementation logic entered by the user; The host-side scene implementation logic is saved into an array to obtain a target array, wherein the element subscript of the target array is consistent with the type number corresponding to the element, and the element is the host-side scene implementation logic; Acquire a test scenario input type code value based on the first preset interaction window; When the test scenario input type code value is a first preset value, it represents manual input, and the target type number is obtained based on the second preset interaction window. When the test scenario input type code value is a second preset value, it represents random generation, and the type number is randomly generated based on the generation range of the type number to obtain the target type number. Correspondingly, the target host-side scene implementation logic corresponding to the target scene type information obtained based on the preset mapping relationship includes: The target host-side scenario implementation logic corresponding to the target type number is obtained based on the target array.

7. A hot reset test method for a disk array card, characterized in that: Applicable to disk array cards, including: In response to the notification of the host side, the disk array card scenario realization logic corresponding to the target scenario type information is executed to construct a test scenario on the disk array card, wherein the target scenario type information is the scenario type information corresponding to the target host side scenario realization logic in the preset mapping relationship, different scenario type information in the preset mapping relationship corresponds to different pre-created host side scenario realization logic, and the target host side scenario realization logic is executed by the host side to construct a test scenario on the host side; In response to the hot reset trigger operation of the host end, a hot reset test of the disk array card is implemented in the test scenario corresponding to the target scenario type information.

8. A hot reset test device for a disk array card, characterized in that: Applied to the host side, including: A logic acquisition module, used to acquire the target host-side scene implementation logic corresponding to the target scene type information based on a preset mapping relationship; different scene type information in the preset mapping relationship corresponds to different pre-created host-side scene implementation logic; A scenario construction module, used to execute the target host-side scenario realization logic, construct a test scenario on the host-side, and notify the disk array card to execute the disk array card scenario realization logic corresponding to the target scenario type information to construct a test scenario on the disk array card; The hot reset trigger module is used to trigger the disk array card to perform a hot reset, so as to implement a hot reset test of the disk array card in a test scenario corresponding to the target scenario type information.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor is used to execute the computer program to implement the steps of the hot reset test method for the disk array card according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the hot reset test method for the disk array card according to any one of claims 1 to 7 are implemented.

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