High-precision process memory access energy consumption calculation method

Abstract

The invention discloses a high-precision process memory access energy consumption calculation method which comprises the following steps: S1, loading an executable file under Linux by a CPU cache failure analyzer, filtering a CPU LLC cache failure access record of a process, and sending the CPU LLC cache failure access record to message middleware; s2, reading a CPU LLC cache failure access record from the message middleware through a memory controller simulator, outputting a memory controller access request sequence, and sending the memory controller access request sequence to the message middleware in real time; s3, acquiring a memory controller access request sequence from the message middleware through a memory access instruction scheduler, and converting the memory controller access request sequence into a physical memory access instruction; and S4, calculating the actual energy consumption of the memory device through a memory device energy consumption calculator according to the physical memory access instruction. The process user can be helped to identify the energy consumption hotspot and the total energy consumption level of the process, and an accurate basis is provided for energy consumption optimization of the process.

Description

Technical Field

[0001] The invention belongs to the field of memory energy consumption calculation, and in particular relates to a high-precision process memory access energy consumption calculation method. Background Art

[0002] In modern data centers, massive data processing, deep learning training, and reasoning tasks have led to increasing requirements for memory capacity and memory bandwidth. Studies have shown that memory energy consumption accounts for 25% to 46% of the overall server energy consumption. Accurately measuring the energy consumption of server main memory devices is a prerequisite for optimizing memory energy consumption. There are usually several methods for calculating the power consumption of memory devices:

[0003] (1) Use energy consumption data provided by the manufacturer: Many server manufacturers provide server energy consumption data, which can be obtained by viewing the server's technical documentation or asking the manufacturer. The advantage of this method is that it is convenient and does not require actual measurement, but the disadvantage is that it cannot accurately reflect the power consumption of the server under actual workload in real time.

[0004] (2) Use software tools for estimation: Some software tools can be used to estimate memory power consumption. For example, energy consumption monitoring software can be installed on the server operating system to infer memory power consumption by monitoring various server indicators (memory usage, memory refresh frequency, etc.). The advantage of this method is that it is non-invasive, but the estimation results have large errors.

[0005] (3) Modeling using energy consumption models: A power consumption model can be built based on the hardware components and workload characteristics of the server, and energy consumption can be estimated through the model. For example, based on factors such as the server's memory model, memory capacity, and memory frequency, combined with the server's energy consumption data under different loads, a mathematical model can be built to predict the server's power consumption. This method is based on statistical methods and also has certain errors. Summary of the invention

[0006] In view of the above-mentioned deficiencies in the prior art, the present invention provides a high-precision process memory access energy consumption calculation method which solves the problem of low estimation accuracy of memory access energy consumption in the prior art.

[0007] In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention is: a high-precision process memory access energy consumption calculation method, comprising the following steps:

[0008] S1. The CPU cache invalidation analyzer loads the executable file under Linux, filters the CPU LLC cache invalidation access records of the process, and sends them to the message middleware;

[0009] S2, read the CPU LLC cache invalidation access record from the message middleware through the memory controller simulator, output the memory controller access request sequence, and send it to the message middleware in real time;

[0010] S3, obtain the memory controller access request sequence from the message middleware through the memory access instruction scheduler, and convert it into a physical memory access instruction;

[0011] S4. Calculate the actual energy consumption of the memory device according to the physical memory access instruction using a memory device energy consumption calculator.

[0012] Further: in S2, the memory controller access request sequence includes a plurality of memory controller request instruction contents.

[0013] Further: in said S3, the physical memory access instruction includes a precharge command, an activation command, a column access, a data recovery command and a refresh command;

[0014] Among them, the precharge command is specifically to set the voltage state of the physical memory bank; the activation command is specifically to load the content of the physical memory row into the memory sense amplifier; the column access is specifically to transfer the physical memory device data to the memory controller, or to transfer the data from the memory controller to the physical memory; the data recovery command is specifically to perform data recovery operation on the data in the physical memory row after it is read into the sense amplifier; the refresh command is specifically to periodically refresh all storage cells inside the DRAM device.

[0015] Further: In S4, the actual energy consumption Energy of the memory device is calculated sch The specific expression is:

[0016] Energy sch =P sch (Total)×T

[0017] Where T is the measurement time, P sch (Total) is the overall power consumption of the memory device, and its specific expression is:

[0018] P sch (Total) = P sch (Background)+P sch (Active)+P sch (RD)+

[0019] P sch (WR)+P sch (Term)+P sch (Refresh)

[0020] Where Psch (Background) is the static power consumption of the memory device, P sch (Active) is the active state power consumption of the memory device, P sch (RD) is the read power consumption of the memory device, P sch (WR) is the write power consumption of the memory device, P sch (Term) is the power consumption of the IO operation termination of the memory device, P sch (Refresh) is the refresh power consumption of the memory device.

[0021] Furthermore: the static power consumption P of the memory device sch The specific expression of (Background) is:

[0022] P sch (Background)=P sch (PRE_PDN)+P sch (PRE_STBY)+

[0023] P sch (ACT_PDN)+P sch (ACT_STBY)

[0024] Where P sch (PRE_PDN) is the power saving mode power consumption in the pre-charge state, P sch (PRE_STBY) is the actual power consumption in standby mode in the pre-charge state, P sch (ACT_PDN) is the actual power consumption of the power saving mode in the activated state, P sch (ACT_STBY) is the actual power consumption of the standby mode in the active state, and its specific expression is:

[0025] P sch (PRE_PDN) = I DD2P ×V DD ×BNK_PRE%×CKE_LO_PRE%

[0026] P sch (PRE_STBY) = I DD2N ×V DD ×BNK_PRE%×(1-CKE_LO_PRE%)

[0027] P sch (ACT_PDN) = I DD3P ×V DD ×(1-BNK_PRE%)×CKE_LO_ACT%

[0028] P sch(ACT_STBY)=I DD3N ×V DD *(1-BNK_PRE%)×(1-CKE_LO_ACT%)

[0029] In the formula, I DD2P is the first quiescent current, I DD2N is the second quiescent current, I DD3P is the third quiescent current, I DD3N is the fourth static current, BNK_PRE% is the first calculation factor, CKE_LO_PRE% is the second calculation factor, CKE_LO_ACT% is the third calculation factor, V DD The supply voltage for the storage device.

[0030] Further: the power consumption P of the memory device in the activated state sch The specific expression of (Active) is:

[0031]

[0032] In the formula, I DD0 is the first operating current, t RAS is the run activation time in the memory bank, t RC is the time interval between two adjacent Active states. t RRD sch It is the actual average activation time from row to row in memory.

[0033] Further: the read power consumption P of the memory device sch The specific expression of (RD) is:

[0034] P sch (RD)=(I DD4R -I DD3N )×V DD ×RD sch %

[0035] In the formula, I DD4R is the first operating current, RD sch % is the proportion of read operation clock;

[0036] Write power consumption P of memory devices sch The specific expression of (WR) is:

[0037] P sch (WR)=(I DD4W -I DD3N )×V DD ×WR sch %

[0038] In the formula, IDD4W is the second operating current.

[0039] Further: the IO operation suspension power consumption P of the memory device sch The specific expression of (Term) is:

[0040] P sch (Term)=P sch (DQ)+P sch (termW)+P sch (termRoth)+P sch (termWoth)

[0041] Where P sch (DQ) is the first IO power consumption, P sch (termW) is the second IO power consumption, P sch (termRoth) is the third IO power consumption, P sch (termWoth) is the fourth IO power consumption, and its specific expression is:

[0042] P sch (DQ) = Pdq(RD) × num_DQR × RD sch %

[0043] P sch (termW)=Pdq(WR)×num_DQW×WR sch %

[0044] P sch (termRoth)=Pdq(RDoth)×num_DQR×termRDsch%

[0045] P sch (termWoth)=Pdq(WRoth)×num_DQW×termWRsch%

[0046] Where, Pdq(RD) is the external output power when driving the memory device to transmit the bus, Pdq(WR) is the IO abort power consumption when terminating the WRITE instruction inside the memory device, Pdq(RDoth) is the IO power consumption when terminating the read instruction pointing to the external memory, Pdq(WRoth) is the IO power consumption when terminating the write instruction pointing to the external memory, num_DQR is the sum of 8 DQ pins and 2 DQS pins, num_DQW is the number of pins for the additional data mask, and RD is the IO power consumption when terminating the read instruction pointing to the external memory. sch % is the occupancy rate of the data bus for read instructions, WR sch% is the occupancy rate of the data bus for write instructions, termRDsch% is the occupancy rate of the data bus for terminating reading data from the external memory, and termWRsch% is the occupancy rate of the data bus for terminating writing data to the external memory.

[0047] Further: the refresh power consumption P of the memory device sch The specific expression of (Refresh) is:

[0048]

[0049] In the formula, I DD5 is the maximum auto-refresh current, t RFC(MIN) is the periodic interval of REFRESH operation. t REFI is the minimum time interval between a REFRESH-to-REFRESH operation.

[0050] The beneficial effects of the present invention are:

[0051] (1) The present invention provides a high-precision process memory access energy consumption calculation method, which organically combines the Last Level Cache miss in the process analysis tool with the memory access instruction of the DRAM controller, and provides a complete and clock-cycle accurate method for calculating the actual power consumption of DRAM memory for the process under the Linux system. It can help the process user identify the energy consumption hotspots and overall energy consumption level of the process, and provide an accurate basis for the energy consumption optimization of the process.

[0052] (2) The present invention is compatible with a variety of DRARM models, covering multiple memory standard models such as DDR2, DDR3, DDR4, and DDR5. It has strong practical value and helps to measure the energy consumption data of the workload accessing the memory device in the data center in real time and accurately. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 The present invention is a flow chart of a method for calculating the energy consumption of high-precision process memory access.

[0054] Figure 2 Records CPU LLC cache invalidation accesses.

[0055] Figure 3 Schematic diagram of the memory controller simulator architecture.

[0056] Figure 4 Access request sequence for the memory controller.

[0057] Figure 5 It is the mapping relationship between memory controller request instructions and physical memory access instructions. DETAILED DESCRIPTION

[0058] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0059] like Figure 1 As shown, in one embodiment of the present invention, a high-precision process memory access energy consumption calculation method includes the following steps:

[0060] S1. The CPU cache invalidation analyzer loads the executable file under Linux, filters the CPU LLC cache invalidation access records of the process, and sends them to the message middleware;

[0061] S2, read the CPU LLC cache invalidation access record from the message middleware through the memory controller simulator, output the memory controller access request sequence, and send it to the message middleware in real time;

[0062] S3, obtain the memory controller access request sequence from the message middleware through the memory access instruction scheduler, and convert it into a physical memory access instruction;

[0063] S4. Calculate the actual energy consumption of the memory device according to the physical memory access instruction using a memory device energy consumption calculator.

[0064] In this embodiment, the CPU cache failure analyzer is implemented based on the Cache MissAnalyzer extension of the open source project DynamoRIO. It mainly filters the CPU LLC cache failure access records when the process is running and sends them to the message middleware. The CPU LLC cache failure access records are as follows: Figure 2 As shown in the figure, DynamoRIO is a runtime code analysis system that supports code transformation of any part of a program while the program is running. DynamoRIO provides an interface for extending various dynamic analysis tools, supporting program analysis and understanding, function stack analysis, instruction injection, instruction optimization, translation, etc.

[0065] The message middleware is responsible for transmitting data between the CPU cache invalidation analyzer, the memory controller simulator and the memory access instruction scheduler.

[0066] In S2, the memory controller access request sequence includes a plurality of memory controller request instruction contents.

[0067] In this embodiment, the architecture of the memory controller simulator is as follows: Figure 3 As shown in the figure, the memory controller simulator is implemented based on the dram_controller module extension of the open source project Ramulator 2. On the basis of the original memory controller module, a cache invalidation access record consumer is added, which is responsible for obtaining cache invalidation access records from the message middleware, and a memory controller instruction generator is added, which is responsible for inputting the memory controller access instructions into the message middleware. Ramulator 2 is a fast, scalable and clock-cycle accurate DRAM simulator that performs system modeling according to the DRAM international standard.

[0068] In S3, the physical memory access instruction includes a precharge command, an activation command, a column access, a data recovery command and a refresh command;

[0069] Among them, the precharge command is specifically to set the voltage state of the physical memory bank; the activation command is specifically to load the content of the physical memory row into the memory sense amplifier; the column access is specifically to transfer the physical memory device data to the memory controller, or to transfer the data from the memory controller to the physical memory; the data recovery command is specifically to perform data recovery operation on the data in the physical memory row after it is read into the sense amplifier; the refresh command is specifically to periodically refresh all storage cells inside the DRAM device.

[0070] In this embodiment, the memory access instruction scheduler simulates the scheduling process of accessing the memory instruction sequence in the memory controller and generates an access instruction sequence for the physical memory. The memory controller access request sequence includes a plurality of memory controller request instructions. The memory controller access request sequence is as follows: Figure 4 As shown in Figure 1, the memory controller request instruction is obtained from the message middleware, parsed, and the physical memory access instruction scheduler is called to convert the memory controller request instruction into a physical memory access instruction. The mapping relationship between the two is shown in Figure 1. Figure 5 shown.

[0071] In S4, the actual energy consumption of the memory device is calculated. sch The specific expression is:

[0072] Energy sch =P sch (Total)×T

[0073] Where T is the measurement time, P sch (Total) is the overall power consumption of the memory device, and its specific expression is:

[0074] P sch (Total) = P sch(Background)+P sch (Active)+P sch (RD)+

[0075] P sch (WR)+P sch (Term)+P sch (Refresh)

[0076] Where P sch (Background) is the static power consumption of the memory device, P sch (Active) is the active state power consumption of the memory device, P sch (RD) is the read power consumption of the memory device, P sch (WR) is the write power consumption of the memory device, P sch (Term) is the power consumption of the IO operation termination of the memory device, P sch (Refresh) is the refresh power consumption of the memory device.

[0077] In this embodiment, the memory device energy consumption calculator maps the physical memory access instruction sequence with the actual physical memory power consumption model parameters, and calculates the final process energy consumption result and energy consumption timing data.

[0078] An important parameter for calculating the power consumption of memory devices is the device's operating current I DD Parameters, in this embodiment, the I DD The specific meaning of the current is shown in Table 1.

[0079] Table 1 DDR memory device I DD The specific meaning of current

[0080]

[0081]

[0082] The static power consumption P of the memory device sch The specific expression of (Background) is:

[0083] P sch (Background)=P sch (PRE_PDN)+P sch (PRE_STBY)+

[0084] P sch (ACT_PDN)+P sch (ACT_STBY)

[0085] Where P sch(PRE_PDN) is the power saving mode power consumption in the pre-charge state, P sch (PRE_STBY) is the actual power consumption in standby mode in the pre-charge state, P sch (ACT_PDN) is the actual power consumption of the power saving mode in the activated state, P sch (ACT_STBY) is the actual power consumption of the standby mode in the active state, and its specific expression is:

[0086] P sch (PRE_PDN) = I DD2P ×V DD ×BNK_PRE%×CKE_LO_PRE%

[0087] P sch (PRE_STBY) = I DD2N ×V DD ×BNK_PRE%×(1-CKE_LO_PRE%)

[0088] P sch (ACT_PDN) = I DD3P ×V DD ×(1-BNK_PRE%)×CKE_LO_ACT%

[0089] P sch (ACT_STBY)=I DD3N ×V DD *(1-BNK_PRE%)×(1-CKE_LO_ACT%)

[0090] In the formula, I DD2P is the first quiescent current, I DD2N is the second quiescent current, I DD3P is the third quiescent current, I DD3N is the fourth static current, BNK_PRE% is the first calculation factor, CKE_LO_PRE% is the second calculation factor, CKE_LO_ACT% is the third calculation factor, V DD The supply voltage for the storage device.

[0091] The description of the calculated factors is shown in Table 2.

[0092] Table 2 Description of calculation factors

[0093] Calculation Factor describe BNK_PRE% The percentage of clock cycles that the memory bank is in the precharge state CLK_LO_PRE% When CKE is Low, the percentage of clock cycles that the bank is in the precharge state CLK_LO_ACT% When CKE is Low, the percentage of clock cycles that the bank is in the active state

[0094] The active state power consumption P of the memory device sch The specific expression of (Active) is:

[0095]

[0096] In the formula, I DD0 is the first operating current, t RAS is the run activation time in the memory bank, t RC is the time interval between two adjacent Active states. t RRD sch It is the actual average activation time from row to row in memory.

[0097] The read power consumption P of the memory device sch The specific expression of (RD) is:

[0098] P sch (RD)=(I DD4R -I DD3N )×V DD ×RD sch %

[0099] In the formula, I DD4R is the first operating current, RD sch % is the proportion of read operation clock;

[0100] Write power consumption P of memory devices sch The specific expression of (WR) is:

[0101] P sch (WR)=(I DD4W -I DD3N )×V DD ×WR sch %

[0102] In the formula, I DD4W is the second operating current.

[0103] The IO operation suspension power consumption P of the memory device sch The specific expression of (Term) is:

[0104] P sch (Term)=P sch (DQ)+P sch (termW)+P sch (termRoth)+P sch (termWoth)

[0105] Where P sch (DQ) is the first IO power consumption, P sch (termW) is the second IO power consumption, P sch (termRoth) is the third IO power consumption, P sch (termWoth) is the fourth IO power consumption, and its specific expression is:

[0106] P sch (DQ) = Pdq(RD) × num_DQR × RD sch %

[0107] P sch (termW)=Pdq(WR)×num_DQW×WR sch %

[0108] P sch (termRoth)=Pdq(RDoth)×num_DQR×termRDsch%

[0109] P sch (termWoth)=Pdq(WRoth)×num_DQW×termWRsch%

[0110] Where, Pdq(RD) is the external output power when driving the memory device to transmit the bus, Pdq(WR) is the IO abort power consumption when terminating the WRITE instruction inside the memory device, Pdq(RDoth) is the IO power consumption when terminating the read instruction pointing to the external memory, Pdq(WRoth) is the IO power consumption when terminating the write instruction pointing to the external memory, num_DQR is the sum of 8 DQ pins and 2 DQS pins, num_DQW is the number of pins for the additional data mask, and RD is the IO power consumption when terminating the read instruction pointing to the external memory. sch % is the occupancy rate of the data bus for read instructions, WR sch % is the occupancy rate of the data bus for write instructions, termRDsch% is the occupancy rate of the data bus for terminating reading data from the external memory, and termWRsch% is the occupancy rate of the data bus for terminating writing data to the external memory.

[0111] The refresh power consumption P of the memory device sch The specific expression of (Refresh) is:

[0112]

[0113] In the formula, I DD5 is the maximum auto-refresh current, t RFC(MIN) is the periodic interval of REFRESH operation. t REFI is the minimum time interval between a REFRESH-to-REFRESH operation.

[0114] The beneficial effects of the present invention are as follows: the present invention provides a high-precision process memory access energy consumption calculation method, which organically combines the Last Level Cache missing in the process analysis tool with the memory access instruction of the DRAM controller, and provides a complete and clock-cycle accurate method for calculating the actual power consumption of DRAM memory for the process under the Linux system, which can help the process user identify the energy consumption hotspots and the overall energy consumption level of the process, and provide an accurate basis for the energy consumption optimization of the process.

[0115] The present invention is compatible with a variety of DRARM models, covering a variety of memory standard models such as DDR2, DDR3, DDR4, and DDR5, has strong practical value, and helps to measure the energy consumption data of the workload accessing the memory device in the data center in real time and accurately.

[0116] In the description of the present invention, it is necessary to understand that the orientation or positional relationship indicated by the terms "center", "thickness", "upper", "lower", "horizontal", "top", "bottom", "inner", "outer", "radial", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", and "third" are used only for descriptive purposes, and cannot be understood as indicating or implying the relative importance or the number of implicitly specified technical features. Therefore, the features defined by "first", "second", and "third" may explicitly or implicitly include one or more of the features.

Claims

1. A high-precision process memory access energy consumption calculation method, characterized in that: The following steps are included: S1. The CPU cache invalidation analyzer loads the executable file under Linux, filters the CPU LLC cache invalidation access records of the process, and sends them to the message middleware; S2, read the CPU LLC cache invalidation access record from the message middleware through the memory controller simulator, output the memory controller access request sequence, and send it to the message middleware in real time; S3, obtain the memory controller access request sequence from the message middleware through the memory access instruction scheduler, and convert it into a physical memory access instruction; S4. Calculate the actual energy consumption of the memory device according to the physical memory access instruction using a memory device energy consumption calculator.

2. The high-precision process memory access energy consumption calculation method according to claim 1 is characterized in that: In S2, the memory controller access request sequence includes a plurality of memory controller request instruction contents.

3. The high-precision process memory access energy consumption calculation method according to claim 1 is characterized in that: In said S3, the physical memory access instruction includes a precharge command, an activation command, a column access, a data recovery command and a refresh command; Among them, the precharge command is specifically to set the voltage state of the physical memory bank; the activation command is specifically to load the content of the physical memory row into the memory sense amplifier; the column access is specifically to transfer the physical memory device data to the memory controller, or to transfer the data from the memory controller to the physical memory; the data recovery command is specifically to perform data recovery operation on the data in the physical memory row after it is read into the sense amplifier; the refresh command is specifically to periodically refresh all storage cells inside the DRAM device.

4. The high-precision process memory access energy consumption calculation method according to claim 1 is characterized in that: In S4, the actual energy consumption of the memory device is calculated. sch The specific expression is: Energy sch =P sch (Total)×T Where T is the measurement time, P sch (Total) is the overall power consumption of the memory device, and its specific expression is: P sch (Total)=P sch (Background)+P sch (Active)+P sch (RD)+ P sch (WR)+P sch (Term)+P sch (Refresh) Where P sch (Background) is the static power consumption of the memory device, P sch (Active) is the active state power consumption of the memory device, P sch (RD) is the read power consumption of the memory device, P sch (WR) is the write power consumption of the memory device, P sch (Term) is the power consumption of the IO operation termination of the memory device, P sch (Refresh) is the refresh power consumption of the memory device.

5. The high-precision process memory access energy consumption calculation method according to claim 4 is characterized in that: The static power consumption P of the memory device sch The specific expression of (Background) is: P sch (Background)=P sch (PRE_PDN)+P sch (PRE_STBY)+ P sch (ACT_PDN)+P sch (ACT_STBY) Where P sch (PRE_PDN) is the power saving mode power consumption in the pre-charge state, P sch (PRE_STBY) is the actual power consumption in standby mode in the pre-charge state, P sch (ACT_PDN) is the actual power consumption of the power saving mode in the activated state, P sch (ACT_STBY) is the actual power consumption of the standby mode in the active state, and its specific expression is: P sch (PRE_PDN)=I DD2P ×V DD ×BNK_PRE%×CKE_LO_PRE% P sch (PRE_STBY)=I DD2N ×V DD ×BNK_PRE%×(1-CKE_LO_PRE%) P sch (ACT_PDN)=I DD3P ×V DD ×(1-BNK_PRE%)×CKE_LO_ACT% P sch (ACT_STBY)=I DD3N ×V DD *(1-BNK_PRE%)×(1-CKE_LO_ACT%) In the formula, I DD2P is the first quiescent current, I DD2N is the second quiescent current, I DD3P is the third quiescent current, I DD3N is the fourth static current, BNK_PRE% is the first calculation factor, CKE_LO_PRE% is the second calculation factor, CKE_LO_ACT% is the third calculation factor, V DD The supply voltage for the storage device.

6. The high-precision process memory access energy consumption calculation method according to claim 5 is characterized in that: The active state power consumption P of the memory device sch The specific expression of (Active) is: In the formula, I DD0 is the first operating current, t RAS is the run activation time in the memory bank, t RC is the time interval between two adjacent Active states. t RRD sch It is the actual average activation time from row to row in memory.

7. The high-precision process memory access energy consumption calculation method according to claim 6 is characterized in that: The read power consumption P of the memory device sch The specific expression of (RD) is: P sch (RD)=(I DD4R -I DD3N )×V DD ×RD sch % In the formula, I DD4R is the first operating current, RD sch % is the proportion of read operation clock; Write power consumption P of memory devices sch The specific expression of (WR) is: P sch (WR)=(I DD4W -I DD3N )×V DD ×WR sch % In the formula, I DD4W is the second operating current.

8. The high-precision process memory access energy consumption calculation method according to claim 7 is characterized in that: The IO operation suspension power consumption P of the memory device sch The specific expression of (Term) is: P sch (Term)=P sch (DQ)+P sch (termW)+P sch (termRoth)+P sch (termWoth) Where P sch (DQ) is the first IO power consumption, P sch (termW) is the second IO power consumption, P sch (termRoth) is the third IO power consumption, P sch (termWoth) is the fourth IO power consumption, and its specific expression is: P sch (DQ)=Pdq(RD)×num_DQR×RD sch % P sch (termW)=Pdq(WR)×num_DQW×WR sch % P sch (termRoth)=Pdq(RDoth)×num_DQR×termRDsch% P sch (termWoth)=Pdq(WRoth)×num_DQW×termWRsch% Where, Pdq(RD) is the external output power when driving the memory device to transmit the bus, Pdq(WR) is the IO abort power consumption when terminating the WRITE instruction inside the memory device, Pdq(RDoth) is the IO power consumption when terminating the read instruction pointing to the external memory, Pdq(WRoth) is the IO power consumption when terminating the write instruction pointing to the external memory, num_DQR is the sum of 8 DQ pins and 2 DQS pins, num_DQW is the number of pins for the additional data mask, and RD is the IO power consumption when terminating the read instruction pointing to the external memory. sch % is the occupancy rate of the data bus for read instructions, WR sch % is the occupancy rate of the data bus for write instructions, termRDsch% is the occupancy rate of the data bus for terminating reading data from the external memory, and termWRsch% is the occupancy rate of the data bus for terminating writing data to the external memory.

9. The high-precision process memory access energy consumption calculation method according to claim 8 is characterized in that: The refresh power consumption P of the memory device sch The specific expression of (Refresh) is: In the formula, I DD5 is the maximum auto-refresh current, t RFC(MIN) is the periodic interval of REFRESH operation. t REFI is the minimum time interval between a REFRESH-to-REFRESH operation.

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