Controller, method of using the same, and system including the
Through artificial neural network generation and use configuration parameters, the performance of computer memory systems is optimized, and the problem of insufficient performance of memory systems in the prior art is solved, and more efficient system performance and improved user experience is achieved.
Patent Information
- Application Number
- CN202510102576.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-10-07
- Filing Date
- 2025-01-22
- Publication Date
- 2025-05-23
AI Technical Summary
The performance of existing computer memory systems is insufficient, resulting in inefficient system efficiency and cannot meet the needs of fast processing of tasks and improving user experience.
An artificial neural network is used to generate M configuration parameters and use these parameters when interacting with nonvolatile memory to configure the controller to optimize the performance of the memory system.
By optimizing the performance of the memory system, the overall system efficiency of the computer is improved, and faster task processing, better multi-task processing capabilities, faster application loading time and improved user experience are achieved.
Smart Images
Figure CN120029942A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to U.S. Provisional Application No. 63 / 601,822, filed on November 22, 2023, the entire disclosure of which is incorporated herein by reference. Technical Field
[0003] The present application relates to improving the performance of computer memory systems. Background Art
[0004] Improving the performance of computer memory systems is beneficial to improving overall system efficiency. By improving the performance of memory systems, computers can process tasks faster, thereby achieving better multitasking capabilities, faster application loading times, and an improved overall user experience. In addition, more efficient memory systems can help save energy and extend the life of computer hardware. Therefore, the need to improve the performance of computer memory systems is beneficial to keep up with evolving technological demands and achieve optimal computing performance. Summary of the invention
[0005] A controller is disclosed herein, which is configured to generate M configuration parameters using an artificial neural network, and is configured to use the M configuration parameters in interacting with a non-volatile memory, where M is a positive integer. At least one configuration parameter of the M configuration parameters is not a threshold voltage for reading the non-volatile memory. The controller is configured to implement an artificial neural network.
[0006] The non-volatile memory may be a flash memory.
[0007] The artificial neural network may be a feed-forward neural network, a reinforcement learning network, a long short-term memory network, a recurrent neural network, or any combination thereof.
[0008] The controller may be on a single semiconductor die.
[0009] The controller may have a prediction buffer configured to: (A) store N sets of configuration parameters generated by the artificial neural network, N being an integer greater than 1, and (B) select one of the N sets as the M configuration parameters.
[0010] The prediction buffer may be configured to select the one of the N sets based on a conditional characteristic of the non-volatile memory.
[0011] The prediction buffer may be configured to select the one of the N sets based on (A) operating characteristics of the non-volatile memory and (B) decoding status characteristics of a decoder of the controller.
[0012] The input of the artificial neural network may be selected from the group consisting of: a condition characteristic of the non-volatile memory, an operation characteristic of the non-volatile memory, a decoding status characteristic of a decoder of the controller, and any combination thereof.
[0013] The conditional characteristics of the nonvolatile memory may be selected from the group consisting of: WE (write erase) count, data retention time, data read temperature, data write temperature, block status, plane index, block index, word line index, page index and any combination thereof.
[0014] The operational characteristic of the nonvolatile memory may be selected from the group consisting of: a read time of a page, a program time of a page, an erase time of a block, a count of 1s of raw data of a page, and any combination thereof.
[0015] The decoding status feature may be selected from the group consisting of: a page decoding status vector, a 1 to 0 error number array, a 0 to 1 error number array, an iteration number array, and any combination thereof.
[0016] A controller may have (A) a control engine configured to control a non-volatile memory and (B) a decoder configured to decode data read from the non-volatile memory. The controller is configured to use the M configuration parameters in interacting with the non-volatile memory by configuring the control engine with a first subset of the M configuration parameters, the first subset being selected from the group consisting of: a threshold voltage for reading the non-volatile memory, a read failure probability, an erase failure probability, a program failure probability, and any combination thereof. The controller is configured to use the M configuration parameters in interacting with the non-volatile memory by configuring the decoder with a second subset of the M configuration parameters, the second subset being selected from the group consisting of: a scaling factor, a maximum number of iterations, an input LLR (log likelihood ratio) value, and any combination thereof.
[0017] The controller may be part of a system as a solid state drive (SSD), flash drive, motherboard, processor, computer, server, gaming device, or mobile device.
[0018] The method for using the controller includes: using an artificial neural network to generate M configuration parameters, wherein at least one of the M configuration parameters is not a threshold voltage for reading a non-volatile memory; and then using the controller to use the M configuration parameters in interacting with the non-volatile memory.
[0019] Generating the M configuration parameters may include implementing an artificial neural network with the controller.
[0020] Generating the M configuration parameters may include: storing N sets of configuration parameters generated by the artificial neural network in a prediction buffer, where N is an integer greater than 1; and then using the prediction buffer to select one of the N sets as the M configuration parameters.
[0021] Selecting one of the N sets may be based on a conditional characteristic of the non-volatile memory. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 A memory system with an artificial neural network according to an embodiment is schematically shown.
[0023] Figure 2 A diagram showing an artificial neural network according to an embodiment.
[0024] Figure 3 A memory system according to an alternative embodiment is schematically shown.
[0025] Figure 4 A flow chart summarizing the operation of a controller of a memory system according to an embodiment is shown. DETAILED DESCRIPTION
[0026] Memory system 100
[0027] Figure 1 A memory system 100 according to an embodiment is schematically shown. The memory system 100 may include a controller 110 and a non-volatile memory 120. For simplicity, communication between the controller 110 and the non-volatile memory 120 is not shown.
[0028] In an embodiment, the controller 110 may be part of a solid state drive (SSD), a flash drive, a motherboard, a processor, a computer, a server, a gaming device, or a mobile device (not shown).
[0029] Non-volatile memory 120
[0030] In an embodiment, the non-volatile memory 120 may be a flash memory. Flash memory is a non-volatile storage device that retains data even when power is removed. Flash memory technology utilizes floating gate transistors or charge trapping technology to store data.
[0031] Controller 110
[0032] In an embodiment, the controller 110 may manage the data flow between the non-volatile memory 120 and an external device, such as a processor (not shown), thereby allowing efficient and timely access to the stored information. In an embodiment, the controller 110 may coordinate the reading of data from and the writing of data to the non-volatile memory 120, thereby converting data requests from external devices into memory operations. In an embodiment, the controller 110 may implement caching, prefetching, and pipelining. In an embodiment, the controller 110 may perform error detection and correction, power management, and help maintain overall system stability.
[0033] In an embodiment, the controller 110 may include a control engine 116 and a decoder 118. In an embodiment, the control engine 116 may perform the functions of the controller 110 described above, while the decoder 118 may perform error detection and correction functions.
[0034] In an embodiment, the controller 110 may further include a feature collection block 112 and an artificial neural network 114 .
[0035] In an embodiment, controller 110 may be formed on a single semiconductor die.
[0036] Feature collection block 112
[0037] In an embodiment, the feature collection block 112 may receive as input: (A) conditional features of the non-volatile memory 120, such as from the non-volatile memory 120, (B) operational features of the non-volatile memory 120, such as from the control engine 116, and (C) decoding status features of the decoder 118, such as from the decoder 118. In an embodiment, the feature collection block 112 may provide input features to the artificial neural network 114. In an embodiment, the input features may include conditional features of the non-volatile memory 120, operational features of the non-volatile memory 120, and decoding status features of the decoder 118.
[0038] Artificial Neural Networks 114
[0039] In an embodiment, the artificial neural network 114 may be a feed-forward neural network, a reinforcement learning network, a long short-term memory network, a recurrent neural network, or any combination thereof.
[0040] In an embodiment, the artificial neural network 114 may receive input features as input from the feature collection block 112. In an embodiment, the artificial neural network 114 may output (A) predicted read failure probability to the control engine 116, (B) predicted program failure probability to the control engine 116, (C) predicted erase failure probability to the control engine 116, (D) predicted threshold voltage (for reading the non-volatile memory 120) to the control engine 116, and (E) predicted decoder parameters to the decoder 118.
[0041] In an embodiment, the controller 110 may use these outputs (A), (B), (C), (D), and (E) of the artificial neural network 114 in interacting with the non-volatile memory 120. Specifically, in an embodiment, the controller 110 may use these outputs (A), (B), (C), (D), and (E) of the artificial neural network 114 to configure the control engine 116 and the decoder 118.
[0042] In an embodiment, controller 110 may implement artificial neural network 114. In an alternative embodiment, artificial neural network 114 may be implemented by an external system other than memory system 100 (not shown).
[0043] In an embodiment, the artificial neural network 114 may be implemented by hardware or firmware.
[0044] Control Engine 116
[0045] In an embodiment, the control engine 116 may control the operation of the non-volatile memory 120 .
[0046] In an embodiment, the control engine 116 may receive as input: (A) predicted read failure probability, predicted program failure probability, predicted erase failure probability, and predicted threshold voltage (for reading the non-volatile memory 120) from the artificial neural network 114, and (B) conditional characteristics of the non-volatile memory 120 from the non-volatile memory 120. In an embodiment, the control engine 116 may provide as output: (A) memory read data to the decoder 118, and (B) operational characteristics of the non-volatile memory 120 to the feature collection block 112.
[0047] Decoder 118
[0048] In an embodiment, decoder 118 may detect and / or correct errors that may occur to data in non-volatile memory 120 .
[0049] In an embodiment, decoder 118 may receive as input: (A) memory read data from control engine 116 and (B) predicted decoder parameters from artificial neural network 114. In an embodiment, decoding condition features of decoder 118 are provided to feature collection block 112.
[0050] More about Artificial Neural Networks 114
[0051] In the embodiments, reference Figure 2 , the artificial neural network 114 may include (A) an input layer 210 , (B) a hidden layer 220 , and (C) an output layer 230 .
[0052] Input layer 210
[0053] In the embodiments, reference Figure 1 and Figure 2 , the input layer 210 can receive input features from the feature collection block 112 as input.
[0054] In an embodiment, the input features from the feature collection block 112 may include: (A) conditional features of the non-volatile memory 120 , (B) operational features of the non-volatile memory 120 , and (C) decoding status features of the decoder 118 .
[0055] Specifically, in an embodiment, group (A) (i.e., conditional characteristics of the non-volatile memory 120) may include: WE (write-erase) count, data retention time, data read temperature, data write temperature, block status (open block or closed block), plane index, block index, word line index and page index.
[0056] Specifically, in an embodiment, group (B) (ie, operation characteristics of the nonvolatile memory 120 ) may include: read time of a page, program time of a page, erase time of a block, and 1s count of original data of a page.
[0057] Specifically, in an embodiment, group (C) (ie, decoding status features of the decoder 118 ) may include: a page decoding status vector, a 1 to 0 error number array, a 0 to 1 error number array, and an iteration number array.
[0058] For example, assume that a page has C ECC (Error Correction Code) codewords (C is a positive integer). As a result, the page decoding status vector consists of C-bit binary data. When the i-th bit is 1, the i-th codeword can be successfully decoded.
[0059] Also as a result, the 0-to-1 error number array has C integers. The i-th number is valid when the i-th codeword can be successfully decoded, and the i-th number is equal to the 0-to-1 error number of the i-th codeword of the page reported by the decoder 118. Here, the 0-to-1 error number is the number of bits that are 0 before decoding and 1 after decoding.
[0060] Also as a result, the 1-to-0 error number array has C integers. The ith number is valid when the ith codeword can be successfully decoded, and is equal to the 1-to-0 error number of the ith codeword of the page reported by the decoder 118. Here, the 1-to-0 error number is the number of bits that are 1 before decoding and 0 after decoding.
[0061] Also as a result, the iteration number array has C integers. The i-th number is valid when the i-th codeword can be successfully decoded, and is equal to the iteration number of the i-th codeword of the page reported by the decoder 118 .
[0062] Hidden layer 220
[0063] In an embodiment, the hidden layer 220 may be between the input layer 210 and the output layer 230. In an embodiment, each hidden layer 220 may include a plurality of neurons that receive data from a previous layer and generate outputs for a next layer.
[0064] Output layer 230
[0065] In an embodiment, the output layer 230 can generate the following as output: (A) a predicted read failure probability to the control engine 116, (B) a predicted programming failure probability to the control engine 116, (C) a predicted erase failure probability to the control engine 116, (D) a predicted threshold voltage (for reading the non-volatile memory 120) to the control engine 116, and (E) predicted decoder parameters to the decoder 118.
[0066] In an embodiment, the predicted threshold voltages of (D) above may include a threshold voltage for SLC (single level cells), 3 threshold voltages for MLC (multi-layer cells), 7 threshold voltages for TLC (triple-layer cells) and 15 threshold voltages for QLC (quadruple-layer cells).
[0067] In an embodiment, the prediction decoder parameters of (E) above may include a scaling factor, a maximum number of iterations, and an input LLR (Log-Likelihood Ratio) value for a min-sum algorithm.
[0068] In an embodiment, the predicted configuration parameters of (A), (B), (C), (D), and (E) above (i.e., the output of the output layer 230) may be used by the controller 110 to configure the control engine 116 and the decoder 118 of the controller 110. As a result, the predicted configuration parameters of (A), (B), (C), (D), and (E) above may be collectively referred to as M configuration parameters (where M is a positive integer).
[0069] In an embodiment, the controller 110 may configure the control engine 116 using a first subset of the M configuration parameters and configure the decoder 118 using a second subset of the M configuration parameters. Note that the first subset and the second subset may overlap (i.e., they may share at least common configuration parameters). Note that by definition, if all elements of X are also elements of Y, then X is a subset of Y.
[0070] In an embodiment, the first subset of M configuration parameters may include the predicted configuration parameters of (A), (B), (C) and (D) above. In an embodiment, the second subset of M configuration parameters may include the predicted configuration parameters of (E) above.
[0071] Predicting Threshold Voltage
[0072] Note that the closer the threshold voltage (for reading the nonvolatile memory 120) is to the optimal point, the fewer errors there will be in a page of the nonvolatile memory 120. Pages with more errors require more effort (resulting in increased energy consumption and delays) to recover the data, resulting in worse performance in the nonvolatile storage of the memory system 100.
[0073] Bad block prediction
[0074] Note that during the life of the memory system 100, some blocks of the non-volatile memory 120 will accumulate errors over time, eventually rendering them bad blocks that cannot be read, programmed, or erased. If the bad blocks are not identified in time, the data stored thereon will be lost.
[0075] Predictive decoder parameters
[0076] Note that poorly predicted decoder parameters used to configure decoder 118 will degrade error correction performance, including both codeword frame error rate and average number of iterations.
[0077] Operation of the controller 110
[0078] In the embodiments, reference Figure 1, the controller 110 may operate as follows. First, the controller 110 may implement the artificial neural network 114, so that the artificial neural network 114 receives input features and generates M configuration parameters based on the input features. Then, in an embodiment, the controller 110 may use the M configuration parameters in interacting with the non-volatile memory 120. Specifically, in an embodiment, the controller 110 may use the M configuration parameters to configure the control engine 116 and the decoder 118.
[0079] In an embodiment, at least one of the M configuration parameters may not be a threshold voltage for reading the non-volatile memory 120 .
[0080] Configuration parameters for multiple collections
[0081] In the embodiments, reference Figure 1 The M configuration parameters may be a unique set of configuration parameters generated by the artificial neural network 114 and then used by the controller 110 in interacting with the non-volatile memory 120 .
[0082] In an alternative embodiment, the M configuration parameters used by the controller 110 in interacting with the non-volatile memory 120 may be one set of N sets of configuration parameters generated by the artificial neural network 114 (N is an integer greater than 1).
[0083] Specifically, in an embodiment, the artificial neural network 114 can simultaneously generate N sets of configuration parameters based on the input features from the feature collection block 112, wherein each set in the N sets is similar to the M configuration parameters. In other words, each set in the N sets can include a predicted read failure probability, a predicted programming failure probability, a predicted erase failure probability, a predicted threshold voltage, and a predicted decoder parameter. Next, in an embodiment, one of the N sets can be selected as the M configuration parameters.
[0084] As a first example, assume M = 10 and N = 16. If the WE count of the input feature is 1000, the artificial neural network 114 may simultaneously generate N = 16 sets of configuration parameters for WE counts ranging from 1001 to 1016, where each of the N = 16 sets includes M = 10 configuration parameters.
[0085] As a second example, assume that M = 10 and N = 32. If the page index of the input feature is 512, the artificial neural network 114 may simultaneously generate N = 32 sets of configuration parameters for page indexes ranging from 513 to 544, wherein each of the N = 32 sets includes M = 10 configuration parameters.
[0086] As a third example, assume that M = 10 and N = 16. If the WE count and page index of the input feature are 1000 and 512, respectively, the artificial neural network 114 can simultaneously generate N = 16 sets of configuration parameters for WE counts ranging from 1001 to 1004 and for page indexes ranging from 513 to 516, wherein each of the N = 16 sets includes M = 10 configuration parameters.
[0087] Figure 3 The memory system 100 according to the above alternative embodiment is schematically shown. Specifically, in an embodiment, the controller 110 may include a prediction buffer 310, which is configured to (A) store N sets of configuration parameters generated by the artificial neural network 114, and then (B) select one of the N sets as the M configuration parameters to be used by the controller 110 in interacting with the non-volatile memory 120.
[0088] In the embodiments, reference Figure 3 , the prediction buffer 310 may select the one of the N sets of configuration parameters based on the conditional characteristics of the non-volatile memory 120 .
[0089] In an embodiment, the prediction buffer 310 may select one of N sets of configuration parameters based on (A) operating characteristics of the non-volatile memory 120 (e.g., received from the control engine 116) and (B) decoding status characteristics of the decoder 118 (e.g., received from the decoder 118).
[0090] Flowchart outlining the operation of controller 110
[0091] Figure 4 is a flowchart 400 outlining the operation of the controller 110 according to an embodiment. In step S410, the operation may include generating M configuration parameters using an artificial neural network, wherein at least one of the M configuration parameters is not a threshold voltage for reading a non-volatile memory. For example, in the above embodiment, reference Figure 1 , the artificial neural network 114 generates M configuration parameters, wherein at least one configuration parameter of the M configuration parameters is not a threshold voltage for reading the non-volatile memory 120 .
[0092] In step 420, the method may include using the controller to use M configuration parameters in interacting with the non-volatile memory. For example, in the above embodiment, reference Figure 1 , the controller 110 uses M configuration parameters in interacting with the non-volatile memory 120.
[0093] While various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The various aspects and embodiments disclosed herein are for purposes of illustration and are not intended to be limiting, with the true scope and spirit being indicated by the appended claims.
Claims
1. A controller configured to generate M configuration parameters using an artificial neural network and configured to use the M configuration parameters in interacting with a non-volatile memory, M being a positive integer, in, At least one of the M configuration parameters is not a threshold voltage for reading the nonvolatile memory, and Wherein, the controller is configured to implement the artificial neural network.
2. The controller according to claim 1, wherein: The non-volatile memory is a flash memory.
3. The controller according to claim 1, wherein: The artificial neural network is a feedforward neural network, a reinforcement learning network, a long short-term memory network, a recursive neural network or any combination thereof.
4. The controller according to claim 1, wherein: The controller is on a single semiconductor die.
5. The controller of claim 1 , comprising a prediction buffer configured to: (A) storing N sets of configuration parameters generated by the artificial neural network, where N is an integer greater than 1, and (B) Selecting one of the N sets as the M configuration parameters.
6. The controller according to claim 5, wherein: The prediction buffer is configured to select one of the N sets based on a conditional characteristic of the non-volatile memory.
7. The controller according to claim 5, wherein: The prediction buffer is configured to select one of the N sets based on (A) operating characteristics of the nonvolatile memory and (B) decoding status characteristics of a decoder of the controller.
8. The controller according to claim 6, wherein: The conditional characteristics of the nonvolatile memory are selected from the group consisting of: write-erase count (WE count), data retention time, data read temperature, data write temperature, block status, plane index, block index, word line index, page index and any combination thereof.
9. The controller according to claim 7, wherein: The operational characteristic of the nonvolatile memory is selected from the group consisting of: a read time of a page, a program time of a page, an erase time of a block, a count of 1s of raw data of a page, and any combination thereof.
10. The controller according to claim 7, wherein: The decoding status feature is selected from the group consisting of: a page decoding status vector, a 1 to 0 error number array, a 0 to 1 error number array, an iteration number array, and any combination thereof.
11. The controller according to claim 1, wherein: Inputs to the artificial neural network are selected from the group consisting of: conditional characteristics of the non-volatile memory, operational characteristics of the non-volatile memory, decoding status characteristics of a decoder of the controller, and any combination thereof.
12. The controller according to claim 11, wherein: The conditional characteristics of the nonvolatile memory are selected from the group consisting of: write-erase count (WE count), data retention time, data read temperature, data write temperature, block status, plane index, block index, word line index, page index and any combination thereof.
13. The controller according to claim 11, wherein: The operational characteristic of the nonvolatile memory is selected from the group consisting of: a read time of a page, a program time of a page, an erase time of a block, a count of 1s of raw data of a page, and any combination thereof.
14. The controller according to claim 11, wherein: The decoding status feature is selected from the group consisting of: a page decoding status vector, a 1 to 0 error number array, a 0 to 1 error number array, an iteration number array, and any combination thereof.
15. The controller according to claim 1, comprising: (A) a control engine configured to control the non-volatile memory, and (B) a decoder configured to decode data read from the non-volatile memory, wherein the controller is configured to use the M configuration parameters in interacting with the non-volatile memory by configuring the control engine using a first subset of the M configuration parameters, the first subset being selected from the group consisting of: a threshold voltage for reading the non-volatile memory, a read failure probability, an erase failure probability, a program failure probability, and any combination thereof, and The controller is configured to use the M configuration parameters in interacting with the non-volatile memory by configuring the decoder using a second subset of the M configuration parameters, wherein the second subset is selected from the group consisting of: a scaling factor, a maximum number of iterations, an input log-likelihood ratio value, i.e., an input LLR value, and any combination thereof.
16. A system comprising the controller according to claim 1, wherein: The system is a solid state drive, ie, SSD, a flash drive, a motherboard, a processor, a computer, a server, a gaming device, or a mobile device.
17. A method for using the controller according to claim 1, comprising: generating the M configuration parameters using the artificial neural network, wherein at least one configuration parameter among the M configuration parameters is not a threshold voltage for reading the non-volatile memory; and then The M configuration parameters are used by the controller in interacting with the non-volatile memory.
18. The method according to claim 17, wherein: Generating the M configuration parameters includes implementing the artificial neural network using the controller.
19. The method according to claim 17, wherein: The non-volatile memory is a flash memory.
20. The method according to claim 17, wherein: Generating the M configuration parameters includes: storing N sets of configuration parameters generated by the artificial neural network in a prediction buffer, wherein N is an integer greater than 1; and then The prediction buffer is used to select one of the N sets as the M configuration parameters.
21. The method according to claim 20, wherein: The selection is based on a conditional characteristic of the non-volatile memory.
22. The method according to claim 20, wherein: The selection is based on (A) operational characteristics of the nonvolatile memory and (B) decoding status characteristics of a decoder of the controller.