Liquid crystal display (LCD) pixel driving circuit with low integrated circuit (IC) power consumption

Abstract

The invention discloses an LCD (liquid crystal display) pixel driving circuit with low IC (integrated circuit) power consumption, which comprises a first transistor, a pre-storage capacitor, a second transistor, a holding capacitor, a third transistor and a pixel capacitor, and is characterized in that a first source drain electrode of the first transistor is coupled to a data signal line, and a grid electrode is coupled to a control signal line; the second source and drain electrode is coupled to the first source and drain electrode of the second transistor and one end of the pre-storage capacitor; a second source-drain electrode of the second transistor is coupled to the first source-drain electrode of the third transistor, one end of the holding capacitor and one end of the pixel capacitor, and a grid electrode of the second transistor is coupled to a transfer signal line; a second source drain electrode of the third transistor is coupled to a common electrode line, and a grid electrode is coupled to a reset signal line; one end, far away from the transistor, of the pre-storage capacitor and one end, far away from the transistor, of the pixel capacitor are coupled to a common electrode line; and one end, far away from the second transistor, of the holding capacitor is coupled to a coupling signal line.

Description

Technical Field

[0001] The invention relates to the technical field of pixel driving, and in particular to an LCD pixel driving circuit with low IC power consumption. Background Art

[0002] In field sequential or color sequential display technology, the backlight can be turned on only after all the liquid crystals in the screen are deflected to a stable state to avoid image confusion. Therefore, how to speed up the liquid crystal driving time and increase the backlight on time is an urgent problem to be solved in this field.

[0003] The pixel driving circuit of the LCD with traditional field sequential display technology first charges the pixel electrodes of each row in sequence within one frame, then waits for all liquid crystals to deflect to a stable position, and finally turns on the backlight. If the backlight is turned on immediately after the last row of pixels is charged without waiting for the liquid crystal to stabilize, the corresponding liquid crystals of the pixels charged later are not yet stable, which will cause differences in brightness and color above and below, and then cause a chaotic picture. Therefore, in the pixel driving circuit, the time left for the backlight to turn on within one frame is very short, making it difficult to achieve high brightness and high frequency display. At the same time, there will be high requirements for the backlight brightness specifications and lifespan, which increases the product cost.

[0004] In summary, the traditional pixel driving circuit has the problem of not being able to take into account both the light output quality and the light output brightness. Summary of the invention

[0005] In view of this, the present invention provides an LCD pixel driving circuit with low IC power consumption, which solves the problem of the traditional pixel driving circuit that it cannot take both light output quality and light output brightness into consideration by improving the circuit structure.

[0006] To solve the above problems, the technical solution of the present invention is to adopt a low IC power consumption LCD pixel driving circuit, including: a first transistor, a pre-storage capacitor, a second transistor, a holding capacitor, a third transistor and a pixel capacitor, wherein the first source and drain of the first transistor are coupled to a data signal line, the gate is coupled to a control signal line, and the second source and drain are coupled to the first source and drain of the second transistor and one end of the pre-storage capacitor; the second source and drain of the second transistor are coupled to the first source and drain of the third transistor, one end of the holding capacitor and one end of the pixel capacitor, and the gate is coupled to a transfer signal line; the second source and drain of the third transistor are coupled to a common electrode line, and the gate is coupled to a reset signal line; the pre-storage capacitor and the pixel capacitor are coupled to the common electrode line at one end away from the transistor; and the holding capacitor is coupled to the coupling signal line at one end away from the second transistor.

[0007] Optionally, during the backlight on time of the current frame, the first transistor is controlled to turn on based on a control signal, and the first transistor outputs a pre-charge voltage based on a data signal and stores it in the pre-storage capacitor until all pixels complete voltage pre-storage, and then the third transistor is controlled to turn on based on a reset signal to reset the pixel capacitor, and the second transistor is controlled to turn on based on a transfer signal to form the voltage required for the liquid crystal to flip the target angle on the pixel capacitor.

[0008] Optionally, the coupling signal is configured as follows: when the data signal of the current frame is of positive polarity, the coupling signal of the current frame is of negative potential and jumps to a positive potential when entering the next frame; when the data signal of the current frame is of negative polarity, the coupling signal of the current frame is of positive potential and jumps to a negative potential when entering the next frame, thereby completing the coupling of the voltage of the pixel capacitor.

[0009] Optionally, when the liquid crystal flip mode is configured as row flip, the coupling signal is configured such that the potential of the coupling signal of each row of pixels is the same and opposite to the potential of the coupling signal of the adjacent row of pixels.

[0010] Optionally, when the liquid crystal flip mode is column flip, the coupling signal is configured such that the potential of the coupling signal of each column of pixels is the same and opposite to the potential of the coupling signal of the adjacent column of pixels.

[0011] Optionally, the potential of the coupling signal is configured to be positively correlated with the ratio of pixel capacitance+holding capacitance / pre-storage capacitance.

[0012] Optionally, the pixel driving circuit can also be configured as follows: when the liquid crystal flip mode is column flip, the pre-storage capacitor of the Nth column, the end of the pixel capacitor away from the transistor and the second source and drain of the third transistor are coupled to the first common electrode line, and the holding capacitor is coupled to the second common electrode line; the pre-storage capacitor of the N+1th column, the end of the pixel capacitor away from the transistor and the second source and drain of the third transistor are coupled to the second common electrode line, and the holding capacitor is coupled to the second common electrode line and the first common electrode line; wherein N is a positive integer.

[0013] Optionally, when the data signal of the Nth column of the current frame is of positive polarity, the first common voltage of the current frame is configured as a positive potential and the second common voltage is a negative potential, and in the next frame, the first common voltage jumps to a negative potential and the second common voltage jumps to a positive potential; when the data signal of the Nth column of the current frame is of negative polarity, the first common voltage of the current frame is configured as a negative potential and the second common voltage is a positive potential, and in the next frame, the first common voltage jumps to a positive potential and the second common voltage jumps to a negative potential. The primary improvement of the present invention is the low IC power consumption LCD pixel driving circuit provided. By setting a pre-storage capacitor, the pre-charge voltage is stored by the pre-storage capacitor during the backlight emission time of the current frame, so that all pixels can synchronously read the pre-charge voltage in the next frame, which greatly reduces the writing time of the pixel voltage and relatively increases the backlight emission time, thereby increasing the light output brightness while ensuring the light output quality, and solving the problem that the traditional pixel driving circuit cannot take into account both the light output quality and the light output brightness. At the same time, the present invention sets a holding capacitor and a coupling signal line, and couples the pixel capacitor by changing the potential at the other end of the capacitor, so as to increase the pixel capacitor potential. Therefore, the Data potential required for liquid crystal flipping is reduced, further improving the brightness or reducing the Source IC power consumption and cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a simplified circuit diagram of an LCD pixel driving circuit according to Embodiment 1 of the present invention; Figure 2 is a driving timing diagram of an LCD pixel driving circuit according to Embodiment 1 of the present invention; Figure 3 is a simplified circuit diagram of an LCD pixel driving circuit according to Embodiment 2 of the present invention; Figure 4 It is a driving timing diagram of the LCD pixel driving circuit according to the second embodiment of the present invention. Implementation

[0015] In order to enable those skilled in the art to better understand the technical solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0016] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0017] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0018] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0020] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0021] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0022] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship. Example

[0023] Specifically, Figure 1As shown, a low IC power consumption LCD pixel driving circuit includes: a first transistor M1, a pre-storage capacitor Cs1, a second transistor M2, a holding capacitor Cs2, a third transistor M3 and a pixel capacitor Clc, wherein the first source and drain of the first transistor M1 are coupled to the data signal line Data, the gate is coupled to the control signal line Scan, and the second source and drain are coupled to the first source and drain of the second transistor M2 and one end of the pre-storage capacitor Cs1; the second source and drain of the second transistor M2 are coupled to the first source and drain of the third transistor M3, one end of the holding capacitor Cs2 and one end of the pixel capacitor Clc, and the gate is coupled to the transfer signal line Tran; the second source and drain of the third transistor M3 are coupled to the common electrode line Com, and the gate is coupled to the reset signal line Reset; the pre-storage capacitor Cs1 and the pixel capacitor Clc are coupled to the common electrode line Com at one end away from the transistor; and the holding capacitor Cs2 is coupled to the coupling signal line Vcouple at one end away from the second transistor M2. Among them, for any type of TFT, except for the gate, one of the other two electrodes is a source electrode and the other is a drain electrode. In the present invention, they are expressed as a first source drain electrode and a second source drain electrode according to their spatial positions for the purpose of distinction.

[0024] Specifically, to facilitate understanding of the working timing of the pixel driving circuit, as shown in FIG. Figure 2 As shown, during the backlight on time of the current frame, the first transistor M1 is controlled to turn on based on the control signal, and the first transistor M1 outputs a pre-charge voltage based on the data signal and stores it in the pre-storage capacitor Cs1, until all pixels complete the voltage pre-storage, and then the third transistor M3 is controlled to turn on based on the reset signal to reset the pixel capacitor Clc, and the second transistor M2 is controlled to turn on based on the transfer signal to form the voltage required for the liquid crystal to flip the target angle on the pixel capacitor Clc.

[0025] Furthermore, the coupling signal is configured as follows: when the data signal of the current frame is of positive polarity, the coupling signal of the current frame is of negative potential and jumps to positive potential when entering the next frame; when the data signal of the current frame is of negative polarity, the coupling signal of the current frame is of positive potential and jumps to negative potential when entering the next frame, thereby completing the coupling of the voltage of the pixel capacitor.

[0026] It should be noted here that a “positive potential” is defined as an initial (normal) potential that is higher than the common voltage; and a “negative potential” is defined as an initial (normal) potential that is lower than the common voltage.

[0027] Furthermore, when the liquid crystal flip mode is configured as row flip, the coupling signal is configured such that the potential of the coupling signal of each row of pixels is the same and opposite to the potential of the coupling signal of the adjacent row of pixels.

[0028] Furthermore, when the liquid crystal flip mode is column flip, the coupling signal is configured such that the potential of the coupling signal of each column of pixels is the same and opposite to the potential of the coupling signal of the adjacent column of pixels. The potential of the coupling signal is configured such that it is positively correlated with the ratio of the pixel capacitance Clc+the holding capacitance Cs2 / the pre-storage capacitance Cs1.

[0029] The present invention utilizes the coupling effect of the coupling signal on the holding capacitor and the pixel capacitor, thereby raising or lowering the pixel voltage according to the polarity of the data signal, thereby compensating for the voltage drop caused by the charge transfer and reducing the demand for the power consumption of the driver IC. Example

[0030] Specifically, Figure 3 As shown, the pixel driving circuit can also be configured as follows: when the liquid crystal flip mode is column flip, the pre-storage capacitor Cs1 of the Nth column, the end of the pixel capacitor Clc away from the transistor and the second source and drain of the third transistor M3 are coupled to the first common electrode line Com_even, and the holding capacitor Cs2 is coupled to the second common electrode line Com_odd; the pre-storage capacitor Cs1 of the N+1th column, the end of the pixel capacitor Clc away from the transistor and the second source and drain of the third transistor M3 are coupled to the second common electrode line Com_odd, and the holding capacitor Cs2 is coupled to the second common electrode line first common electrode line Com_even; wherein N is a positive integer.

[0031] The pixel driving circuit claimed to be protected in this embodiment reduces one signal line compared to the pixel driving circuit of Example 1, which can effectively improve the aperture ratio and, through the differentiated positive and negative reset voltages and coupling voltages of adjacent columns, can effectively enhance the compensation effect for the voltage drop caused by charge sharing.

[0032] Furthermore, Figure 4In the driving timing shown, when the data signal of the Nth column of the current frame is positive polarity, the first common voltage of the current frame is configured as a positive potential, the second common voltage is a negative potential, and in the next frame, the first common voltage jumps to a negative potential, and the second common voltage jumps to a positive potential; when the data signal of the Nth column of the current frame is negative polarity, the first common voltage of the current frame is configured as a negative potential, the second common voltage is a positive potential, and in the next frame, the first common voltage jumps to a positive potential, and the second common voltage jumps to a negative potential. In order to facilitate understanding of the specific principle of voltage coupling, an example is given: assuming that the data signal of the pixel of a row of the Nth column in the current frame is +4V, the voltage of the pre-storage capacitor Cs1 of the pixel in the current frame under the action of charge sharing may be +3.5V (the value is only for example), then, when M2 is turned on in the next frame, the charge of the pre-storage capacitor Cs1 is shared to the pixel electrode, and if the first common voltage and the second common voltage do not jump, the voltage on the pixel capacitor may be 3V. When the second common voltage jumps upward by 1V (assuming that the holding capacitor Cs2 = pixel capacitor Clc), the potential of the pixel electrode will jump upward by 0.5V. At this time, the voltage on the pixel capacitor is coupled to 3.5V. When the first common voltage jumps downward by 1V, the potential of the pixel electrode will jump downward by 0.5V. At this time, the voltage on the pixel capacitor is coupled to 4V, which meets the voltage required to drive the liquid crystal to the target deflection angle.

[0033] Furthermore, when the data signal of the N+1th column of the current frame is of negative polarity, the first common voltage of the current frame is configured as a positive potential, the second common voltage is of a negative potential, and in the next frame, the first common voltage jumps to a negative potential, and the second common voltage jumps to a positive potential; when the data signal of the N+1th column of the current frame is of positive polarity, the first common voltage of the current frame is configured as a negative potential, the second common voltage is of a positive potential, and in the next frame, the first common voltage jumps to a positive potential, and the second common voltage jumps to a negative potential. The coupling principle of the pixels of the N+1th column is the same as that of the pixels of the Nth column, and thus will not be described in detail here.

[0034] At the same time, it should be noted that the coupling method involved in the present application is not only applicable to the driving logic that performs polarity reversal in each frame. In the driving logic that performs polarity reversal in every M (M ≥ 2, and is a positive integer) frames, it is only necessary to jump the common voltage back to the potential of the last frame before the polarity reversal at the end of each frame to complete the coupling. At this time, although the voltage retention rate of the pixel capacitor will be lost, under the field sequential driving logic, the time of each frame is very short, and the impact on the light output efficiency and imaging effect is extremely low.

[0035] The present invention sets a pre-storage capacitor so that during the backlight emission time of the current frame, the pre-charge voltage is stored by the pre-storage capacitor, so that all pixels synchronously read the pre-charge voltage in the next frame, which greatly reduces the writing time of the pixel voltage and relatively increases the backlight emission time, thereby increasing the light output brightness while ensuring the light output quality, and solves the problem of the traditional pixel driving circuit that cannot take into account both the light output quality and the light output brightness.

[0036] The inventor found in the simulation that the measured pixel voltages were all lower than the pre-charge voltage, and then found that the reason was that the pre-storage capacitor provided the voltage required by the second transistor M2 so that the second transistor M2 outputted the voltage required by the pixel for the next frame to the pixel capacitor, which was done by charge sharing. Therefore, the potential of the pixel capacitor after reading would be lower than the potential of the pre-storage capacitor before reading, which in turn caused the potential required for the complete deflection of the liquid crystal to exceed the voltage output range of the data signal. Therefore, the present invention can increase the potential of the pixel capacitor by setting a holding capacitor and a coupling signal line, and coupling the pixel capacitor by changing the potential at the other end of the capacitor. Therefore, the Data potential required for liquid crystal flipping is reduced, further increasing the brightness or reducing the power consumption and cost of the Source IC. The above is a low IC power consumption LCD pixel driving circuit provided by an embodiment of the present invention. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

[0037] Professionals may further realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented with electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to the function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention. The steps of the method or algorithm described in conjunction with the embodiments disclosed herein can be directly implemented with a software module executed by a hardware or processor, or a combination of the two. The software module can be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the technical field.

Claims

1. A LCD pixel driving circuit with low IC power consumption, include: A first transistor (M1), a pre-storage capacitor (Cs1), a second transistor (M2), a holding capacitor (Cs2), a third transistor (M3) and a pixel capacitor (Clc), characterized in that: The first source and drain of the first transistor (M1) are coupled to a data signal line (Data), the gate is coupled to a control signal line (Scan), and the second source and drain are coupled to the first source and drain of the second transistor (M2) and one end of a pre-storage capacitor (Cs1); The second source and drain of the second transistor (M2) are coupled to the first source and drain of the third transistor (M3), one end of the holding capacitor (Cs2) and one end of the pixel capacitor (Clc), and the gate is coupled to the transfer signal line (Tran); The second source and drain of the third transistor (M3) are coupled to the common electrode line (Com), and the gate is coupled to the reset signal line (Reset); The pre-storage capacitor (Cs1) and the pixel capacitor (Clc) are coupled to a common electrode line (Com) at one end away from the transistor; One end of the holding capacitor (Cs2) away from the second transistor (M2) is coupled to a coupling signal line (Vcouple).

2. The LCD pixel driving circuit according to claim 1, It is characterized in that During the backlight on time of the current frame, the first transistor (M1) is controlled to be turned on based on a control signal, and the first transistor (M1) outputs a pre-charge voltage based on a data signal and stores it in the pre-storage capacitor (Cs1), until all pixels complete the voltage pre-storage. Based on the reset signal, the third transistor (M3) is controlled to turn on, and the pixel capacitor (Clc) is reset. The second transistor (M2) is controlled to turn on based on the transfer signal, so as to form a voltage on the pixel capacitor (Clc) required for the liquid crystal to flip to a target angle.

3. The LCD pixel driving circuit according to claim 2, It is characterized in that The coupling signal is configured as follows: when the data signal of the current frame is of positive polarity, the coupling signal of the current frame is of negative potential and jumps to positive potential when entering the next frame; when the data signal of the current frame is of negative polarity, the coupling signal of the current frame is of positive potential and jumps to negative potential when entering the next frame, thereby completing the coupling of the voltage of the pixel capacitor.

4. The LCD pixel driving circuit according to claim 3, It is characterized in that When the liquid crystal flip mode is configured as row flip, the coupling signal is configured such that the potential of the coupling signal of each row of pixels is the same and opposite to the potential of the coupling signal of the adjacent row of pixels.

5. The LCD pixel driving circuit according to claim 3, It is characterized in that When the liquid crystal flip mode is column flip, the coupling signal is configured such that the potential of the coupling signal of each column of pixels is the same and opposite to the potential of the coupling signal of the adjacent column of pixels.

6. The LCD pixel driving circuit according to claim 5, It is characterized in that The potential of the coupling signal is configured to be positively correlated with the ratio of pixel capacitance (Clc)+holding capacitance (Cs2) / pre-storage capacitance (Cs1).

7. The LCD pixel driving circuit according to claim 1, It is characterized in that The pixel driving circuit can also be configured as follows: when the liquid crystal flip mode is column flip, The pre-storage capacitor (Cs1) of the Nth column, one end of the pixel capacitor (Clc) away from the transistor and the second source and drain of the third transistor (M3) are coupled to the first common electrode line (Com_even), and the holding capacitor (Cs2) is coupled to the second common electrode line (Com_odd); The pre-storage capacitor (Cs1) of the N+1th column, the end of the pixel capacitor (Clc) away from the transistor and the second source and drain of the third transistor (M3) are coupled to the second common electrode line (Com_odd), and the holding capacitor (Cs2) is coupled to the second common electrode line and the first common electrode line (Com_even); Wherein, N is a positive integer.

8. The LCD pixel driving circuit according to claim 7, It is characterized in that When the data signal of the Nth column of the current frame is of positive polarity, the first common voltage of the current frame is configured as a positive potential and the second common voltage is a negative potential, and in the next frame, the first common voltage jumps to a negative potential and the second common voltage jumps to a positive potential; when the data signal of the Nth column of the current frame is of negative polarity, the first common voltage of the current frame is configured as a negative potential and the second common voltage is a positive potential, and in the next frame, the first common voltage jumps to a positive potential and the second common voltage jumps to a negative potential.

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