Chip aging test system and aging test method

Abstract

The invention relates to the field of chip testing. A chip aging test system comprises an aging test furnace and an aging plate, a chip to be tested is arranged on the aging plate, the aging plate is arranged in the aging test furnace, the aging plate is connected with a chip power panel arranged outside the aging test furnace through an interface or a power line, and the chip power panel is connected or provided with a direct current working power supply. And the chip power panel and the aging test furnace are connected with the control center through the control panel. The test method based on the system comprises the steps that the control center loads chip test parameters according to a test task or a test work order; then the aging test furnace is started through the control panel, and the temperature of the aging test furnace is monitored; when the temperature reaches the temperature required by the test, controlling to supply power to the to-be-tested chip on the burn-in board through the control board, and starting the test; and after the test time is up, controlling the aging test furnace to be cooled to normal temperature, and ending the test. And after the test is finished, reading or verifying the content of the chip by connecting a professional tool to confirm whether the aging test is passed.

Description

Technical Field

[0001] The present invention relates to the field of chip testing, and in particular to an aging test system and an aging test method for a memory chip. Background Art

[0002] The memory aging equipment on the market is generally a power supply version with separate control of the aging furnace and the power board. The start and end of the test require manual operation in steps. Some aging boards will have a separate MCU or FPGA to test whether the aging program is complete. When testing different memory ICs, it is usually necessary to switch to different aging furnaces, and the relevant test parameter settings require manual operation. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a chip aging test system and an aging test method, which solves the technical problems that the start and stop of the current aging test furnace requires manual operation and different chips require different equipment, which then need to be manually reset.

[0004] Technical Solution

[0005] A chip aging test system includes an aging test furnace and an aging board, characterized in that: the aging board is provided with a chip to be tested and is arranged in the aging test furnace, the aging board is connected to a chip power board arranged outside the aging test furnace through an interface or a power line, the chip power board is connected to or provided with a DC working power supply, the chip power board and the aging test furnace are connected to a control center through a control board, and the control center receives and controls the power on and off of the aging board and the power on and off and temperature control of the aging test furnace through the control board.

[0006] Furthermore, the control center loads test parameters according to the received chip test task.

[0007] Furthermore, the test parameters include test chip items, test time and test temperature.

[0008] Furthermore, when setting the chip to be tested, the aging board sets the ID first or at the same time, and the ID of the aging board includes information corresponding to the type of chip to be tested. After receiving the test task, the control center checks and confirms the ID of the aging board received by the control board and then loads the test parameters.

[0009] Furthermore, after the control center loads the test parameters, it starts the aging test furnace through the control board and monitors the temperature of the aging test furnace after confirming the matching chip information based on the ID of the aging board received by the control board; when the temperature reaches the required test temperature, the control board controls the power supply of the chip power board to start the power supply to the chip to be tested on the aging board to start the test; after monitoring that the test time has arrived, the control center controls the power supply of the chip power board to be disconnected, and controls the aging test furnace to cool down through the control board and return to normal temperature, and the test ends.

[0010] Furthermore, the aging board does not have a microcontroller MCU or FPGA. After the test, the chip on the aging board is connected to a professional tool to read or verify the chip content to confirm whether it has passed the aging test.

[0011] Furthermore, the control center receives the chip test task and loads the test parameters by receiving the work order information in the factory.

[0012] Furthermore, the control center is connected to a scanning device or a photographing device, which can be used to scan or photograph the work order information or the ID information of the aging board, so as to obtain corresponding information or data.

[0013] A method for chip aging test, characterized in that it includes a control center using a PC or a server, the control center loads chip test parameters according to the test task or test work order issued by the task center in the factory; then, the control board communicates with the control center to receive the chip information to be tested set on the aging board, the control board receives or scans the ID information of the aging board, and sends it to the control center; after the control center confirms the chip information matching the test task, it starts the aging test furnace through the control board and monitors the temperature of the aging test furnace; when the temperature reaches the required test temperature, the control board controls the power supply of the chip power board to start the power supply to the chip to be tested on the aging board and starts the test; after monitoring that the test time has arrived, the control center controls the aging test furnace to cool down through the control board and returns to the normal temperature, and the test ends; after the test ends, the chip is verified by a professional tool to see whether it has passed the aging test.

[0014] A storage medium stores a program, wherein the program implements the above method when executed by a processor.

[0015] Beneficial Effects

[0016] The present invention connects the aging test furnace and the aging board at the same time through a control board, and then the control center controls the aging test furnace and the aging board through the control board according to the set process flow, thereby solving the technical problem in the prior art that the aging test furnace and the aging board need to be powered separately, and thus can only be operated manually in steps; because the control of the control center is realized, corresponding control can be performed according to different chip test tasks, and there is no need to manually re-set the test furnace when the test chip is replaced, thereby realizing intelligent testing; and after the test is completed, the chip is verified by a tool whether the chip has passed the aging test, and the aging board does not need to be installed with an MCU or FPGA for test control, which can simplify the design of the aging board and reduce the cost, and can make the aging board more versatile, can be applicable to the testing of various chips, further optimize the test requirements, and realize a flexible and intelligent test process. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic diagram of the system structure of the present invention. DETAILED DESCRIPTION

[0018] The present invention is further described below in conjunction with specific embodiments and drawings.

[0019] The existing memory chip testing equipment is basically that the aging test furnace controls the test temperature change requirements, and then the aging board controls the chip test process and test time or parameter requirements (the aging board has a control loop for controlling the chip to be tested). Therefore, the aging test furnace and the aging board are powered and controlled separately, and the aging board is set with a control loop that can only be used for the corresponding chip test. Therefore, in the current chip testing process, during the test chip replacement process, either the aging test furnace is manually reset and then the aging board is directly replaced, or the aging board is directly replaced by a robotic arm, and the aging board only corresponds to the corresponding chip, so there are the following problems: 1) In terms of process, each replacement requires re-test setting or manual station confirmation, and the aging board needs to change models; 2) In terms of cost, the aging board has a control loop corresponding to the chip, so its applicability is single, and aging tests are often performed, and the chip consumption of the control loop is large.

[0020] As attached Figure 1As shown, the present invention proposes a chip aging test system, including an aging test furnace and an aging board, the aging board is provided with a chip to be tested, and is arranged in the aging test furnace, the aging board is connected to a chip power board arranged outside the aging test furnace through an interface or a power line, the chip power board is connected or provided with a DC working power supply, the chip power board and the aging test furnace are connected to a control center through a control board, and the control center receives and controls the power on and off of the aging board and the power on and off and temperature control of the aging test furnace through the control board. The microcontroller MCU or FPGA is not provided on the aging board, and after the test, the chip is connected to a professional tool to read or verify the chip content to confirm whether it has passed the aging test.

[0021] Figure 1 In the embodiment, the aging board is connected to the chip power board by using a gold finger and an interface board. The chip power board uses an external DC working power supply. Then, a variety of conversion circuits can be set on the chip power board for different test power supply requirements. A protection circuit or a power control circuit can also be set on the chip power board. The power control circuit is connected to the control board in communication and receives the control signal of the control board to control the power on and off of the aging board. It can also be directly electrically connected to the control board, and the control board directly controls the power on and off of the power supply line of the chip power board. LED lights or LED visual boards can also be added or connected. The LED visual board can be connected to the aging board by connecting the chip power board to display the status of each layer of the aging board whether it is online (connected to the back-end power board). A whole row of LED lights can also be set on the aging board to display the working status of each chip on the aging board (after power on). When the power control circuit of the chip power board powers on the aging board normally, the LED visual board lights up to indicate that the electrical connection of the aging board is normal, and the LED lights up to indicate the power-on status of the chip. If the power control circuit is powered off or the protection circuit is powered off, the LED visual board lights up to indicate that the electrical connection of the aging board is abnormal, and the LED lights up to indicate that the chip is in a power-off state.

[0022] This solution can be controlled by the control software of the control center through the control board connected by communication, the control board is connected to the aging test furnace, the furnace temperature is read and set, and the start of the furnace is controlled by the control software. When the furnace reaches the aging test temperature, the test power supply system of the chip power board is started to achieve unified power supply. After the test time is completed, the test power supply system is cut off, and the furnace is cooled down to end the test. The GUI interface of the control software can display whether the test program is completed, so there is no need to install an MCU or FPGA device on the aging board. After the test is completed, the chip that has completed the test can be transferred to the test bench or the test tool, and the test tool will detect whether the chip has passed the aging test.

[0023] When replacing the test chip, you only need to replace the aging board on which the chip to be tested is placed, and the circuit on the aging board has been extremely simplified, which minimizes the cost. The entire test process can also be performed without any human involvement.

[0024] The system of this solution can realize fully automated testing, reduce the operator's operation time and operation errors, and the same system and aging furnace can be used to test different memory ICs. Only the aging board needs to be replaced, and the aging board improves adaptability and versatility, reducing labor and equipment costs. At the same time, each test unit also has a corresponding overcurrent protection circuit to prevent short circuit damage to other test units due to a short circuit in a single test unit.

[0025] The specific test process of the above system is as follows:

[0026] 1. Pre-work: Select the burn-in board for the IC to be tested, and place the IC to be tested on the burn-in board through the automatic loader, and set the ID in advance or at the same time. The ID of the burn-in board includes information corresponding to the chip type to be tested;

[0027] 2. Enable the control software of the control center;

[0028] 3. Operate the control software, receive the test tasks transmitted by the system, or use a barcode scanner or camera to obtain the corresponding test tasks of the work order, and load the test file parameters (including test IC items, test time, test temperature, etc.) according to the test tasks;

[0029] 4. The control board receives the read ID of the aging board, and the control software checks and confirms the information of the chip type to be tested obtained from the ID of the aging board with the information of the received test task;

[0030] 5. After confirmation, the control software starts to set the furnace temperature through the control panel, and starts the furnace to heat up;

[0031] 6. The control center reads the furnace temperature and waits for the temperature to reach the set temperature;

[0032] 7. When the furnace temperature reaches the set temperature, the control software sends information to the control board, and the control board starts the power connection between the chip power board and the aging board, connects the chip to be tested set on the aging board through the interface of the gold finger, and starts the aging test of the chip in the power-on working state;

[0033] 8. The control center starts testing status monitoring and waits for the test to complete;

[0034] 9. After the test time arrives and the test items are completed, the control center sends a control signal to the control board, and the control board controls the chip power board to cut off the power to the aging board. At the same time, the aging test furnace sends a control signal to set the furnace back to normal temperature;

[0035] 10. The control center reads the furnace temperature and ends the test after it returns to the set normal temperature;

[0036] 11. Send the tested chip to the testing site, and use performance testing or testing tools to read the chip content to determine whether the chip has passed the aging test.

[0037] Through the above operations, you can perform automated aging tests on different memory ICs. The control software only needs to load the test parameters to test. During this period, the control center communicates with the ARM of this system through the RS485 communication interface to control the operation of the furnace and the power on and off of the chip to be tested to complete the aging test operation.

[0038] Through this solution, the operator can reduce the operating steps of the aging test of the general power supply board, reduce the errors of human operation, and through the control software of the control center, the temperature during the aging test can be monitored and power-off protection can be provided. The test results can also be saved in the database and the test data can be counted for reference by relevant units.

[0039] Compared with the existing technology that uses separate control of the furnace and the power supply system of the chip to be tested, the work order is input into the control software using a barcode scanner, or the control software accepts the test task of the production system or OA system to load the test parameters, which greatly reduces human operation errors and the time required for operators to wait at the workstation for the aging process operation.

[0040] Compared with the existing solutions with MCU or FPGA on the aging board, the chips after the aging test will not be determined by the judgment of the MCU or FPGA on the aging board to determine whether the aging chip has passed the test. Instead, the chips can be sent to the testing place for unified testing. They can pass the performance test or read the chip content through the professional tools of the chip manufacturer to determine whether the chip has passed the aging test. Therefore, this solution removes the control of MCU or FPGA on the aging board, which not only realizes the full automation of the process, but also greatly reduces the testing cost, and achieves the purpose of aging test.

[0041] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It should be understood by those skilled in the art that the present invention is not limited to the above embodiments. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention to be protected. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A chip aging test system, comprising an aging test furnace and an aging board, characterized in that: The aging board is provided with a chip to be tested and is arranged in the aging test furnace. The aging board is connected to a chip power board arranged outside the aging test furnace through an interface or a power line. The chip power board is connected to or provided with a DC working power supply. The chip power board and the aging test furnace are connected to a control center through a control board. The control center receives and controls the power on and off of the aging board and the power on and off and temperature control of the aging test furnace through the control board.

2. The chip aging test system as claimed in claim 1, characterized in that: The control center loads the test parameters according to the received chip test task.

3. The chip aging test system as claimed in claim 2, characterized in that: The test parameters include test chip items, test time and test temperature.

4. The chip aging test system as claimed in claim 2, characterized in that: When setting the chip to be tested, the aging board sets the ID first or at the same time. The ID of the aging board includes information corresponding to the type of chip to be tested. After receiving the test task, the control center checks and confirms the ID of the aging board received by the control board and then loads the test parameters.

5. The chip aging test system as claimed in claim 2, characterized in that: After the control center loads the test parameters, it starts the aging test furnace through the control board after confirming the matching chip information according to the ID of the aging board received by the control board, and monitors the temperature of the aging test furnace; When the temperature reaches the required test temperature, the control board controls the power supply of the chip power board to start the power supply to the chip to be tested on the aging board, and the test begins; after monitoring that the test time has arrived, the control center controls the power supply of the chip power board to disconnect, and controls the aging test furnace to cool down through the control board, returning to normal temperature, and the test ends.

6. The chip aging test system as claimed in claim 5, characterized in that: The aging board is not provided with a microcontroller MCU or FPGA. After the test, the chip on the aging board is tested for performance or connected to a professional tool to read and verify the chip content to confirm whether it has passed the aging test.

7. The chip aging test system as claimed in claim 2, characterized in that: The control center receives the chip test task and loads the test parameters by receiving the work order information in the factory.

8. The chip aging test system as claimed in claim 7, characterized in that: The control center is connected to a scanning device or a photographing device, which can be used to scan or photograph the work order information or the ID information of the aging board, so as to obtain corresponding information or data.

9. A method for chip aging testing, characterized in that: The control center includes a PC or a server, and the control center loads chip test parameters according to the test tasks or test work orders issued by the task center in the factory; then, the control board connected to the control center receives the chip information to be tested set on the aging board, and the control board receives or scans the ID information of the aging board and sends it to the control center; after the control center confirms the chip information matching the test task, it starts the aging test furnace through the control board and monitors the temperature of the aging test furnace; When the temperature reaches the required test temperature, the control board controls the power supply of the chip power board to start the power supply to the chip to be tested on the aging board and start the test; after monitoring that the test time has arrived, the control center controls the aging test furnace to cool down and return to normal temperature through the control board, and the test ends; after the test, the chip is verified by professional tools to see whether it has passed the aging test.

10. A storage medium storing a program, characterized in that: When the program is executed by a processor, the method as claimed in claim 9 is implemented.

Images