A configuration logic execution optimization method, system, device, medium and product

Abstract

The application discloses a configuration logic execution optimization method, system, device, medium and product, and relates to the technical field of data processing. The method comprises the following steps: based on the application requirement of the current DCS system of a user, configuring a configuration logic; based on the dependency relationship between algorithm blocks, optimizing the configuration logic to obtain a plurality of optimized configuration logic data streams; based on the dependency relationship between each optimized configuration logic data stream and the algorithm blocks, constructing a configuration logic relationship indication table storing a plurality of algorithm block names according to the data stream parallel principle; based on the configuration logic relationship indication table, generating an algorithm dependency relationship register corresponding to each algorithm block; and according to the algorithm dependency relationship in the algorithm dependency relationship register, performing parallel calling on a plurality of algorithm executors to execute the configuration logic. The application improves the execution efficiency of the configuration logic.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and in particular to a method, system, device, medium and product for optimizing the execution of configuration logic. Background Technology

[0002] The Digital Control System (DCS) of a nuclear power plant controls more than 300 systems and nearly 10,000 pieces of equipment, serving as the control center of the plant. Due to its extremely high safety and reliability requirements, the DCS is the most important and challenging part of the localization of nuclear power equipment. Among its components, the execution of configuration logic is the most crucial part of implementing configuration algorithms in the DCS, characterized by large amounts of computational data, complex logic functions, numerous algorithm block types, and stringent execution time requirements.

[0003] Currently, configuration logic in control system engineering applications is mostly sequential. The data flow and execution results of configuration logic are determined by the order of the configuration logic and the input-output relationships between algorithm blocks. To ensure the determinism and uniqueness of the algorithm logic execution results, and to reduce the system complexity based on FPGA, serial scheduling technology is currently used for configuration logic scheduling in FPGA-based digital instrumentation and control systems both domestically and internationally. However, serial execution means that the configuration logic execution depends on the execution results of all preceding configuration logic, resulting in strong dependency, long algorithm execution time, and low execution efficiency.

[0004] With the development of digital instrumentation and control systems, the number of algorithm blocks executed in a single cycle is increasing, and improving the efficiency of algorithm calculation and execution has become an urgent problem to be solved. Summary of the Invention

[0005] The purpose of this application is to provide a method, system, device, medium, and product for optimizing the execution of configuration logic, thereby improving the execution efficiency of configuration logic.

[0006] To achieve the above objectives, this application provides the following solution:

[0007] Firstly, this application provides a method for optimizing the execution of configuration logic, the method comprising:

[0008] Based on the user's current application requirements for the DCS system, a configuration logic is configured; the configuration logic includes multiple algorithm blocks and the dependencies between the algorithm blocks, and the dependencies represent the connection relationships between the algorithm blocks;

[0009] Based on the dependencies between algorithm blocks, the configuration logic is optimized to obtain multiple optimized configuration logic data streams; each optimized configuration logic data stream can be executed in parallel.

[0010] Based on the dependencies between the optimized configuration logic data flows and algorithm blocks, and in accordance with the data flow parallelism principle, a configuration logic relationship indicator table is constructed that stores multiple algorithm block names; wherein, the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm blocks located before the current algorithm block number;

[0011] Based on the configuration logic relationship indication table, an algorithm dependency relationship register is generated for each algorithm block; each algorithm dependency relationship register stores the dependency relationship between the current algorithm block and the algorithm blocks preceding the current algorithm block;

[0012] Based on the algorithm dependencies in the algorithm dependency register, multiple algorithm executors are invoked in parallel to execute the configuration logic.

[0013] Optionally, when the configuration logic includes multiple algorithm pages, each algorithm page includes multiple algorithm blocks, and the algorithm pages are connected through input variables and output variables;

[0014] When the configuration logic contains a single algorithm page, the algorithm blocks are connected by connection lines.

[0015] Optionally, based on the dependencies between algorithm blocks, the configuration logic is optimized to obtain multiple optimized configuration logic data streams, specifically including:

[0016] The algorithm blocks in the configuration logic that have no dependencies on each other are optimized and arranged to obtain an optimized configuration logic data flow graph; the optimized configuration logic data flow graph includes multiple optimized configuration logic data flows;

[0017] There are no dependencies between the algorithm blocks in each optimized configuration logic data stream, but there are dependencies between adjacent algorithm blocks within each optimized configuration logic data stream.

[0018] Secondly, this application provides an execution optimization system for configuration logic, which is used to implement the execution optimization method for configuration logic. The execution optimization system for configuration logic includes:

[0019] The configuration logic determination unit is used to configure a configuration logic based on the application requirements of the user's current DCS system; the configuration logic includes multiple algorithm blocks and the dependencies between the algorithm blocks, and the dependencies represent the connection relationships between the algorithm blocks;

[0020] The configuration logic data flow determination unit is used to optimize the configuration logic based on the dependencies between algorithm blocks to obtain multiple optimized configuration logic data flows; each optimized configuration logic data flow can be executed in parallel;

[0021] The configuration logic relationship indicator table determination unit is used to construct a configuration logic relationship indicator table storing multiple algorithm block names based on the dependencies between each optimized configuration logic data flow and algorithm block, and in accordance with the data flow parallelism principle; wherein, the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number;

[0022] An algorithm dependency register generation unit is used to generate an algorithm dependency register corresponding to each algorithm block based on the configuration logic relationship indication table; each algorithm dependency register stores the dependency relationship between the current algorithm block and the algorithm blocks located before the current algorithm block;

[0023] The execution determination unit is used to perform parallel calls on multiple algorithm executors based on the algorithm dependency relationship in the algorithm dependency relationship register in order to execute the configuration logic.

[0024] Optionally, the configuration logic data flow determination unit specifically includes:

[0025] The algorithm blocks in the configuration logic that have no dependencies on each other are optimized and arranged to obtain an optimized configuration logic data flow graph; the optimized configuration logic data flow graph includes multiple optimized configuration logic data flows;

[0026] There are no dependencies between the algorithm blocks in each optimized configuration logic data stream, but there are dependencies between adjacent algorithm blocks within each optimized configuration logic data stream.

[0027] Thirdly, this application provides a computer device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the execution optimization method for configuration logic as described in any of the preceding claims.

[0028] Fourthly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the execution optimization method for the configuration logic described in any of the preceding claims.

[0029] Fifthly, this application provides a computer program product, including a computer program that, when executed by a processor, implements the execution optimization method for the configuration logic described in any of the preceding claims.

[0030] According to the specific embodiments provided in this application, this application has the following technical effects:

[0031] This application discloses a method, system, device, medium, and product for optimizing the execution of configuration logic. By utilizing the dependencies between algorithm blocks, multiple optimized configuration logic data streams are obtained. Based on the dependencies between each optimized configuration logic data stream and algorithm blocks, and following the principle of data stream parallelism, a configuration logic relationship indicator table storing the names of multiple algorithm blocks is constructed. Based on the configuration logic relationship indicator table, an algorithm dependency register corresponding to each algorithm block is generated. According to the algorithm dependencies in the algorithm dependency register, multiple algorithm executors are called in parallel. This can improve the traditional serial configuration logic execution based on FPGA to the parallel execution of multiple algorithm executors, maximizing the execution efficiency of the algorithm executors, reducing the idle state of the algorithm executors, and ensuring the determinism and uniqueness of the logic configuration execution process by controlling the scheduling between algorithm executors. At the same time, it improves the execution efficiency of configuration logic and enhances the carrying capacity of the DCS control system. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is an application environment diagram of the configuration logic execution optimization method in one embodiment of this application;

[0034] Figure 2 A schematic diagram of the execution optimization method for configuration logic provided in an embodiment of this application;

[0035] Figure 3 This is a configuration logic diagram provided for an embodiment of this application;

[0036] Figure 4 This is a schematic diagram illustrating the dependency relationships between algorithm blocks provided in an embodiment of this application;

[0037] Figure 5 An optimized configuration logic data flow diagram provided in one embodiment of this application;

[0038] Figure 6 This is a schematic diagram of an algorithm dependency register provided in an embodiment of this application;

[0039] Figure 7 A schematic diagram of the configuration logic scheduling execution process provided in an embodiment of this application;

[0040] Figure 8This is a schematic diagram of the structure of a computer device provided in an embodiment of this application.

[0041] Figure label:

[0042] Terminal 102, Server 104. Detailed Implementation

[0043] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0044] The purpose of this invention is to provide an optimization method for the execution of configuration logic, which overcomes the shortcomings of traditional DCS system configuration logic execution process. It can complete complex configuration logic function calculations within a single cycle, while ensuring the determinism and uniqueness of the calculation process and results, shortening the DCS response time, and improving the algorithm execution efficiency and reliability.

[0045] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0046] The configuration logic execution optimization method provided in this application embodiment can be applied to, for example... Figure 1 In the application environment shown, terminal 102 communicates with server 104 via a network. A data storage system can store the data that server 104 needs to process. The data storage system can be set up independently, integrated into server 104, or placed in the cloud or on other servers. Terminal 102 can send the configuration logic to be processed to server 104. After receiving the configuration logic, server 104 executes the execution optimization method for the configuration logic. Server 104 can feed back the obtained configuration logic execution result to terminal 102. Furthermore, in some embodiments, the configuration logic execution optimization method can also be implemented independently by server 104 or terminal 102. For example, terminal 102 can directly perform configuration logic execution optimization for the configuration logic to be processed, or server 104 can obtain the configuration logic to be processed from the data storage system and perform configuration logic execution optimization for the configuration logic to be processed.

[0047] The terminal 102 can be, but is not limited to, various desktop computers, laptops, smartphones, tablets, IoT devices, and portable wearable devices. IoT devices can include smart speakers, smart TVs, smart air conditioners, and smart in-vehicle devices. Portable wearable devices can include smartwatches, smart bracelets, and head-mounted devices. The server 104 can be implemented using a standalone server or a server cluster composed of multiple servers, or it can be a cloud server.

[0048] In one exemplary embodiment, such as Figure 2 As shown, a method for optimizing the execution of configuration logic is provided. This method is executed by a computer device, specifically by a terminal or server alone, or by both a terminal and a server. In this embodiment, the method is applied to... Figure 1 Taking server 104 as an example, the following steps are included:

[0049] Step S1: Based on the user's current application requirements for the DCS system, configure a configuration logic; the configuration logic includes multiple algorithm blocks and the dependencies between the algorithm blocks, and the dependencies represent the connection relationships between the algorithm blocks.

[0050] As an optional implementation, in step S1, when the configuration logic includes multiple algorithm pages, each algorithm page includes multiple algorithm blocks, and the algorithm pages are connected through input variables and output variables.

[0051] When the configuration logic contains a single algorithm page, the algorithm blocks are connected by connection lines.

[0052] Specifically, configuring a configuration logic, the schematic diagram of which is as follows: Figure 3 As shown, there are a total of 19 algorithm blocks, according to Figure 3 The algorithm blocks are numbered, for example, the name of algorithm block number 0 is Blk0, and so on, with 19 algorithm blocks named Blk0, Blk1, ..., Blk18. Among them, a0, a1, a2, a3, b0, b1, b2, b3, c0, c1, c2, c3 are the inputs of the algorithm blocks, and d0, d1, d2, d3 are the outputs of the algorithm blocks. This configuration logic implements the following operations: d0 = a0a1a2a3 + b0b1b2b3 + c0c1c2c3, d1 = a0a1a2a3, d2 = b0b1b2b3, d3 = c0c1c2c3.

[0053] Determine the dependencies between each algorithm block and the previous algorithm block, such as Figure 4 As shown, M0, M1, M2, M3, and N are algorithm block numbers, and I0, I1, I2, and I3 are algorithm block input pins, as follows: Figure 4The diagram shows that algorithm block N depends on algorithm blocks M0, M1, M2, and M3; combined with... Figure 4 It can be seen that the Blk1 algorithm block depends on Blk0, Blk2 depends on Blk1, and Blk9 depends on Blk5, Blk8, and Blk15. The dependency relationships between the other algorithm blocks can be deduced by analogy.

[0054] Step S2: Based on the dependencies between algorithm blocks, the configuration logic is optimized to obtain multiple optimized configuration logic data streams; each optimized configuration logic data stream can be executed in parallel.

[0055] As an optional implementation method, step S2 specifically includes:

[0056] The algorithm blocks in the configuration logic that have no dependencies on each other are optimized and arranged to obtain an optimized configuration logic data flow graph. The optimized configuration logic data flow graph includes multiple optimized configuration logic data flows. Among them, there are no dependencies between the algorithm blocks in each optimized configuration logic data flow, but there are dependencies between adjacent algorithm blocks within each optimized configuration logic data flow.

[0057] Specifically, the configuration diagrams corresponding to the configuration logic are sorted and optimized according to dependencies. Algorithm relationships that do not have dependencies between them are rearranged and optimized to form four data flow diagrams that can be executed simultaneously, resulting in the following: Figure 5 The optimized configuration logic data flow diagram shown can be reduced based on the complexity of the algorithm configuration. If the data flow already meets the system performance requirements, the number of data flows can be reduced. Thus, it can be seen that before optimization, the algorithm execution order is Blk0, Blk1, ... Blk19. After optimization, the four data flows can theoretically be executed in parallel.

[0058] Step S3: Based on the dependencies between the optimized configuration logic data streams and algorithm blocks, and in accordance with the data stream parallelism principle, construct a configuration logic relationship indicator table that stores multiple algorithm block names; wherein, the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number.

[0059] Specifically, based on Figure 5 The optimized configuration logic data flow diagram and the dependencies between algorithm blocks are shown below, resulting in the following: Figure 5 As shown in the red box diagram, following the column-based storage order, the following configuration logic relationship indicator table is obtained:

[0060] First column: Blk0, Blk3, Blk6, Blk10, Blk13, Blk16.

[0061] Second column: Blk1, Blk4, Blk7, Blk11, Blk14, Blk17.

[0062] Third column: Blk2, Blk5, Blk8, Blk12, Blk15, Blk18.

[0063] Fourth column: Blk9.

[0064] Step S4: Based on the configuration logic relationship indication table, generate an algorithm dependency relationship register corresponding to each algorithm block; each algorithm dependency relationship register stores the dependency relationship between the current algorithm block and the algorithm blocks located before the current algorithm block.

[0065] Specifically, based on the aforementioned logical relationship indicator table, an algorithm dependency register is generated for each algorithm block. A schematic diagram of the algorithm dependency register is shown below. Figure 6 As shown, the algorithm dependency register stores the dependencies between each algorithm block and previous algorithm blocks. Since the algorithm dependency register has a limited width, and the amount of algorithm block numbers is very large, it is impossible to store all algorithm block numbers. Therefore, the storage is divided into coarse storage and fine storage. Coarse storage can only determine dependencies with all preceding algorithm blocks, such as... Figure 6 bit 15 in the middle, fine storage such as Figure 6 Bits 15 through 0 in the algorithm block indicate the dependencies of the first 15 algorithm blocks and which specific algorithm block it depends on. If bit 15 = 1, it means that the algorithm block depends on an algorithm block other than the first 15. In other words, it can only be computed after all the algorithm blocks before the first 15 have been computed. If bit 15 = 0, it means that there is no dependency on the algorithm blocks before the first 15, and only the algorithm blocks before the first 15 need to be considered.

[0066] For example, for Blk9, the value of the algorithm dependency register is 000000000011010, where bit15=0 indicates that it does not depend on the algorithm blocks before the first 15 algorithm blocks; bit1=1 indicates that it depends on the second algorithm block Blk15; bit3=1 indicates that it depends on the fourth algorithm block Blk8; bit4=1 indicates that it depends on the fifth algorithm block Blk5; and so on for the remaining dependencies.

[0067] Step S5: Based on the algorithm dependency relationship in the algorithm dependency relationship register, multiple algorithm executors are called in parallel to execute the configuration logic.

[0068] Assuming the above steps have been completed, according to Figure 7The configuration logic scheduling execution diagram shown is an example of calling two algorithm executors. All input data and algorithm block information are stored in... Figure 7 In the CMemory storage area shown, the logic configuration is executed in the following sequence:

[0069] Step S51: Read BI information (first read the information of Blk0, Blk3, Blk6, and Blk10) and LINK information (interconnection information between algorithm blocks) from the image storage area into the BI buffer (4 groups).

[0070] Step S52: Read the data corresponding to BI from CMemory according to BI information into the input data buffer of CMemory (input data a0, a1, a2, a3, b0, b1, b2, b3, c0, c1, c2, c3 of Blk0, Blk3, Blk6, Blk10).

[0071] In step S53, the four groups of BI are flexibly invoked for calculation based on the idle status of the two algorithm executors. For example, algorithm executor 1 executes Blk0, algorithm executor 1 executes Blk3, and so on. Algorithm blocks with dependencies must wait for the dependent algorithm block to finish executing before they can be executed. Furthermore, the number of algorithm executors can be expanded according to the system capacity and time margin requirements, and can be 4 or 8...

[0072] In step S54, each completed algorithm executor writes the result to the CMemory output buffer (4 groups), for example, writing the results of Blk0, Blk3, Blk6, and Blk10 to the buffer.

[0073] Step S55: Write the CMemory output buffer of each group into the CMemory input data area of ​​the next algorithm block according to the LINK information for calculation. For example, after the calculation result of Blk0 is completed, write it into the input data area of ​​Blk0 that it is connected to.

[0074] Step S56, and so on, until the last algorithm block is completed.

[0075] Step S57: The final execution result is determined. The calculation results are: d0 = a0a1a2a3 + b0b1b2b3 + c0c1c2c3, d1 = a0a1a2a3, d2 = b0b1b2b3, d3 = c0c1c2c3, which are completely consistent with the serial calculation result. If the system supports 4 algorithm executors, the logic configuration time can be shortened to 1 / 4 of the serial execution time.

[0076] The beneficial effects of this application are:

[0077] This application optimizes the configuration logic relationship and judges the algorithm block dependency relationship, thereby calling multiple algorithm executors in parallel for ordered calculation. Under the premise that the configuration of each algorithm is determined, the order and result of the algorithm execution process are also unique and deterministic, which meets the deterministic characteristics of digital instrumentation and control system, greatly improves the execution efficiency, and indirectly increases the algorithm capacity, so that more complex FPGA-based digital instrumentation and control system can be designed.

[0078] Based on the same inventive concept, this application also provides a configuration logic execution optimization system for implementing the configuration logic execution optimization method described above. The solution provided by this system is similar to the implementation scheme described in the above method. Therefore, the specific limitations of one or more configuration logic execution optimization system embodiments provided below can be found in the limitations of the configuration logic execution optimization method described above, and will not be repeated here.

[0079] In one exemplary embodiment, a configuration logic execution optimization system is provided, comprising:

[0080] The configuration logic determination unit is used to configure a configuration logic based on the application requirements of the user's current DCS system; the configuration logic includes multiple algorithm blocks and the dependencies between the algorithm blocks, and the dependencies represent the connection relationships between the algorithm blocks.

[0081] The configuration logic data flow determination unit is used to optimize the configuration logic based on the dependencies between algorithm blocks to obtain multiple optimized configuration logic data flows; each optimized configuration logic data flow can be executed in parallel.

[0082] The configuration logic relationship indicator table determination unit is used to construct a configuration logic relationship indicator table storing multiple algorithm block names based on the dependencies between each optimized configuration logic data flow and algorithm block, and in accordance with the data flow parallelism principle; wherein, the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number.

[0083] The algorithm dependency register generation unit is used to generate an algorithm dependency register corresponding to each algorithm block based on the configuration logic relationship indication table; each algorithm dependency register stores the dependency relationship between the current algorithm block and the algorithm blocks located before the current algorithm block.

[0084] The execution determination unit is used to perform parallel calls on multiple algorithm executors based on the algorithm dependency relationship in the algorithm dependency relationship register in order to execute the configuration logic.

[0085] Optionally, the configuration logic data flow determination unit specifically includes:

[0086] The algorithm blocks in the configuration logic that have no dependencies on each other are optimized and arranged to obtain an optimized configuration logic data flow graph; the optimized configuration logic data flow graph includes multiple optimized configuration logic data flows.

[0087] There are no dependencies between the algorithm blocks in each optimized configuration logic data stream, but there are dependencies between adjacent algorithm blocks within each optimized configuration logic data stream.

[0088] In one exemplary embodiment, a computer device is provided, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement an execution optimization method for configuration logic.

[0089] In one exemplary embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements an execution optimization method for configuration logic.

[0090] In one exemplary embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements an execution optimization method for configuration logic.

[0091] In one exemplary embodiment, a computer device is provided, which may be a server or a terminal, and its internal structure diagram may be as follows. Figure 8 As shown, this computer device includes a processor, memory, input / output (I / O) interfaces, and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and databases. The internal memory provides the environment for the operating system and computer programs stored in the non-volatile storage media. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When the computer program is executed by the processor, it implements a configuration logic execution optimization method.

[0092] Those skilled in the art will understand that Figure 8 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0093] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0094] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM).

[0095] The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0096] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0097] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for optimizing execution of a configuration logic, the method comprising: The execution optimization method of the configuration logic comprises: configuring a configuration logic based on the application requirement of the current DCS system of a user; the configuration logic comprises a plurality of algorithm blocks and a dependency relationship between the algorithm blocks, and the dependency relationship represents a connection relationship between the algorithm blocks; optimizing the configuration logic based on the dependency relationship between the algorithm blocks to obtain a plurality of optimized configuration logic data streams; each optimized configuration logic data stream allows parallel execution; based on each optimized configuration logic data stream and the dependency relationship between the algorithm blocks, constructing a configuration logic relationship indication table storing a plurality of algorithm block names according to a data stream parallel principle; wherein each current algorithm block name corresponds to an algorithm block having a dependency relationship with an algorithm block located before the current algorithm block number; based on the configuration logic relationship indication table, generating an algorithm dependency relationship register corresponding to each algorithm block; each algorithm dependency relationship register stores the dependency relationship between the current algorithm block and the algorithm block located before the current algorithm block; according to the algorithm dependency relationship in the algorithm dependency relationship register, performing parallel calling on a plurality of algorithm executors to execute the configuration logic; optimizing the configuration logic based on the dependency relationship between the algorithm blocks to obtain a plurality of optimized configuration logic data streams, specifically comprising: optimizing and arranging the algorithm blocks in the configuration logic which do not have a dependency relationship between the front and back to obtain an optimized configuration logic data stream graph; the optimized configuration logic data stream graph comprises a plurality of optimized configuration logic data streams; wherein each algorithm block between each optimized configuration logic data stream does not have a dependency relationship, and adjacent algorithm blocks within each optimized configuration logic data stream have a dependency relationship.

2. The method of claim 1, wherein: when the configuration logic comprises a plurality of algorithm pages, each algorithm page comprises a plurality of algorithm blocks, and each algorithm page is connected through input variables and output variables; when the configuration logic comprises a single algorithm page, each algorithm block is connected through a connection line.

3. A system for optimizing the execution of configuration logic, the system comprising: The execution optimization system of the configuration logic is used to implement the execution optimization method of the configuration logic according to any one of claims 1-2, and the execution optimization system of the configuration logic comprises: a configuration logic determination unit configured to configure a configuration logic based on the application requirement of the current DCS system of a user; the configuration logic comprises a plurality of algorithm blocks and a dependency relationship between the algorithm blocks, and the dependency relationship represents a connection relationship between the algorithm blocks; a configuration logic data stream determination unit configured to optimize the configuration logic based on the dependency relationship between the algorithm blocks to obtain a plurality of optimized configuration logic data streams; each optimized configuration logic data stream allows parallel execution; a configuration logic relationship indication table determination unit configured to construct a configuration logic relationship indication table storing a plurality of algorithm block names based on each optimized configuration logic data stream and the dependency relationship between the algorithm blocks according to a data stream parallel principle; wherein each current algorithm block name corresponds to an algorithm block having a dependency relationship with an algorithm block located before the current algorithm block number; An algorithm dependency relationship register generation unit is configured to generate an algorithm dependency relationship register corresponding to each algorithm block based on the configuration logic relationship indication table; each algorithm dependency relationship register stores a dependency relationship between a current algorithm block and an algorithm block located before the current algorithm block; An execution determination unit is configured to perform parallel calling on a plurality of algorithm executors according to the algorithm dependency relationship in the algorithm dependency relationship register, so as to execute the configuration logic; The configuration logic data flow determination unit specifically includes: The algorithm blocks in the configuration logic that do not have a dependency relationship between front and back are arranged optimally, so as to obtain an optimized configuration logic data flow graph; the optimized configuration logic data flow graph includes a plurality of optimized configuration logic data flows. Each algorithm block between each optimized configuration logic data flow does not have a dependency relationship, and adjacent algorithm blocks within each optimized configuration logic data flow have a dependency relationship.

4. A computer device comprising: A memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that the processor executes the computer program to implement the execution optimization method of the configuration logic according to any one of claims 1-2.

5. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the execution optimization method of the configuration logic according to any one of claims 1-2.

6. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the execution optimization method of the configuration logic according to any one of claims 1-2.

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