Film cavity acoustic wave resonator with porous structure on back of substrate and preparation method of film cavity acoustic wave resonator

Abstract

The invention relates to a substrate back porous structure film cavity acoustic resonator and a preparation method thereof, the acoustic resonator comprises a substrate, a back porous structure, a bottom electrode layer, a piezoelectric layer, a top electrode, a passivation layer, a first pin layer and a second pin layer, the substrate is provided with a sacrificial groove extending from the upper surface to the interior; the back porous structure extends into the sacrificial groove from the lower surface of the substrate; the bottom electrode layer is located on part of the upper surface of the substrate; the top of the sacrificial groove is covered by the bottom electrode layer to form a cavity; the piezoelectric layer is located on the upper surface of the bottom electrode layer and the upper surface of the substrate; a pin groove is formed in one end, positioned on the bottom electrode layer, of the piezoelectric layer; and the top electrode extends to one side, close to the sacrificial groove, of the pin groove from one end, located on the substrate, of the piezoelectric layer. The back porous structure of the acoustic resonator is manufactured on the back of the substrate, the sacrificial layer in the sacrificial groove can be corroded through the back porous structure to form the cavity, the substrate is prevented from being completely etched, and the structural strength of the device is maintained.

Description

Technical Field

[0001] The invention belongs to the technical field of thin film cavity acoustic wave resonators, and in particular relates to a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate and a preparation method thereof. Background Art

[0002] The core of the film cavity acoustic resonator (FBAR) is a sandwich structure of the upper electrode layer / piezoelectric layer / lower electrode layer. Under the action of the RF bias voltage applied to the top electrode and the bottom electrode, the piezoelectric film excites the body acoustic wave. Since the acoustic impedance of the air is much smaller than that of the piezoelectric material and the electrode material, the sound wave will reflect back and forth between the upper and lower air interfaces, forming a standing wave oscillation. Under the action of mechanical vibration, the piezoelectric film produces a piezoelectric effect, completing the conversion of the acoustic wave signal to the electrical signal. Therefore, the quality of the piezoelectric layer and the metal layer is particularly important. In order to obtain a high-performance FBAR, it is necessary to limit the acoustic wave generated by the electrical excitation to the piezoelectric oscillation stack composed of the upper electrode / piezoelectric film / lower electrode as much as possible to prevent the energy of the acoustic wave from leaking into the substrate material.

[0003] According to the wave transmission line theory, only when the acoustic load on the upper and lower surfaces of the resonator is zero or infinite, can the sound wave be fully reflected at the interface, thereby confining the sound wave in the piezoelectric oscillator stack of the sandwich structure. Among various acoustic materials, air is an ideal choice for acoustic interface because its acoustic impedance is approximately zero, which can maximize the reflection of the incident wave from the upper acoustic layer. The current mainstream FBAR structures are of two types: back-etched type and surface air gap type.

[0004] However, the back-etched FBAR forms a cavity by etching the back of the substrate. However, since the thickness of the silicon substrate is usually thick (up to several hundred microns), a deep silicon etching process is required. The deep silicon etching process takes a long time and there is a problem of etching rate consistency. It is difficult to stop the etching interface at the lower surface of the piezoelectric oscillator stack, resulting in low device yield and high cost. In addition, the substrate area is completely etched away, causing the piezoelectric oscillator stack to lose large-area support, greatly reducing the structural strength and being unfavorable for integration. The surface air gap type FBAR usually requires release holes to be made on the electrode layer and the piezoelectric layer. Making the release holes will cause the electrode layer and the piezoelectric layer around the release holes to suffer structural damage. At the same time, the corrosive liquid or gas enters the sacrificial layer through the release holes. In addition to contacting the sacrificial layer, the corrosive liquid or gas also contacts the piezoelectric layer and the metal layer, which will destroy the stress consistency of the piezoelectric layer and the metal layer, resulting in breakage, curling, and collapse, which weakens the resonator performance. Summary of the invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate and a preparation method thereof. The technical problem to be solved by the present invention is achieved by the following technical solutions:

[0006] The first aspect of the present invention provides a thin film cavity acoustic wave resonator with a substrate back porous structure, comprising: a substrate, a back porous structure, a bottom electrode layer, a piezoelectric layer, a top electrode, a passivation layer, a first pin layer and a second pin layer, wherein:

[0007] The substrate has a sacrificial groove extending from the upper surface to the interior;

[0008] The back porous structure extends from the lower surface of the substrate into the sacrificial groove;

[0009] The bottom electrode layer is located on a portion of the upper surface of the substrate; the top of the sacrificial groove is covered by the bottom electrode layer to form a cavity;

[0010] The piezoelectric layer is located on the upper surface of the bottom electrode layer and the upper surface of the substrate; a pin groove penetrating the piezoelectric layer is provided on one end of the piezoelectric layer located on the bottom electrode layer;

[0011] The top electrode extends from one end of the piezoelectric layer located on the substrate to a side of the pin groove close to the sacrificial groove;

[0012] The passivation layer covers the surfaces of the pin groove, the piezoelectric layer and the top electrode;

[0013] The first pin layer is located in the pin groove and contacts the bottom electrode layer;

[0014] The second pin layer is located at one end of the passivation layer close to the top electrode and is in contact with the top electrode.

[0015] In one achievable manner, the back porous structure includes a plurality of back through holes;

[0016] The plurality of back through holes are connected from the lower surface of the substrate to the sacrificial groove.

[0017] In one achievable manner, the substrate is made of silicon and has a thickness of 50 to 100 micrometers.

[0018] In one achievable manner, the materials of the bottom electrode layer and the top electrode both include: one or more of Ti, Al, Ni, Au, Pt, and Mo.

[0019] In an achievable manner, the material of the piezoelectric layer includes: one or more of AlN, AlScN and PZT, with a thickness of 0.05 to 3 microns;

[0020] The material of the passivation layer includes: Al 2 O 3 、 2 O5 、TiO 2 、SiO 2 One or more of the above, with a thickness of 10 to 300 nm.

[0021] A second aspect of the present invention provides a method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate, comprising the following steps:

[0022] S1: etching the upper surface of the substrate to form a sacrificial groove extending from the upper surface of the substrate to the interior of the substrate;

[0023] S2: preparing a sacrificial layer in the sacrificial groove;

[0024] S3: etching the lower surface of the substrate to form a back porous structure extending from the lower surface of the substrate to the bottom of the sacrificial groove;

[0025] S4: preparing a bottom electrode layer on a portion of the upper surface of the substrate and on an upper surface of the sacrificial layer;

[0026] S5: preparing a piezoelectric layer on the upper surface of the bottom electrode layer and the upper surface of the substrate;

[0027] S6: etching one end of the piezoelectric layer located on the bottom electrode layer to form a pin groove penetrating the piezoelectric layer;

[0028] S7: preparing a top electrode on the upper surface of the piezoelectric layer, the top electrode extending from one end of the piezoelectric layer located on the substrate to a side of the pin groove close to the sacrificial groove;

[0029] S8: preparing a passivation layer on the surfaces of the pin groove, the piezoelectric layer and the top electrode;

[0030] S9: preparing a first pin layer in contact with the bottom electrode layer in the pin groove, and preparing a second pin layer in contact with the top electrode at one end of the passivation layer close to the top electrode;

[0031] S10: introducing an etching medium into the back porous structure to remove the sacrificial layer and form a cavity.

[0032] In one achievable manner, the material of the sacrificial layer includes silicon oxide or silicon nitride.

[0033] In one achievable manner, the etching medium comprises HF, N 2 and H 2 One or more of .

[0034] In one achievable approach, the specific operations of S3 include:

[0035] A back porous pattern window is formed on the lower surface of the substrate, and the substrate is etched by a deep silicon etcher using a mixed gas medium to form a back porous structure extending from the lower surface of the substrate to the bottom of the sacrificial groove.

[0036] In one achievable manner, the mixed gas medium comprises: C 4 F 8 CF 4 , SF 6 , O 2 and Ar.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] The present invention provides a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate. The back porous structure of the structure is made on the back of the substrate. The sacrificial layer in the sacrificial groove can be corroded by the back porous structure to form a cavity, thereby avoiding complete etching of the substrate, maintaining the structural strength of the device, being beneficial to device integration, and effectively improving the device yield. It avoids the structural damage of the electrode layer and the piezoelectric layer caused by the production of release holes in the prior art, thereby avoiding the weakening of the resonator performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It is a schematic structural diagram of a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate provided by an embodiment of the present invention;

[0040] Figure 2a to Figure 2l It is a schematic diagram of the steps of a method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate provided by an embodiment of the present invention;

[0041] Figure 3 It is a flow chart of the steps of a method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate provided by an embodiment of the present invention.

[0042] Reference numerals:

[0043] 1: substrate; 11: sacrificial groove; 12: sacrificial layer; 2: back porous structure; 3: bottom electrode layer; 4: piezoelectric layer; 5: top electrode; 6: passivation layer; 7: first pin layer; 8: second pin layer. DETAILED DESCRIPTION

[0044] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0045] Embodiment 1

[0046] See also Figure 1 , Figure 1It is a schematic structural diagram of a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate provided by an embodiment of the present invention.

[0047] The present embodiment provides a thin film cavity acoustic wave resonator with a substrate back porous structure, comprising: a substrate 1, a back porous structure 2, a bottom electrode layer 3, a piezoelectric layer 4, a top electrode 5, a passivation layer 6, a first pin layer 7 and a second pin layer 8. The substrate 1 has a sacrificial groove 11 extending from the upper surface to the inside. The back porous structure 2 extends from the lower surface of the substrate 1 to the sacrificial groove 11. The bottom electrode layer 3 is located on a portion of the upper surface of the substrate 1. The top of the sacrificial groove 11 is covered by the bottom electrode layer 3 to form a cavity. The piezoelectric layer 4 is located on the upper surface of the bottom electrode layer 3 and the upper surface of the substrate 1. A pin groove penetrating the piezoelectric layer 4 is provided on one end of the piezoelectric layer 4 located on the bottom electrode layer 3. The top electrode 5 extends from one end of the piezoelectric layer 4 located on the substrate 1 to the side of the pin groove close to the sacrificial groove 11. The passivation layer 6 covers the surface of the pin groove, the piezoelectric layer 4 and the top electrode 5. The first pin layer 7 is located in the pin groove and contacts the bottom electrode layer 3. The second pin layer 8 is located at one end of the passivation layer 6 close to the top electrode 5 and is in contact with the top electrode 5 .

[0048] In this embodiment, the back porous structure 2 includes a plurality of back through holes. The plurality of back through holes are connected from the lower surface of the substrate 1 to the sacrificial groove 11. The material of the substrate 1 is silicon, and the thickness is 50 to 100 microns. The materials of the bottom electrode layer 3 and the top electrode 5 include: one or more of Ti, Al, Ni, Au, Pt, and Mo. The material of the piezoelectric layer 4 includes: one or more of AlN, AlScN, and PZT, and the thickness is 0.05 to 3 microns. The material of the passivation layer 6 includes: Al 2 O 3 、 2 O 5 、TiO 2 、SiO 2 The first pin layer 7 and the second pin layer 8 are made of one or more of Ti, Al, Ni, Au, Pt, and Mo, with a thickness of 10 to 300 nm.

[0049] In an achievable manner, the plurality of back through holes in the back porous structure 2 are evenly distributed in the substrate 1. The number of the back through holes is 4 to 12, and the diameter of the back through holes is 10 to 50 μm.

[0050] See also Figure 2a to Figure 2l and Figure 3 , Figure 2a to Figure 2l 1 is a schematic diagram of the steps of a method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate provided by an embodiment of the present invention. Figure 3It is a flow chart of the steps of a method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate provided by an embodiment of the present invention.

[0051] This embodiment also provides a method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate, comprising the following steps:

[0052] S1: etching is performed on the upper surface of the substrate 1 to form a sacrificial groove 11 extending from the upper surface of the substrate 1 to the interior of the substrate 1 .

[0053] Specifically, Figure 2a As shown, a silicon substrate 1 is taken, ultrasonically cleaned with acetone, ethanol and water for 5 minutes respectively, and blown dry for use. A thin layer of hexamethyldisilazane (HDM) adhesive is evenly sprayed on the upper surface of the substrate 1, and a layer of photoresist with a thickness of 1 to 3 microns is evenly applied using a glue spreader, and then placed on a heat spreader, pre-baked at 80 to 110° C. for 80 to 110 seconds, exposed under a mask with a sacrificial groove pattern for 2 to 3 seconds, the exposed wafer is placed in a developer for 30 to 40 seconds, and then placed on a heat spreader for hardening at 80 to 110° C. for 80 to 110 seconds, and the hardened wafer is placed in an ICP (inductively coupled plasma etching) machine, and mixed gas is used for etching, and the etching depth is 0.5 to 1 micron. The etched wafer is placed in acetone, ethanol and water to clean off the residual photoresist, and a substrate 1 with a sacrificial groove 11 is obtained.

[0054] S2 : preparing a sacrificial layer 12 in the sacrificial groove 11 .

[0055] Specifically, Figure 2b As shown, the sample obtained in S1 is placed in PECVD to grow a 3 to 10 micron thick silicon oxide or silicon nitride film as a whole to form a sacrificial layer 12.

[0056] S3 : etching is performed on the lower surface of the substrate 1 to form a back porous structure 2 extending from the lower surface of the substrate 1 to the bottom of the sacrificial groove 11 .

[0057] In this embodiment, the specific operation of S3 includes:

[0058] A back porous pattern window is formed on the lower surface of the substrate 1, and the substrate 1 is etched by a deep silicon etcher using a mixed gas medium to form a back porous structure 2 extending from the lower surface of the substrate 1 to the bottom of the sacrificial groove 11. The mixed gas medium includes: C 4 F 8 CF 4 , SF 6 , O 2 and Ar.

[0059] Specifically, Figure 2cAs shown, a thin layer of HDMS is uniformly sprayed on the lower surface of the substrate 1, and a layer of photoresist with a thickness of 100 to 200 microns is uniformly applied using a glue spreader, and then the substrate is placed on a heat spreader for pre-baking at a temperature of 80 to 110° C. for 80 to 110 seconds, and exposed under a mask with a bottom through-hole pattern for 2 to 10 seconds. The exposed wafer is placed in a developer for development for 30 to 90 seconds, and then placed on a heat spreader for hardening at a temperature of 80 to 110° C. for 80 to 300 seconds. The hardened wafer is placed in a deep silicon etcher and etched using a mixed gas medium with an etching depth of 50 to 100 microns. The etched wafer is placed in acetone, ethanol, and water to clean off the residual photoresist, thereby obtaining a back porous structure 2 extending from the lower surface of the substrate 1 to the bottom of the sacrificial groove 11 (sacrificial layer 12).

[0060] S4: preparing a bottom electrode layer 3 on a portion of the upper surface of the substrate 1 and the upper surface of the sacrificial layer 12 .

[0061] Specifically, Figure 2d As shown, the sample obtained in S3 is placed with the front side facing upwards and put into a chemical mechanical polisher for polishing, thinning by 3 to 10 microns to remove the sacrificial layer 12 on the substrate 1. Figure 2e As shown, a thin layer of HDMS is sprayed evenly on the front side of the polished sample facing upward, and a layer of photoresist is evenly applied using a glue spreader, and then the sample is placed on a heat spreader for pre-baking at a temperature of 80 to 110° C. for 80 to 110 seconds, and exposed under a mask with a bottom electrode pattern for 2 to 3 seconds, and the exposed wafer is placed in a developer for development for 30 to 40 seconds, and then placed on a heat spreader for hardening at a temperature of 80 to 110° C. for 80 to 110 seconds, and the hardened wafer is placed in a magnetron sputtering coating machine to deposit 10 nanometers to 1 micron of bottom electrode metal, and then placed in a degumming solution to remove the photoresist and excess metal, and a bottom electrode layer 3 is obtained. In this embodiment, the bottom electrode metal includes one or more of Ti, Al, Ni, Au, Pt, and Mo, and the degumming solution includes one or more of acetone, isopropyl alcohol, and NMP.

[0062] S5: preparing a piezoelectric layer 4 on the upper surface of the bottom electrode layer 3 and the upper surface of the substrate 1 .

[0063] Specifically, Figure 2f As shown, the sample obtained in S4 is placed in a magnetron sputtering coating machine to deposit a 0.05-3 micron piezoelectric layer 4. In this embodiment, the material of the piezoelectric layer 4 includes: one or more of AlN, AlScN, and PZT.

[0064] S6: etching is performed at one end of the piezoelectric layer 4 located on the bottom electrode layer 3 to form a pin groove penetrating the piezoelectric layer 4 .

[0065] Specifically, Figure 2gAs shown, a thin layer of HDMS is uniformly sprayed on the front of the sample obtained in S5, and a layer of photoresist is uniformly applied using a coating machine, and then the sample is placed on a heat spreader for hardening at 80 to 110°C for 80 to 110 seconds, and then exposed under a mask with a pin groove pattern for 2 to 3 seconds. The exposed wafer is placed in a developer for 30 to 40 seconds, and then placed on a heat spreader for hardening at 80 to 110°C for 80 to 110 seconds. The hardened wafer is placed in an inductively coupled plasma etcher, and a mixed gas is introduced for etching. After a certain period of time, the wafer is taken out, and the etched wafer is placed in acetone, ethanol, and water to clean the residual photoresist to form a pin groove. In this embodiment, the mixed gas includes: Ar, O 2 , CHF 3 , C 4 F 8 CF 4 , SF 6 and BCl 3 One or more of .

[0066] S7: preparing a top electrode 5 on the upper surface of the piezoelectric layer 4 , which extends from one end of the piezoelectric layer 4 on the substrate 1 to a side of the pin groove close to the sacrificial groove 11 .

[0067] Specifically, Figure 2h As shown, a thin layer of HDMS is uniformly sprayed on the front of the sample obtained in S6, and a layer of photoresist is uniformly applied using a glue spreader, and then the sample is placed on a heat spreader for pre-baking at a temperature of 80 to 110° C. for 80 to 110 seconds, and exposed under a mask with a top electrode pattern for 2 to 3 seconds, and the exposed wafer is placed in a developer for development for 30 to 40 seconds, and then placed on a heat spreader for hardening at a temperature of 80 to 110° C. for 80 to 110 seconds, and the hardened wafer is placed in a magnetron sputtering coating machine to deposit 10 nanometers to 1 micron of top electrode metal, and then placed in a degumming solution to remove the photoresist and excess metal, thereby obtaining a top electrode 5 located on the upper surface of the piezoelectric layer 4 away from the bottom electrode layer 3. In this embodiment, the top electrode metal is one or more of Ti, Al, Ni, Au, Pt, and Mo, and the degumming solution is one of acetone, isopropanol, and NMP.

[0068] S8: preparing a passivation layer 6 on the surfaces of the pin groove, the piezoelectric layer 4 and the top electrode 5 .

[0069] Specifically, Figure 2i As shown, the sample obtained in S7 is placed in an atomic layer deposition system with the front side of the wafer facing upward to grow a passivation layer with a thickness of 10 to 300 nm. In this embodiment, the material of the passivation layer 6 includes: Al 2 O 3 、 2 O 5 、TiO 2 、SiO2 One or more of

[0070] S9: preparing a first pin layer 7 in contact with the bottom electrode layer 3 in the pin groove, and preparing a second pin layer 8 in contact with the top electrode 5 at one end of the passivation layer 6 close to the top electrode 5 .

[0071] Specifically, Figure 2j As shown, a thin layer of HDMS is uniformly sprayed on the front of the sample obtained in S8, and a layer of photoresist is uniformly applied using a glue spreader, and then the sample is placed on a heat spreader for pre-baking at 80 to 110°C for 80 to 110 seconds, and exposed under a mask with a through-hole pattern for 2 to 3 seconds. The exposed film is placed in a developer for 30 to 40 seconds, and then placed on a heat spreader for pre-baking at 80 to 110°C for 80 to 110 seconds. The film after hardening is placed in an inductively coupled plasma etcher, and a mixed gas is introduced for etching. After a certain period of time, the film is taken out, and the etched film is placed in acetone, ethanol, and water to clean the residual photoresist, forming a pin through hole located in the pin groove and on one end of the passivation layer 6 close to the top electrode 5, and the pin through hole penetrates the passivation layer 6. In this embodiment, the mixed gas includes: Ar, O 2 , CHF 3 , C 4 F 8 CF 4 , SF 6 and BCl 3 One or more of the following. Figure 2k As shown, a thin layer of HDMS is evenly sprayed on the front of the sample with a pin through hole, and a layer of photoresist is evenly applied using a glue spreader, and the sample is placed on a heat spreader and pre-baked at 80-110°C for 80-110 seconds, exposed for 2-3 seconds under a mask with a pin layer (PAD) pattern, and the exposed wafer is placed in a developer for development for 30-40 seconds, placed on a heat spreader and pre-baked at 80-110°C for 80-110 seconds, and the hardened wafer is placed in a magnetron sputtering coating machine, 10 nanometers to 1 micron of pin metal is deposited at the pin through hole, and then placed in a glue remover to remove the photoresist and excess metal, thereby obtaining a first pin layer 7 located in the pin groove and a second pin layer 8 located at one end of the passivation layer 6 close to the top electrode 5, the bottom of the first pin layer 7 is in contact with the bottom electrode layer 3, and the bottom of the second pin layer 8 is in contact with the top electrode 5.

[0072] S10: introducing an etching medium into the back porous structure 2 to remove the sacrificial layer 12 and form a cavity.

[0073] Specifically, Figure 2lAs shown, the sample obtained in S9 is placed with the back side facing upwards in a HF vapor etcher, and an etching medium is introduced into the back porous structure 2. After the sacrificial layer 12 is completely etched, a cavity is formed. In this embodiment, the etching medium includes HF, N 2 and H 2 One or more of .

[0074] This embodiment proposes a thin film cavity acoustic wave resonator with a porous structure on the back of the substrate. The cavity release hole (the back porous structure 2) of this structure is made on the back of the substrate. The sacrificial layer 12 in the sacrificial groove 11 is corroded by the back porous structure 2 to form a cavity. This structure avoids completely etching the substrate, maintains the structural strength of the device, and is conducive to integration. In addition, the back porous structure 2 only extends to the lower surface of the sacrificial layer 12 and does not contact other important functional layer membranes, which effectively improves the yield of the device. This structure does not need to make release holes on the piezoelectric layer and the metal layer, avoiding the damage to the electrode layer and the piezoelectric layer structure caused by making the release holes, thereby avoiding the weakening of the resonator performance. In addition, this embodiment effectively avoids direct contact between the corrosive liquid or corrosive gas and the piezoelectric layer 4 and the top electrode 5 by adding a passivation layer 6 above the device, thereby avoiding damage to the device structure. The thin film cavity acoustic wave resonator with a porous structure on the back of the substrate provided in this embodiment has the process and material basis for realizing monolithic integration with the radio frequency chip, is compatible with the traditional CMOS process, can play a huge role in the field of wireless communication radio frequency, and its high sensitivity advantage also meets the application in the field of sensing.

[0075] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A thin film cavity acoustic wave resonator with a porous structure on the back of a substrate, characterized in that: include: A substrate (1), a back porous structure (2), a bottom electrode layer (3), a piezoelectric layer (4), a top electrode (5), a passivation layer (6), a first pin layer (7) and a second pin layer (8), wherein: The substrate (1) has a sacrificial groove (11) extending from the upper surface to the inside; The back porous structure (2) extends from the lower surface of the substrate (1) to the sacrificial groove (11); The bottom electrode layer (3) is located on a portion of the upper surface of the substrate (1); the top of the sacrificial groove (11) is covered by the bottom electrode layer (3) to form a cavity; The piezoelectric layer (4) is located on the upper surface of the bottom electrode layer (3) and the upper surface of the substrate (1); a pin groove penetrating the piezoelectric layer (4) is provided on one end of the piezoelectric layer (4) located on the bottom electrode layer (3); The top electrode (5) extends from one end of the piezoelectric layer (4) located on the substrate (1) to a side of the pin slot close to the sacrificial groove (11); Located on the upper surface of one end of the piezoelectric layer (4) away from the bottom electrode layer (3); The passivation layer (6) covers the surfaces of the pin groove, the piezoelectric layer (4) and the top electrode (5); The first pin layer (7) is located in the pin groove and is in contact with the bottom electrode layer (3); The second pin layer (8) is located at one end of the passivation layer (6) close to the top electrode (5), and is in contact with the top electrode (5).

2. The thin film cavity acoustic wave resonator with a porous structure on the back of the substrate according to claim 1, characterized in that: The back porous structure (2) comprises a plurality of back through holes; The plurality of back through holes are connected from the lower surface of the substrate (1) to the sacrificial groove (11).

3. The thin film cavity acoustic wave resonator with a porous structure on the back of the substrate according to claim 1, characterized in that: The substrate (1) is made of silicon and has a thickness of 50 to 100 micrometers.

4. The thin film cavity acoustic wave resonator with a porous structure on the back of the substrate according to claim 1, characterized in that: The materials of the bottom electrode layer (3) and the top electrode (5) include one or more of Ti, Al, Ni, Au, Pt, and Mo.

5. The thin film cavity acoustic wave resonator with a porous structure on the back of the substrate according to claim 1, characterized in that: The material of the piezoelectric layer (4) includes: one or more of AlN, AlScN and PZT, with a thickness of 0.05 to 3 microns; The material of the passivation layer (6) includes one or more of Al2O3, Ta2O5, TiO2, and SiO2, and the thickness is 10 to 300 nm.

6. A method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate, characterized in that: The following steps are involved: S1: etching the upper surface of the substrate (1) to form a sacrificial groove (11) extending from the upper surface of the substrate (1) to the interior of the substrate (1); S2: preparing a sacrificial layer (12) in the sacrificial groove (11); S3: etching the lower surface of the substrate (1) to form a back porous structure (2) extending from the lower surface of the substrate (1) to the bottom of the sacrificial groove (11); S4: preparing a bottom electrode layer (3) on a portion of the upper surface of the substrate (1) and the upper surface of the sacrificial layer (12); S5: preparing a piezoelectric layer (4) on the upper surface of the bottom electrode layer (3) and the upper surface of the substrate (1); S6: etching at one end of the piezoelectric layer (4) located on the bottom electrode layer (3) to form a pin groove penetrating the piezoelectric layer (4); S7: preparing a top electrode (5) on the upper surface of the piezoelectric layer (4), the top electrode (5) extending from one end of the piezoelectric layer (4) located on the substrate (1) to a side of the pin slot close to the sacrificial groove (11); S8: preparing a passivation layer (6) on the surfaces of the pin groove, the piezoelectric layer (4) and the top electrode (5); S9: preparing a first pin layer (7) in contact with the bottom electrode layer (3) in the pin groove, and preparing a second pin layer (8) in contact with the top electrode (5) at one end of the passivation layer (6) close to the top electrode (5); S10: introducing an etching medium into the back porous structure (2) to remove the sacrificial layer (12) and form a cavity.

7. The method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate according to claim 6, characterized in that: The material of the sacrificial layer (12) includes silicon oxide or silicon nitride.

8. The method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate according to claim 6, characterized in that: The etching medium includes one or more of HF, N2 and H2.

9. The method for preparing a thin film cavity acoustic wave resonator with a porous structure on the back of a substrate according to claim 6, characterized in that: The specific operations of S3 include: A back porous pattern window is formed on the lower surface of the substrate (1), and the substrate (1) is etched by a deep silicon etcher using a mixed gas medium to form a back porous structure (2) extending from the lower surface of the substrate (1) to the bottom of the sacrificial groove (11).

10. The thin film cavity with a porous structure on the back of the substrate according to claim 9 A method for preparing an acoustic wave resonator, characterized in that: The mixed gas medium includes one or more of C4F8, CF4, SF6, O2 and Ar.

Images