Reset circuit, reset method and control system

Abstract

The invention discloses a reset circuit, a reset method and a control system. The reset circuit comprises a voltage comparison module, a switch module and an oscillation module, the voltage comparison module is used for receiving a control signal of the control module and judging whether the control module is abnormal or not according to the voltage of the first capacitor; the control signal is used for adjusting the charging process of the first capacitor when the control module is normal; the switch module is used for determining whether the oscillation module works or not according to the abnormal judgment result; the oscillation module is used for outputting a reset signal with a first duty ratio; the reset signal is used for resetting the system or the control module. According to the invention, system reset is realized through circuit design, the reset accuracy is improved, and the cost is reduced. The circuit can be widely applied to the technical field of circuit control.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit control, and in particular to a reset circuit, a reset method and a control system. Background Art

[0002] In the application design of control chips, a watchdog is added to prevent abnormal software operation or system jamming. After the watchdog design is added, the watchdog is reset regularly, commonly known as: feeding the dog.

[0003] In the related technology, there are independent watchdog and window watchdog designs to prevent the MCU from being stuck. However, in some special scenarios, there are errors in the software, which causes the control system kernel to report loss, and the watchdog will also fail, causing the entire control system to freeze. Adding an external independent watchdog will increase costs. Summary of the invention

[0004] The purpose of the present invention is to solve one of the technical problems existing in the prior art to at least a certain extent.

[0005] To this end, an object of the present invention is to provide a safe and convenient reset circuit, reset method and control system.

[0006] In order to achieve the above technical objectives, the technical solutions adopted by the embodiments of the present invention include the following aspects:

[0007] On the one hand, an embodiment of the present invention provides a reset circuit, including: a voltage comparison module, a switch module and an oscillation module; the voltage comparison module is used to receive a control signal from a control module, and judge whether the control module is abnormal according to the voltage of a first capacitor; the control signal is used to adjust the charging process of the first capacitor when the control module is normal; the switch module is used to determine whether the oscillation module is working according to the abnormal judgment result; the oscillation module is used to output a reset signal of a first duty cycle; the reset signal is used to reset the system or the control module. The embodiment of the present application judges whether the control module is abnormal through a voltage comparison module, determines whether to turn on the oscillation module through a switch module, and resets the control model through a reset signal output by the oscillation module. The present application realizes system reset through circuit design, which is conducive to improving reset accuracy and reducing costs.

[0008] In addition, the reset circuit according to the above embodiment of the present invention may also have the following additional technical features:

[0009] Furthermore, in the reset circuit of the embodiment of the present invention, the voltage comparison module includes: a first resistor, the first capacitor and a voltage comparator;

[0010] The voltage comparator includes a first operational amplifier, a second operational amplifier, a first diode and a second diode;

[0011] The first end of the first resistor is a receiving end of the control signal, the second end of the first resistor is grounded through the first capacitor, the second end of the first resistor is also connected to the inverting input end of the first operational amplifier and the non-inverting input end of the second operational amplifier, the power supply is connected to the non-inverting input end of the first operational amplifier through the second resistor, the non-inverting input end of the first operational amplifier is connected to the inverting input end of the second operational amplifier through the third resistor, and the inverting input end of the second operational amplifier is grounded through the fourth resistor;

[0012] The power supply is connected to the output end of the first operational amplifier through the first diode, and the power supply is connected to the output end of the second operational amplifier through the second diode; the forward end of the first diode or the second diode is the output end of the voltage comparison module.

[0013] Furthermore, in one embodiment of the present invention, the switch module includes: a transistor, the output end of the voltage comparison module is connected to the base of the transistor, the collector of the transistor is the output end of the switch module, and the emitter of the transistor is grounded.

[0014] Further, in one embodiment of the present invention, the oscillation module includes: a third operational amplifier, a fifth resistor, a sixth resistor, a third diode and a fourth diode;

[0015] The output end of the switch module is connected to the inverting input end of the third operational amplifier, the non-inverting input end of the third operational amplifier is grounded, and the output end of the third operational amplifier is used to output the reset signal;

[0016] The inverting input terminal of the third operational amplifier is connected to the output terminal of the third operational amplifier through the sixth resistor and the fourth diode, and the output terminal of the third operational amplifier is connected to the inverting input terminal of the third operational amplifier through the third diode and the fifth resistor.

[0017] Further, in one embodiment of the present invention, the second resistor is 1.15 kilo-ohms, the third resistor is 2.55 kilo-ohms, and the fourth resistor is 1 kilo-ohm.

[0018] On the other hand, an embodiment of the present invention provides a reset method, which is applied to the above reset circuit, and the method includes:

[0019] receiving a control signal from a control module, and judging whether the control module is abnormal according to the voltage of the first capacitor; the control signal is used to adjust the charging process of the first capacitor when the control module is normal;

[0020] According to the abnormal judgment result, determine whether the oscillation module is working;

[0021] Output a reset signal with a first duty cycle through the oscillation module; the reset signal is used to reset the system or the control module.

[0022] Further, in the reset method according to an embodiment of the present invention, determining whether the control module is abnormal according to the voltage of the first capacitor includes:

[0023] If the voltage is within a preset voltage range, determine that the control module is abnormal;

[0024] If the control module is abnormal, change the output state of the voltage comparison module.

[0025] Further, in the reset method according to an embodiment of the present invention, the voltage comparison module includes a first resistor, and the method further includes:

[0026] Adjust the second duty cycle of the control signal to adjust the charging process;

[0027] Alternatively, adjust the resistance value of the first resistor to adjust the charge and discharge speed.

[0028] Further, in the reset method according to an embodiment of the present invention, the oscillation module includes a fifth resistor and a sixth resistor, and the first duty cycle is determined through the following steps:

[0029] Adjust the first duty cycle by changing the resistance values of the fifth resistor and the sixth resistor.

[0030] On the other hand, an embodiment of the present invention provides a control system including the above-mentioned reset circuit.

[0031] The reset circuit provided by the embodiment of the present invention includes: a voltage comparison module, a switch module, and an oscillation module; the voltage comparison module is used to receive a control signal of the control module and determine whether the control module is abnormal according to the voltage of the first capacitor; the control signal is used to adjust the charging process of the first capacitor when the control module is normal; the switch module is used to determine whether the oscillation module works according to the abnormal judgment result; the oscillation module is used to output a reset signal with a first duty cycle; the reset signal is used to reset the system or the control module. In the embodiment of the present application, it is judged whether the control module is abnormal through the voltage comparison module, it is determined whether to turn on the oscillation module through the switch module, and the control model is reset through the reset signal output by the oscillation module. The present application realizes system reset through circuit design, which is beneficial to improving the reset accuracy and reducing costs. Description of the Drawings

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the embodiments of the present invention or the drawings of related technical solutions in the prior art are introduced below. It should be understood that the drawings introduced below are only for the convenience of clearly describing some embodiments of the technical solutions of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0033] Figure 1 An electrical schematic diagram of an embodiment of a reset circuit provided by the present invention;

[0034] Figure 2 A signal schematic diagram of the duty cycle of the control signal provided by the present invention;

[0035] Figure 3 A schematic structural diagram of an embodiment of an electronic device provided by the present invention. DETAILED DESCRIPTION

[0036] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limitations of the present invention. For the step numbers in the following embodiments, they are only provided for the convenience of explanation, and the order between the steps is not limited in any way, and the execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0037] In the application design of the control chip (i.e., the control module in this application, exemplarily, MCU, SOC, FPGA, ASIC, etc.), a watchdog is added to prevent abnormal software operation or system jamming. After the watchdog design is added, the watchdog is reset regularly, commonly known as: feeding the dog.

[0038] This application uses the MCU watchdog as an example to illustrate the solution. The design of the watchdog can be generally divided into two categories based on the actual application scenario and solution cost considerations:

[0039] 1. Independent watchdog: The independent watchdog uses an external clock or a dedicated low-speed clock (LSI), so even if the main frequency is not working, the watchdog can still work normally. It mainly monitors errors on the hardware, and feeding the dog before reaching the upper limit of the feeding time indicates that the program is normal. Independent watchdogs usually have no interrupt function. As long as the counter value is reloaded before the counter is reduced to 0, no reset will be generated.

[0040] 2. Window watchdog: The window watchdog uses the chip's internal clock, and its feeding time has an upper and lower limit, that is, the feeding time cannot be too early or too late, otherwise the MCU will be considered abnormal and trigger a reset. It is a system internal fault detector, mainly used to monitor software errors. The window watchdog usually has an interrupt function, and its counter is 7-bit decrement.

[0041] MCU watchdogs are mainly divided into two types: independent watchdogs and window watchdogs, which differ in function and usage scenarios. Independent watchdogs focus more on monitoring hardware errors, while window watchdogs focus more on detecting software errors.

[0042] When designing the solution, add a watchdog design to prevent the MCU from getting stuck:

[0043] 1. MCU internal watchdog: Most MCUs have an integrated watchdog timer (WDT), which is a built-in watchdog mechanism. This internal watchdog is usually based on the MCU's internal clock and is used to monitor the MCU's operating status. If no reset signal (i.e., "feeding the dog" operation) is received within the set time, the watchdog timer will trigger the MCU reset to help recover from potential deadlock or runaway states.

[0044] 2. External independent watchdog: Unlike the internal watchdog, the external independent watchdog is a separate chip or module that uses an independent clock source and does not depend on the main clock of the MCU for its operation. This watchdog is designed to provide a more reliable and independent system monitoring mechanism. When the MCU fails, the external independent watchdog can trigger a reset signal to help the system return to normal working state.

[0045] 3. MCU connection with external watchdog: MCU is usually connected to an external independent watchdog chip through GPIO (general input / output) pins or other communication interfaces (such as I2C, SPI, etc.). In this way, MCU can regularly send a feeding signal to the watchdog to keep the watchdog timer running normally. If the MCU stops working or fails to send a feeding signal for some reason, the external watchdog will trigger a reset signal after timeout.

[0046] Limitations of existing independent watchdog and window watchdog technologies:

[0047] 1. In some special scenarios, there is a bug in the software, causing the MCU system kernel to report a loss, and the watchdog will also fail, causing the entire MCU system to crash.

[0048] 2. Adding an external independent watchdog will increase costs.

[0049] The reset circuit and implementation method according to the embodiment of the present invention are described in detail below with reference to the accompanying drawings. First, a reset circuit according to the embodiment of the present invention is described with reference to the accompanying drawings.

[0050] Figure 1 1 is a schematic diagram of the reset circuit structure of an embodiment of the present invention, which specifically includes:

[0051] Voltage comparison module, switch module and oscillation module;

[0052] The voltage comparison module is used to receive a control signal from the control module, and determine whether the control module is abnormal according to the voltage of the first capacitor; the control signal is used to adjust the charging process of the first capacitor when the control module is normal;

[0053] The switch module is used to determine whether the oscillation module is working according to the abnormality judgment result;

[0054] The oscillation module is used to output a reset signal of a first duty cycle; the reset signal is used to reset the system or the control module.

[0055] The voltage comparison module in the present application is connected to the oscillation module through a switch module. The voltage comparison module is used to receive a control signal from the control module. When the control module works normally, the control signal charges the first capacitor and determines whether the voltage of the first capacitor is within a preset voltage range through a comparator, that is, based on the voltage of the first capacitor, it is determined whether the control module is abnormal. If the control module works abnormally, the oscillation module is operated through the switch module, and a reset signal of the first duty cycle is output to reset the control module so that the control module can quickly resume work and improve the working stability of the system.

[0056] Optionally, in the reset circuit in the embodiment of the present invention, the voltage comparison module includes: a first resistor, the first capacitor and a voltage comparator;

[0057] The voltage comparator includes a first operational amplifier, a second operational amplifier, a first diode and a second diode;

[0058] The first end of the first resistor is a receiving end of the control signal, the second end of the first resistor is grounded through the first capacitor, the second end of the first resistor is also connected to the inverting input end of the first operational amplifier and the non-inverting input end of the second operational amplifier, the power supply is connected to the non-inverting input end of the first operational amplifier through the second resistor, the non-inverting input end of the first operational amplifier is connected to the inverting input end of the second operational amplifier through the third resistor, and the inverting input end of the second operational amplifier is grounded through the fourth resistor;

[0059] The power supply is connected to the output end of the first operational amplifier through the first diode, and the power supply is connected to the output end of the second operational amplifier through the second diode; the forward end of the first diode or the second diode is the output end of the voltage comparison module.

[0060] In some possible implementations, reference Figure 1 As shown, the first resistor can be Figure 1 In R7, the first capacitor can be Figure 1 In C2, the first op amp can be Figure 1 OA1 in the second op amp can be Figure 1 In OA2, the first diode can be Figure 1 The second diode D3 can be Figure 1 The second resistor can be Figure 1 The third resistor R3 can be Figure 1 The fourth resistor R8 can be Figure 1 Of course, Figure 1 For illustrative purposes, the voltage comparison module, switch module and oscillation module in the present application may also be implemented through other forms of circuit diagrams, and the present application does not limit the specific circuit structure.

[0061] Optionally, in the reset circuit in the embodiment of the present invention, the switch module includes: a transistor, the output end of the voltage comparison module is connected to the base of the transistor, the collector of the transistor is the output end of the switch module, and the emitter of the transistor is grounded.

[0062] In some possible implementations, the transistor may be Figure 1 Q1 in.

[0063] Optionally, in the reset circuit in the embodiment of the present invention, the oscillation module includes: a third operational amplifier, a fifth resistor, a sixth resistor, a third diode and a fourth diode;

[0064] The output end of the switch module is connected to the inverting input end of the third operational amplifier, the non-inverting input end of the third operational amplifier is grounded, and the output end of the third operational amplifier is used to output the reset signal;

[0065] The inverting input terminal of the third operational amplifier is connected to the output terminal of the third operational amplifier through the sixth resistor and the fourth diode, and the output terminal of the third operational amplifier is connected to the inverting input terminal of the third operational amplifier through the third diode and the fifth resistor.

[0066] In some possible implementations, the third op amp may be Figure 1 OA3 in, the fifth resistor can be Figure 1 The sixth resistor can be R1 in Figure 1 The third diode can be R2. Figure 1 The fourth diode D1 can be Figure 1 D2 in.

[0067] Optionally, in the reset circuit in the embodiment of the present invention, the second resistor is 1.15 kilo-ohms, the third resistor is 2.55 kilo-ohms, and the fourth resistor is 1 kilo-ohm.

[0068] In some possible implementations, the resistance values ​​of the second resistor, the third resistor, and the fourth resistor can be set according to actual needs so that the voltage interval corresponding to the comparator is the preset voltage interval. Exemplarily, it is regulated according to VCC, as long as 2.5v and 0.7V are accurately controlled. For example, VCC = 3.3V, R3 can be 1.15KΩ, R8 can be 2.55KΩ, and R12 can be 1.00KΩ.

[0069] Secondly, the reset method proposed according to the embodiment of the present invention will be described with reference to the accompanying drawings. The reset method in the embodiment of the present invention can be applied to a terminal, or to a server, or can be software running in a terminal or a server, etc. The terminal can be a tablet computer, a laptop computer, a desktop computer, etc., but is not limited to this. The server can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms. The reset method in the embodiment of the present invention is applied to the reset circuit described above, and mainly includes the following steps:

[0070] S100: receiving a control signal of a control module, and judging whether the control module is abnormal according to a voltage of a first capacitor; the control signal is used to adjust a charging process of the first capacitor when the control module is normal;

[0071] S200: Determine whether the oscillation module is working according to the abnormality judgment result;

[0072] S300: Outputting a reset signal of a first duty cycle through the oscillation module; the reset signal is used to reset the system or the control module.

[0073] Optionally, in the reset method in the embodiment of the present invention, judging whether the control module is abnormal according to the voltage of the first capacitor includes:

[0074] If the voltage is within a preset voltage range, determining that the control module is abnormal;

[0075] If the control module is abnormal, the output state of the voltage comparison module is changed.

[0076] In some possible implementations, determining whether the oscillation module is working according to the abnormality judgment result includes: adjusting the output signal of the comparison module through a transistor according to the output state of the voltage comparison module. The output signal of the comparison module is used to control whether the oscillation module is turned on.

[0077] Optionally, in the reset method in the embodiment of the present invention, the voltage comparison module includes a first resistor, and the method further includes:

[0078] Adjusting the second duty cycle of the control signal to adjust the charging process;

[0079] Alternatively, the resistance value of the first resistor is adjusted to adjust the charging and discharging speed.

[0080] Optionally, in the reset method in the embodiment of the present invention, the oscillation module includes a fifth resistor and a sixth resistor, and the first duty cycle is determined by the following steps:

[0081] The first duty cycle is adjusted by changing the resistance values ​​of the fifth resistor and the sixth resistor.

[0082] The reset circuit and reset method provided by the present application are described in detail below with a specific embodiment:

[0083] In this control circuit design, the traditional watchdog reset chip is deliberately abandoned. This design decision is an innovative attempt based on in-depth research on the system operation mechanism, aiming to build a new, more flexible and autonomous system monitoring and reset system. By cleverly integrating the functions of various components in the circuit and rationally utilizing the software control capabilities of the MCU, the goal of effectively monitoring the system operation status without the assistance of a watchdog chip and implementing the reset operation in a timely manner when an abnormal situation occurs can be achieved, thereby reducing system costs, reducing hardware complexity and improving the autonomous controllability of the system.

[0084] like Figure 1 The circuit shown does not use a watchdog reset chip. In the MCU code writing process, the MCU_Output (i.e., the control signal of the control module) function is pre-set to enable it to periodically output a PWM square wave signal (i.e., the second duty cycle control signal in this application). The main purpose of this PWM square wave is to build a charging circuit for capacitor C2 and realize precise control of the charging process. The principle is to refer to Figure 2 As shown, during the high level period of the PWM square wave, the power supply transmits charge to the capacitor C2 through a specific circuit path (for example, through components such as the resistor R7), causing its voltage to gradually increase.

[0085] By using the resistor voltage divider principle and reasonably adjusting the resistance values ​​of resistors R3, R8, and R12, the system voltage can be accurately divided to 2.5V and 0.7V. Connect 2.5V to the positive input of an op amp and 0.7V to the negative input of another op amp, thus building a window voltage comparator. The principle is that when the voltage of capacitor C2 is outside the range of 0.7V-2.5V, the comparator output state changes, providing a judgment basis for the subsequent reset action.

[0086] According to the capacitor charging and discharging formula, resistor R7 is part of the capacitor C2 charging and discharging circuit. Changing the resistance value of resistor R7 can change the charging and discharging time constant of capacitor C2, and thus change its charging and discharging speed. This helps to flexibly control the capacitor voltage change rate under different working conditions.

[0087] When the system is initially powered on, the MCU automatically enters the 3.3V initialization state, which is a necessary condition for the normal startup of the MCU to ensure that the system can smoothly enter the subsequent workflow. After the MCU is successfully started, its output (MCU output) begins to generate a square wave signal of a specific frequency. The square wave is transmitted to the capacitor C2 through the resistor R7 to form a charging circuit. By finely adjusting the duty cycle of the square wave and combining the actual circuit parameters, such as the capacitance value and the resistance value, the voltage across the capacitor C2 can be stabilized between 0.7V and 2.5V. For example, when the duty cycle increases, the charging time becomes longer and the capacitor voltage increases; otherwise, it decreases.

[0088] Since the voltage of capacitor C2 is within the set range, the operational amplifier connected to the front end of diodes D3 and D4 outputs a stable level of 3.3V due to the input voltage relationship. Based on the above operational amplifier output state, the voltage at the resistor R6 end is high level (H) and the voltage at the R5 end is low level (L). This level state is input to the subsequent operational amplifier oscillation circuit, causing it to continuously output a high level to ensure normal operation of the system.

[0089] When an abnormal situation occurs in the MCU, such as the program running away or falling into an infinite loop. The MCU output is no longer a normal square wave, but continues to maintain 3.3V or 0V unchanged. This will cause the charging or discharging process of capacitor C2 to be out of control, and its voltage will quickly change to 0V or 3.3V. In this way, the input voltage of the back-end window voltage comparator (composed of two op amps) exceeds the normal range, and the output voltage of one of the op amps will become 0V. Due to the change in the output state of the op amp, the voltage at the resistor R6 end becomes 0V, and at the same time, the resistor R5 end is no longer pulled down, and its voltage state is reversed. As the voltage state of R5 changes, the op amp oscillation circuit at its back end starts to work and outputs a square wave signal with a specific duty cycle (that is, the reset signal in this application, in Figure 1This square wave signal can be used to reset the MCU or the entire system. And by changing the resistance values ​​of R1 and R2, the duty cycle of this reset square wave can be adjusted. If this pin is connected to the reset control terminal of the power system, when the square wave signal is triggered, the entire system will return to the initial power-on state and re-initialize the process.

[0090] In summary, this solution cleverly utilizes the characteristics and relationships of circuit components to successfully implement the system power reset function when the MCU is stuck or other abnormalities occur and does not rely on traditional watchdog chips or watchdog modules, effectively improving the reliability and stability of the system.

[0091] The main inventive concept of this technical solution is to construct a system power reset control mechanism that does not rely on a watchdog reset chip, and utilize the coordinated cooperation of various components in the circuit and the PWM square wave output by the MCU to realize the system reset function under MCU abnormal conditions. By cleverly utilizing the circuit characteristics and MCU output characteristics, a unique circuit control logic is designed to solve the problem of system power reset when not relying on a traditional watchdog reset chip.

[0092] By setting MCU_Output in the MCU code to output PWM square waves regularly, capacitor C2 is charged based on this. At the same time, the voltage is divided by resistors such as R3, R8, and R12 to obtain 2.5V and 0.7V voltages and provide them to the positive and negative input terminals of two different op amps, respectively, thereby building the function of the window voltage comparator. In addition, the charging and discharging speed of C2 can be changed by adjusting the size of R7. When the system is initially powered on, the MCU is in a 3.3V initialization state that meets its startup requirements. After the MCU is started, the square wave it outputs charges C2 through R2. By reasonably adjusting the duty cycle, the capacitor voltage is maintained in a specific range of 0.7V to 2.5V, so that the two op amps at the front end both output 3.3V, and the subsequent op amp oscillation circuit can continue to output a high level, thereby building a circuit working mode under normal operating conditions.

[0093] When the MCU is abnormal and continuously outputs 3.3V or 0V, the voltage of capacitor C2 will change to 0V or 3.3V accordingly. This change will cause one of the output voltages of the back-end window voltage comparator (a circuit composed of two op amps) to become 0V, which in turn causes the voltage of R6 to become 0V, and R5 is no longer pulled down. Based on such a circuit state change, the oscillation circuit behind R5 will start to output a square wave, repeatedly outputting a square wave with a certain duty cycle (corresponding to the MCUreset mark in the figure) to reset the MCU or the entire system, and the duty cycle of the square wave can also be adjusted by adjusting R1 and R2. If the power system is reset through this pin, the entire system can return to the initial state of power-on, thereby achieving the purpose of resetting the system power supply when the MCU is stuck or in an abnormal situation without using a watchdog chip or watchdog module.

[0094] This application gets rid of the dependence on the watchdog chip, realizes system reset with a unique circuit design, and reduces cost and complexity. By using resistor voltage division to build a window voltage comparator, the voltage of capacitor C2 is accurately monitored to determine MCU abnormalities. R7 can be adjusted to change the charge and discharge speed of C2 to maintain the capacitor voltage in the range of 0.7V-2.5V during normal operation, ensuring the stability of the front-end op amp and subsequent oscillation circuit. After the MCU abnormality causes the capacitor voltage to exceed the limit, the back-end circuit can respond to change the voltage of R6 and R5, so that the oscillation circuit outputs a square wave reset, and R1 and R2 can be adjusted to change the reset square wave duty cycle to achieve accurate reset. The reset square wave can return the system to the initial state of power-on, enhance the system robustness and reliability, and reduce fault downtime.

[0095] It can be seen that the contents of the above circuit embodiments are all applicable to the present method embodiments, the functions specifically implemented by the present method embodiments are the same as those of the above circuit embodiments, and the beneficial effects achieved are also the same as those achieved by the above circuit embodiments.

[0096] On the other hand, an embodiment of the present application provides a control system, including the above-mentioned reset circuit.

[0097] Reference Figure 3 , an embodiment of the present invention provides an electronic device, including:

[0098] at least one processor 310;

[0099] At least one memory 320, used to store at least one program;

[0100] When the at least one program is executed by the at least one processor 310, the at least one processor 310 implements the reset method.

[0101] Similarly, the contents of the above method embodiments are applicable to the system and electronic device embodiments. The functions specifically implemented by the system and electronic device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0102] An embodiment of the present invention further provides a computer-readable storage medium, in which a program executable by a processor is stored. The program executable by the processor is used to execute the above-mentioned reset method when executed by the processor.

[0103] Similarly, the contents of the above method embodiments are all applicable to the present storage medium embodiments. The functions specifically implemented by the present storage medium embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0104] In some selectable embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the present invention is provided by way of example, for the purpose of providing a more comprehensive understanding of technology. The disclosed method is not limited to the operation and logic flow presented herein. Selectable embodiments are expected, wherein the order of various operations is changed and the sub-operation of a part for which is described as a larger operation is performed independently.

[0105] In addition, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features can be integrated into a single physical device and / or software module, or one or more functions and / or features can be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the present invention. More specifically, in view of the properties, functions and internal relationships of the various functional modules in the device disclosed herein, the actual implementation of the module will be understood within the conventional skills of the engineer. Therefore, those skilled in the art can implement the present invention set forth in the claims without excessive experimentation using ordinary techniques. It is also understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present invention, which is determined by the full scope of the appended claims and their equivalents.

[0106] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several programs to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.

[0107] The logic and / or steps represented in the flowchart or otherwise described herein, for example, may be considered as an ordered list of executable programs for implementing the logical functions, and may be embodied in any computer-readable medium for use by a program execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch and execute a program from a program execution system, device or apparatus), or in conjunction with such program execution systems, devices or apparatuses. For purposes of this specification, a "computer-readable medium" may be any device that can contain, store, communicate, propagate or transmit a program for use by a program execution system, device or apparatus, or in conjunction with such program execution systems, devices or apparatuses.

[0108] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.

[0109] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable program execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0110] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0111] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0112] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A reset circuit, characterized in that: The reset circuit comprises: a voltage comparison module, a switch module and an oscillation module; The voltage comparison module is used to receive the control signal of the control module, and judge whether the control module is abnormal according to the voltage of the first capacitor; the control signal is used to adjust the charging process of the first capacitor when the control module is normal; The switch module is used to determine whether the oscillation module is working according to the abnormality judgment result; The oscillation module is used to output a reset signal of a first duty cycle; the reset signal is used to reset the system or the control module.

2. The reset circuit according to claim 1, characterized in that: The voltage comparison module includes: a first resistor, the first capacitor and a voltage comparator; The voltage comparator includes a first operational amplifier, a second operational amplifier, a first diode and a second diode; The first end of the first resistor is a receiving end of the control signal, the second end of the first resistor is grounded through the first capacitor, the second end of the first resistor is also connected to the inverting input end of the first operational amplifier and the non-inverting input end of the second operational amplifier, the power supply is connected to the non-inverting input end of the first operational amplifier through the second resistor, the non-inverting input end of the first operational amplifier is connected to the inverting input end of the second operational amplifier through the third resistor, and the inverting input end of the second operational amplifier is grounded through the fourth resistor; The power supply is connected to the output end of the first operational amplifier through the first diode, and the power supply is connected to the output end of the second operational amplifier through the second diode; the forward end of the first diode or the second diode is the output end of the voltage comparison module.

3. The reset circuit according to claim 1, characterized in that: The switch module comprises: a transistor, the output end of the voltage comparison module is connected to the base of the transistor, the collector of the transistor is the output end of the switch module, and the emitter of the transistor is grounded.

4. The reset circuit according to claim 1, characterized in that: The oscillation module includes: a third operational amplifier, a fifth resistor, a sixth resistor, a third diode and a fourth diode; The output end of the switch module is connected to the inverting input end of the third operational amplifier, the non-inverting input end of the third operational amplifier is grounded, and the output end of the third operational amplifier is used to output the reset signal; The inverting input terminal of the third operational amplifier is connected to the output terminal of the third operational amplifier through the sixth resistor and the fourth diode, and the output terminal of the third operational amplifier is connected to the inverting input terminal of the third operational amplifier through the third diode and the fifth resistor.

5. The reset circuit according to claim 2, characterized in that: The second resistor is 1.15 kilo ohms, the third resistor is 2.55 kilo ohms, and the fourth resistor is 1 kilo ohm.

6. A resetting method, characterized in that: Applied to the reset circuit according to any one of claims 1 to 5, the method comprising: receiving a control signal from a control module, and judging whether the control module is abnormal according to the voltage of the first capacitor; the control signal is used to adjust the charging process of the first capacitor when the control module is normal; According to the abnormal judgment result, determine whether the oscillation module is working; A reset signal with a first duty cycle is outputted through the oscillation module; the reset signal is used to reset the system or the control module.

7. The resetting method according to claim 6, characterized in that: The determining, based on the voltage of the first capacitor, whether the control module is abnormal includes: If the voltage is within a preset voltage range, determining that the control module is abnormal; If the control module is abnormal, the output state of the voltage comparison module is changed.

8. The resetting method according to claim 6, characterized in that: The voltage comparison module includes a first resistor, and the method further includes: Adjusting the second duty cycle of the control signal to adjust the charging process; Alternatively, the resistance value of the first resistor is adjusted to adjust the charging and discharging speed.

9. The resetting method according to claim 6, characterized in that: The oscillation module includes a fifth resistor and a sixth resistor, and the first duty cycle is determined by the following steps: The first duty cycle is adjusted by changing the resistance values ​​of the fifth resistor and the sixth resistor.

10. A control system, characterized in that: The control system comprises a reset circuit as claimed in any one of claims 1 to 5.

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