Back-contact photovoltaic cell piece, back-contact photovoltaic cell assembly and preparation methods of back-contact photovoltaic cell piece and back-contact photovoltaic cell assembly

Abstract

The invention relates to a back contact photovoltaic cell piece, a back contact photovoltaic cell assembly and a preparation method, and relates to the technical field of photovoltaic cell pieces. The preparation method comprises the steps that a substrate is provided, the substrate comprises a silicon substrate, the backlight surface of the silicon substrate is provided with a tunneling oxidation passivation contact structure, and the tunneling oxidation passivation contact structure comprises a doped dielectric layer. According to the invention, the local part of the doped dielectric layer can be catalytically doped, and / or the light receiving surface of the silicon substrate can be catalytically doped. And after catalytic doping, forming a metal electrode in ohmic contact with the doped dielectric layer. The back contact photovoltaic cell prepared according to the preparation method can have the following advantages that the back contact photovoltaic cell can generate a relatively large number of photo-generated electrons and photo-generated holes, and the service life of minority carriers (photo-generated electrons or photo-generated holes) generated by the back contact photovoltaic cell is relatively long; therefore, the photoelectric conversion efficiency of the prepared back contact photovoltaic cell is relatively high.

Description

Technical Field

[0001] The present application relates to the technical field of photovoltaic cells, and in particular to a back-contact photovoltaic cell, a back-contact photovoltaic cell assembly and a preparation method thereof. Background Art

[0002] Back-contact photovoltaic cells are cells with both positive and negative metal electrodes located on the backlight side of the cell. The light-receiving surface (also known as the front surface or front side) of the back-contact photovoltaic cell is relatively large, so the photoelectric conversion efficiency of the back-contact photovoltaic cell is relatively high. Since the photoelectric conversion efficiency of the back-contact photovoltaic cell is also positively correlated with the lifetime of minority carriers (electrons or holes), the minority carrier lifetime of the back-contact photovoltaic cell needs to be improved in related technologies. Summary of the invention

[0003] In view of this, the present application provides a back-contact photovoltaic cell, a back-contact photovoltaic cell assembly and a preparation method, which can improve the minority carrier lifetime of the back-contact photovoltaic cell, thereby improving the photoelectric conversion efficiency of the back-contact photovoltaic cell.

[0004] In a first aspect, the present application provides a method for preparing a back-contact photovoltaic cell, the method comprising: providing a substrate, the substrate comprising a silicon substrate, the backlight surface of the silicon substrate being provided with a tunneling oxide passivation contact structure, wherein the tunneling oxide passivation contact structure comprises a doped dielectric layer. The doped dielectric layer may be partially catalytically doped, and / or the light-receiving surface of the silicon substrate may be catalytically doped. After catalytic doping, a metal electrode is formed that is in ohmic contact with the doped dielectric layer.

[0005] Optionally, the doped medium layer includes an N-type doped medium layer, and a gas containing phosphine is used as a doping source in the process of catalytically doping a part of the N-type doped medium layer.

[0006] Optionally, after providing the tunneling oxide passivation contact structure and before partially catalytically doping the doped medium layer, the preparation method of the present application further comprises removing the silicon glass layer of the doped medium layer.

[0007] Optionally, after partially subjecting the doped medium layer to catalytic doping, the preparation method of the present application further comprises forming a mask layer on the doped medium layer.

[0008] Optionally, before the light-receiving surface of the silicon substrate is catalytically doped, the preparation method of the present application further comprises texturing the light-receiving surface of the silicon substrate using an alkaline texturing liquid.

[0009] Optionally, under the condition that the silicon substrate is an N-type silicon substrate, the method of catalytically doping the light-receiving surface of the silicon substrate includes using a gas containing phosphine as a doping source.

[0010] Optionally, after partially doping the doping medium layer, the light-receiving surface of the silicon substrate is catalytically doped, or, after partially doping the light-receiving surface of the silicon substrate is catalytically doped, the doping medium layer is partially doped, or, simultaneously, the doping medium layer is partially doped and the light-receiving surface of the silicon substrate is catalytically doped.

[0011] Optionally, the temperature of catalytic doping is in the range of 350°C to 500°C.

[0012] Optionally, after catalytic doping and before forming the metal electrode, the preparation method of the present application also includes depositing an aluminum oxide passivation layer on both sides using an atomic layer deposition process, and also includes depositing a silicon nitride passivation layer on the aluminum oxide passivation layer using plasma enhanced chemical vapor deposition.

[0013] According to the above contents about the preparation method of the present application, the back-contact photovoltaic cell that can be prepared can have the following beneficial effects: the number of photogenerated electrons and photogenerated holes that can be generated by the back-contact photovoltaic cell is relatively large, and the lifetime of minority carriers (photogenerated minority carriers or photogenerated electrons) that can be generated by the back-contact photovoltaic cell is relatively high, so the photoelectric conversion efficiency of the back-contact photovoltaic cell that can be prepared is relatively large.

[0014] In a second aspect, the present application provides a back-contact photovoltaic cell sheet, which is prepared by the back-contact photovoltaic cell preparation method described above. According to the above content, the back-contact photovoltaic cell sheet of the present application has a relatively high photoelectric conversion efficiency.

[0015] In a third aspect, the present application provides a back-contact photovoltaic cell assembly, which includes at least one cell string, and the cell string is formed by electrically connecting the back-contact photovoltaic cell sheets described above. Accordingly, the back-contact photovoltaic cell assembly of the present application can have a greater photoelectric conversion efficiency.

[0016] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0018] Figure 1 is a schematic diagram of a partial structure of a substrate in an embodiment, wherein the substrate includes a silicon base and an N-type tunneling oxide passivation contact structure; Figure 2is a schematic diagram of a partial structure of a substrate in an embodiment, wherein the substrate includes a silicon base and an N-type tunneling oxide passivation contact structure, and the N-type tunneling oxide passivation contact structure includes an N-type catalytic doping portion; Figure 3 is a schematic diagram of a partial structure of a substrate in one embodiment, wherein the substrate includes a silicon substrate; Figure 4 is a schematic diagram of a partial structure of a substrate in an embodiment, wherein the substrate includes a silicon base and a top catalytic doping portion; Figure 5 is a schematic structural diagram of a silicon substrate in one embodiment; Figure 6 It is a schematic diagram of the structure of a silicon substrate, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer, and a coating layer in one embodiment; Figure 7 It is a schematic structural diagram of a silicon substrate, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer and a wrap-around coating in one embodiment, wherein a first window is also provided; Figure 8 A schematic diagram of the structure of a silicon substrate, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer, a coating layer, an N-type tunneling oxide passivation contact structure and a phosphosilicate glass layer in one embodiment; Fig. 9 A schematic diagram of the structure of a silicon substrate, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer, a coating layer and an N-type tunneling oxide passivation contact structure in one embodiment; Fig.10 A schematic diagram of the structure of a silicon substrate, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer, a coating layer, and an N-type tunneling oxide passivation contact structure in an embodiment, wherein the N-type tunneling oxide passivation contact structure includes an N-type catalytic doping portion; Fig.11 A schematic diagram of the structure of a silicon substrate, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer, a coating layer, an N-type tunneling oxide passivation contact structure and a mask layer in one embodiment; Fig.12 A schematic diagram of the structure of a silicon substrate, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer, a coating layer, an N-type tunneling oxide passivation contact structure and a mask layer in an embodiment, wherein a second window is also provided; Fig.13 A schematic diagram of the structure of a silicon substrate, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer, an N-type tunneling oxide passivation contact structure and a mask layer in an embodiment, wherein a second window is also provided; Fig.14A schematic diagram of the structure of a silicon substrate with a velvet surface, a P-type tunneling oxide passivation contact structure, a borosilicate glass layer, an N-type tunneling oxide passivation contact structure and a mask layer in an embodiment, wherein a second window is also provided; Fig.15 It is a schematic structural diagram of a silicon substrate with a velvet surface, a P-type tunneling oxide passivation contact structure and an N-type tunneling oxide passivation contact structure in an embodiment, wherein a second window is also provided; Fig.16 A schematic diagram of the structure of a top catalytic doping portion, a silicon substrate with a velvet surface, a P-type tunneling oxide passivation contact structure and an N-type tunneling oxide passivation contact structure in an embodiment, wherein a second window is also provided; Fig.17 A schematic diagram of the structure of a top catalytic doping portion, a silicon substrate with a velvet surface, a P-type tunneling oxide passivation contact structure, an N-type tunneling oxide passivation contact structure and an aluminum oxide passivation layer in one embodiment; Fig.18 A schematic diagram of the structure of a top catalytic doping portion, a silicon substrate with a velvet surface, a P-type tunneling oxide passivation contact structure, an N-type tunneling oxide passivation contact structure, an aluminum oxide passivation layer, and a silicon nitride passivation layer in one embodiment; Fig.19 A schematic diagram of the structure of a back-contact photovoltaic cell provided in the present application in one embodiment; Fig. 20 A schematic diagram showing a comparison of minority carrier lifetimes between a back-contact photovoltaic cell of an embodiment of the present application and a back-contact photovoltaic cell in related art; Fig.21 It is a schematic diagram comparing the doping concentration and doping depth of the back-contact photovoltaic cell of the embodiment of the present application and the back-contact photovoltaic cell in the related art.

[0019] Reference numerals: 10-substrate, 1-silicon substrate, 1a-light-receiving side, 1b-backlight side, 11-light-receiving surface, 111-velvet surface, 112-top catalytic doping part, 12-backlight surface, 2-tunneling oxide passivation contact structure, 21-N-type tunneling oxide passivation contact structure, 211-N-region tunneling oxide layer, 212-N-type doped dielectric layer, 212a-N-type initial doping part, 212b-N-type catalytic doping part, 21a-phosphorus silicon glass layer, 22-P-type tunneling oxide passivation contact structure, 221-P-region tunneling oxide layer, 222-P-type doped dielectric layer, 22a-borosilicate glass layer, 2a-first window, 2b-second window, 2c-wrap coating, 3-mask layer, 4-aluminum oxide passivation layer, 5-silicon nitride passivation layer, 6-negative metal electrode, 7-positive metal electrode. DETAILED DESCRIPTION

[0020] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0021] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0022] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0023] In the figures herein, direction X and direction Y are perpendicular.

[0024] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0025] In a first aspect, the present application provides some embodiments of a method for preparing a back-contact photovoltaic cell, wherein the preparation method may include the following contents.

[0026] A substrate is provided, and the substrate mainly refers to the structure before being prepared into a back-contact photovoltaic cell that can be put into use. The substrate may include a silicon base (also known as a silicon substrate), and the surface of the silicon base may include a light-receiving surface and a backlight surface that are arranged opposite to each other in the thickness direction of the silicon base. The light-receiving surface refers to the surface used to be directly illuminated by sunlight in the back-contact photovoltaic cell to be formed subsequently, and the backlight surface refers to the surface not used to be directly illuminated by sunlight in the back-contact photovoltaic cell to be formed subsequently, and the backlight surface can be illuminated by reflected light in the environment.

[0027] In some embodiments, please refer to Figure 1 As shown, the substrate may further include an N-type tunneling oxide passivation contact structure 21, and the N-type tunneling oxide passivation contact structure 21 is disposed on the backlight surface 12 of the silicon substrate 1. The N-type tunneling oxide passivation contact structure 21 may include an N-region tunneling oxide layer 211 and an N-type doped dielectric layer 212, and the N-region tunneling oxide layer 211 is located between the silicon substrate 1 and the N-type doped dielectric layer 212.

[0028] The N-region tunnel oxide layer 211 may include silicon oxide (SiO X )、Silicon Nitride(SiN X) and at least one of silicon oxynitride (SiON). The thickness dimension (dimension along direction Y) of the N-region tunneling oxide layer 211 can be in the range of 0.5nm~3nm, and the thickness dimension can be specifically 0.5nm, 1nm, 1.5nm, 2nm, 2.5nm or 3nm. The N-region tunneling oxide layer 211 is combined with the dangling bonds (unpaired electron states formed when the valence bonds of an atom in the crystal are not completely combined with other atoms) on the surface of the silicon substrate 1, and the N-region tunneling oxide layer 211 can play a good chemical passivation role, which is beneficial to reduce the rate of recombination of photogenerated electrons and photovoltaic holes generated in the silicon substrate 1 at the interface between the silicon substrate 1 and the N-region tunneling oxide layer 211.

[0029] In addition, at least one N-type element (element of the fifth main group in the periodic table of chemical elements) may be doped in the N-type doped dielectric layer 212, such as phosphorus, arsenic, antimony and other N-type elements. The N-type doped dielectric layer 212 may include at least one of polycrystalline silicon, amorphous silicon and microcrystalline silicon. The N-type doped dielectric layer 212 may be in ohmic contact with a negative metal electrode (not shown) during a subsequent metallization process.

[0030] The method for forming the N-type doped dielectric layer 212 may include: after forming the N-region tunneling oxide layer 211, low pressure chemical vapor deposition (LPCVD) may be used to form an intrinsic dielectric layer (containing at least one of polycrystalline silicon, amorphous silicon and microcrystalline silicon) on the side of the N-region tunneling oxide layer 211 away from the silicon substrate 1. After forming the intrinsic dielectric layer, impurities containing N-type elements are diffused into the intrinsic dielectric layer using a thermal diffusion process to form the N-type doped dielectric layer 212.

[0031] In some embodiments, the Figure 1 The substrate of the structure shown is placed in a chemical vapor deposition chamber (not shown in the figure), and a gas containing phosphine is introduced into the chemical vapor deposition chamber, and the gas containing phosphine is used as a doping source. A metal wire (not shown in the figure) is also arranged in the chemical vapor deposition chamber. When the metal wire is energized, the metal wire can generate heat, and the heat-generating metal wire can play a chemical catalytic role on phosphine. The chemical catalytic role can catalytically decompose the phosphine into some particles, and these particles can include phosphorus atoms and hydrogen atoms. The phosphorus atoms and hydrogen atoms can be doped into or diffused into the N-type doped dielectric layer 212, so that a part of the N-type doped dielectric layer 212 is catalytically doped.

[0032] Please refer to Figure 2As shown, after the N-type doped dielectric layer 212 is partially catalytically doped, the N-type doped dielectric layer 212 may include an N-type initial doping portion 212a and an N-type catalytically doping portion 212b, wherein the N-type initial doping portion 212a is located between the N-region tunneling oxide layer 211 and the N-type catalytically doping portion 212b. It can be understood that the N-type initial doping portion 212a is a portion of the N-type doped dielectric layer 212 that has not been catalytically doped, and the N-type catalytically doped portion 212b is a portion of the N-type doped dielectric layer 212 that has been catalytically doped. Therefore, the concentration of the N-type element included in the N-type initial doping portion 212a is less than the concentration of the N-type element included in the N-type catalytically doped portion 212b. The N-type initial doping portion 212a is a lightly doped region relative to the N-type catalytically doped portion 212b, and the N-type catalytically doped portion 212b is a heavily doped region relative to the N-type initial doping portion 212a. A high-low junction (N-type) can be formed between the N-type catalytically doped portion 212b and the N-type initial doping portion 212a. + / N). The high-low junction (N + / N) can play a field passivation role in the back contact photovoltaic cell to be prepared subsequently, and the field passivation effect can promote the migration of photogenerated electrons from the N-type initial doping part 212a to the N-type catalytic doping part 212b, thereby promoting the collection of photogenerated electrons by the negative metal electrode.

[0033] During the partial catalytic doping of the N-type doped dielectric layer 212, the temperature in the chemical vapor deposition chamber is relatively low. It can also be said that the temperature of the substrate during the catalytic doping process is lower than the temperature of the substrate during the process of forming the doped dielectric layer using the thermal diffusion process. Therefore, during the catalytic doping process, the N-type elements that have been doped in the N-type doped dielectric layer 212 by the thermal diffusion process are not easy to continue to diffuse along the direction (for example, direction Y) from the N-region tunneling oxide layer 211 to the silicon substrate 1. It can also be said that the N-type elements in the N-type initial doping portion 212a are not easy to diffuse to the interface between the N-region tunneling oxide layer 211 and the silicon substrate 1, and are not easy to generate more new dangling bonds and new recombination centers (defects that promote the recombination of electrons and holes by providing intermediate energy levels or defect energy levels) at the interface between the N-region tunneling oxide layer 211 and the silicon substrate 1, so that the N-region tunneling oxide layer 211 can still chemically passivate the surface of the silicon substrate 1 well.

[0034] In some embodiments, during the local catalytic doping process of the N-type doped dielectric layer 212, the temperature in the chemical vapor deposition chamber used can be in the range of 350°C to 500°C, specifically 350°C, 375°C, 380°C, 385°C, 390°C, 395°C, 400°C, 405°C, 410°C, 415°C, 420°C, 425°C, 450°C, 475°C or 500°C.

[0035] In the related art, after forming an N-type doped dielectric layer by a thermal diffusion process, in order to form a high-low junction (N + / N), it is also necessary to use a thermal diffusion process (also known as a post-diffusion process) or other processes that use high temperatures (for example, greater than 700°C) to promote diffusion, so that the N-type elements in the N-type doped dielectric layer can easily diffuse to the interface between the N-region tunneling oxide layer and the silicon substrate, so that the N-region tunneling oxide layer cannot chemically passivate the surface of the silicon substrate well.

[0036] It can be seen that the embodiment of the preparation method provided in the present application can have the following advantages: on the basis of ensuring that the N-region tunneling oxide layer 211 can still chemically passivate the surface of the silicon substrate 1 well, the required high-low junction (N + / N).

[0037] During the local catalytic doping process of the N-type doped dielectric layer 212, since the temperature of the environment in which the substrate is located (for example, in the range of 350°C to 500°C) is relatively low, the temperature inside the substrate is also relatively low, making it difficult for the N-type doped dielectric layer 212 to recrystallize and produce more lattice defects, that is, it is difficult for more new dangling bonds and new recombination centers to be generated in the N-type doped dielectric layer 212, making it difficult for the photogenerated electrons generated by the back-contact photovoltaic cell to be prepared subsequently to be recombined in the N-type doped dielectric layer 212.

[0038] In the related art, after forming an N-type doped dielectric layer by a thermal diffusion process, in order to form a high-low junction (N + / N), it is necessary to use a thermal diffusion process (also known as a post-diffusion process) or other processes that use high temperature (for example, greater than 700°C) to promote diffusion. The N-type doped dielectric layer is prone to recrystallization and produce more new lattice defects. Correspondingly, the N-type doped dielectric layer is prone to produce more new dangling bonds and new recombination centers, so that the photogenerated electrons generated by the back-contact photovoltaic cell that can be prepared can be easily recombined in the N-type doped dielectric layer.

[0039] It can be seen that the embodiment of the preparation method provided in the present application can have the following advantages, that is, on the basis of ensuring that there are not many new dangling bonds and recombination centers in the N-type doped dielectric layer 212, the required high-low junction (N + / N).

[0040] During the partial catalytic doping process of the N-type doped dielectric layer 212, phosphorus atoms and hydrogen atoms will diffuse synchronously in the N-type doped dielectric layer 212, but hydrogen atoms will preferentially occupy lattice vacancies to reduce the migration barrier of phosphorus atoms, so as to promote the diffusion of phosphorus atoms deeper into the N-type doped dielectric layer 212, so that the thickness dimension (dimension along the direction Y) of the N-type catalytic doping portion 212b that can be formed is relatively large, that is, it is not easy for too many phosphorus atoms to accumulate on the surface and vicinity of the N-type doped dielectric layer 212, and it is not easy for many new lattice defects to be generated on the surface and vicinity of the N-type doped dielectric layer 212, and the number of new dangling bonds that can be generated is small, which can reduce the adverse effects of Auger recombination. Auger recombination refers to the recombination process in which when electrons and holes recombine, the energy or momentum is transferred to another electron or another hole through collision, causing the electron or hole to transition. Although phosphorus atoms will inevitably generate some new lattice defects in the N-type catalytic doping portion 212b when they diffuse in the N-type doped dielectric layer 212 to form the N-type catalytic doping portion 212b, thereby generating some new dangling bonds, phosphorus atoms and hydrogen atoms can simultaneously diffuse into the N-type doped dielectric layer 212, so that hydrogen atoms can simultaneously migrate to the generated new lattice defects and combine with the new dangling bonds, which can further reduce the adverse effects of Auger recombination.

[0041] In the related art, after forming an N-type doped dielectric layer by a thermal diffusion process, in order to form a high-low junction (N + / N), thermal diffusion process (also known as post-diffusion process) or other processes that use high temperature to promote diffusion are needed. The thickness of the heavily doped region that can be formed in the N-type doped dielectric layer is relatively small, that is, the heavily doped region is mainly on the surface of the N-type doped dielectric layer, so that the number of lattice defects on the surface of the N-type doped dielectric layer is relatively large. Correspondingly, the adverse effects of Auger recombination are more obvious, and the high-low junction (N + / N) has a relatively weak field passivation effect.

[0042] It can be seen that the embodiment of the preparation method provided in the present application can have the following advantages: a high-low junction (N + During the process of adding N-type doped dielectric layer 212 to N-type doped dielectric layer 212, phosphorus atoms can be promoted to migrate deeper into N-type doped dielectric layer 212 to reduce the adverse effects of Auger recombination. Even if new lattice defects are inevitably generated, hydrogen atoms doped into N-type doped dielectric layer 212 simultaneously with phosphorus atoms will also combine with new dangling bonds in time to further reduce the adverse effects of Auger recombination.

[0043] In some embodiments, the N-type initial doping portion 212a and the N-type catalytic doping portion 212b in the N-type doped dielectric layer 212 will both be in ohmic contact with the negative metal electrode during the subsequent metallization process. There is a negative correlation between the magnitude of the contact resistance between the N-type doped dielectric layer 212 and the negative metal electrode and the magnitude of the doping concentration of the N-type doped dielectric layer 212. Since the doping concentration of the N-type catalytic doping portion 212b is greater than the doping concentration of the N-type initial doping portion 212a, the contact resistance between the N-type catalytic doping portion 212b and the negative metal electrode will be relatively small. According to the above, the mechanism of the coordinated diffusion of phosphorus atoms and hydrogen atoms in the N-type doped dielectric layer 212 can promote the diffusion of phosphorus atoms deeper into the N-type doped dielectric layer 212, so that the thickness of the N-type catalytic doping portion 212b that can be formed is relatively large. After the subsequent metallization process is implemented, the contact area between the N-type catalytic doping portion 212b with a relatively large thickness and the negative metal electrode is relatively large. It can be seen that the contact resistance between the N-type catalytic doping portion 212 b with a relatively large thickness and the negative metal electrode is relatively lower, so that the photogenerated electrons collected in the N-type catalytic doping portion 212 b can be more easily transferred to the negative metal electrode.

[0044] In the related art, in order to form a heavily doped region with a relatively large thickness in the N-type doped dielectric layer to reduce the contact resistance, the doping source concentration or the diffusion source concentration has to be increased, which will not only further aggravate the adverse effects of Auger recombination, but the thickness of the heavily doped region that can be increased is relatively small, that is, the contact resistance that can be reduced is relatively small.

[0045] It can be seen that the embodiments of the preparation method provided in the present application can have the following advantages: the contact resistance between the N-type catalytic doping portion 212 b and the negative metal electrode can be significantly reduced without further aggravating the adverse effects of Auger recombination.

[0046] As can be seen from the above, the back-contact photovoltaic cell prepared according to some embodiments of the preparation method provided in this application can take into account the following advantages: the high-low junction (N + The field passivation effect of the N-type doped dielectric layer 212 is relatively strong, the N-region tunneling oxide layer 211 can still play a good chemical passivation role, the adverse effects of Auger recombination in the N-type doped dielectric layer 212 are relatively weak, and the contact resistance between the N-type doped dielectric layer 212 and the negative metal electrode is relatively small. These advantages combined make the photoelectric conversion efficiency of the back-contact photovoltaic cell relatively large.

[0047] In some other embodiments, during the partial catalytic doping process of the N-type doped dielectric layer 212, it is not limited to using a catalyst containing phosphine (PH 3) as a doping source, or gases containing arsenic (AsH 3 ) and / or SbH 3 ) gas as the doping source.

[0048] In some embodiments, in forming Figure 1 After the N-type tunneling oxide passivation contact structure 21 including the N-region tunneling oxide layer 211 and the N-type doped dielectric layer 212 is formed, and before the N-type doped dielectric layer 212 is partially catalytically doped, the silicon glass layer (not shown in the figure) of the N-type doped dielectric layer 212 is removed. The silicon glass layer is located on the side of the N-type doped dielectric layer 212 away from the N-region tunneling oxide layer 211, so that in the subsequent process of catalytically doping the N-type doped dielectric layer 212, phosphorus atoms and hydrogen atoms can diffuse more easily into the N-type doped dielectric layer 212.

[0049] The silicon glass layer may mainly be phosphorosilicate glass (PSG).

[0050] In addition, the method of removing the silicon glass layer may include removing it using a laser, or the method of removing the silicon glass layer may include removing it using an acid (including hydrofluoric acid and / or hydrochloric acid), or alternatively, the method of removing the silicon glass layer may include first modifying the silicon glass layer using a laser and then removing the silicon glass layer using an acid.

[0051] In some embodiments, after catalytically doping a portion of the N-type doped dielectric layer 212, a mask layer may be formed on the N-type doped dielectric layer 212, or in other words, a mask layer may be formed on the N-type catalytically doped portion 212b. In the subsequent wet processing of the substrate, the mask layer may be used to protect the catalytically doped N-type doped dielectric layer 212, and reduce the possibility of the catalytically doped N-type doped dielectric layer 212 being corroded and damaged.

[0052] The method for forming the mask layer may include: forming a mask layer on a side of the N-type catalytic doping portion 212b away from the N-type initial doping portion 212a by plasma enhanced chemical vapor deposition (PECVD), wherein the mask layer may include silicon oxide (SiO X )、Silicon Nitride(SiN X ) and at least one of silicon oxynitride (SiON). The method for forming the mask layer may also include: using oxygen or ozone to oxidize the N-type catalytic doping portion 212b to locally form silicon oxide (SiO X ), the silicon oxide (SiO X) can be used as a mask layer. The method for forming the mask layer may also include: coating a photoresist on the surface of the N-type catalytic doping portion 212b, and forming the mask layer after the photoresist is exposed.

[0053] In some other embodiments (not shown in the figure), the substrate may also include a P-type tunneling oxide passivation contact structure, and the P-type tunneling oxide passivation contact structure is arranged on the backlight surface of the silicon substrate. Among them, the P-type tunneling oxide passivation contact structure may include a P-region tunneling oxide layer and a P-type doped dielectric layer, and the P-region tunneling oxide layer is located between the silicon substrate and the P-type doped dielectric layer. The doped dielectric layer may be doped with at least one P-type element (a third main group element in the periodic table of chemical elements), such as boron, aluminum, gallium and other P-type elements. The P-type doped dielectric layer may include at least one of polycrystalline silicon, amorphous silicon and microcrystalline silicon. The P-type doped dielectric layer is in ohmic contact with the positive metal electrode during the subsequent metallization process. Accordingly, the method for forming the P-type doped dielectric layer may use LPCVD to form an intrinsic dielectric layer (containing at least one of polycrystalline silicon, amorphous silicon and microcrystalline silicon) on the side of the P-region tunneling oxide layer away from the silicon substrate. After the intrinsic dielectric layer is formed, impurities containing P-type elements are diffused into the intrinsic dielectric layer using a thermal diffusion process to form a P-type doped dielectric layer. A substrate including a P-type doped dielectric layer can be placed in a chemical vapor deposition chamber, and a gas containing borohydride is introduced into the chemical vapor deposition chamber, and the gas containing borohydride is used as a doping source. A metal wire is also provided in the chemical vapor deposition chamber. When the metal wire is energized, the metal wire can generate heat. The heat-generating metal wire can play a chemical catalytic role on borohydride. The chemical catalytic effect can catalytically decompose the borohydride into some particles. These particles may include boron atoms and hydrogen atoms. The boron atoms and hydrogen atoms can be doped into or diffused into the P-type doped dielectric layer, so that the P-type doped dielectric layer is partially catalytically doped. The back-contact photovoltaic cell prepared by the preparation method of this embodiment can also take into account the following advantages: the high-low junction (P + The field passivation effect of the back-contact photovoltaic cell is relatively strong, the tunneling oxide layer in the P region can still play a good chemical passivation role, the adverse effects of Auger recombination in the P-type doped dielectric layer are relatively weak, and the contact resistance between the P-type doped dielectric layer and the positive metal electrode is relatively small. These advantages combined make the photoelectric conversion efficiency of the back-contact photovoltaic cell relatively large.

[0054] In some other embodiments, during the partial catalytic doping process of the P-type doped dielectric layer, it is not limited to using a catalyst containing boron hydride (B 2 H 6 or BH 3 ) as a doping source, or a gas containing ‌aluminum alkane (AlH 3 ), methylgallium (GaH 3 ) and indium ethane (InH3 ) as a doping source.

[0055] In some embodiments, before catalytically doping a portion of the P-type doped dielectric layer, the silicon glass layer of the P-type doped dielectric layer can be removed. The silicon glass layer is located on the side of the P-type doped dielectric layer that is away from the P-region tunneling oxide layer, so that in the subsequent process of catalytically doping the portion of the P-type doped dielectric layer, boron atoms and hydrogen atoms can be more easily diffused into the P-type doped dielectric layer.

[0056] The silicon glass layer may be mainly borosilicate glass (PSG).

[0057] In addition, the method of removing the silicon glass layer may include removing it using a laser, or the method of removing the silicon glass layer may include removing it using an acid (including hydrofluoric acid and / or hydrochloric acid), or alternatively, the method of removing the silicon glass layer may include first modifying the silicon glass layer using a laser and then removing the silicon glass layer using an acid.

[0058] In some embodiments, after catalytically doping a portion of the P-type doped dielectric layer, a mask layer may be formed on the P-type doped dielectric layer, or in other words, a mask layer may be formed on the P-type catalytically doped portion. In the subsequent wet processing of the substrate, the mask layer may be used to protect the catalytically doped P-type doped dielectric layer and reduce the possibility of corrosion damage to the catalytically doped P-type doped dielectric layer.

[0059] The method of forming the mask layer for protecting the P-type doped dielectric layer may refer to the method described above using PECVD, oxidation treatment or photoresist, which will not be described in detail here.

[0060] In some embodiments, please refer to Figure 3 As shown, the light-receiving surface 11 of the silicon substrate 1 can also be catalytically doped to form a Figure 4 A top catalytic doping portion 112 is shown.

[0061] In some embodiments, under the condition that the silicon substrate 1 is an N-type silicon substrate, that is, under the condition that the silicon substrate 1 is also doped with an N-type element, the Figure 3The substrate of the structure shown is placed in a chemical vapor deposition chamber (not shown in the figure), and a gas containing phosphine is introduced into the chemical vapor deposition chamber, and the gas containing phosphine is used as a doping source. A metal wire (not shown in the figure) is also arranged in the chemical vapor deposition chamber. When the metal wire is energized, the metal wire can generate heat. The heat-generating metal wire can play a chemical catalytic role on phosphine. The chemical catalytic effect can catalytically decompose the phosphine into some particles. These particles may include phosphorus atoms and hydrogen atoms. The phosphorus atoms and hydrogen atoms can be doped into or diffused into the silicon substrate 1 through the light-receiving surface 11 to form a top catalytic doping portion 112 located on the top of the silicon substrate 1. The doping concentration of the top catalytic doping portion 112 is greater than the doping concentration of the silicon substrate 1. The top catalytic doping portion 112 is a heavily doped region relative to the silicon substrate 1, and the silicon substrate 1 is a lightly doped region relative to the top catalytic doping portion 112. A high-low junction (N + / N), the high and low junction (N + / N) can play a field passivation role in the back-contact photovoltaic cell to be prepared subsequently. This field passivation effect can hinder the tendency of photogenerated holes generated in the silicon substrate 1 to migrate toward the light-receiving surface 11 of the silicon substrate 1 or to migrate toward the top catalytic doping portion 112, and reduce the rate at which photogenerated holes are recombined at the interface between the silicon substrate 1 and the top catalytic doping portion 112, thereby promoting more photogenerated holes to migrate to the positive metal electrode.

[0062] During the catalytic doping process of the light-receiving surface 11 and the vicinity of the silicon substrate 1, since the temperature in the chemical vapor deposition chamber (for example, in the range of 350°C to 500°C) is relatively low, the temperature of the light-receiving surface 11 and the vicinity of the silicon substrate 1 is also relatively low, so that the number of lattice defects generated on the light-receiving surface 11 and the vicinity of the silicon substrate 1 is relatively small, and the number of new dangling bonds and new recombination centers generated on the light-receiving surface 11 and the vicinity of the silicon substrate 1 is relatively small, so that the photogenerated holes that can be generated by the back-contact photovoltaic cell to be prepared subsequently are not easily recombined at and near the interface between the silicon substrate 1 and the top catalytic doping portion 112, thereby facilitating the migration of relatively more photogenerated holes to the positive metal electrode.

[0063] During the catalytic doping process of the light-receiving surface 11 and the vicinity of the silicon substrate 1, phosphorus atoms and hydrogen atoms will diffuse synchronously from the light-receiving surface 11 into the silicon substrate 1, and hydrogen atoms can be combined with dangling bonds synchronously, and the adverse effects of the Auger recombination that can be produced are relatively weak. The relevant specific principles have been described above and will not be repeated here. Therefore, the photogenerated holes that can be generated by the back-contact photovoltaic cell to be prepared later are not easy to be recombined at and near the interface between the silicon substrate 1 and the top catalytic doping part 112, so that relatively more photogenerated holes can migrate to the positive metal electrode.

[0064] During the catalytic doping process of the light-receiving surface 11 and the vicinity of the silicon substrate 1, the mechanism of coordinated diffusion of phosphorus atoms and hydrogen atoms can promote the diffusion of phosphorus atoms from the light-receiving surface 11 to deeper into the silicon substrate 1, so that the number of lattice defects generated by the formed top catalytic doping part 112 is relatively small, and accordingly, the light reflectivity and light scattering rate of the top catalytic doping part 112 are relatively small. When the back-contact photovoltaic cell to be prepared is irradiated by sunlight, relatively more light can pass through the top catalytic doping part 112 per unit time and enter deeper into the silicon substrate 1, and the number of photogenerated electrons and photogenerated holes that can be generated by the silicon substrate 1 per unit time is relatively large.

[0065] According to the above, the back-contact photovoltaic cell prepared according to some embodiments of the preparation method provided in this application can take into account the following advantages: the number of photogenerated electrons and photogenerated holes that can be generated by the back-contact photovoltaic cell is relatively large, and the lifetime of the photogenerated holes (minority carriers) that can be generated by the back-contact photovoltaic cell is relatively high, so the photoelectric conversion efficiency of the prepared back-contact photovoltaic cell is relatively large.

[0066] In some other embodiments, during the catalytic doping process of the light receiving surface 11 of the silicon substrate 1 and its vicinity, the doping source is not limited to using a gas containing phosphine, but may also use a gas containing arsine and / or antimonide as a doping source.

[0067] In some other embodiments (not shown in the figures), under the condition that the silicon substrate is an N-type silicon substrate, that is, under the condition that the silicon substrate is doped with N-type elements, the substrate can be placed in a chemical vapor deposition chamber, and a gas containing at least one of borohydride, methyl gallium alkane and indium alkane is introduced into the chemical vapor deposition chamber. The gas containing at least one of borohydride, methyl gallium alkane and indium alkane is used as a doping source to catalytically dope the light-receiving surface of the silicon substrate to form a top catalytic doping portion located on the top of the silicon substrate.

[0068] In some other embodiments (not shown in the figures), under the condition that the silicon substrate is a P-type silicon substrate, that is, under the condition that the silicon substrate is doped with a P-type element, the substrate can be placed in a chemical vapor deposition chamber, and a gas containing at least one of borohydride, methyl gallium alkane and indium alkane is introduced into the chemical vapor deposition chamber. The gas containing at least one of borohydride, methyl gallium alkane and indium alkane is used as a doping source to catalytically dope the light-receiving surface of the silicon substrate to form a top catalytic doping portion located on the top of the silicon substrate.

[0069] In some other embodiments (not shown in the figures), under the condition that the silicon substrate is a P-type silicon substrate, that is, under the condition that the silicon substrate is doped with a P-type element, the substrate can be placed in a chemical vapor deposition chamber, and a gas containing at least one of phosphine, arsenic and antimonide is introduced into the chemical vapor deposition chamber. The gas containing at least one of phosphine, arsenic and antimonide is used as a doping source to catalytically dope the light-receiving surface of the silicon substrate to form a top catalytic doping portion located on the top of the silicon substrate.

[0070] In some embodiments (not shown in the figure), before the light-receiving surface and the vicinity of the silicon substrate are catalytically doped, an alkaline texturing liquid can be used to texturing the light-receiving surface of the silicon substrate to form a velvet surface (with multiple micron-sized grooves or pyramid structures) on the light-receiving surface of the silicon substrate, and the surface area of ​​the velvet surface is larger than the surface area of ​​the polished surface. During the catalytic doping process, the number of phosphorus atoms that can enter the silicon substrate through the velvet surface with a relatively large area per unit time is relatively large, and the required top catalytic doping part with a relatively large doping concentration can be quickly formed. During the catalytic doping process, the number of hydrogen atoms that can enter the silicon substrate through the velvet surface with a relatively large area per unit time is also relatively large. More hydrogen atoms can timely reduce the migration barrier of phosphorus atoms, thereby promoting the rapid diffusion of phosphorus atoms deeper into the silicon substrate. More hydrogen atoms can also fully combine with some newly generated dangling bonds, thereby significantly reducing the adverse effects of Auger recombination.

[0071] The alkaline texturing solution may include potassium hydroxide (KOH) and / or sodium hydroxide (NaOH).

[0072] In some embodiments, the light-receiving surface of the silicon substrate may be catalytically doped after the local N-type doping medium layer is catalytically doped. Since the temperature in the chemical vapor deposition chamber required for catalytic doping (for example, in the range of 350°C to 500°C) is relatively low, it can also be said that the temperature of the substrate during the catalytic doping process is lower than the temperature of the substrate during the process of forming the doped medium layer using a thermal diffusion process. Therefore, during the process of catalytically doping the light-receiving surface of the silicon substrate, the N-type elements that have been doped in the N-type doping medium layer by a thermal diffusion process are not easy to diffuse to the interface between the N-region tunneling oxide layer and the silicon substrate, and it is not easy to generate more new dangling bonds and new recombination centers at the interface between the N-region tunneling oxide layer and the silicon substrate, so that the N-region tunneling oxide layer can still chemically passivate the surface of the silicon substrate well.

[0073] In some other embodiments, after catalytically doping the light-receiving surface of the silicon substrate, a part of the N-type doped dielectric layer may be catalytically doped. Among them, after forming the top catalytic doping part on the light-receiving surface of the silicon substrate, an N-type tunneling oxidation passivation contact structure may be formed on the backlight surface of the silicon substrate, followed by catalytic doping of a part of the N-type doped dielectric layer. In the process of forming the N-type doped dielectric layer, a thermal diffusion process is required. The temperature of the thermal diffusion process (for example, greater than 700°C) is relatively high. The high temperature can promote the N-type elements (for example, phosphorus atoms) in the formed top catalytic doping part to continue to diffuse into the silicon substrate, so as to further reduce the number of lattice defects on the surface of the top catalytic doping part, and accordingly, to further reduce the light reflectivity and light scattering rate of the surface of the top catalytic doping part. The high temperature can also promote the continued diffusion of hydrogen atoms in the top catalytic doping part that have not yet been combined with dangling bonds, so that the hydrogen atoms that continue to diffuse can combine with the remaining dangling bonds, thereby further reducing the adverse effects of Auger recombination.

[0074] In some other embodiments, a part of the N-type doped medium layer and the light-receiving surface of the silicon substrate may be catalytically doped simultaneously. The preparation method of this embodiment has a relatively high preparation efficiency.

[0075] In some embodiments, during the catalytic doping process, the flow rate of the doping source introduced into the chemical vapor deposition chamber may be in the range of 30 standard cubic centimeters per minute (sccm) to 100 standard cubic centimeters per minute (sccm). Specifically, the flow rate of the doping source may be 30 sccm, 35 sccm, 40 sccm, 45 sccm, 50 sccm, 55 sccm, 60 sccm, 65 sccm, 70 sccm, 75 sccm, 80 sccm, 85 sccm, 90 sccm, 95 sccm, or 100 sccm.

[0076] In some embodiments, during the catalytic doping process, the doping source further includes hydrogen or argon, and the hydrogen or argon serves as a carrier gas.

[0077] In some embodiments, during the catalytic doping process, the pressure inside the chemical vapor deposition chamber may be in the range of 10 mTorr to 15 mTorr, wherein the pressure inside the chemical vapor deposition chamber may specifically be 10 mTorr, 11 mTorr, 12 mTorr, 13 mTorr, 14 mTorr or 15 mTorr.

[0078] In some embodiments, during the catalytic doping process, the operating power of the metal wire arranged inside the chemical vapor deposition chamber can be in the range of 3 kilowatts (kW) to 8 kilowatts (kW), and the operating power of the metal wire can specifically be 3kW, 3.5kW, 4kW, 4.5kW, 5kW, 5.5kW, 6kW, 6.5kW, 7kW, 7.5kW or 8kW.

[0079] In some embodiments, the metal wire disposed inside the chemical vapor deposition chamber may be a tungsten metal wire or a tantalum metal wire.

[0080] In some embodiments, the time for implementing the catalytic doping can be in the range of 10 minutes (min) to 30 minutes (min), and the time for implementing the catalytic doping can specifically be 10min, 11min, 12min, 13min, 14min, 15min, 16min, 17min, 18min, 19min, 20min, 21min, 22min, 23min, 24min, 25min, 26min, 27min, 28min, 29min or 30min.

[0081] In some embodiments, the process of utilizing the catalytic effect of a metal wire in a chemical vapor deposition chamber to perform catalytic doping on a substrate may also be referred to as catalytic chemical vapor deposition (CAT-CVD) or hot wire chemical vapor deposition (HWCVD).

[0082] The following content of this article provides a specific embodiment of the method for preparing a back-contact photovoltaic cell, and the content is as follows.

[0083] Provide as Figure 5 The substrate 10 shown includes a silicon substrate 1, which may be an N-type silicon substrate, and has a light-receiving surface 11 and a backlight surface 12. The upper side of the silicon substrate 1 is the light-receiving side 1a, and the lower side of the silicon substrate 1 is the backlight side 1b. After being prepared into the desired back-contact photovoltaic cell, sunlight can be directly irradiated to the light-receiving surface 11 from the light-receiving side 1a, and reflected light from the environment can be irradiated to the backlight surface 12 from the backlight side 1b.

[0084] The direction Y may represent the direction from the backlight side 1 b of the silicon substrate 1 to the light receiving side 1 a , or the direction Y may represent the direction from the backlight surface 12 of the silicon substrate 1 to the light receiving surface 11 .

[0085] Use alkaline polishing liquid to polish Figure 5 The silicon substrate 1 shown has a light receiving surface 11 and a light-receiving surface 12 .

[0086] LPCVD is used to sequentially deposit the following on the backlight side 1b of the silicon substrate 1: Figure 6 The P-type tunnel oxide layer 221 and the intrinsic dielectric layer (not shown in the figure) are tunneled through the P-type tunnel oxide layer 221 and the intrinsic dielectric layer (not shown in the figure), and boron is diffused into the intrinsic dielectric layer by a thermal diffusion process to form a P-type doped dielectric layer 222, that is, a P-type doped dielectric layer 222 is formed. Figure 6 The P-type tunneling oxide passivation contact structure 22 is shown. Accordingly, the surface of the P-type doped dielectric layer 222 can be oxidized to form a borosilicate glass layer 22a. The borosilicate glass layer 22a can act as a mask for the P-type doped dielectric layer 222. When the substrate 10 is subsequently wet-processed, the P-type doped dielectric layer 222 is protected by the borosilicate glass layer 22a, and the P-type doped dielectric layer 222 is not easily corroded and damaged.

[0087] Please refer to Figure 7 As shown, laser is used to remove the local structure of the borosilicate glass layer 22a and the local structure of the P-type tunneling oxide passivation contact structure 22 to form a first window 2a. The first window 2a penetrates the borosilicate glass layer 22a and the P-type tunneling oxide passivation contact structure 22 in the direction Y, and a part of the backlight surface 12 of the silicon substrate 1 is exposed by the first window 2a.

[0088] The portion of the backlight surface 12 exposed by the first window 2a is polished using an alkaline polishing solution.

[0089] Please refer to Figure 8 As shown, LPCVD is used to sequentially deposit the following on the backlight side of the silicon substrate 1: Figure 8 The N-region tunnel oxide layer 211 and the intrinsic dielectric layer (not shown in the figure) are tunneled through the N-region tunnel oxide layer 211, and phosphorus is diffused into the intrinsic dielectric layer by a thermal diffusion process to form an N-type doped dielectric layer 212, that is, to form a Figure 8 The N-type tunneling oxide passivation contact structure 21 is shown. Accordingly, a phosphorus-silicate glass layer 21a exists on the surface of the N-type doped dielectric layer 212.

[0090] Remove the phosphosilicate glass layer 21a to form Fig. 9 The structure shown.

[0091] In such Fig. 9 Based on the structure shown in FIG. 1 , a gas containing phosphine is used as a doping source to catalytically dope the N-type doped dielectric layer 212, so that the N-type doped dielectric layer 212 includes the following: Fig.10 An initial doping portion 212a and a catalytic doping portion 212b are shown.

[0092] The catalytic doping portion 212b is formed as follows Fig.11The mask layer 3 (eg silicon oxide) shown can act as a mask for the catalytic doping portion 212b. During the subsequent wet processing of the substrate 10, the catalytic doping portion 212b is protected by the mask layer 3 and is not easily damaged by corrosion.

[0093] In such Fig.11 Based on the structure shown in FIG. 1 , a local structure of the N-type tunneling oxide passivation contact structure 21, a local structure of the mask layer 3, a local structure of the P-type tunneling oxide passivation contact structure 22, and a local structure of the borosilicate glass layer 22a are removed by laser to form a structure as shown in FIG. Fig.12 In the structure shown, the N-type tunneling oxide passivation contact structure 21 and the P-type tunneling oxide passivation contact structure 22 are alternately arranged and spaced in the direction X, a second window 2b is arranged between the N-type tunneling oxide passivation contact structure 21 and the P-type tunneling oxide passivation contact structure 22, and a portion of the backlight surface 12 of the silicon substrate 1 is exposed by the second window 2b.

[0094] The bypass coating layer 2c (an additional structure formed in the process of forming the tunnel oxide layer and the intrinsic dielectric layer by LPCVD) on the light-receiving side of the silicon substrate 1 is chain-etched to form a Fig.13 The structure shown in FIG. Among them, the chain etching can utilize an acid solution containing nitric acid to remove the surrounding plating layer 2c.

[0095] Using alkaline texturing liquid in Fig.13 The light receiving surface 11 is textured to form a Fig.14 The suede 111 is shown.

[0096] The mask layer 3 and the borosilicate glass layer 22a are removed by pickling to form a Fig.15 The structure shown.

[0097] The phosphine-containing gas is used as a doping source to catalytically dope the velvet surface 111 located on the light-receiving surface to form a Fig.16 The top catalytic doping portion 112 is shown. Accordingly, the top catalytic doping portion 112 also includes a velvet surface 111.

[0098] In such Fig.16 Based on the structure shown in the figure, the atomic layer deposition process (Atomic Layer Deposition, ALD) is used for double-sided deposition to form the following Fig.17The aluminum oxide passivation layer 4 shown. An aluminum oxide passivation layer 4 located on the backlight side of the silicon substrate 1 and the N-type catalytic doping portion 212b can form an aluminum-oxygen-silicon chemical bond (Al-O-Si), that is, the aluminum oxide passivation layer 4 can play a good chemical passivation role. Similarly, an aluminum oxide passivation layer 4 located on the light-receiving side of the silicon substrate 1 and the top catalytic doping portion 112 can form an aluminum-oxygen-silicon chemical bond (Al-O-Si), that is, the aluminum oxide passivation layer 4 can play a good chemical passivation role.

[0099] The thickness of the aluminum oxide passivation layer 4 (the dimension along the direction Y) may be in the range of 1 nm to 10 nm, and the thickness may specifically be 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 9 nm or 10 nm.

[0100] In such Fig.17 Based on the structure shown, PECVD double-sided deposition is used to form Fig.18 The silicon nitride passivation layer 5 shown in the figure can play a good anti-reflection role, so that more light can enter the silicon substrate 1.

[0101] Among them, the thickness dimension (dimension along direction Y) of the silicon nitride passivation layer 5 can be in the range of 40nm~100nm, and the thickness dimension can specifically be 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm or 100nm.

[0102] In such Fig.18 Based on the structure shown, a metallization process (including screen printing and sintering) is used to form a Fig.19 The negative metal electrode 6 shown in the figure is in ohmic contact with the N-type doped dielectric layer 212, and forms a Fig.19 The positive metal electrode 7 shown forms an ohmic contact with the P-type doped dielectric layer 222 .

[0103] Please refer to Fig.19 As shown, both the N-type initial doping portion 212 a and the N-type catalytic doping portion 212 b of the N-type doped dielectric layer 212 are in ohmic contact with the negative metal electrode 6 .

[0104] In a second aspect, the present application provides some embodiments of a back contact photovoltaic cell (BC Solar Cell). The back contact photovoltaic cell can be prepared by the method for preparing the back contact photovoltaic cell described above. The structure of the prepared back contact photovoltaic cell can be as follows: Fig.19As shown. The back contact photovoltaic cell comprises a silicon substrate 1, a tunneling oxide passivation contact structure 2, a top catalytic doping portion 112, an aluminum oxide passivation layer 4, a silicon nitride passivation layer 5, a negative metal electrode 6 and a positive metal electrode 7. The tunneling oxide passivation contact structure 2 comprises an N-type tunneling oxide passivation contact structure 21 and a P-type tunneling oxide passivation contact structure 22. The N-type tunneling oxide passivation contact structure 21 comprises an N-region tunneling oxide layer 211 and an N-type doped dielectric layer 212. The P-type tunneling oxide passivation contact structure 22 comprises a P-region tunneling oxide layer 221 and a P-type doped dielectric layer 222. The N-type doped dielectric layer 212 comprises an N-type initial doping portion 212a and an N-type catalytic doping portion 212b. Accordingly, Fig.19 The photoelectric conversion efficiency of the back-contact photovoltaic cell shown is relatively large, and the relevant specific technical effects have been described above and will not be repeated here.

[0105] Fig.19 The back contact photovoltaic cell shown may also be referred to as a TBC photovoltaic cell, the full name of which is a photovoltaic cell formed by combining a tunnel oxide passivated contact structure (TOPCon) and a back contact structure (BC).

[0106] Among them, if Fig.19 The silicon substrate 1 of the back contact photovoltaic cell shown is an N-type silicon substrate. The photogenerated holes that can be generated by the silicon substrate 1 are minority carriers, and the minority carrier lifetime is positively correlated with the photoelectric conversion efficiency. Fig.19 The minority carrier lifetime of the back-contact photovoltaic cell (catalytically doped) shown in FIG. 1 is compared with the minority carrier lifetime of the back-contact photovoltaic cell (not catalytically doped) of the related art, as shown in FIG. Fig. 20 As shown, Fig.19 The minority carrier lifetime of the back-contact photovoltaic cell shown can range from 700 microseconds (μs) to 2700 microseconds (μs), and can be specifically 700μs, 800μs, 900μs, 1000μs, 1100μs, 1200μs, 1300μs, 1400μs, 1500μs, 1600μs, 1700μs, 1800μs, 1900μs, 2000μs, 2100μs, 2200μs, 2300μs, 2400μs, 2500μs, 2600μs, 2700μs, 2800μs, 2900μs, 3000μs, 3100μs or 3200μs. The minority carrier lifetime of the back-contact photovoltaic cell (not catalytically doped) of the related art is in the range of 380μs to 600μs. Therefore, compared with the related art, the minority carrier lifetime of the back-contact photovoltaic cell of the embodiment of the present application is relatively large, and the photoelectric conversion efficiency of the back-contact photovoltaic cell is relatively large.

[0107] Through comparative testing Fig.19The difference between the N-type catalytic doping portion 212b (catalytically doped) of the back contact photovoltaic cell shown in FIG. 1 and the heavily doped region (uncatalytically doped) of the back contact photovoltaic cell in the related art in terms of doping concentration and doping depth is shown in FIG. Fig.21 As shown, compared with the related art, the doping concentration of the N-type catalytic doping part of the back contact photovoltaic cell of the embodiment of the present application is relatively large and the doping depth is relatively large. In detail, the doping concentration of the N-type catalytic doping part of the back contact photovoltaic cell of the embodiment of the present application is greater than 3E+19cm -3 , and the depth of the N-type catalytic doping part of the back-contact photovoltaic cell of the embodiment of the present application can reach 0.4 microns. Therefore, the N-type catalytic doping part of the back-contact photovoltaic cell of the embodiment of the present application can play a good field passivation role and the adverse effect of the Auger recombination that can be generated is relatively weak.

[0108] In some other embodiments (not shown in the figures), the silicon substrate may be a P-type silicon substrate.

[0109] In a third aspect, the present application provides some embodiments of a back-contact photovoltaic cell assembly, which may include a laminate and a frame, wherein the frame is installed at the edge of the laminate. The laminate may include a stacked photovoltaic glass, a first encapsulation film, a battery string, a second encapsulation film, and a backplane. Alternatively, the laminate may include a stacked first photovoltaic glass, a first encapsulation film, a battery string, a second encapsulation film, and a second photovoltaic glass. Among them, the battery string may be formed by electrically connecting a plurality of the back-contact photovoltaic cells described above, and the number of battery strings may be one, two, or more.

[0110] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for preparing a back contact photovoltaic cell, characterized in that: The preparation method comprises: Providing a substrate, the substrate comprising a silicon substrate, a tunneling oxide passivation contact structure being arranged on a backlight surface of the silicon substrate, wherein the tunneling oxide passivation contact structure comprises a doped dielectric layer; catalytically doping a part of the doping medium layer, and / or catalytically doping a light-receiving surface of the silicon substrate; A metal electrode is formed in ohmic contact with the doped dielectric layer.

2. The method for preparing a back-contact photovoltaic cell according to claim 1, characterized in that: The doping medium layer comprises an N-type doping medium layer, and a gas containing phosphine is used as a doping source in the process of catalytically doping a part of the N-type doping medium layer.

3. The method for preparing a back contact photovoltaic cell according to claim 1, characterized in that: After providing the tunneling oxide passivation contact structure and before catalytically doping a portion of the doped medium layer, the preparation method further includes: The silicon glass layer of the doped medium layer is removed.

4. The method for preparing a back contact photovoltaic cell according to claim 3, characterized in that: After the catalytic doping of the part of the doping medium layer, the preparation method further comprises: A mask layer is formed on the doped dielectric layer.

5. The method for preparing a back-contact photovoltaic cell according to any one of claims 1 to 4, characterized in that: Before catalytically doping the light-receiving surface of the silicon substrate, the preparation method further comprises: The light-receiving surface of the silicon substrate is textured using an alkaline texturing liquid.

6. The method for preparing a back-contact photovoltaic cell according to any one of claims 1 to 4, characterized in that: Under the condition that the silicon substrate is an N-type silicon substrate, the method for catalytically doping the light-receiving surface of the silicon substrate comprises: A phosphine-containing gas is used as a doping source.

7. The method for preparing a back-contact photovoltaic cell according to any one of claims 1 to 4, characterized in that: After implementing the catalytic doping of the local doping medium layer, the catalytic doping of the light-receiving surface of the silicon substrate is implemented, or, after implementing the catalytic doping of the light-receiving surface of the silicon substrate, the catalytic doping of the local doping medium layer is implemented, or, the catalytic doping of the local doping medium layer and the catalytic doping of the light-receiving surface of the silicon substrate are implemented simultaneously.

8. The method for preparing a back-contact photovoltaic cell according to any one of claims 1 to 4, characterized in that: The temperature of the catalytic doping is in the range of 350°C to 500°C.

9. The method for preparing a back-contact photovoltaic cell according to any one of claims 1 to 4, characterized in that: After the catalytic doping and before forming the metal electrode, the preparation method further comprises: Aluminum oxide passivation layer is deposited on both sides using atomic layer deposition process; A silicon nitride passivation layer is deposited on the aluminum oxide passivation layer by plasma enhanced chemical vapor deposition.

10. A back contact photovoltaic cell, characterized in that: The back-contact photovoltaic cell sheet is prepared by the method for preparing a back-contact photovoltaic cell sheet according to any one of claims 1 to 9.

11. A back contact photovoltaic cell assembly, characterized in that: The back-contact photovoltaic cell assembly includes at least one cell string, and the cell string is formed by electrically connecting the back-contact photovoltaic cell sheets according to claim 10.

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