High frequency semiconductor package

Abstract

The ground terminal (11b), the first to third ground patterns (11a, 21a, 21b), the first and second ground vias (12b, 22), and the third connection member (25) constitute an electromagnetic shielding structure covering the periphery of the signal terminal (14b), the first and second signal patterns (14a, 24), the first signal via (12a), the semiconductor chip (103), and the first and second connection members (26a, 26b).

Description

Technical Field

[0001] The present disclosure relates to high frequency semiconductor packages with electromagnetic shielding. Background Art

[0002] In recent years, electronic devices have been required to be miniaturized and highly functional, and high-density installation of substrate-mounted components is required. In the wireless front-end part of communication equipment such as smartphones, mobile phone base stations, and radar devices, electromagnetic interference between high-frequency devices is particularly problematic due to high-density installation. Therefore, a variety of structures with electromagnetic shielding in a single high-frequency device have been proposed. Specifically, a structure has been proposed in which a metal film is formed on the outside of the sealing resin of the package and the metal film is electrically connected to the ground wiring of the package to form an electromagnetic shield (for example, refer to Patent Document 1).

[0003] Patent Document 1: Japanese Patent Application Publication No. 2017-022167

[0004] However, in order to form a metal film on the outside of the sealing resin, special processes such as sputtering, evaporation, and plating are required. Therefore, there is a problem of higher manufacturing costs compared to conventional resin-sealed packages. In addition, there is a problem of small connection area between the metal film and the ground wiring of the package, and low mechanical reliability. Summary of the invention

[0005] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to obtain a semiconductor device capable of reducing manufacturing costs and improving mechanical reliability.

[0006] The high-frequency semiconductor package involved in the present disclosure is characterized in that it comprises: a first substrate, comprising a first substrate, a signal terminal and a ground terminal arranged on the lower surface of the first substrate, a first signal pattern and a first ground pattern arranged on the upper surface of the first substrate, a first signal via hole penetrating the first substrate and electrically connecting the signal terminal and the first signal pattern, and a first ground via hole penetrating the first substrate and electrically connecting the ground terminal and the first ground pattern; a semiconductor chip mounted on the upper surface of the first substrate; a second substrate, comprising a second substrate, a second signal pattern and a second ground pattern arranged on the lower surface of the second substrate, a third ground pattern arranged on the entire upper surface of the second substrate, and a first ground via hole penetrating the second substrate and electrically connecting the second ground pattern and the third ground pattern. The semiconductor chip and the first and second grounding patterns are electrically connected to each other, and the grounding terminals, the first grounding patterns to the third grounding patterns, the first grounding vias, the second grounding vias, and the third connecting components constitute an electromagnetic shielding structure covering the periphery of the signal terminals, the first signal pattern, the second signal pattern, the first signal vias, the semiconductor chip, the first connecting components, and the second connecting components.

[0007] Another high-frequency semiconductor package disclosed in the present disclosure is characterized in that it comprises: a first substrate having a first substrate, a signal terminal and a ground terminal arranged on the lower surface of the first substrate, a first signal pattern and a first ground pattern arranged on the upper surface of the first substrate, a first signal via penetrating the first substrate and electrically connecting the signal terminal and the first signal pattern, and a first ground via penetrating the first substrate and electrically connecting the ground terminal and the first ground pattern; a semiconductor chip mounted on the upper surface of the first substrate; a second substrate having a second substrate, a second signal pattern and a second ground pattern arranged on the lower surface of the second substrate, a third ground pattern arranged on the entire upper surface of the second substrate, and a second ground via penetrating the second substrate and electrically connecting the second ground pattern and the third ground pattern. Via; a first connecting component connecting the signal pad of the semiconductor chip and the second signal pattern; a second connecting component connecting the second signal pattern and the first signal pattern; and a third connecting component connecting the first ground pattern and the second ground pattern, the ground terminal, the first ground pattern to the third ground pattern, the first ground via, the second ground via, and the third connecting component constitute an electromagnetic shielding structure covering the periphery of the signal terminal, the first signal pattern, the second signal pattern, the first signal via, the semiconductor chip, the first connecting component and the second connecting component, a cavity is provided on the upper surface side of the first substrate, the upper surface of the ground terminal is exposed in the cavity, and the semiconductor chip is mounted on the upper surface of the ground terminal inside the cavity.

[0008] In the high-frequency semiconductor package disclosed in the present invention, the grounding patterns and grounding vias of the first substrate and the second substrate cover the periphery of the semiconductor chip and the like to form an electromagnetic shielding structure. As a result, electromagnetic shielding can be formed using a conventional resin-sealed package manufacturing method without using special processes such as evaporation, sputtering, and plating, thereby reducing the manufacturing cost of the high-frequency semiconductor package with electromagnetic shielding. In addition, the grounding pattern and grounding vias other than the grounding terminal mounted on the main substrate are located on the inner side of the sealing resin. Therefore, the electromagnetic shielding structure is not exposed to the outside of the sealing resin, thereby improving mechanical reliability.

[0009] In other high-frequency semiconductor packages disclosed herein, the grounding patterns and grounding vias of the first substrate and the second substrate cover the periphery of the semiconductor chip and the like to form an electromagnetic shielding structure. As a result, electromagnetic shielding can be formed using a conventional packaging manufacturing method without using special processes such as evaporation, sputtering, and plating, thereby reducing the manufacturing cost of a high-frequency semiconductor package with electromagnetic shielding. In addition, the grounding pattern and grounding vias other than the grounding terminals mounted on the main substrate are located on the inner side of the package. Therefore, the electromagnetic shielding structure is not exposed to the outside of the package, thereby improving mechanical reliability. In addition, since there is no need for a molding process, it helps to reduce costs. In addition, the semiconductor chip is stored in the chamber, which helps to reduce the thickness of the package. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a bottom view showing the mounting surface of the high-frequency semiconductor package according to the first embodiment.

[0011] Figure 2 It means along Figure 1 A cross-sectional view of the I-II cut.

[0012] Figure 3 This is a bottom view showing the second substrate of the high-frequency semiconductor package according to the first embodiment.

[0013] Figure 4 This is a plan view showing a first substrate of the high-frequency semiconductor package according to the first embodiment.

[0014] Figure 5 This is an enlarged cross-sectional view of a main portion of the high-frequency semiconductor package according to the second embodiment.

[0015] Figure 6 It is a cross-sectional view showing a high-frequency semiconductor package according to the third embodiment.

[0016] Figure 7 It is a plan view showing the inner layer of the second substrate involved in the third embodiment.

[0017] Figure 8 This is an enlarged cross-sectional view of a main portion of a high-frequency semiconductor package according to a fourth embodiment.

[0018] Fig. 9 This is an enlarged plan view of a main portion of the mounting surface of the second substrate of the high-frequency semiconductor package according to the fourth embodiment.

[0019] Fig.10 It is a cross-sectional view showing a high-frequency semiconductor package according to the fifth embodiment. DETAILED DESCRIPTION

[0020] A high-frequency semiconductor package according to an embodiment will be described with reference to the accompanying drawings. The same or corresponding components are denoted by the same reference numerals and overlapping descriptions may be omitted.

[0021] Implementation Method 1

[0022] Figure 1 It is a bottom view showing the mounting surface of the high-frequency semiconductor package according to the first embodiment. Figure 2 It is along Figure 1 The high-frequency semiconductor package includes a first substrate 10 , a second substrate 20 , a semiconductor chip 103 , and a sealing resin 101 .

[0023] In the first substrate 10, a ground pattern 11a and a signal pattern 14a are provided on the upper surface of the first base material 13. A ground terminal 11b and a signal terminal 14b are provided on the lower surface of the first base material 13. The signal pattern 14a and the signal terminal 14b are electrically connected through a signal via 12a that penetrates the first base material 13. The ground pattern 11a and the ground terminal 11b are electrically connected through the ground via 12b that penetrates the first base material 13. An opening is provided in the central portion of the first base material 13 when viewed from above. A heat sink 15 is pressed into the opening of the first base material 13. The upper surface of the heat sink 15 is exposed on the upper surface of the first base material 13. The lower surface of the heat sink 15 is exposed on the lower surface of the first base material 13.

[0024] In the second substrate 20, a ground pattern 21a and a signal pattern 24 are provided on the lower surface of the second base material 23. The ground pattern 21b covers the entire upper surface of the second base material 23. The ground pattern 21a and the ground pattern 21b are electrically connected through a ground via 22 that penetrates the second base material 23. A grounding metal column 25 is formed on the ground pattern 21a, and signal metal columns 26a and 26b are formed on the signal pattern 24. Solder 102 is plated at the ends of the grounding metal column 25 and the signal metal columns 26a and 26b.

[0025] The second substrate 20 is mounted on the first substrate 10 by a flip-chip mounting method. By this flip-chip mounting, the signal metal column 26a is connected to the signal pad 103a formed on the upper surface of the semiconductor chip 103 through the solder 102. In addition, the signal metal column 26b is connected to the signal pattern 14a of the first substrate 10 through the solder 102. Thus, the signal pad 103a is electrically connected to the signal terminal 14b via the signal metal column 26a, the signal pattern 24 of the second substrate 20, the signal metal column 26b, the signal pattern 14a of the first substrate 10, and the signal via 12a. As a result, the semiconductor chip 103 can transmit and receive signals to the outside.

[0026] In addition, by flip-chip mounting, the grounding metal column 25 is electrically connected to the grounding pattern 11a through the solder 102. As a result, the grounding pattern 21b of the second substrate 20, the via 22 and the grounding pattern 21a, the grounding metal column 25, the grounding pattern 11a of the first substrate 10, the grounding via 12b and the grounding terminal 11b are electrically connected. As a result, the potential of the ground of the first substrate 10 and the ground of the second substrate 20 becomes a common potential. The common ground of the first substrate 10 and the second substrate 20 covers the semiconductor chip 103, the signal metal columns 26a, 26b, the signal patterns 14a, 24, the signal via 12a, and the signal terminal 14b, and forms an electromagnetic shielding structure against external interference.

[0027] Figure 3 1 is a bottom view showing the second substrate of the high-frequency semiconductor package according to Embodiment 1. The ground vias 22 and the grounding metal pillars 25 are respectively arranged in a ring shape along the peripheral portion of the second substrate 20. The signal pattern 24 and the signal metal pillars 26 are arranged inside the ring formed by the ground vias 22 and the grounding metal pillars 25.

[0028] Figure 4 1 is a plan view showing the first substrate of the high-frequency semiconductor package according to Embodiment 1. The ground vias 12b are arranged in a ring shape along the periphery of the first substrate 10. The signal pattern 14a, the signal vias 12a, and the semiconductor chip 103 are arranged inside the ring formed by the ground vias 12b.

[0029] As described above, in this embodiment, the ground pattern and ground via of the first substrate 10 and the second substrate 20 cover the periphery of the semiconductor chip 103 and the like to form an electromagnetic shielding structure. As a result, electromagnetic shielding can be formed by using a common manufacturing method of a resin-sealed package without using special processes such as evaporation, sputtering, and plating, thereby reducing the manufacturing cost of a high-frequency semiconductor package with electromagnetic shielding. In addition, the ground pattern and ground via other than the ground terminal 11b mounted on the main substrate are located inside the sealing resin 101. Therefore, the electromagnetic shielding structure is not exposed to the outside of the sealing resin 101, thereby improving mechanical reliability.

[0030] In this embodiment, the heat sink 15 is provided assuming that the heat generated by the semiconductor chip 103 is large. However, if the heat generated by the semiconductor chip 103 is not a problem, a general ground via or ground pattern may be provided instead of the heat sink 15 .

[0031] In addition, by configuring the interval between adjacent ground vias 22 to be smaller than the half wavelength λ of the desired frequency, it is possible to ensure better electromagnetic shielding performance at the desired frequency. The same applies to the interval between adjacent ground vias 12b and the interval between adjacent ground metal pillars 25. The wavelength λ inside a dielectric with a relative dielectric constant εr is proportional to the inverse of the wavelength λ in free space with respect to √(εr).

[0032] Implementation Method 2

[0033] Figure 5 This is an enlarged cross-sectional view of the main part of the high-frequency semiconductor package according to Embodiment 2. Signal solder balls 102a, 102b and ground solder balls 102c are used instead of the signal metal pillars 26a, 26b, the ground metal pillar 25 and the solder 102 of Embodiment 1.

[0034] By flip-chip mounting, the signal solder ball 102a connects the signal pad 103a of the semiconductor chip 103 and the signal pattern 24 of the second substrate 20. The signal solder ball 102b connects the signal pattern 24 of the second substrate 20 and the signal pattern 14a of the first substrate 10. The ground solder ball 102c connects the ground pattern 11a of the first substrate 10 and the ground pattern 21a of the second substrate 20. The other structures are the same as those of the first embodiment.

[0035] The grounding solder ball 102c becomes a part of the electromagnetic shielding structure that covers the periphery of the semiconductor chip 103 and the like. Thus, as in the first embodiment, the manufacturing cost can be reduced and the mechanical reliability can be improved. In addition, by using the signal solder balls 102a, 102b and the grounding solder ball 102c, the height deviation of the semiconductor chip 103 and the warping of the substrate caused by the thickness of the die bonding material can be absorbed. As a result, the mounting performance of the flip-chip mounting is improved.

[0036] Implementation 3

[0037] Figure 6 2 is a cross-sectional view showing a high-frequency semiconductor package according to Embodiment 3. The second substrate 20 is a multi-layer substrate, and a harmonic processing filter 27, inner layer signal patterns 28a, 28b, and a ground pattern 21c are provided on the inner layer of the second base material 23. Signal patterns 24a, 24b are provided on the surface of the second substrate 20.

[0038] The signal pattern 24a is electrically connected to the signal pad 103a of the semiconductor chip 103 through the signal metal pillar 26a. The signal pattern 24b is electrically connected to the signal pattern 14a of the first substrate 10 through the signal metal pillar 26b. The signal pattern 24a is electrically connected to the inner layer signal pattern 28a through the signal via 22a. The signal pattern 24b is electrically connected to the inner layer signal pattern 28b through the signal via 22b. The ground patterns 21a, 21b, and 21c are electrically connected through the ground via 22.

[0039] Figure 7 2 is a top view showing the inner layer of the second substrate involved in Embodiment 3. The inner layer signal patterns 28a and 28b are electrically connected to the harmonic processing filter 27. The ground via 22 is arranged in a ring shape along the peripheral portion of the second substrate 20. The harmonic processing filter 27, the signal vias 22a and 22b, and the inner layer signal patterns 24a and 24b are arranged inside the ring formed by the ground via 22. Thus, the common ground of the first substrate 10 and the second substrate 20 covers the surroundings of the harmonic processing filter 27, the signal vias 22a and 22b, and the inner layer signal patterns 24a and 24b, thereby forming an electromagnetic shielding structure against external interference.

[0040] The output signal of the semiconductor chip 103 is output to the harmonic processing filter 27 via the signal metal pillar 26a, the signal pattern 24a, the signal via 22a, and the inner signal pattern 28a. The output of the harmonic processing filter 27 is output to the signal terminal 14b via the inner signal pattern 28b, the signal via 22b, the signal pattern 24b, the signal metal pillar 26b, the signal pattern 14a, and the via 12b.

[0041] Semiconductor chip 103 is a semiconductor high-frequency amplifier. Generally, in a semiconductor high-frequency amplifier, high-order harmonics such as 2 times and 3 times the operating frequency are generated. In order to remove these high-order harmonics from the output signal, a high-order harmonic processing filter such as a low-pass filter or a band-pass filter is provided on the output side of the semiconductor high-frequency amplifier. The high-order harmonic processing filter is formed by a line pattern, but when the frequency of use is high, the line pattern becomes an antenna, which sometimes receives electromagnetic interference or radiates signals on the contrary and brings electromagnetic interference to adjacent components. Therefore, it is necessary to implement electromagnetic shielding against external interference. As an example of a semiconductor high-frequency amplifier, in the case where a motherboard of a multi-layer substrate is equipped with a structure of a high-frequency semiconductor package, a high-order harmonic processing filter is sometimes built into the inner layer of the motherboard, and the motherboard's ground pattern or ground via is used to surround the surroundings to have electromagnetic shielding. In order to have electromagnetic shielding, it is necessary to use a ground pattern and a ground via to cover the surroundings, occupying the mounting area of ​​the multi-layer substrate, affecting the degree of freedom of design.

[0042] In contrast, the high-frequency semiconductor package according to the present embodiment provides a harmonic processing filter 27 having electromagnetic shielding properties on the second substrate 23. This eliminates the need to build a harmonic processing filter into the inner layer of the motherboard substrate, thereby miniaturizing the motherboard and improving the design freedom of the motherboard.

[0043] Implementation 4

[0044] Figure 8 This is an enlarged cross-sectional view of a main portion of a high-frequency semiconductor package according to a fourth embodiment. Fig. 9 It is a plan view enlarging a main part of the mounting surface of the second substrate of the high-frequency semiconductor package according to Embodiment 4. The passive component 28 is mounted on the surface of the second substrate 20 and is electrically connected between the signal pattern 24 and the ground pattern 21 .

[0045] The passive component 28 is, for example, a capacitor, and functions as a bypass capacitor for the semiconductor chip 103. The passive component 28 is not limited to a capacitor, and may be a passive element such as a resistor or a coil. In addition, the connection of the passive component 28 is not necessarily limited to the connection between the signal pattern 24 and the ground pattern 21.

[0046] The first substrate 10 is provided with a semiconductor chip 103, signal vias, and ground vias having a large area, leaving no space for mounting the passive components 28. Therefore, it is difficult to mount the passive components 28 on the first substrate 10 while maintaining the original substrate size.

[0047] In contrast, in the second substrate 20, the design freedom of the substrate is large, and the passive component 28 can be easily arranged while maintaining the substrate size. Therefore, in this embodiment, there is no need to install a bypass capacitor on the first substrate 10, which helps to reduce the package size. In addition, the periphery of the passive component 28 is covered by the common ground of the first substrate 10 and the second substrate 20, so it has electromagnetic shielding properties against external interference.

[0048] Implementation method 5

[0049] Fig.102 is a cross-sectional view showing a high-frequency semiconductor package according to Embodiment 5. A cavity 29 is provided on the upper surface side of the first substrate 13. The upper surface of the ground terminal 11b provided at the center portion of the lower surface of the first substrate 13 is exposed in the cavity 29. The semiconductor chip 103 is mounted on the upper surface of the ground terminal 11b in the cavity 29. The signal metal column 26a is formed on the signal pad 103a of the semiconductor chip 103. By flip-chip mounting, the signal metal column 26a is connected to the signal pattern 24 of the second substrate 20 through the solder 102. The signal pattern 24 of the second substrate 20 is connected to the signal pattern 14a of the first substrate 10 through the solder 102. In addition, the ground pattern 21a of the second substrate 20 is electrically connected to the ground pattern 11a of the first substrate 10 through the solder 102. As a result, the potential of the ground of the first substrate 10 and the ground of the second substrate 20 become common. The common grounding of the first substrate 10 and the second substrate 20 covers the semiconductor chip 103, the signal metal pillar 26a, the signal patterns 14a, 24, the signal via 12a, and the signal terminal 14b, thereby forming an electromagnetic shielding structure against external interference. In this embodiment, mold sealing based on the sealing resin 101 is not performed. The other structures are the same as those of the embodiment 1. Among them, the structures of the embodiments 2-4 can also be combined with this embodiment.

[0050] In this embodiment, the grounding pattern and grounding vias of the first substrate 10 and the second substrate 20 cover the periphery of the semiconductor chip 103 and the like to form an electromagnetic shielding structure. As a result, electromagnetic shielding can be formed using a conventional packaging manufacturing method without using special processes such as evaporation, sputtering, and plating, thereby reducing the manufacturing cost of a high-frequency semiconductor package with electromagnetic shielding. In addition, the grounding pattern and grounding vias other than the grounding terminal 11b mounted on the main substrate are located on the inner side of the package. Therefore, the electromagnetic shielding structure is not exposed to the outside of the package, thereby improving mechanical reliability. In addition, there is no need for a molding process, which helps to reduce costs. In addition, since the semiconductor chip 103 is stored in the chamber 29, it helps to make the package thinner.

[0051] Description of Reference Numerals

[0052] 10…first substrate; 11a…ground pattern (first ground pattern); 11b…ground terminal; 12a…signal via (first signal via); 12b…ground via (first ground via); 13…first substrate; 14a…signal pattern (first signal pattern); 14b…signal terminal; 15…heat sink; 20…second substrate; 21a…ground pattern (second ground pattern); 21b…ground pattern (third ground pattern); 22…ground via (second ground via); 22a…signal via (second signal via); 22b…signal via (third signal via); 23…second substrate; 24…signal pattern 102a…signal solder ball (first connecting component); 102b…signal solder ball (second connecting component); 102c…grounding solder ball (third connecting component); 103…semiconductor chip; 103a…signal pad.

Claims

1. A high frequency semiconductor package, It is characterized in that have: A first substrate, comprising a first substrate, a signal terminal and a ground terminal disposed on a lower surface of the first substrate, a first signal pattern and a first ground pattern disposed on an upper surface of the first substrate, a first signal via hole penetrating the first substrate and electrically connecting the signal terminal to the first signal pattern, and a first ground via hole penetrating the first substrate and electrically connecting the ground terminal to the first ground pattern; A semiconductor chip mounted on the upper surface of the first substrate; A second substrate having a second base material, a second signal pattern and a second ground pattern arranged on a lower surface of the second base material, a third ground pattern arranged on the entire upper surface of the second base material, and a second ground via penetrating the second base material and electrically connecting the second ground pattern with the third ground pattern; a first connecting member connecting the signal pad of the semiconductor chip and the second signal pattern; a second connecting component, connecting the second signal pattern and the first signal pattern; a third connecting member, connecting the first ground pattern and the second ground pattern; as well as a sealing resin that seals the second substrate, the semiconductor chip, and the first connecting member to the third connecting member, The ground terminal, the first ground pattern to the third ground pattern, the first ground via, the second ground via, and the third connecting component constitute an electromagnetic shielding structure that covers the periphery of the signal terminal, the first signal pattern, the second signal pattern, the first signal via, the semiconductor chip, the first connecting component, and the second connecting component.

2. The high frequency semiconductor package according to claim 1, It is characterized in that The first to third connection parts have metal pillars.

3. The high frequency semiconductor package according to claim 1, It is characterized in that The first to third connecting members are solder balls.

4. The high-frequency semiconductor package according to any one of claims 1 to 3, It is characterized in that The second signal pattern includes: a third signal pattern electrically connected to the signal pad of the semiconductor chip through the first connection member, and a fourth signal pattern electrically connected to the first signal pattern through the second connection member. The second substrate has: a harmonic processing filter provided on an inner layer of the second base material, a second signal via electrically connecting the third signal pattern to the harmonic processing filter, and a third signal via electrically connecting the fourth signal pattern to the harmonic processing filter.

5. The high-frequency semiconductor package according to any one of claims 1 to 4, It is characterized in that The invention further includes a passive component mounted on the lower surface of the second substrate and electrically connected between the second signal pattern and the second ground pattern.

6. The high-frequency semiconductor package according to any one of claims 1 to 5, It is characterized in that An opening is provided in the central portion of the first substrate, A heat sink is pressed into the opening. The semiconductor chip is mounted on the heat sink.

7. A high frequency semiconductor package, It is characterized in that have: A first substrate, comprising a first substrate, a signal terminal and a ground terminal disposed on a lower surface of the first substrate, a first signal pattern and a first ground pattern disposed on an upper surface of the first substrate, a first signal via hole penetrating the first substrate and electrically connecting the signal terminal to the first signal pattern, and a first ground via hole penetrating the first substrate and electrically connecting the ground terminal to the first ground pattern; A semiconductor chip mounted on the upper surface of the first substrate; A second substrate having a second base material, a second signal pattern and a second ground pattern arranged on a lower surface of the second base material, a third ground pattern arranged on the entire upper surface of the second base material, and a second ground via penetrating the second base material and electrically connecting the second ground pattern with the third ground pattern; a first connecting member connecting the signal pad of the semiconductor chip and the second signal pattern; a second connecting component, connecting the second signal pattern and the first signal pattern; as well as a third connecting member connecting the first ground pattern and the second ground pattern, The ground terminal, the first to third ground patterns, the first ground via, the second ground via, and the third connecting component constitute an electromagnetic shielding structure that covers the periphery of the signal terminal, the first signal pattern, the second signal pattern, the first signal via, the semiconductor chip, the first connecting component, and the second connecting component. A chamber is provided on the upper surface side of the first substrate, The upper surface of the ground terminal is exposed in the cavity, The semiconductor chip is mounted on an upper surface of the ground terminal inside the cavity.

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