Separating wall, method for forming separating wall and semiconductor device comprising separating wall structure

Abstract

The invention provides an isolation wall, a method for forming the isolation wall and a semiconductor device comprising an isolation wall structure. The semiconductor device comprises a semiconductor substrate, a first electronic component and a second electronic component, at least one part of conductive structures of the first electronic component and the second electronic component are arranged in the semiconductor substrate, and the first electronic component and the second electronic component need to be electrically isolated. The insulating medium penetrates through the semiconductor substrate in the vertical direction of the semiconductor substrate and at least encloses the conductive structure, located in the conductor substrate, of one of the first electronic assembly and the second electronic assembly. The semiconductor device provided by the invention not only has high power density, but also has high isolation performance.

Description

Technical Field

[0001] The present invention relates to magnetic devices, and particularly to isolation walls, a method for forming isolation walls, and semiconductor devices including an isolation wall structure. Background Art

[0002] On-chip integrated micro-magnetic devices are thin-film magnetic elements manufactured on a silicon wafer or other substrates using micro-electromechanical system processes. "Thin film" means that the magnetic device develops from a traditional three-dimensional structure towards a planar two-dimensional direction, thus greatly reducing the volume of the magnetic device. This conforms to the development trend of power module integration and miniaturization under the advancement of high-frequency electronic technology development and integrated circuit technology development.

[0003] In a power module, magnetic elements such as transformers or inductors in passive devices are essential. In addition to storing and releasing energy during the switching cycle, magnetic devices also require an electrical isolation function in some special applications (such as in medicine, where high voltage must not be transmitted from the device to the patient's body). In this case, a transformer with an electrical isolation function is required.

[0004] In modern technology, when manufacturing micro-magnetic devices on a silicon wafer using micro-electromechanical system processes, if no circuits are made on the silicon wafer, even if the manufacturing process includes a silicon wafer thinning process, the silicon wafer is still just a blank support. This will occupy the volume space of the micro-magnetic device and reduce the power density of the micro-magnetic device.

[0005] To address the above problems, one approach is to manufacture micro-magnetic devices in a silicon wafer. Since the silicon wafer is a semiconductor material and has a high resistivity at room temperature, short circuits will not occur between the turns of the coils of the micro-magnetic device or between two coils. However, under high-temperature working conditions, the semiconductor material turns into a conductor state, causing short circuits between the turns of the coils and between two coils, resulting in the device malfunctioning. A way to handle this problem can be to grow a dielectric layer at the bonding position between the coil and the silicon wafer. However, this dielectric layer grown by the growth method has a thin thickness and low voltage withstand ability. This method is applicable to inductors but not to transformers. Summary of the Invention

[0006] In view of the deficiencies in the above-mentioned prior art, the technical problem to be solved by the present invention is to provide an isolation wall, a method for forming an isolation wall, and a semiconductor device including an isolation wall structure, which can at least to some extent solve the deficiencies in the above-mentioned prior art problems.

[0007] As the first aspect of the present invention, the technical solution of the embodiment of the provided isolation wall is as follows:

[0008] An isolation wall is applied to a semiconductor device. The semiconductor device includes a semiconductor substrate, a first electronic component, and a second electronic component. At least a part of the conductive structures of the first electronic component and the second electronic component are disposed in the semiconductor substrate, and the first electronic component and the second electronic component need to be electrically isolated. Wherein, the isolation wall includes: an insulating medium, which penetrates the semiconductor substrate in the vertical direction of the semiconductor substrate and encloses at least one of the conductive structures of the first electronic component and the second electronic component located in the conductor substrate.

[0009] Preferably, the thickness of the insulating medium in the vertical direction of the semiconductor substrate is the same as the thickness of the semiconductor substrate.

[0010] Preferably, the insulating medium is an organic polymer.

[0011] Preferably, the organic polymer is polyimide, benzocyclobutene, or epoxy resin.

[0012] Furthermore, the dielectric strength of the insulating medium is greater than the dielectric strength of the semiconductor substrate.

[0013] As a second aspect of the present invention, the technical solutions of the embodiments of the method for forming an isolation wall are as follows:

[0014] A method for forming the isolation wall according to any one of the first aspects above, which includes:

[0015] A trench setting step of setting a trench on the first surface of the semiconductor substrate, where the trench encloses at least one of the conductive structures of the first electronic component and the second electronic component located in the conductor substrate;

[0016] An insulating medium filling step of filling the trench with the insulating medium and curing the insulating medium;

[0017] A substrate thinning step of thinning the second surface opposite to the first surface of the semiconductor substrate until the substrate material at the bottom of the trench is completely removed to expose the insulating medium.

[0018] As a second aspect of the present invention, the technical solutions of the embodiments of the transformer including an isolation wall structure are as follows:

[0019] A semiconductor device, which includes a semiconductor substrate, a first electronic component, and a second electronic component. At least a part of the conductive structures of the first electronic component and the second electronic component are disposed in the semiconductor substrate, and the first electronic component and the second electronic component need to be electrically isolated. It is characterized in that: the semiconductor device further includes the isolation wall according to any one of the above first aspects, and the isolation wall at least encloses the conductive structures of at least one of the first electronic component and the second electronic component located in the conductor substrate.

[0020] Preferably, the semiconductor device is a transformer.

[0021] Preferably, the first electronic component includes the primary-side conductive coil winding of the transformer, which is disposed in the semiconductor substrate; the second electronic component includes the secondary-side conductive coil winding of the transformer, which is disposed in the semiconductor substrate.

[0022] Preferably, the first electronic component includes the primary-side conductive coil winding of the transformer, which is disposed in the semiconductor substrate; the second electronic component includes the first partial coil of the secondary-side conductive coil winding of the transformer, the second partial coil of the secondary-side conductive coil winding of the transformer, and a connecting post. The first partial coil of the secondary-side conductive coil winding of the transformer is disposed above the first surface of the semiconductor substrate, the second partial coil of the secondary-side conductive coil winding of the transformer is disposed below the second surface of the semiconductor substrate, and the connecting post is disposed in the semiconductor substrate and connects the first partial coil of the secondary-side conductive coil winding of the transformer and the second partial coil of the secondary-side conductive coil winding of the transformer.

[0023] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0024] The isolation wall in the embodiment of the present invention includes an insulating medium. The insulating medium penetrates the semiconductor substrate in the vertical direction of the semiconductor substrate and at least encloses the conductive structures of at least one of the first electronic component and the second electronic component in the semiconductor substrate of the semiconductor device. It not only effectively utilizes the blank area of the semiconductor substrate, reduces the volume of the entire semiconductor device, and improves the power density of the semiconductor device, but also, compared with the method of the substrate trench long dielectric layer, the setting of the isolation wall also improves the isolation breakdown voltage between the first electronic component and the second electronic component in the semiconductor substrate of the semiconductor device, and improves the isolation performance of the high-power density semiconductor device. Description of the Drawings

[0025] Figure 1 It is a cross-sectional view of the isolation wall along the horizontal direction of the semiconductor substrate in the first embodiment of the present invention;

[0026] Figure 2 Cross-sectional view of the isolation wall along the vertical direction of the semiconductor substrate according to the first embodiment of the present invention;

[0027] Figure 3 Flow chart of the method for forming an isolation wall according to the second embodiment of the present invention;

[0028] Figure 4 Schematic diagram of the substrate structure after the trench setting step according to the second embodiment of the present invention;

[0029] Figure 5 Schematic diagram of the substrate structure after the insulating medium filling step according to the second embodiment of the present invention;

[0030] Figure 6 Schematic diagram of the semiconductor substrate structure after the substrate thinning step according to the second embodiment of the present invention;

[0031] Figure 7 First schematic diagram of a transformer including an isolation wall according to the third embodiment of the present invention;

[0032] Figure 8 is Figure 7 Cross-sectional view after longitudinal division along the BB' line therein;

[0033] Figure 9 Second schematic diagram of a transformer including an isolation wall according to the third embodiment of the present invention;

[0034] Figure 10 Third schematic diagram of a transformer including an isolation wall according to the third embodiment of the present invention;

[0035] Figure 11 is Figure 10 Cross-sectional view of the transformer along the direction of the semiconductor substrate;

[0036] Figure 12 is Figure 10 Exploded view of the transformer.

[0037] Among them, the reference numerals are summarized as follows:

[0038] 100 is a semiconductor substrate base material; 110 is a trench; 120 is an insulating medium; 130 is a conductive structure of a first electronic component in the conductive substrate; 140 is a conductive structure of a second electronic component in the conductive substrate; 141 is a connection post of the secondary side coil winding; L1 is a dielectric layer, L2 is the second part of the coil layer of the secondary side conductive coil winding; L3 is the second part of the coil layer (including the connection post of the secondary side conductive coil) on the lower surface of the primary side conductive coil winding in the semiconductor substrate, L4 is the first part of the coil layer (including the connection post of the primary side conductive coil) on the upper surface of the primary side conductive coil winding in the semiconductor substrate, L5 is the first part of the coil layer (including the connection post of the primary side conductive coil winding) above the first surface of the semiconductor substrate of the secondary side conductive coil winding, and L6 is the pad layer of the transformer. Detailed implementation manners

[0039] The technical solutions in the present application will be clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the scope of protection of the present application.

[0040] In the description of the present application, it should be noted that the orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application. In addition, the terms "first", "second", "third", "step 1", "step 2", etc. are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0041] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0042] First embodiment

[0043] The present embodiment provides a partition wall. Figure 1 is a cross-sectional view of the partition wall of the first embodiment of the present invention along the horizontal direction of the semiconductor substrate, Figure 2 is a cross-sectional view of the partition wall of the first embodiment of the present invention along the vertical direction of the semiconductor substrate, Figure 2 is Figure 1 a sectional view after longitudinal division along the AA' line therein. Please refer to Figure 1 and Figure 2, the isolation wall of this embodiment is applied to a semiconductor device, which includes a semiconductor substrate 100, a first electronic component 130, and a second electronic component 140. At least a part of the conductive structures of the first electronic component 130 and the second electronic component are disposed in the semiconductor substrate 100, and the first electronic component 130 and the second electronic component 140 need to be electrically isolated. Among them, the isolation wall includes: an insulating medium 120, which is formed by Figure 2 It can be seen that the insulating medium 120 penetrates the semiconductor substrate 100 in the vertical direction of the semiconductor substrate 100, and is formed by Figure 1 It can be seen that the insulating medium 120 at least encloses the conductive structures of at least one of the first electronic component 130 and the second electronic component located in the conductor substrate. Specifically, Figure 1 In the figure, the second electronic component 140 is enclosed.

[0044] The semiconductor substrate therein can be, for example, a silicon substrate. From Figure 1 It can be seen that the insulating medium 120 isolates and encloses the conductive structures of the second electronic component 140 located in the conductor substrate. In this embodiment, the first electronic component 130 can also be isolated and enclosed, or both the first electronic component 130 and the second electronic component 140 can be isolated and enclosed simultaneously. The specific selection is determined according to the design requirements. From Figure 2 It can be seen that the thickness of the insulating medium 120 is equal to the thickness of the silicon substrate 100. Therefore, the insulating medium 120 completely separates the first electronic component 130 and the second electronic component 140, forming a high-voltage-resistant isolation wall.

[0045] It should be noted that the enclosure in the present invention does not mean that the insulating medium 120 makes a closed surround of the enclosed object. The enclosure of the present invention can also use the edge of the semiconductor substrate to achieve a non-closed enclosure. Both the first schematic diagram and the second schematic diagram of the transformer in the third embodiment are non-closed enclosures.

[0046] The isolation wall of this embodiment includes an insulating medium. The insulating medium penetrates the semiconductor substrate in the vertical direction of the semiconductor substrate and at least encloses the conductive structures of at least one of the first electronic component and the second electronic component in the semiconductor device substrate located in the conductor substrate. It not only effectively utilizes the blank area of the semiconductor substrate, reduces the volume of the entire semiconductor device, and improves the power density of the semiconductor device, but also compared with the way of the substrate trench long dielectric layer, the setting of the isolation wall also improves the isolation breakdown voltage between the first electronic component and the second electronic component in the semiconductor device substrate, and improves the isolation performance of the high-power density semiconductor device.

[0047] Preferably, the thickness of the insulating medium in the vertical direction of the semiconductor substrate is the same as the thickness of the semiconductor substrate. If it is too thin, the first electronic component and the second electronic component will form an electrical conductor through the unblocked part of the semiconductor substrate, resulting in a decline in the electrical isolation performance.

[0048] Preferably, the insulating medium is an organic polymer.

[0049] Preferably, the organic polymer is polyimide, benzocyclobutene (BCB), or epoxy resin. When polyimide is selected as the insulating medium, the first electronic component and the second electronic component can achieve an isolation breakdown voltage of nearly 200 KV / mm.

[0050] Furthermore, the dielectric strength of the insulating medium is greater than that of the semiconductor substrate, thereby providing ideal electrical isolation conditions through the high dielectric strength of the insulating medium.

[0051] Second Embodiment

[0052] This embodiment provides a method for forming any one of the isolation walls in the first embodiment. Figure 3 It is a flowchart of the method for forming an isolation wall in the second embodiment of the present invention. Figure 4 It is a schematic diagram of the substrate structure after the trench setting step in the second embodiment of the present invention. Figure 5 It is a schematic diagram of the substrate structure after the insulating medium filling step in the second embodiment of the present invention. Figure 6 It is a schematic diagram of the semiconductor substrate structure after the substrate thinning step in the second embodiment of the present invention, including:

[0053] S100 Trench Setting Step: Set trenches 110 on the first surface of the semiconductor substrate 100. The trenches 110 enclose at least one of the conductive structures of the first electronic component and the second electronic component located in the conductor substrate.

[0054] S200 Insulating Medium Filling Step: Fill the trenches with the insulating medium 120 and cure the insulating medium 120.

[0055] S300 Substrate Thinning Step: Thin the second surface opposite to the first surface of the semiconductor substrate 100 until the substrate material at the bottom of the trenches is completely removed to expose the insulating medium 120.

[0056] In the S10 trench setting step, the method for setting trenches includes dry etching or wet etching; specifically, it includes the following steps:

[0057] First, spin - coat a layer of photoresist on the upper surface, pre - bake and cure the photoresist, and then expose the photoresist through a designed mask. After exposure, medium baking can be carried out (or not, depending on the type of photoresist). Next, put the substrate containing the exposed photoresist into the developer for development, and perform post - baking after development (or not, depending on the type of photoresist).

[0058] Then start etching the semiconductor substrate. When dry etching (such as ICP etching, etc.) is selected, the etching gas etches the upper surface of the exposed semiconductor substrate through the opening area of the photoresist, thus forming trenches; if wet etching (solution etching) is selected, the etching solution also etches the upper surface of the exposed semiconductor substrate through the photoresist opening area, thus forming trenches. After forming the trenches, remove the photoresist, specifically by soaking it in a photoresist remover solution.

[0059] In the S200 insulating medium filling step, the insulating medium is an organic substance, which can be composed of polyimide or any other suitable material, such as it can include benzocyclobutene (BCB), epoxy resin, etc.; the method of filling the medium preferably uses spin - coating and leveling, and specifically includes the following steps:

[0060] Fix the semiconductor substrate on a spin - coater, place the upper surface of the semiconductor substrate facing upwards, use a dropper to drop the glue on the upper surface of the substrate, and try to cover the entire upper surface of the substrate; then the spin - coater rotates at a set speed to make the insulating medium dropped on the upper surface of the substrate as flat as possible and fill each trench;

[0061] Then the substrate is translated to a heating table for pre - curing, and the time, temperature, and heating rate of pre - curing are carried out according to the set parameters; after the pre - curing is completed, the substrate is transferred to a special oven for post - curing, and the substrate is taken out after the post - curing is completed; then use chemical mechanical polishing (CMP) equipment to thin and remove the part of the insulating medium that overflows outside the trench until there is no insulating medium residue in the area other than the trench on the upper surface 100(1) of the substrate.

[0062] In the S300 substrate thinning step, the specific method includes thinning using a thinning machine or performing planarization using chemical mechanical polishing (CMP) until the substrate part at the bottom of the trench is completely ground out, exposing the insulating medium.

[0063] The third embodiment

[0064] This embodiment provides a semiconductor device, which includes a semiconductor substrate, a first electronic component, and a second electronic component. At least a part of the first electronic component and the second electronic component are disposed in the semiconductor substrate, and the first electronic component and the second electronic component need to be electrically isolated. Wherein: The semiconductor device further includes any one of the isolation walls in the first embodiment, and the isolation wall at least encloses the conductive structures of at least one of the first electronic component and the second electronic component located in the conductor substrate.

[0065] Preferably, the semiconductor device is a transformer.

[0066] Preferably, the first electronic component includes a primary-side conductive coil winding of the transformer, which is disposed in the semiconductor substrate; the second electronic component includes a secondary-side conductive coil winding of the transformer, which is disposed in the semiconductor substrate.

[0067] Figure 7 This is the first schematic diagram of the transformer including an isolation wall according to the third embodiment of the present invention. Figure 8 For Figure 7 the sectional view longitudinally divided along the BB' line therein, please refer to Figure 7 and Figure 8 . The conductive structure 130 of the first electronic component located in the conductor substrate is the primary-side conductive coil winding of the transformer, and the shown coil structure is a 5-turn solenoid. The conductive structure of the second electronic component 140 located in the conductor substrate is the secondary-side conductive coil winding of the transformer, and the shown coil structure is also a 5-turn solenoid. Considering the high magnetic coupling design of the transformer, the solenoid tube orifices of the primary-side conductive coil winding are aligned with the solenoid tube orifices of the secondary-side conductive coil winding. The insulating medium 120 divides the semiconductor substrate into two parts, that is, Figure 7 the region on the left side of the insulating medium 120 and the region on the right side of the insulating medium 120 in Figure 7 , and separates the primary-side conductive coil winding and the secondary-side conductive coil winding. It can be seen from

[0068] Figure 9 This is the second schematic diagram of the transformer including an isolation wall according to the third embodiment of the present invention. Please refer to Figure 9 . The conductive structure 130 of the first electronic component located in the conductor substrate is the primary-side conductive coil winding of the transformer, and the shown structure is a planar spiral coil. The conductive structure 140 of the second electronic component located in the conductor substrate is the secondary-side conductive coil winding of the transformer, and the shown structure is also a planar spiral coil. The insulating medium 120 divides the semiconductor substrate into two parts, that is, Figure 9the regions inside and outside the insulating medium 120, which separate the primary-side conductive coil winding and the secondary-side conductive coil winding, and are composed of Figure 9 It can be seen that the insulating medium 120 encloses the secondary-side conductive coil winding, and the insulating medium 120 realizes a high electrical isolation performance between the primary-side conductive coil winding and the secondary-side conductive coil winding of the transformer.

[0069] Preferably, the first electronic component includes the primary-side conductive coil winding of the transformer, which is arranged in the semiconductor substrate; the second electronic component includes the first partial coil of the secondary-side conductive coil winding of the transformer, the second partial coil of the secondary-side conductive coil winding of the transformer, and the connecting post. The first partial coil of the secondary-side conductive coil winding of the transformer is arranged above the first surface of the semiconductor substrate, the second partial coil of the secondary-side conductive coil winding of the transformer is arranged below the second surface of the semiconductor substrate, and the connecting post is arranged in the semiconductor substrate and connects the first partial coil and the second partial coil of the secondary-side conductive coil winding of the transformer.

[0070] Figure 10 FIG. 9 is a third schematic diagram of the transformer with a partition wall according to the third embodiment of the present invention; Figure 11 is Figure 10 a cross-sectional view of the transformer along the direction of the semiconductor substrate; Figure 12 is Figure 10 an exploded view of the transformer. Please refer to Figures 10 to 12 , in which the conductive structure 130 in the conductor substrate of the first electronic component is the primary-side conductive coil winding of the transformer, shown as a planar spiral coil structure, and the conductive structure of the second electronic component 140 in the conductor substrate is the connecting post 141 of the secondary-side conductive coil winding of the transformer. The secondary-side conductive coil winding of the transformer further includes a first partial coil 142 arranged above the first surface of the semiconductor substrate 100 and a second partial coil 143 arranged below the second surface of the semiconductor substrate 100. Since Figure 10 it is a view cut along the horizontal direction of the semiconductor substrate in the semiconductor substrate 100, only the connecting post 141 connecting the first partial coil 142 and the second partial coil 143 of the secondary-side conductive coil winding of the transformer can be seen. The insulating medium 120 divides the semiconductor substrate into two parts, that is Figure 9 the regions inside and outside the insulating medium 120, which separate the primary-side conductive coil winding and the connecting post 141 of the secondary-side conductive coil winding, and are composed of Figure 10It can be seen that the insulating medium 120 encloses the connection posts 141 of the secondary-side conductive coil winding. The insulating medium 120 realizes the high electrical isolation performance between the primary-side conductive coil winding and the secondary-side conductive coil winding of the transformer. Based on the requirement of magnetic flux coupling, the first part coil 142 and the second part coil 143 of the secondary-side conductive coil winding are preferably arranged to be directly opposite to the primary-side conductive coil winding 130, and the projection areas overlap as much as possible. Since the first part coil 142 and the second part coil 143 of the secondary-side winding coil are respectively arranged above the first surface and below the opposite second surface of the semiconductor substrate, an insulating medium is also provided between the first part coil 142 and the second part coil 143 of the secondary-side conductive coil winding and the substrate surface. In this way, high isolation can be achieved through the insulating medium between the primary-side conductive coil winding 130 and the first part coil 142 and the second part coil 143 of the secondary-side conductive coil winding. However, because the first part coil 142 and the second part coil 143 of the secondary-side conductive coil winding need the connection posts 141 to penetrate the semiconductor substrate to achieve electrical connection, without the setting of the isolation wall, the primary-side conductive coil winding 130 arranged in the semiconductor substrate and the connection posts 141 of the secondary-side conductive coil winding can only be insulated by the semiconductor substrate, or can only be insulated by a thin layer of oxide (such as silicon dioxide) between the connection posts 141 and the substrate, and cannot withstand high-voltage isolation. The setting of the isolation wall completely separates the connection posts 141 of the secondary-side conductive coil winding and the semiconductor substrate supporting the connection posts 141 from the primary-side conductive coil winding 130 and the semiconductor substrate supporting the primary-side conductive coil winding 130, and realizes the electrical requirement of high isolation through the high dielectric constant of the isolation wall itself.

[0071] The above is only the preferred embodiment of the present invention. It should be noted that the above preferred embodiment should not be regarded as a limitation of the present invention. For those of ordinary skill in the art of this technology, without departing from the spirit and scope of the present invention, several improvements and retouches can be made. The improvement and retouch of the micro-device should also be regarded as the protection scope of the present invention. Here, no more embodiments are described in detail. The protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. An isolation wall, applied to a semiconductor device, the semiconductor device comprising a semiconductor substrate, a first electronic component and a second electronic component, the first electronic component and the second electronic component both having at least a portion of a conductive structure disposed in the semiconductor substrate, and the first electronic component and the second electronic component need to be electrically isolated, It is characterized in that The isolation wall includes an insulating medium, which penetrates the semiconductor substrate in a vertical direction of the semiconductor substrate and encloses a conductive structure of at least one of the first electronic component and the second electronic component located in the conductive substrate.

2. The isolation wall according to claim 1, Features: The thickness of the insulating medium in a vertical direction of the semiconductor substrate is the same as the thickness of the semiconductor substrate.

3. The isolation wall according to claim 1, Features: The insulating medium is an organic polymer.

4. The isolation wall according to claim 2, Features: The organic polymer is polyimide, benzocyclobutene or epoxy resin.

5. The isolation wall according to claim 1, Features: The dielectric strength of the insulating medium is greater than the dielectric strength of the semiconductor substrate.

6. A method for forming the separation wall according to any one of claims 1 to 5, It is characterized in that include: a groove setting step, providing a groove on the first surface of the semiconductor substrate, wherein the groove encloses at least a conductive structure of one of the first electronic component and the second electronic component located in the conductive substrate; an insulating medium filling step, filling the insulating medium in the groove and curing the insulating medium; The substrate thinning step thins the second surface of the semiconductor substrate opposite to the first surface until the substrate material at the bottom of the trench is completely removed to expose the insulating medium.

7. A semiconductor device, comprising a semiconductor substrate, a first electronic component and a second electronic component, wherein at least a portion of a conductive structure of the first electronic component and the second electronic component is disposed in the semiconductor substrate, and the first electronic component and the second electronic component need to be electrically isolated, Features: The semiconductor device further comprises the isolation wall according to any one of claims 1 to 5, wherein the isolation wall encloses at least a conductive structure of one of the first electronic component and the second electronic component located in the conductive substrate.

8. The semiconductor device according to claim 7, Features: The semiconductor device is a transformer.

9. The semiconductor device according to claim 8, Features: The first electronic component includes a primary-side conductive coil winding of the transformer, which is disposed in the semiconductor substrate; the second electronic component includes a secondary-side conductive coil winding of the transformer, which is disposed in the semiconductor substrate.

10. The semiconductor device according to claim 8, Features: The first electronic component includes a primary-side conductive coil winding of the transformer, which is arranged in the semiconductor substrate; the second electronic component includes a first portion of the coil of the secondary-side conductive coil winding of the transformer, a second portion of the coil of the secondary-side conductive coil winding of the transformer, and a connecting column, the first portion of the coil of the secondary-side conductive coil winding of the transformer is arranged on the first surface of the semiconductor substrate, the second portion of the coil of the secondary-side conductive coil winding of the transformer is arranged below the second surface of the semiconductor substrate, and the connecting column is arranged in the semiconductor substrate and connects the first portion of the coil of the secondary-side conductive coil winding of the transformer and the second portion of the coil of the secondary-side conductive coil winding of the transformer.

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