Method for estimating inductance core loss, processor and storage medium

CN120044326BActive Publication Date: 2026-08-28STATE GRID HUNAN ELECTRIC POWER COMPANY LIMITED +3
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Patent Information

Application Number
CN202510014675.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-01-06
Publication Date
2026-08-28
Estimated Expiration
2045-01-06

AI Technical Summary

Technical Problem

而在实际开关变换器中,电感两端的波形为占空比不一致的不规律PWM波形,使用斯坦梅茨公式及其变种公式依然会存在误差,因此需要一种方法能够针对于PWM波形的磁芯损耗估算方法

Benefits of technology

[0046] The above technical solution obtains the core loss of the inductor under symmetrical square wave waveforms with different DC bias, voltage, and switching frequency (cycle) through offline testing, and forms a lookup table of core losses for DC bias, voltage, and switching frequency. By decomposing the actual PWM waveform into square wave components, the DC bias, voltage, and switching frequency of each square wave component are identified, and the corresponding core loss is obtained from the lookup table. The core losses of each square wave component are added together to obtain the total estimated core loss of the inductor under the PWM waveform. This solution can effectively estimate the inductor core loss of a switching converter based on the PWM waveform.

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Abstract

The application discloses an inductance magnetic core loss estimation method, a processor and a storage medium. The magnetic core loss under a symmetric square wave under different current DC bias, voltage and switching frequency is obtained through an offline test mode, and a magnetic core loss lookup table about the current DC bias, voltage and switching frequency is formed. The actual PWM wave is decomposed into square wave components, the current DC bias, voltage and switching frequency of each square wave component are confirmed, the corresponding magnetic core loss is obtained in the lookup table, the magnetic core loss of each square wave component is added, and the total estimated magnetic core loss of the PWM wave is obtained.
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Description

Technical Field

[0001] This application relates to the field of switching converters, and more specifically to a method for estimating inductor core losses, a processor, and a storage medium. Background Technology

[0002] Efficiency is one of the important indicators for evaluating the performance of switching converters. As an important component of switching converters (such as inverters), the accurate estimation of the core loss of inductors is crucial for the overall efficiency evaluation and design of switching converters.

[0003] Currently, the most commonly used method for estimating inductor core losses is the Steinmetz formula. However, the Steinmetz formula can only be used to estimate core losses under sinusoidal waveforms without DC current bias. Therefore, generalized and improved versions of the Steinmetz formula have been proposed to apply it to other waveform shapes with DC current bias. In actual switching converters, the waveform across the inductor is an irregular PWM waveform with inconsistent duty cycles. Using the Steinmetz formula and its variants will still introduce errors. Therefore, a method for estimating core losses specifically for PWM waveforms is needed. Summary of the Invention

[0004] The purpose of this invention is to provide a method, processor, and storage medium for estimating inductor core losses, which can accurately estimate the inductor core losses of a switching converter based on PWM waveforms.

[0005] To achieve the above objectives, a first aspect of this application provides a method for estimating inductor core losses, applied to a switching converter, the switching converter including an inductor, the estimation method comprising:

[0006] Obtain the duty cycle of the PWM signal input to the switching converter for each cycle;

[0007] Obtain the modulation index of the switching converter;

[0008] For any period in the PWM signal, the PWM waveform of that period is decomposed into a symmetrical first square wave waveform and a second square wave waveform, wherein the first period of the first square wave waveform and the second period of the second square wave waveform satisfy: T1=2DT, T2= 2(1-D)T, where T1 is the length of the first period, T2 is the length of the second period, D is the duty cycle, and T is the length of the period.

[0009] Calculate the phase angle corresponding to the duty cycle in the modulated wave based on the duty cycle and modulation index of the cycle;

[0010] The output voltage of the switching converter is determined based on the voltage amplitude and fundamental angular frequency of the PWM signal.

[0011] Measure the impedance of the load of the switching converter;

[0012] The output current of the switching converter is determined based on the output voltage and impedance.

[0013] The DC bias current for this cycle is determined based on the modulation index, impedance, voltage amplitude, and phase angle.

[0014] The first core loss is found in the core loss lookup table based on the voltage amplitude, DC bias current, and first cycle of the PWM signal, and the second core loss is found in the core loss lookup table based on the voltage amplitude, DC bias current, and second cycle of the PWM signal.

[0015] The core loss for that period is determined by half the sum of the first core loss and the second core loss.

[0016] The total core loss of the PWM signal is obtained by summing the core losses of all cycles in the PWM signal.

[0017] In this embodiment of the application, the core loss lookup table is obtained through the following steps:

[0018] A test circuit is provided, the test circuit includes a first controllable switch, a second controllable switch, a third controllable switch and a fourth controllable switch, the first terminal of the first controllable switch is electrically connected to the second terminal of the second controllable switch, the first terminal of the third controllable switch is electrically connected to the first terminal of the fourth controllable switch, the second terminal of the first controllable switch is electrically connected to the second terminal of the third controllable switch, and the second terminal of the second controllable switch is electrically connected to the second terminal of the fourth controllable switch.

[0019] A DC power supply is provided, the two ends of which are electrically connected to the first terminal of the first controllable switch and the first terminal of the third controllable switch, respectively.

[0020] Multiple sample inductors are provided, and the two ends of the sample inductor to be tested among the multiple sample inductors are electrically connected to the second end of the first controllable switch and the second end of the second controllable switch, respectively. The inductance values ​​of the multiple sample inductors are all known.

[0021] Drive signals are provided to the control terminals of the first, second, third, and fourth controllable switches, such that the first and fourth controllable switches are turned on while the second and third controllable switches are turned off, and vice versa. The drive signals include a first part and a second part. The first part causes the first and fourth controllable switches to be turned on for a first duration while simultaneously causing the second and third controllable switches to be turned off for a first duration. The second part is a symmetrical square wave signal with a 50% duty cycle.

[0022] The integral of the quotient of the DC power supply voltage and the inductance value of the sample under test over the first time period is calculated to obtain the DC bias current of the sample under test inductance.

[0023] Measure the inductance voltage and inductance current across the inductor of the sample under test;

[0024] Calculate the integral of the product of inductor voltage and inductor current over the period of the square wave signal to obtain the core loss for that period.

[0025] Establish the relationship between core loss and DC bias current, voltage, and period;

[0026] By changing the inductance value of the sample inductor, the DC power supply voltage, and the period of the square wave signal, different relationships between core losses and DC bias current, voltage, and period were established.

[0027] The obtained correspondences are used to form a core loss lookup table.

[0028] In this embodiment of the application, the phase angle corresponding to the duty cycle of the period in the modulated wave is calculated based on the duty cycle and modulation index of the period, including:

[0029] If the carrier wave of the modulating wave is a sine wave, then the phase angle is calculated according to formula (1):

[0030] (1)

[0031] If the carrier wave of the modulating wave is a cosine wave, then the phase angle is calculated according to formula (2):

[0032] (2)

[0033] in, Let D be the phase angle, D be the duty cycle, and M be the modulation index.

[0034] In this embodiment, the output voltage of the switching converter is determined based on the voltage amplitude and fundamental angular frequency of the PWM signal, including calculating the output voltage according to formula (3):

[0035] (3)

[0036] in, Where M is the output voltage and M is the modulation index. For voltage amplitude, and ω is the fundamental angular frequency.

[0037] In this embodiment, determining the output current of the switching converter based on the output voltage and impedance includes calculating the output current according to formula (4):

[0038] (4)

[0039] in, For output current, This is the load impedance.

[0040] In this embodiment, determining the DC bias current for that period based on the modulation index, impedance, voltage amplitude, and phase angle includes calculating the DC bias current according to formula (5):

[0041] (5).

[0042] In this embodiment of the application, the first duration is greater than the period of the symmetrical square wave signal.

[0043] In the embodiments of this application, the first controllable switch, the second controllable switch, the third controllable switch, and the fourth controllable switch include IGBTs or MOSFETs.

[0044] A second aspect of this application provides a processor configured to perform the above-described method for estimating inductor core losses.

[0045] The third invention of this application provides a machine-readable storage medium storing instructions for causing a machine to perform the above-described method for estimating inductor core losses.

[0046] The above technical solution obtains the core loss of the inductor under symmetrical square wave waveforms with different DC bias, voltage, and switching frequency (cycle) through offline testing, and forms a lookup table of core losses for DC bias, voltage, and switching frequency. By decomposing the actual PWM waveform into square wave components, the DC bias, voltage, and switching frequency of each square wave component are identified, and the corresponding core loss is obtained from the lookup table. The core losses of each square wave component are added together to obtain the total estimated core loss of the inductor under the PWM waveform. This solution can effectively estimate the inductor core loss of a switching converter based on the PWM waveform.

[0047] Other features and advantages of the embodiments of the present invention will be described in detail in the following detailed description section. Attached Figure Description

[0048] The accompanying drawings are provided to further illustrate embodiments of the present invention and form part of the specification. They are used together with the following detailed description to explain the embodiments of the present invention, but do not constitute a limitation thereof. In the drawings:

[0049] Figure 1 This is a schematic flowchart illustrating a method for estimating inductor core losses according to an embodiment of this application;

[0050] Figure 2 This is a schematic diagram of the test circuit used to obtain the core loss lookup table in the method for estimating inductor core loss according to an embodiment of this application;

[0051] Figure 3 This illustration schematically shows the application of an embodiment of the present application. Figure 2 The diagram shows a waveform of the drive signal provided by the controllable switch of the test circuit.

[0052] Figure 4 The illustration shows a schematic diagram of splitting a PWM signal into two square wave signals in a method for estimating inductor core loss according to an embodiment of this application. Detailed Implementation

[0053] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit the scope of the present invention.

[0054] As the general inventive concept of this application, the core loss of the inductor under symmetrical square wave waveforms with different DC bias, voltage and switching frequency is obtained through offline testing, and a lookup table of core loss for DC bias, voltage and switching frequency is formed. By decomposing the actual PWM waveform into square wave components, the DC bias, voltage and switching frequency of each square wave component are identified and the corresponding core loss is obtained from the lookup table. The core losses of each square wave component are added together to obtain the total estimated core loss of the inductor under the PWM waveform.

[0055] Figure 2 This is a schematic diagram illustrating the test circuit used to obtain the core loss lookup table in the method for estimating inductor core loss according to an embodiment of this application. Figure 2 As shown, the core loss lookup table is obtained through the following steps:

[0056] A test circuit is provided, which includes a first controllable switch S1, a second controllable switch S2, a third controllable switch S3, and a fourth controllable switch S4. The first terminal of the first controllable switch S1 is electrically connected to the first terminal of the second controllable switch S2, the first terminal of the third controllable switch S3 is electrically connected to the first terminal of the fourth controllable switch S4, the second terminal of the first controllable switch S1 is electrically connected to the second terminal of the third controllable switch S3, and the second terminal of the second controllable switch S2 is electrically connected to the second terminal of the fourth controllable switch S4.

[0057] A DC power supply U is provided, and the two ends of the DC power supply U are electrically connected to the first end of the first controllable switch S1 and the first end of the third controllable switch S3, respectively.

[0058] Multiple sample inductors L are provided. The two ends of the sample inductor L to be tested among the multiple sample inductors L are electrically connected to the second end of the first controllable switch S1 and the second end of the second controllable switch S2, respectively. The inductance values ​​of the multiple sample inductors L are all known.

[0059] A drive signal is provided to the control terminals of the first controllable switch S1, the second controllable switch S2, the third controllable switch S3, and the fourth controllable switch S4, so that the first controllable switch S1 and the fourth controllable switch S4 are turned on while the second controllable switch S2 and the third controllable switch S3 are turned off, and the second controllable switch S2 and the third controllable switch S3 are turned on while the first controllable switch S1 and the fourth controllable switch S4 are turned off, respectively. The drive signal includes a first part and a second part. The first part causes the first controllable switch S1 and the fourth controllable switch S4 to be turned on for a first duration while the second controllable switch S2 and the third controllable switch S3 are turned off for a first duration. The second part is a symmetrical square wave signal with a 50% duty cycle.

[0060] The integral of the quotient of the voltage of the DC power supply U and the inductance value of the inductor L of the sample under test over the first time period is calculated to obtain the DC bias current of the inductor L of the sample under test.

[0061] Measure the inductance voltage and inductance current across the inductor L of the sample under test;

[0062] Calculate the integral of the product of inductor voltage and inductor current over the period of the square wave signal to obtain the core loss for that period.

[0063] Establish the relationship between core loss and DC bias current, voltage, and period;

[0064] By changing the inductance value of the sample inductor L, the DC power supply voltage U, and the period of the square wave signal, different relationships between core losses and DC bias current, voltage, and period were constructed.

[0065] The obtained correspondences are used to form a core loss lookup table.

[0066] Specifically, refer to Figure 2 and Figure 3The drive signals provided to the controllable switches can be complementary first and second drive signals. The first drive signal is sent to the first controllable switch S1 and the fourth controllable switch S4, and the second drive signal is sent to the second controllable switch S2 and the third controllable switch S3. The complementarity of the first and second drive signals means that when the first drive signal is high, the second drive signal is low, thus preventing a short circuit in the DC power supply U. In the example, examples of the first controllable switch S1, the second controllable switch S2, the third controllable switch S3, and the fourth controllable switch S4 can include, but are not limited to, IGBTs and MOSFETs. In one embodiment of this application, the voltage of the DC power supply U is adjustable.

[0067] Select a sample inductor L, whose inductance value is known. Connect this sample inductor L between the second terminals of the first controllable switch S1 and the second terminals of the second controllable switch S2 (or between the second terminals of the third controllable switch S3 and the fourth controllable switch S4). The drive signal input to these four controllable switches is initially a long signal; for example, if the first controllable switch S1 and the fourth controllable switch S4 are input with a high level, then the second controllable switch S2 and the third controllable switch S3 will be input with a low level, and the signal length is the first duration. The first controllable switch S1 and the third controllable switch S3 are turned on, and a power supply voltage is applied across the sample inductor L, generating a current bias in the inductor. The calculation formula is as follows:

[0068]

[0069] in, For the current bias of the inductor, V DC The voltage is the DC power supply U. Let L be the inductance value of the sample inductor. This is the signal length.

[0070] The controllable switches are then input with a symmetrical square wave signal with a 50% duty cycle. Within one cycle of the square wave signal (the switching cycle), the first controllable switch S1, the fourth controllable switch S4, the second controllable switch S2, and the third controllable switch S3 are turned on for the same amount of time. When the first controllable switch S1 and the fourth controllable switch S4 are turned on (at which time the second controllable switch S2 and the third controllable switch S3 are turned off), the voltage applied to the sample inductor L is equal to the power supply voltage V of the DC power supply U, and the slope of the inductor current change is V. DC / L. When the second controllable switch S2 and the third controllable switch S3 are turned on, the voltage applied to the sample inductor L is equal to the negative power supply voltage -V. DC The slope of the inductor current change is -V DC / L. Since the first controllable switch S1, the fourth controllable switch S4, the second controllable switch S2, and the third controllable switch S3 have the same turn-on time, the net change in inductor current during the entire switching cycle is 0. In one example, the signal length... It can be greater than the switching period of a square wave signal.

[0071] The core loss can be calculated by collecting the voltage and inductor current across the inductor L of the sample (e.g., using a voltage and current acquisition device), multiplying the two, and integrating them over the switching cycle. The formula is as follows:

[0072]

[0073] in, For core loss, V L Inductor voltage, For inductor current, T The period of the square wave signal (switching period) can be used to construct a... Q = ( I B , V DC , 1 / T The correspondence between ).

[0074] By selecting sample inductance L with different inductance values, changing the voltage of the DC power supply U, and altering the period of the square wave waveform, and by repeating the above method in various combinations of these three factors, multiple results can be obtained. Q = ( I B , V DC , 1 / T The correspondence between the magnetic core loss and the magnetic core loss can be constructed based on these correspondences.

[0075] In practical applications, the following can be adopted: Figure 1 The method shown estimates the inductor core losses of a switching converter. Examples of switching converters can include inverters, which may include inductors. Figure 1 This is a schematic flowchart illustrating a method for estimating inductor core losses according to an embodiment of this application. Figure 1 As shown, the estimation method may include the following steps.

[0076] Step S1: Obtain the duty cycle of each cycle of the PWM signal input to the switching converter;

[0077] Step S2: Obtain the modulation index of the switching converter;

[0078] Specifically, the duty cycle of each cycle of the PWM signal and the modulation index of the switching converter are customized by the designer according to the specific application scenario. Once the modulation waveform is determined, the duty cycle of each switching cycle of the PWM waveform is also determined.

[0079] Step S3: For any period in the PWM signal, decompose the PWM waveform of that period into a symmetrical first square wave waveform and a second square wave waveform, wherein the first period of the first square wave waveform and the second period of the second square wave waveform satisfy: T1=2DT, T2=2(1-D)T, where T1 is the length of the first period, T2 is the length of the second period, D is the duty cycle, and T is the length of the period.

[0080] like Figure 4 As shown, taking a switching cycle with a duty cycle of 0.6 as an example, the waveform of this switching cycle can be decomposed into two symmetrical square wave waveforms. The switching frequency of one waveform is 1 / 1.2Tsw, and the voltage is V. DC The other waveform has a switching frequency of 1 / 0.8Tsw and a voltage of V. DC Tsw represents the switching cycle.

[0081] Step S4: Calculate the phase angle corresponding to the duty cycle of the cycle in the modulated wave based on the duty cycle and modulation index of the cycle;

[0082] The calculation of DC bias current first requires calculating the phase of the duty cycle in the modulation waveform corresponding to that cycle (switching cycle). The calculation formula is as follows:

[0083] If the carrier wave is a sine wave (sine function):

[0084] If the carrier wave is a cosine wave (cosine function):

[0085] in, For this phase, M is the inverter modulation index.

[0086] The output voltage of the inverter can be expressed as:

[0087]

[0088] in, This is the output voltage of the inverter. This is the fundamental angular frequency of the PWM signal.

[0089] Step S5: Measure the impedance of the load of the switching converter;

[0090] The inverter's output current can be calculated based on the load:

[0091]

[0092] in, This is the load impedance.

[0093] Step S6: Determine the DC bias current for this cycle based on the modulation index, impedance, voltage amplitude, and phase angle;

[0094] Specifically, the DC bias current can be calculated using the following formula:

[0095]

[0096] Step S7: Find the corresponding first core loss in the core loss lookup table based on the voltage amplitude of the PWM signal, the DC bias current, and the first cycle; and find the corresponding second core loss in the core loss lookup table based on the voltage amplitude of the PWM signal, the DC bias current, and the second cycle.

[0097] Step S8: Determine half of the sum of the first core loss and the second core loss as the core loss for this cycle.

[0098] Step S9: Sum the core losses of all cycles in the PWM signal to obtain the total core loss of the PWM signal.

[0099] Specifically, taking the aforementioned switching cycle with a duty cycle of 0.6 as an example, the DC bias current is calculated. I B Then, you can find Q1 = (V) in the core loss lookup table. DC , I B 1 / 1.2T sw ) and Q1 = (V DC , I B 1 / 0.8T sw The first and second core losses are respectively represented by the first and second core losses. Since the actual switching cycle is formed by combining half of each of the two decomposed symmetrical square waves, the core losses under the two symmetrical square wave waveforms need to be added together and divided by 2 to obtain the core loss under the actual switching cycle. This process is repeated for all switching cycles in the entire PWM waveform, and the sum of these values ​​yields the total core loss for that PWM waveform. The total core loss is expressed by the following formula:

[0100]

[0101] in, Where n is the total core loss and n is the number of switching cycles in the PWM waveform. It is the sum of the first core loss and the second core loss in the nth switching cycle.

[0102] This application also provides a processor configured to execute the estimation method for inductor core loss described above.

[0103] This application also provides a machine-readable storage medium storing instructions that cause a machine to execute the estimation method for inductor core loss described in the above embodiments.

[0104] The above technical solution obtains the core loss of the inductor under symmetrical square wave waveforms with different DC bias, voltage, and switching frequency (cycle) through offline testing, and forms a lookup table of core losses for DC bias, voltage, and switching frequency. By decomposing the actual PWM waveform into square wave components, the DC bias, voltage, and switching frequency of each square wave component are identified, and the corresponding core loss is obtained from the lookup table. The core losses of each square wave component are added together to obtain the total estimated core loss of the inductor under the PWM waveform. This solution can effectively estimate the inductor core loss of a switching converter based on the PWM waveform.

[0105] It should be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0106] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A method for estimating the loss of an inductor core, characterized in that, Applied to a switching converter, the switching converter including an inductor, the estimation method includes: Obtain the duty cycle of the PWM signal input to the switching converter for each cycle; Obtain the modulation index of the switching converter; For any period of the PWM signal, the PWM waveform of that period is decomposed into a symmetrical first square wave waveform and a second square wave waveform, wherein the first period of the first square wave waveform and the second period of the second square wave waveform satisfy: T1=2DT, T2=2(1-D)T, T1 is the length of the first period, T2 is the length of the second period, D is the duty cycle, and T is the length of the period; Calculate the phase angle corresponding to the duty cycle in the modulated wave based on the duty cycle and modulation index of the cycle; Measure the impedance of the load of the switching converter; The DC bias current for this cycle is determined based on the modulation index, the impedance, the voltage amplitude of the PWM signal, and the phase angle. The first core loss is found in the core loss lookup table based on the voltage amplitude of the PWM signal, the DC bias current, and the first cycle; and the second core loss is found in the core loss lookup table based on the voltage amplitude of the PWM signal, the DC bias current, and the second cycle. Half of the sum of the first core loss and the second core loss is determined as the core loss for that period. The total core loss of the PWM signal is obtained by summing the core losses of all cycles in the PWM signal.

2. The estimation method according to claim 1, characterized in that, The core loss lookup table is obtained through the following steps: A test circuit is provided, the test circuit including a first controllable switch, a second controllable switch, a third controllable switch and a fourth controllable switch, a first terminal of the first controllable switch is electrically connected to a first terminal of the second controllable switch, a first terminal of the third controllable switch is electrically connected to a first terminal of the fourth controllable switch, a second terminal of the first controllable switch is electrically connected to a second terminal of the third controllable switch, and a second terminal of the second controllable switch is electrically connected to a second terminal of the fourth controllable switch; A DC power supply is provided, the two ends of which are electrically connected to the first terminal of the first controllable switch and the first terminal of the third controllable switch, respectively. Multiple sample inductors are provided, and the two ends of the sample inductor to be tested among the multiple sample inductors are electrically connected to the second end of the first controllable switch and the second end of the second controllable switch, respectively. The inductance values ​​of the multiple sample inductors are all known. A drive signal is provided to the control terminals of the first controllable switch, the second controllable switch, the third controllable switch, and the fourth controllable switch, so that the first controllable switch and the fourth controllable switch are turned on while the second controllable switch and the third controllable switch are turned off, and the second controllable switch and the third controllable switch are turned on while the first controllable switch and the fourth controllable switch are turned off. The drive signal includes a first part and a second part. The first part causes the first controllable switch and the fourth controllable switch to be turned on for a first duration while the second controllable switch and the third controllable switch are turned off for a first duration. The second part is a symmetrical square wave signal with a duty cycle of 50%. The integral of the quotient of the voltage of the DC power supply and the inductance value of the inductor of the sample under test over the first time period is calculated to obtain the DC bias current of the inductor of the sample under test. Measure the inductance voltage and inductance current across the inductor of the sample under test; Calculate the integral of the product of the inductor voltage and inductor current over the period of the square wave signal to obtain the core loss for that period. The relationship between core loss and the DC bias current of the sample inductance, the voltage of the DC power supply, and the period of the square wave signal was established. By changing the inductance value of the sample inductor, the DC power supply voltage, and the period of the square wave signal, the corresponding relationship between different core losses and the DC bias current of the sample inductor, the DC power supply voltage, and the period of the square wave signal was constructed. The obtained correspondences are used to form a core loss lookup table.

3. The estimation method according to claim 1, characterized in that, The step of calculating the phase angle corresponding to the duty cycle in the modulated wave based on the duty cycle and modulation index of the cycle includes: If the carrier wave of the modulating wave is a sine wave, then the phase angle is calculated according to formula (1): (1) If the carrier wave of the modulating wave is a cosine wave, then the phase angle is calculated according to formula (2): (2) in, Let D be the phase angle, D be the duty cycle, and M be the modulation index.

4. The estimation method according to claim 1, characterized in that, It also includes determining the output voltage of the switching converter based on the voltage amplitude and fundamental angular frequency of the PWM signal, specifically including calculating the output voltage according to formula (3): (3) in, The output voltage is M, and the modulation index is M. The voltage amplitude, and The fundamental angular frequency is denoted as .

5. The estimation method according to claim 4, characterized in that, It also includes determining the output current of the switching converter based on the output voltage and the impedance, specifically including calculating the output current according to formula (4): (4) in, The output current, The load impedance is denoted as .

6. The estimation method according to claim 1, characterized in that, The determination of the DC bias current for this period based on the modulation index, the impedance, the voltage amplitude, and the phase angle includes calculating the DC bias current according to formula (5): (5) Where M is the modulation index. The voltage amplitude, The load impedance is... The phase angle is denoted as .

7. The estimation method according to claim 2, characterized in that, The first duration is greater than the period of the symmetrical square wave signal.

8. The estimation method according to claim 2, characterized in that, The first controllable switch, the second controllable switch, the third controllable switch, and the fourth controllable switch include IGBTs or MOSFETs.

9. A processor, characterized in that, It is configured to perform the estimation method for inductor core loss according to any one of claims 1 to 8.

10. A machine-readable storage medium having instructions stored thereon for causing a machine to perform the method for estimating inductor core losses according to any one of claims 1 to 8.

Citation Information

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